1a043e8c7SAdrian Chadd /*- 2a043e8c7SAdrian Chadd * Copyright (c) 2011-2012 Stefan Bethke. 3a043e8c7SAdrian Chadd * All rights reserved. 4a043e8c7SAdrian Chadd * 5a043e8c7SAdrian Chadd * Redistribution and use in source and binary forms, with or without 6a043e8c7SAdrian Chadd * modification, are permitted provided that the following conditions 7a043e8c7SAdrian Chadd * are met: 8a043e8c7SAdrian Chadd * 1. Redistributions of source code must retain the above copyright 9a043e8c7SAdrian Chadd * notice, this list of conditions and the following disclaimer. 10a043e8c7SAdrian Chadd * 2. Redistributions in binary form must reproduce the above copyright 11a043e8c7SAdrian Chadd * notice, this list of conditions and the following disclaimer in the 12a043e8c7SAdrian Chadd * documentation and/or other materials provided with the distribution. 13a043e8c7SAdrian Chadd * 14a043e8c7SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15a043e8c7SAdrian Chadd * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16a043e8c7SAdrian Chadd * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17a043e8c7SAdrian Chadd * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18a043e8c7SAdrian Chadd * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19a043e8c7SAdrian Chadd * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20a043e8c7SAdrian Chadd * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21a043e8c7SAdrian Chadd * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22a043e8c7SAdrian Chadd * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23a043e8c7SAdrian Chadd * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24a043e8c7SAdrian Chadd * SUCH DAMAGE. 25a043e8c7SAdrian Chadd * 26a043e8c7SAdrian Chadd * $FreeBSD$ 27a043e8c7SAdrian Chadd */ 28a043e8c7SAdrian Chadd 29a043e8c7SAdrian Chadd #include <sys/param.h> 30a043e8c7SAdrian Chadd #include <sys/bus.h> 31a043e8c7SAdrian Chadd #include <sys/errno.h> 32a043e8c7SAdrian Chadd #include <sys/kernel.h> 333d02237cSLuiz Otavio O Souza #include <sys/lock.h> 343d02237cSLuiz Otavio O Souza #include <sys/malloc.h> 35a043e8c7SAdrian Chadd #include <sys/module.h> 363d02237cSLuiz Otavio O Souza #include <sys/mutex.h> 37a043e8c7SAdrian Chadd #include <sys/socket.h> 38a043e8c7SAdrian Chadd #include <sys/sockio.h> 39a043e8c7SAdrian Chadd #include <sys/sysctl.h> 40a043e8c7SAdrian Chadd #include <sys/systm.h> 41a043e8c7SAdrian Chadd 42a043e8c7SAdrian Chadd #include <net/if.h> 433d02237cSLuiz Otavio O Souza #include <net/if_var.h> 44a043e8c7SAdrian Chadd #include <net/ethernet.h> 45a043e8c7SAdrian Chadd #include <net/if_media.h> 46a043e8c7SAdrian Chadd #include <net/if_types.h> 47a043e8c7SAdrian Chadd 48a043e8c7SAdrian Chadd #include <machine/bus.h> 49a043e8c7SAdrian Chadd #include <dev/iicbus/iic.h> 50a043e8c7SAdrian Chadd #include <dev/iicbus/iiconf.h> 51a043e8c7SAdrian Chadd #include <dev/iicbus/iicbus.h> 52a043e8c7SAdrian Chadd #include <dev/mii/mii.h> 53a043e8c7SAdrian Chadd #include <dev/mii/miivar.h> 54a043e8c7SAdrian Chadd 55a043e8c7SAdrian Chadd #include <dev/etherswitch/etherswitch.h> 56a043e8c7SAdrian Chadd #include <dev/etherswitch/rtl8366/rtl8366rbvar.h> 57a043e8c7SAdrian Chadd 58a043e8c7SAdrian Chadd #include "iicbus_if.h" 59a043e8c7SAdrian Chadd #include "miibus_if.h" 60a043e8c7SAdrian Chadd #include "etherswitch_if.h" 61a043e8c7SAdrian Chadd 62a043e8c7SAdrian Chadd 63a043e8c7SAdrian Chadd struct rtl8366rb_softc { 64a043e8c7SAdrian Chadd struct mtx sc_mtx; /* serialize access to softc */ 65a043e8c7SAdrian Chadd int smi_acquired; /* serialize access to SMI/I2C bus */ 66a043e8c7SAdrian Chadd struct mtx callout_mtx; /* serialize callout */ 67a043e8c7SAdrian Chadd device_t dev; 68a3219359SAdrian Chadd int vid[RTL8366RB_NUM_VLANS]; 69a043e8c7SAdrian Chadd char *ifname[RTL8366RB_NUM_PHYS]; 70a043e8c7SAdrian Chadd device_t miibus[RTL8366RB_NUM_PHYS]; 71a043e8c7SAdrian Chadd struct ifnet *ifp[RTL8366RB_NUM_PHYS]; 72a043e8c7SAdrian Chadd struct callout callout_tick; 73a043e8c7SAdrian Chadd }; 74a043e8c7SAdrian Chadd 75a043e8c7SAdrian Chadd static etherswitch_info_t etherswitch_info = { 76a3219359SAdrian Chadd .es_nports = RTL8366RB_NUM_PORTS, 77a3219359SAdrian Chadd .es_nvlangroups = RTL8366RB_NUM_VLANS, 78bfae9329SLuiz Otavio O Souza .es_name = "Realtek RTL8366RB", 79bfae9329SLuiz Otavio O Souza .es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q, 80a043e8c7SAdrian Chadd }; 81a043e8c7SAdrian Chadd 82a043e8c7SAdrian Chadd #define RTL_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 83a043e8c7SAdrian Chadd #define RTL_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 84a043e8c7SAdrian Chadd #define RTL_LOCK_ASSERT(_sc, _what) mtx_assert(&(_s)c->sc_mtx, (_what)) 85a043e8c7SAdrian Chadd #define RTL_TRYLOCK(_sc) mtx_trylock(&(_sc)->sc_mtx) 86a043e8c7SAdrian Chadd 87a043e8c7SAdrian Chadd #define RTL_WAITOK 0 88a043e8c7SAdrian Chadd #define RTL_NOWAIT 1 89a043e8c7SAdrian Chadd 90a043e8c7SAdrian Chadd #define RTL_SMI_ACQUIRED 1 91a043e8c7SAdrian Chadd #define RTL_SMI_ACQUIRED_ASSERT(_sc) \ 92a043e8c7SAdrian Chadd KASSERT((_sc)->smi_acquired == RTL_SMI_ACQUIRED, ("smi must be acquired @%s", __FUNCTION__)) 93a043e8c7SAdrian Chadd 94a043e8c7SAdrian Chadd #if defined(DEBUG) 95a043e8c7SAdrian Chadd #define DPRINTF(dev, args...) device_printf(dev, args) 96a043e8c7SAdrian Chadd #define DEVERR(dev, err, fmt, args...) do { \ 97a043e8c7SAdrian Chadd if (err != 0) device_printf(dev, fmt, err, args); \ 98a043e8c7SAdrian Chadd } while (0) 99a043e8c7SAdrian Chadd #define DEBUG_INCRVAR(var) do { \ 100a043e8c7SAdrian Chadd var++; \ 101a043e8c7SAdrian Chadd } while (0) 102a043e8c7SAdrian Chadd 103a043e8c7SAdrian Chadd static int callout_blocked = 0; 104a043e8c7SAdrian Chadd static int iic_select_retries = 0; 105a043e8c7SAdrian Chadd static int phy_access_retries = 0; 106a043e8c7SAdrian Chadd static SYSCTL_NODE(_debug, OID_AUTO, rtl8366rb, CTLFLAG_RD, 0, "rtl8366rb"); 107a043e8c7SAdrian Chadd SYSCTL_INT(_debug_rtl8366rb, OID_AUTO, callout_blocked, CTLFLAG_RW, &callout_blocked, 0, 108a043e8c7SAdrian Chadd "number of times the callout couldn't acquire the bus"); 109a043e8c7SAdrian Chadd SYSCTL_INT(_debug_rtl8366rb, OID_AUTO, iic_select_retries, CTLFLAG_RW, &iic_select_retries, 0, 110a043e8c7SAdrian Chadd "number of times the I2C bus selection had to be retried"); 111a043e8c7SAdrian Chadd SYSCTL_INT(_debug_rtl8366rb, OID_AUTO, phy_access_retries, CTLFLAG_RW, &phy_access_retries, 0, 112a043e8c7SAdrian Chadd "number of times PHY register access had to be retried"); 113a043e8c7SAdrian Chadd #else 114a043e8c7SAdrian Chadd #define DPRINTF(dev, args...) 115a043e8c7SAdrian Chadd #define DEVERR(dev, err, fmt, args...) 116a043e8c7SAdrian Chadd #define DEBUG_INCRVAR(var) 117a043e8c7SAdrian Chadd #endif 118a043e8c7SAdrian Chadd 119a043e8c7SAdrian Chadd static int smi_probe(device_t dev); 120a043e8c7SAdrian Chadd static int smi_read(device_t dev, uint16_t addr, uint16_t *data, int sleep); 121a043e8c7SAdrian Chadd static int smi_write(device_t dev, uint16_t addr, uint16_t data, int sleep); 122a043e8c7SAdrian Chadd static int smi_rmw(device_t dev, uint16_t addr, uint16_t mask, uint16_t data, int sleep); 123a043e8c7SAdrian Chadd static void rtl8366rb_tick(void *arg); 124a043e8c7SAdrian Chadd static int rtl8366rb_ifmedia_upd(struct ifnet *); 125a043e8c7SAdrian Chadd static void rtl8366rb_ifmedia_sts(struct ifnet *, struct ifmediareq *); 126a043e8c7SAdrian Chadd 127a043e8c7SAdrian Chadd static void 128a043e8c7SAdrian Chadd rtl8366rb_identify(driver_t *driver, device_t parent) 129a043e8c7SAdrian Chadd { 130a043e8c7SAdrian Chadd device_t child; 131a043e8c7SAdrian Chadd struct iicbus_ivar *devi; 132a043e8c7SAdrian Chadd 133a043e8c7SAdrian Chadd if (device_find_child(parent, "rtl8366rb", -1) == NULL) { 134a043e8c7SAdrian Chadd child = BUS_ADD_CHILD(parent, 0, "rtl8366rb", -1); 135a043e8c7SAdrian Chadd devi = IICBUS_IVAR(child); 136a043e8c7SAdrian Chadd devi->addr = RTL8366RB_IIC_ADDR; 137a043e8c7SAdrian Chadd } 138a043e8c7SAdrian Chadd } 139a043e8c7SAdrian Chadd 140a043e8c7SAdrian Chadd static int 141a043e8c7SAdrian Chadd rtl8366rb_probe(device_t dev) 142a043e8c7SAdrian Chadd { 143a043e8c7SAdrian Chadd if (smi_probe(dev) != 0) 144a043e8c7SAdrian Chadd return (ENXIO); 145a043e8c7SAdrian Chadd device_set_desc(dev, "RTL8366RB Ethernet Switch Controller"); 146a043e8c7SAdrian Chadd return (BUS_PROBE_DEFAULT); 147a043e8c7SAdrian Chadd } 148a043e8c7SAdrian Chadd 149a043e8c7SAdrian Chadd static void 150a043e8c7SAdrian Chadd rtl8366rb_init(device_t dev) 151a043e8c7SAdrian Chadd { 152bfae9329SLuiz Otavio O Souza int i; 153bfae9329SLuiz Otavio O Souza struct rtl8366rb_softc *sc; 154bfae9329SLuiz Otavio O Souza 155a043e8c7SAdrian Chadd /* Initialisation for TL-WR1043ND */ 156a043e8c7SAdrian Chadd smi_rmw(dev, RTL8366RB_RCR, 157a043e8c7SAdrian Chadd RTL8366RB_RCR_HARD_RESET, 158a043e8c7SAdrian Chadd RTL8366RB_RCR_HARD_RESET, RTL_WAITOK); 159a043e8c7SAdrian Chadd DELAY(100000); 160a043e8c7SAdrian Chadd /* Enable 16 VLAN mode */ 161a043e8c7SAdrian Chadd smi_rmw(dev, RTL8366RB_SGCR, 162a043e8c7SAdrian Chadd RTL8366RB_SGCR_EN_VLAN | RTL8366RB_SGCR_EN_VLAN_4KTB, 163a043e8c7SAdrian Chadd RTL8366RB_SGCR_EN_VLAN, RTL_WAITOK); 164bfae9329SLuiz Otavio O Souza /* Initialize our vlan table. */ 165bfae9329SLuiz Otavio O Souza sc = device_get_softc(dev); 166bfae9329SLuiz Otavio O Souza for (i = 0; i <= 1; i++) 167bfae9329SLuiz Otavio O Souza sc->vid[i] = (i + 1) | ETHERSWITCH_VID_VALID; 168bfae9329SLuiz Otavio O Souza /* Remove port 0 from VLAN 1. */ 169a043e8c7SAdrian Chadd smi_rmw(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, 0), 170a043e8c7SAdrian Chadd (1 << 0), 0, RTL_WAITOK); 171bfae9329SLuiz Otavio O Souza /* Add port 0 untagged and port 5 tagged to VLAN 2. */ 172a043e8c7SAdrian Chadd smi_rmw(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, 1), 173a043e8c7SAdrian Chadd ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_MEMBER_SHIFT) 174a043e8c7SAdrian Chadd | ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_UNTAG_SHIFT), 175a043e8c7SAdrian Chadd ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_MEMBER_SHIFT 176a043e8c7SAdrian Chadd | ((1 << 0) << RTL8366RB_VMCR_MU_UNTAG_SHIFT)), 177a043e8c7SAdrian Chadd RTL_WAITOK); 178bfae9329SLuiz Otavio O Souza /* Set PVID 2 for port 0. */ 179a043e8c7SAdrian Chadd smi_rmw(dev, RTL8366RB_PVCR_REG(0), 180a043e8c7SAdrian Chadd RTL8366RB_PVCR_VAL(0, RTL8366RB_PVCR_PORT_MASK), 181a043e8c7SAdrian Chadd RTL8366RB_PVCR_VAL(0, 1), RTL_WAITOK); 182a043e8c7SAdrian Chadd } 183a043e8c7SAdrian Chadd 184a043e8c7SAdrian Chadd static int 185a043e8c7SAdrian Chadd rtl8366rb_attach(device_t dev) 186a043e8c7SAdrian Chadd { 187a043e8c7SAdrian Chadd uint16_t rev = 0; 188a043e8c7SAdrian Chadd struct rtl8366rb_softc *sc; 189a043e8c7SAdrian Chadd char name[IFNAMSIZ]; 190a043e8c7SAdrian Chadd int err = 0; 191a043e8c7SAdrian Chadd int i; 192a043e8c7SAdrian Chadd 193a043e8c7SAdrian Chadd sc = device_get_softc(dev); 194a043e8c7SAdrian Chadd bzero(sc, sizeof(*sc)); 195a043e8c7SAdrian Chadd sc->dev = dev; 196a043e8c7SAdrian Chadd mtx_init(&sc->sc_mtx, "rtl8366rb", NULL, MTX_DEF); 197a043e8c7SAdrian Chadd sc->smi_acquired = 0; 198a043e8c7SAdrian Chadd mtx_init(&sc->callout_mtx, "rtl8366rbcallout", NULL, MTX_DEF); 199a043e8c7SAdrian Chadd 200a043e8c7SAdrian Chadd rtl8366rb_init(dev); 201a043e8c7SAdrian Chadd smi_read(dev, RTL8366RB_CVCR, &rev, RTL_WAITOK); 202a043e8c7SAdrian Chadd device_printf(dev, "rev. %d\n", rev & 0x000f); 203a043e8c7SAdrian Chadd 204a043e8c7SAdrian Chadd /* attach miibus and phys */ 205a043e8c7SAdrian Chadd /* PHYs need an interface, so we generate a dummy one */ 206a043e8c7SAdrian Chadd for (i = 0; i < RTL8366RB_NUM_PHYS; i++) { 207a043e8c7SAdrian Chadd sc->ifp[i] = if_alloc(IFT_ETHER); 208a043e8c7SAdrian Chadd sc->ifp[i]->if_softc = sc; 209a043e8c7SAdrian Chadd sc->ifp[i]->if_flags |= IFF_UP | IFF_BROADCAST | IFF_DRV_RUNNING 210a043e8c7SAdrian Chadd | IFF_SIMPLEX; 211a043e8c7SAdrian Chadd snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(dev)); 212a043e8c7SAdrian Chadd sc->ifname[i] = malloc(strlen(name)+1, M_DEVBUF, M_WAITOK); 213a043e8c7SAdrian Chadd bcopy(name, sc->ifname[i], strlen(name)+1); 214a043e8c7SAdrian Chadd if_initname(sc->ifp[i], sc->ifname[i], i); 215a043e8c7SAdrian Chadd err = mii_attach(dev, &sc->miibus[i], sc->ifp[i], rtl8366rb_ifmedia_upd, \ 216a043e8c7SAdrian Chadd rtl8366rb_ifmedia_sts, BMSR_DEFCAPMASK, \ 217a043e8c7SAdrian Chadd i, MII_OFFSET_ANY, 0); 218a043e8c7SAdrian Chadd if (err != 0) { 219a043e8c7SAdrian Chadd device_printf(dev, "attaching PHY %d failed\n", i); 220a043e8c7SAdrian Chadd return (err); 221a043e8c7SAdrian Chadd } 222a043e8c7SAdrian Chadd } 223a043e8c7SAdrian Chadd 224a043e8c7SAdrian Chadd bus_generic_probe(dev); 225a043e8c7SAdrian Chadd bus_enumerate_hinted_children(dev); 226a043e8c7SAdrian Chadd err = bus_generic_attach(dev); 227a043e8c7SAdrian Chadd if (err != 0) 228a043e8c7SAdrian Chadd return (err); 229a043e8c7SAdrian Chadd 230a043e8c7SAdrian Chadd callout_init_mtx(&sc->callout_tick, &sc->callout_mtx, 0); 231a043e8c7SAdrian Chadd rtl8366rb_tick(sc); 232a043e8c7SAdrian Chadd 233a043e8c7SAdrian Chadd return (err); 234a043e8c7SAdrian Chadd } 235a043e8c7SAdrian Chadd 236a043e8c7SAdrian Chadd static int 237a043e8c7SAdrian Chadd rtl8366rb_detach(device_t dev) 238a043e8c7SAdrian Chadd { 239a043e8c7SAdrian Chadd struct rtl8366rb_softc *sc = device_get_softc(dev); 240a043e8c7SAdrian Chadd int i; 241a043e8c7SAdrian Chadd 242a043e8c7SAdrian Chadd for (i=0; i < RTL8366RB_NUM_PHYS; i++) { 243a043e8c7SAdrian Chadd if (sc->miibus[i]) 244a043e8c7SAdrian Chadd device_delete_child(dev, sc->miibus[i]); 245a043e8c7SAdrian Chadd if (sc->ifp[i] != NULL) 246a043e8c7SAdrian Chadd if_free(sc->ifp[i]); 247a043e8c7SAdrian Chadd free(sc->ifname[i], M_DEVBUF); 248a043e8c7SAdrian Chadd } 249a043e8c7SAdrian Chadd bus_generic_detach(dev); 250a043e8c7SAdrian Chadd callout_drain(&sc->callout_tick); 251a043e8c7SAdrian Chadd mtx_destroy(&sc->callout_mtx); 252a043e8c7SAdrian Chadd mtx_destroy(&sc->sc_mtx); 253a043e8c7SAdrian Chadd 254a043e8c7SAdrian Chadd return (0); 255a043e8c7SAdrian Chadd } 256a043e8c7SAdrian Chadd 257a043e8c7SAdrian Chadd static void 258a043e8c7SAdrian Chadd rtl8366rb_update_ifmedia(int portstatus, u_int *media_status, u_int *media_active) 259a043e8c7SAdrian Chadd { 260a043e8c7SAdrian Chadd *media_active = IFM_ETHER; 261a043e8c7SAdrian Chadd *media_status = IFM_AVALID; 262a043e8c7SAdrian Chadd if ((portstatus & RTL8366RB_PLSR_LINK) != 0) 263a043e8c7SAdrian Chadd *media_status |= IFM_ACTIVE; 264a043e8c7SAdrian Chadd else { 265a043e8c7SAdrian Chadd *media_active |= IFM_NONE; 266a043e8c7SAdrian Chadd return; 267a043e8c7SAdrian Chadd } 268a043e8c7SAdrian Chadd switch (portstatus & RTL8366RB_PLSR_SPEED_MASK) { 269a043e8c7SAdrian Chadd case RTL8366RB_PLSR_SPEED_10: 270a043e8c7SAdrian Chadd *media_active |= IFM_10_T; 271a043e8c7SAdrian Chadd break; 272a043e8c7SAdrian Chadd case RTL8366RB_PLSR_SPEED_100: 273a043e8c7SAdrian Chadd *media_active |= IFM_100_TX; 274a043e8c7SAdrian Chadd break; 275a043e8c7SAdrian Chadd case RTL8366RB_PLSR_SPEED_1000: 276a043e8c7SAdrian Chadd *media_active |= IFM_1000_T; 277a043e8c7SAdrian Chadd break; 278a043e8c7SAdrian Chadd } 279b0bb5bfaSLuiz Otavio O Souza if ((portstatus & RTL8366RB_PLSR_FULLDUPLEX) != 0) 280a043e8c7SAdrian Chadd *media_active |= IFM_FDX; 281a043e8c7SAdrian Chadd else 282a043e8c7SAdrian Chadd *media_active |= IFM_HDX; 283a043e8c7SAdrian Chadd if ((portstatus & RTL8366RB_PLSR_TXPAUSE) != 0) 284a043e8c7SAdrian Chadd *media_active |= IFM_ETH_TXPAUSE; 285a043e8c7SAdrian Chadd if ((portstatus & RTL8366RB_PLSR_RXPAUSE) != 0) 286a043e8c7SAdrian Chadd *media_active |= IFM_ETH_RXPAUSE; 287a043e8c7SAdrian Chadd } 288a043e8c7SAdrian Chadd 289a043e8c7SAdrian Chadd static void 290a043e8c7SAdrian Chadd rtl833rb_miipollstat(struct rtl8366rb_softc *sc) 291a043e8c7SAdrian Chadd { 292a043e8c7SAdrian Chadd int i; 293a043e8c7SAdrian Chadd struct mii_data *mii; 294a043e8c7SAdrian Chadd struct mii_softc *miisc; 295a043e8c7SAdrian Chadd uint16_t value; 296a043e8c7SAdrian Chadd int portstatus; 297a043e8c7SAdrian Chadd 298a043e8c7SAdrian Chadd for (i = 0; i < RTL8366RB_NUM_PHYS; i++) { 299a043e8c7SAdrian Chadd mii = device_get_softc(sc->miibus[i]); 300a043e8c7SAdrian Chadd if ((i % 2) == 0) { 301a043e8c7SAdrian Chadd if (smi_read(sc->dev, RTL8366RB_PLSR_BASE + i/2, &value, RTL_NOWAIT) != 0) { 302a043e8c7SAdrian Chadd DEBUG_INCRVAR(callout_blocked); 303a043e8c7SAdrian Chadd return; 304a043e8c7SAdrian Chadd } 305a043e8c7SAdrian Chadd portstatus = value & 0xff; 306a043e8c7SAdrian Chadd } else { 307a043e8c7SAdrian Chadd portstatus = (value >> 8) & 0xff; 308a043e8c7SAdrian Chadd } 309a043e8c7SAdrian Chadd rtl8366rb_update_ifmedia(portstatus, &mii->mii_media_status, &mii->mii_media_active); 310a043e8c7SAdrian Chadd LIST_FOREACH(miisc, &mii->mii_phys, mii_list) { 311a043e8c7SAdrian Chadd if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) != miisc->mii_inst) 312a043e8c7SAdrian Chadd continue; 313a043e8c7SAdrian Chadd mii_phy_update(miisc, MII_POLLSTAT); 314a043e8c7SAdrian Chadd } 315a043e8c7SAdrian Chadd } 316a043e8c7SAdrian Chadd } 317a043e8c7SAdrian Chadd 318a043e8c7SAdrian Chadd static void 319a043e8c7SAdrian Chadd rtl8366rb_tick(void *arg) 320a043e8c7SAdrian Chadd { 321a043e8c7SAdrian Chadd struct rtl8366rb_softc *sc = arg; 322a043e8c7SAdrian Chadd 323a043e8c7SAdrian Chadd rtl833rb_miipollstat(sc); 324a043e8c7SAdrian Chadd callout_reset(&sc->callout_tick, hz, rtl8366rb_tick, sc); 325a043e8c7SAdrian Chadd } 326a043e8c7SAdrian Chadd 327a043e8c7SAdrian Chadd static int 328a043e8c7SAdrian Chadd smi_probe(device_t dev) 329a043e8c7SAdrian Chadd { 330a043e8c7SAdrian Chadd device_t iicbus, iicha; 331a043e8c7SAdrian Chadd int err, i; 332a043e8c7SAdrian Chadd uint16_t chipid; 333a043e8c7SAdrian Chadd char bytes[2]; 334a043e8c7SAdrian Chadd int xferd; 335a043e8c7SAdrian Chadd 336a043e8c7SAdrian Chadd bytes[0] = RTL8366RB_CIR & 0xff; 337a043e8c7SAdrian Chadd bytes[1] = (RTL8366RB_CIR >> 8) & 0xff; 338a043e8c7SAdrian Chadd iicbus = device_get_parent(dev); 339a043e8c7SAdrian Chadd iicha = device_get_parent(iicbus); 340a043e8c7SAdrian Chadd iicbus_reset(iicbus, IIC_FASTEST, RTL8366RB_IIC_ADDR, NULL); 341a043e8c7SAdrian Chadd for (i=3; i--; ) { 342a043e8c7SAdrian Chadd IICBUS_STOP(iicha); 343a043e8c7SAdrian Chadd /* 344a043e8c7SAdrian Chadd * we go directly to the host adapter because iicbus.c 345a043e8c7SAdrian Chadd * only issues a stop on a bus that was successfully started. 346a043e8c7SAdrian Chadd */ 347a043e8c7SAdrian Chadd } 348a043e8c7SAdrian Chadd err = iicbus_request_bus(iicbus, dev, IIC_WAIT); 349a043e8c7SAdrian Chadd if (err != 0) 350a043e8c7SAdrian Chadd goto out; 351a043e8c7SAdrian Chadd err = iicbus_start(iicbus, RTL8366RB_IIC_ADDR | RTL_IICBUS_READ, RTL_IICBUS_TIMEOUT); 352a043e8c7SAdrian Chadd if (err != 0) 353a043e8c7SAdrian Chadd goto out; 354a043e8c7SAdrian Chadd err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT); 355a043e8c7SAdrian Chadd if (err != 0) 356a043e8c7SAdrian Chadd goto out; 357a043e8c7SAdrian Chadd err = iicbus_read(iicbus, bytes, 2, &xferd, IIC_LAST_READ, 0); 358a043e8c7SAdrian Chadd if (err != 0) 359a043e8c7SAdrian Chadd goto out; 360a043e8c7SAdrian Chadd chipid = ((bytes[1] & 0xff) << 8) | (bytes[0] & 0xff); 361a043e8c7SAdrian Chadd DPRINTF(dev, "chip id 0x%04x\n", chipid); 362a043e8c7SAdrian Chadd if (chipid != RTL8366RB_CIR_ID8366RB) 363a043e8c7SAdrian Chadd err = ENXIO; 364a043e8c7SAdrian Chadd out: 365a043e8c7SAdrian Chadd iicbus_stop(iicbus); 366a043e8c7SAdrian Chadd iicbus_release_bus(iicbus, dev); 367a043e8c7SAdrian Chadd return (err == 0 ? 0 : ENXIO); 368a043e8c7SAdrian Chadd } 369a043e8c7SAdrian Chadd 370a043e8c7SAdrian Chadd static int 371a043e8c7SAdrian Chadd smi_acquire(struct rtl8366rb_softc *sc, int sleep) 372a043e8c7SAdrian Chadd { 373a043e8c7SAdrian Chadd int r = 0; 374a043e8c7SAdrian Chadd if (sleep == RTL_WAITOK) 375a043e8c7SAdrian Chadd RTL_LOCK(sc); 376a043e8c7SAdrian Chadd else 377a043e8c7SAdrian Chadd if (RTL_TRYLOCK(sc) == 0) 378a043e8c7SAdrian Chadd return (EWOULDBLOCK); 379a043e8c7SAdrian Chadd if (sc->smi_acquired == RTL_SMI_ACQUIRED) 380a043e8c7SAdrian Chadd r = EBUSY; 381a043e8c7SAdrian Chadd else { 382a043e8c7SAdrian Chadd r = iicbus_request_bus(device_get_parent(sc->dev), sc->dev, \ 383a043e8c7SAdrian Chadd sleep == RTL_WAITOK ? IIC_WAIT : IIC_DONTWAIT); 384a043e8c7SAdrian Chadd if (r == 0) 385a043e8c7SAdrian Chadd sc->smi_acquired = RTL_SMI_ACQUIRED; 386a043e8c7SAdrian Chadd } 387a043e8c7SAdrian Chadd RTL_UNLOCK(sc); 388a043e8c7SAdrian Chadd return (r); 389a043e8c7SAdrian Chadd } 390a043e8c7SAdrian Chadd 391a043e8c7SAdrian Chadd static int 392a043e8c7SAdrian Chadd smi_release(struct rtl8366rb_softc *sc, int sleep) 393a043e8c7SAdrian Chadd { 394a043e8c7SAdrian Chadd if (sleep == RTL_WAITOK) 395a043e8c7SAdrian Chadd RTL_LOCK(sc); 396a043e8c7SAdrian Chadd else 397a043e8c7SAdrian Chadd if (RTL_TRYLOCK(sc) == 0) 398a043e8c7SAdrian Chadd return (EWOULDBLOCK); 399a043e8c7SAdrian Chadd RTL_SMI_ACQUIRED_ASSERT(sc); 400a043e8c7SAdrian Chadd iicbus_release_bus(device_get_parent(sc->dev), sc->dev); 401a043e8c7SAdrian Chadd sc->smi_acquired = 0; 402a043e8c7SAdrian Chadd RTL_UNLOCK(sc); 403a043e8c7SAdrian Chadd return (0); 404a043e8c7SAdrian Chadd } 405a043e8c7SAdrian Chadd 406a043e8c7SAdrian Chadd static int 407a043e8c7SAdrian Chadd smi_select(device_t dev, int op, int sleep) 408a043e8c7SAdrian Chadd { 409a043e8c7SAdrian Chadd int err, i; 410a043e8c7SAdrian Chadd device_t iicbus = device_get_parent(dev); 411a043e8c7SAdrian Chadd struct iicbus_ivar *devi = IICBUS_IVAR(dev); 412a043e8c7SAdrian Chadd int slave = devi->addr; 413a043e8c7SAdrian Chadd 414a043e8c7SAdrian Chadd RTL_SMI_ACQUIRED_ASSERT((struct rtl8366rb_softc *)device_get_softc(dev)); 415a043e8c7SAdrian Chadd /* 416a043e8c7SAdrian Chadd * The chip does not use clock stretching when it is busy, 417a043e8c7SAdrian Chadd * instead ignoring the command. Retry a few times. 418a043e8c7SAdrian Chadd */ 419a043e8c7SAdrian Chadd for (i = RTL_IICBUS_RETRIES; i--; ) { 420a043e8c7SAdrian Chadd err = iicbus_start(iicbus, slave | op, RTL_IICBUS_TIMEOUT); 421a043e8c7SAdrian Chadd if (err != IIC_ENOACK) 422a043e8c7SAdrian Chadd break; 423a043e8c7SAdrian Chadd if (sleep == RTL_WAITOK) { 424a043e8c7SAdrian Chadd DEBUG_INCRVAR(iic_select_retries); 425a043e8c7SAdrian Chadd pause("smi_select", RTL_IICBUS_RETRY_SLEEP); 426a043e8c7SAdrian Chadd } else 427a043e8c7SAdrian Chadd break; 428a043e8c7SAdrian Chadd } 429a043e8c7SAdrian Chadd return (err); 430a043e8c7SAdrian Chadd } 431a043e8c7SAdrian Chadd 432a043e8c7SAdrian Chadd static int 433a043e8c7SAdrian Chadd smi_read_locked(struct rtl8366rb_softc *sc, uint16_t addr, uint16_t *data, int sleep) 434a043e8c7SAdrian Chadd { 435a043e8c7SAdrian Chadd int err; 436a043e8c7SAdrian Chadd device_t iicbus = device_get_parent(sc->dev); 437a043e8c7SAdrian Chadd char bytes[2]; 438a043e8c7SAdrian Chadd int xferd; 439a043e8c7SAdrian Chadd 440a043e8c7SAdrian Chadd RTL_SMI_ACQUIRED_ASSERT(sc); 441a043e8c7SAdrian Chadd bytes[0] = addr & 0xff; 442a043e8c7SAdrian Chadd bytes[1] = (addr >> 8) & 0xff; 443a043e8c7SAdrian Chadd err = smi_select(sc->dev, RTL_IICBUS_READ, sleep); 444a043e8c7SAdrian Chadd if (err != 0) 445a043e8c7SAdrian Chadd goto out; 446a043e8c7SAdrian Chadd err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT); 447a043e8c7SAdrian Chadd if (err != 0) 448a043e8c7SAdrian Chadd goto out; 449a043e8c7SAdrian Chadd err = iicbus_read(iicbus, bytes, 2, &xferd, IIC_LAST_READ, 0); 450a043e8c7SAdrian Chadd if (err != 0) 451a043e8c7SAdrian Chadd goto out; 452a043e8c7SAdrian Chadd *data = ((bytes[1] & 0xff) << 8) | (bytes[0] & 0xff); 453a043e8c7SAdrian Chadd 454a043e8c7SAdrian Chadd out: 455a043e8c7SAdrian Chadd iicbus_stop(iicbus); 456a043e8c7SAdrian Chadd return (err); 457a043e8c7SAdrian Chadd } 458a043e8c7SAdrian Chadd 459a043e8c7SAdrian Chadd static int 460a043e8c7SAdrian Chadd smi_write_locked(struct rtl8366rb_softc *sc, uint16_t addr, uint16_t data, int sleep) 461a043e8c7SAdrian Chadd { 462a043e8c7SAdrian Chadd int err; 463a043e8c7SAdrian Chadd device_t iicbus = device_get_parent(sc->dev); 464a043e8c7SAdrian Chadd char bytes[4]; 465a043e8c7SAdrian Chadd int xferd; 466a043e8c7SAdrian Chadd 467a043e8c7SAdrian Chadd RTL_SMI_ACQUIRED_ASSERT(sc); 468a043e8c7SAdrian Chadd bytes[0] = addr & 0xff; 469a043e8c7SAdrian Chadd bytes[1] = (addr >> 8) & 0xff; 470a043e8c7SAdrian Chadd bytes[2] = data & 0xff; 471a043e8c7SAdrian Chadd bytes[3] = (data >> 8) & 0xff; 472a043e8c7SAdrian Chadd 473a043e8c7SAdrian Chadd err = smi_select(sc->dev, RTL_IICBUS_WRITE, sleep); 474a043e8c7SAdrian Chadd if (err == 0) 475a043e8c7SAdrian Chadd err = iicbus_write(iicbus, bytes, 4, &xferd, RTL_IICBUS_TIMEOUT); 476a043e8c7SAdrian Chadd iicbus_stop(iicbus); 477a043e8c7SAdrian Chadd 478a043e8c7SAdrian Chadd return (err); 479a043e8c7SAdrian Chadd } 480a043e8c7SAdrian Chadd 481a043e8c7SAdrian Chadd static int 482a043e8c7SAdrian Chadd smi_read(device_t dev, uint16_t addr, uint16_t *data, int sleep) 483a043e8c7SAdrian Chadd { 484a043e8c7SAdrian Chadd struct rtl8366rb_softc *sc = device_get_softc(dev); 485a043e8c7SAdrian Chadd int err; 486a043e8c7SAdrian Chadd 487a043e8c7SAdrian Chadd err = smi_acquire(sc, sleep); 488a043e8c7SAdrian Chadd if (err != 0) 489a043e8c7SAdrian Chadd return (EBUSY); 490a043e8c7SAdrian Chadd err = smi_read_locked(sc, addr, data, sleep); 491a043e8c7SAdrian Chadd smi_release(sc, sleep); 492a043e8c7SAdrian Chadd DEVERR(dev, err, "smi_read()=%d: addr=%04x\n", addr); 493a043e8c7SAdrian Chadd return (err == 0 ? 0 : EIO); 494a043e8c7SAdrian Chadd } 495a043e8c7SAdrian Chadd 496a043e8c7SAdrian Chadd static int 497a043e8c7SAdrian Chadd smi_write(device_t dev, uint16_t addr, uint16_t data, int sleep) 498a043e8c7SAdrian Chadd { 499a043e8c7SAdrian Chadd struct rtl8366rb_softc *sc = device_get_softc(dev); 500a043e8c7SAdrian Chadd int err; 501a043e8c7SAdrian Chadd 502a043e8c7SAdrian Chadd err = smi_acquire(sc, sleep); 503a043e8c7SAdrian Chadd if (err != 0) 504a043e8c7SAdrian Chadd return (EBUSY); 505a043e8c7SAdrian Chadd err = smi_write_locked(sc, addr, data, sleep); 506a043e8c7SAdrian Chadd smi_release(sc, sleep); 507a043e8c7SAdrian Chadd DEVERR(dev, err, "smi_write()=%d: addr=%04x\n", addr); 508a043e8c7SAdrian Chadd return (err == 0 ? 0 : EIO); 509a043e8c7SAdrian Chadd } 510a043e8c7SAdrian Chadd 511a043e8c7SAdrian Chadd static int 512a043e8c7SAdrian Chadd smi_rmw(device_t dev, uint16_t addr, uint16_t mask, uint16_t data, int sleep) 513a043e8c7SAdrian Chadd { 514a043e8c7SAdrian Chadd struct rtl8366rb_softc *sc = device_get_softc(dev); 515a043e8c7SAdrian Chadd int err; 516a043e8c7SAdrian Chadd uint16_t oldv, newv; 517a043e8c7SAdrian Chadd 518a043e8c7SAdrian Chadd err = smi_acquire(sc, sleep); 519a043e8c7SAdrian Chadd if (err != 0) 520a043e8c7SAdrian Chadd return (EBUSY); 521a043e8c7SAdrian Chadd if (err == 0) { 522a043e8c7SAdrian Chadd err = smi_read_locked(sc, addr, &oldv, sleep); 523a043e8c7SAdrian Chadd if (err == 0) { 524a043e8c7SAdrian Chadd newv = oldv & ~mask; 525a043e8c7SAdrian Chadd newv |= data & mask; 526a043e8c7SAdrian Chadd if (newv != oldv) 527a043e8c7SAdrian Chadd err = smi_write_locked(sc, addr, newv, sleep); 528a043e8c7SAdrian Chadd } 529a043e8c7SAdrian Chadd } 530a043e8c7SAdrian Chadd smi_release(sc, sleep); 531a043e8c7SAdrian Chadd DEVERR(dev, err, "smi_rmw()=%d: addr=%04x\n", addr); 532a043e8c7SAdrian Chadd return (err == 0 ? 0 : EIO); 533a043e8c7SAdrian Chadd } 534a043e8c7SAdrian Chadd 535a043e8c7SAdrian Chadd static etherswitch_info_t * 536a043e8c7SAdrian Chadd rtl_getinfo(device_t dev) 537a043e8c7SAdrian Chadd { 538a043e8c7SAdrian Chadd return (ðerswitch_info); 539a043e8c7SAdrian Chadd } 540a043e8c7SAdrian Chadd 541a043e8c7SAdrian Chadd static int 542a043e8c7SAdrian Chadd rtl_readreg(device_t dev, int reg) 543a043e8c7SAdrian Chadd { 544a043e8c7SAdrian Chadd uint16_t data = 0; 545a043e8c7SAdrian Chadd 546a043e8c7SAdrian Chadd smi_read(dev, reg, &data, RTL_WAITOK); 547a043e8c7SAdrian Chadd return (data); 548a043e8c7SAdrian Chadd } 549a043e8c7SAdrian Chadd 550a043e8c7SAdrian Chadd static int 551a043e8c7SAdrian Chadd rtl_writereg(device_t dev, int reg, int value) 552a043e8c7SAdrian Chadd { 553a043e8c7SAdrian Chadd return (smi_write(dev, reg, value, RTL_WAITOK)); 554a043e8c7SAdrian Chadd } 555a043e8c7SAdrian Chadd 556a043e8c7SAdrian Chadd static int 557a043e8c7SAdrian Chadd rtl_getport(device_t dev, etherswitch_port_t *p) 558a043e8c7SAdrian Chadd { 559a043e8c7SAdrian Chadd struct rtl8366rb_softc *sc; 560a043e8c7SAdrian Chadd struct ifmedia *ifm; 561a043e8c7SAdrian Chadd struct mii_data *mii; 562a043e8c7SAdrian Chadd struct ifmediareq *ifmr = &p->es_ifmr; 563a043e8c7SAdrian Chadd uint16_t v; 564a3219359SAdrian Chadd int err, vlangroup; 565a043e8c7SAdrian Chadd 566a043e8c7SAdrian Chadd if (p->es_port < 0 || p->es_port >= RTL8366RB_NUM_PORTS) 567a043e8c7SAdrian Chadd return (ENXIO); 568a3219359SAdrian Chadd sc = device_get_softc(dev); 569a3219359SAdrian Chadd vlangroup = RTL8366RB_PVCR_GET(p->es_port, 570a043e8c7SAdrian Chadd rtl_readreg(dev, RTL8366RB_PVCR_REG(p->es_port))); 571bfae9329SLuiz Otavio O Souza p->es_pvid = sc->vid[vlangroup] & ETHERSWITCH_VID_MASK; 572a043e8c7SAdrian Chadd 573a043e8c7SAdrian Chadd if (p->es_port < RTL8366RB_NUM_PHYS) { 574a043e8c7SAdrian Chadd mii = device_get_softc(sc->miibus[p->es_port]); 575a043e8c7SAdrian Chadd ifm = &mii->mii_media; 576a043e8c7SAdrian Chadd err = ifmedia_ioctl(sc->ifp[p->es_port], &p->es_ifr, ifm, SIOCGIFMEDIA); 577a043e8c7SAdrian Chadd if (err) 578a043e8c7SAdrian Chadd return (err); 579a043e8c7SAdrian Chadd } else { 580a043e8c7SAdrian Chadd /* fill in fixed values for CPU port */ 581dddab089SLuiz Otavio O Souza p->es_flags |= ETHERSWITCH_PORT_CPU; 582a043e8c7SAdrian Chadd smi_read(dev, RTL8366RB_PLSR_BASE + (RTL8366RB_NUM_PHYS)/2, &v, RTL_WAITOK); 583a043e8c7SAdrian Chadd v = v >> (8 * ((RTL8366RB_NUM_PHYS) % 2)); 584a043e8c7SAdrian Chadd rtl8366rb_update_ifmedia(v, &ifmr->ifm_status, &ifmr->ifm_active); 585a043e8c7SAdrian Chadd ifmr->ifm_current = ifmr->ifm_active; 586a043e8c7SAdrian Chadd ifmr->ifm_mask = 0; 587a043e8c7SAdrian Chadd ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID; 588*28b07d23SLuiz Otavio O Souza /* Return our static media list. */ 589*28b07d23SLuiz Otavio O Souza if (ifmr->ifm_count > 0) { 590*28b07d23SLuiz Otavio O Souza ifmr->ifm_count = 1; 591*28b07d23SLuiz Otavio O Souza ifmr->ifm_ulist[0] = IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 592*28b07d23SLuiz Otavio O Souza IFM_FDX, 0); 593*28b07d23SLuiz Otavio O Souza } else 594*28b07d23SLuiz Otavio O Souza ifmr->ifm_count = 0; 595a043e8c7SAdrian Chadd } 596a043e8c7SAdrian Chadd return (0); 597a043e8c7SAdrian Chadd } 598a043e8c7SAdrian Chadd 599a043e8c7SAdrian Chadd static int 600a043e8c7SAdrian Chadd rtl_setport(device_t dev, etherswitch_port_t *p) 601a043e8c7SAdrian Chadd { 602a3219359SAdrian Chadd int i, err, vlangroup; 603a043e8c7SAdrian Chadd struct rtl8366rb_softc *sc; 604a043e8c7SAdrian Chadd struct ifmedia *ifm; 605a043e8c7SAdrian Chadd struct mii_data *mii; 606a043e8c7SAdrian Chadd 607*28b07d23SLuiz Otavio O Souza if (p->es_port < 0 || p->es_port >= RTL8366RB_NUM_PORTS) 608a043e8c7SAdrian Chadd return (ENXIO); 609a3219359SAdrian Chadd sc = device_get_softc(dev); 610a3219359SAdrian Chadd vlangroup = -1; 611a3219359SAdrian Chadd for (i = 0; i < RTL8366RB_NUM_VLANS; i++) { 612bfae9329SLuiz Otavio O Souza if ((sc->vid[i] & ETHERSWITCH_VID_MASK) == p->es_pvid) { 613a3219359SAdrian Chadd vlangroup = i; 614a3219359SAdrian Chadd break; 615a3219359SAdrian Chadd } 616a3219359SAdrian Chadd } 617a3219359SAdrian Chadd if (vlangroup == -1) 618a3219359SAdrian Chadd return (ENXIO); 619a043e8c7SAdrian Chadd err = smi_rmw(dev, RTL8366RB_PVCR_REG(p->es_port), 620a043e8c7SAdrian Chadd RTL8366RB_PVCR_VAL(p->es_port, RTL8366RB_PVCR_PORT_MASK), 621a3219359SAdrian Chadd RTL8366RB_PVCR_VAL(p->es_port, vlangroup), RTL_WAITOK); 622a043e8c7SAdrian Chadd if (err) 623a043e8c7SAdrian Chadd return (err); 624dddab089SLuiz Otavio O Souza if (p->es_port == RTL8366RB_CPU_PORT) 625dddab089SLuiz Otavio O Souza return (0); 626a043e8c7SAdrian Chadd mii = device_get_softc(sc->miibus[p->es_port]); 627a043e8c7SAdrian Chadd ifm = &mii->mii_media; 628a043e8c7SAdrian Chadd err = ifmedia_ioctl(sc->ifp[p->es_port], &p->es_ifr, ifm, SIOCSIFMEDIA); 629a043e8c7SAdrian Chadd return (err); 630a043e8c7SAdrian Chadd } 631a043e8c7SAdrian Chadd 632a043e8c7SAdrian Chadd static int 633a043e8c7SAdrian Chadd rtl_getvgroup(device_t dev, etherswitch_vlangroup_t *vg) 634a043e8c7SAdrian Chadd { 635bfae9329SLuiz Otavio O Souza struct rtl8366rb_softc *sc; 636a043e8c7SAdrian Chadd uint16_t vmcr[3]; 637a043e8c7SAdrian Chadd int i; 638a043e8c7SAdrian Chadd 639a043e8c7SAdrian Chadd for (i=0; i<3; i++) 640a043e8c7SAdrian Chadd vmcr[i] = rtl_readreg(dev, RTL8366RB_VMCR(i, vg->es_vlangroup)); 641a043e8c7SAdrian Chadd 642bfae9329SLuiz Otavio O Souza sc = device_get_softc(dev); 643bfae9329SLuiz Otavio O Souza vg->es_vid = sc->vid[vg->es_vlangroup]; 644a043e8c7SAdrian Chadd vg->es_member_ports = RTL8366RB_VMCR_MEMBER(vmcr); 645a043e8c7SAdrian Chadd vg->es_untagged_ports = RTL8366RB_VMCR_UNTAG(vmcr); 646a043e8c7SAdrian Chadd vg->es_fid = RTL8366RB_VMCR_FID(vmcr); 647a043e8c7SAdrian Chadd return (0); 648a043e8c7SAdrian Chadd } 649a043e8c7SAdrian Chadd 650a043e8c7SAdrian Chadd static int 651a043e8c7SAdrian Chadd rtl_setvgroup(device_t dev, etherswitch_vlangroup_t *vg) 652a043e8c7SAdrian Chadd { 653a3219359SAdrian Chadd struct rtl8366rb_softc *sc; 654a043e8c7SAdrian Chadd int g = vg->es_vlangroup; 655a043e8c7SAdrian Chadd 656a3219359SAdrian Chadd sc = device_get_softc(dev); 657a3219359SAdrian Chadd sc->vid[g] = vg->es_vid; 658bfae9329SLuiz Otavio O Souza /* VLAN group disabled ? */ 659bfae9329SLuiz Otavio O Souza if (vg->es_member_ports == 0 && vg->es_untagged_ports == 0 && vg->es_vid == 0) 660bfae9329SLuiz Otavio O Souza return (0); 661bfae9329SLuiz Otavio O Souza sc->vid[g] |= ETHERSWITCH_VID_VALID; 662a043e8c7SAdrian Chadd rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_DOT1Q_REG, g), 663a043e8c7SAdrian Chadd (vg->es_vid << RTL8366RB_VMCR_DOT1Q_VID_SHIFT) & RTL8366RB_VMCR_DOT1Q_VID_MASK); 664a043e8c7SAdrian Chadd rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, g), 665a043e8c7SAdrian Chadd ((vg->es_member_ports << RTL8366RB_VMCR_MU_MEMBER_SHIFT) & RTL8366RB_VMCR_MU_MEMBER_MASK) | 666a043e8c7SAdrian Chadd ((vg->es_untagged_ports << RTL8366RB_VMCR_MU_UNTAG_SHIFT) & RTL8366RB_VMCR_MU_UNTAG_MASK)); 667a043e8c7SAdrian Chadd rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_FID_REG, g), 668a043e8c7SAdrian Chadd vg->es_fid); 669a043e8c7SAdrian Chadd return (0); 670a043e8c7SAdrian Chadd } 671a043e8c7SAdrian Chadd 672a043e8c7SAdrian Chadd static int 673bfae9329SLuiz Otavio O Souza rtl_getconf(device_t dev, etherswitch_conf_t *conf) 674bfae9329SLuiz Otavio O Souza { 675bfae9329SLuiz Otavio O Souza 676bfae9329SLuiz Otavio O Souza /* Return the VLAN mode. */ 677bfae9329SLuiz Otavio O Souza conf->cmd = ETHERSWITCH_CONF_VLAN_MODE; 678bfae9329SLuiz Otavio O Souza conf->vlan_mode = ETHERSWITCH_VLAN_DOT1Q; 679bfae9329SLuiz Otavio O Souza 680bfae9329SLuiz Otavio O Souza return (0); 681bfae9329SLuiz Otavio O Souza } 682bfae9329SLuiz Otavio O Souza 683bfae9329SLuiz Otavio O Souza static int 684a043e8c7SAdrian Chadd rtl_readphy(device_t dev, int phy, int reg) 685a043e8c7SAdrian Chadd { 686a043e8c7SAdrian Chadd struct rtl8366rb_softc *sc = device_get_softc(dev); 687a043e8c7SAdrian Chadd uint16_t data = 0; 688a043e8c7SAdrian Chadd int err, i, sleep; 689a043e8c7SAdrian Chadd 690a043e8c7SAdrian Chadd if (phy < 0 || phy >= RTL8366RB_NUM_PHYS) 691a043e8c7SAdrian Chadd return (ENXIO); 692a043e8c7SAdrian Chadd if (reg < 0 || reg >= RTL8366RB_NUM_PHY_REG) 693a043e8c7SAdrian Chadd return (ENXIO); 694a043e8c7SAdrian Chadd sleep = RTL_WAITOK; 695a043e8c7SAdrian Chadd err = smi_acquire(sc, sleep); 696a043e8c7SAdrian Chadd if (err != 0) 697a043e8c7SAdrian Chadd return (EBUSY); 698a043e8c7SAdrian Chadd for (i = RTL_IICBUS_RETRIES; i--; ) { 699a043e8c7SAdrian Chadd err = smi_write_locked(sc, RTL8366RB_PACR, RTL8366RB_PACR_READ, sleep); 700a043e8c7SAdrian Chadd if (err == 0) 701a043e8c7SAdrian Chadd err = smi_write_locked(sc, RTL8366RB_PHYREG(phy, 0, reg), 0, sleep); 702a043e8c7SAdrian Chadd if (err == 0) { 703a043e8c7SAdrian Chadd err = smi_read_locked(sc, RTL8366RB_PADR, &data, sleep); 704a043e8c7SAdrian Chadd break; 705a043e8c7SAdrian Chadd } 706a043e8c7SAdrian Chadd DEBUG_INCRVAR(phy_access_retries); 707a043e8c7SAdrian Chadd DPRINTF(dev, "rtl_readphy(): chip not responsive, retrying %d more times\n", i); 708a043e8c7SAdrian Chadd pause("rtl_readphy", RTL_IICBUS_RETRY_SLEEP); 709a043e8c7SAdrian Chadd } 710a043e8c7SAdrian Chadd smi_release(sc, sleep); 711a043e8c7SAdrian Chadd DEVERR(dev, err, "rtl_readphy()=%d: phy=%d.%02x\n", phy, reg); 712a043e8c7SAdrian Chadd return (data); 713a043e8c7SAdrian Chadd } 714a043e8c7SAdrian Chadd 715a043e8c7SAdrian Chadd static int 716a043e8c7SAdrian Chadd rtl_writephy(device_t dev, int phy, int reg, int data) 717a043e8c7SAdrian Chadd { 718a043e8c7SAdrian Chadd struct rtl8366rb_softc *sc = device_get_softc(dev); 719a043e8c7SAdrian Chadd int err, i, sleep; 720a043e8c7SAdrian Chadd 721a043e8c7SAdrian Chadd if (phy < 0 || phy >= RTL8366RB_NUM_PHYS) 722a043e8c7SAdrian Chadd return (ENXIO); 723a043e8c7SAdrian Chadd if (reg < 0 || reg >= RTL8366RB_NUM_PHY_REG) 724a043e8c7SAdrian Chadd return (ENXIO); 725a043e8c7SAdrian Chadd sleep = RTL_WAITOK; 726a043e8c7SAdrian Chadd err = smi_acquire(sc, sleep); 727a043e8c7SAdrian Chadd if (err != 0) 728a043e8c7SAdrian Chadd return (EBUSY); 729a043e8c7SAdrian Chadd for (i = RTL_IICBUS_RETRIES; i--; ) { 730a043e8c7SAdrian Chadd err = smi_write_locked(sc, RTL8366RB_PACR, RTL8366RB_PACR_WRITE, sleep); 731a043e8c7SAdrian Chadd if (err == 0) 732a043e8c7SAdrian Chadd err = smi_write_locked(sc, RTL8366RB_PHYREG(phy, 0, reg), data, sleep); 733a043e8c7SAdrian Chadd if (err == 0) { 734a043e8c7SAdrian Chadd break; 735a043e8c7SAdrian Chadd } 736a043e8c7SAdrian Chadd DEBUG_INCRVAR(phy_access_retries); 737a043e8c7SAdrian Chadd DPRINTF(dev, "rtl_writephy(): chip not responsive, retrying %d more tiems\n", i); 738a043e8c7SAdrian Chadd pause("rtl_writephy", RTL_IICBUS_RETRY_SLEEP); 739a043e8c7SAdrian Chadd } 740a043e8c7SAdrian Chadd smi_release(sc, sleep); 741a043e8c7SAdrian Chadd DEVERR(dev, err, "rtl_writephy()=%d: phy=%d.%02x\n", phy, reg); 742a043e8c7SAdrian Chadd return (err == 0 ? 0 : EIO); 743a043e8c7SAdrian Chadd } 744a043e8c7SAdrian Chadd 745a043e8c7SAdrian Chadd static int 746a043e8c7SAdrian Chadd rtl8366rb_ifmedia_upd(struct ifnet *ifp) 747a043e8c7SAdrian Chadd { 748a043e8c7SAdrian Chadd struct rtl8366rb_softc *sc = ifp->if_softc; 749a043e8c7SAdrian Chadd struct mii_data *mii = device_get_softc(sc->miibus[ifp->if_dunit]); 750a043e8c7SAdrian Chadd 751a043e8c7SAdrian Chadd mii_mediachg(mii); 752a043e8c7SAdrian Chadd return (0); 753a043e8c7SAdrian Chadd } 754a043e8c7SAdrian Chadd 755a043e8c7SAdrian Chadd static void 756a043e8c7SAdrian Chadd rtl8366rb_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 757a043e8c7SAdrian Chadd { 758a043e8c7SAdrian Chadd struct rtl8366rb_softc *sc = ifp->if_softc; 759a043e8c7SAdrian Chadd struct mii_data *mii = device_get_softc(sc->miibus[ifp->if_dunit]); 760a043e8c7SAdrian Chadd 761a043e8c7SAdrian Chadd mii_pollstat(mii); 762a043e8c7SAdrian Chadd ifmr->ifm_active = mii->mii_media_active; 763a043e8c7SAdrian Chadd ifmr->ifm_status = mii->mii_media_status; 764a043e8c7SAdrian Chadd } 765a043e8c7SAdrian Chadd 766a043e8c7SAdrian Chadd 767a043e8c7SAdrian Chadd static device_method_t rtl8366rb_methods[] = { 768a043e8c7SAdrian Chadd /* Device interface */ 769a043e8c7SAdrian Chadd DEVMETHOD(device_identify, rtl8366rb_identify), 770a043e8c7SAdrian Chadd DEVMETHOD(device_probe, rtl8366rb_probe), 771a043e8c7SAdrian Chadd DEVMETHOD(device_attach, rtl8366rb_attach), 772a043e8c7SAdrian Chadd DEVMETHOD(device_detach, rtl8366rb_detach), 773a043e8c7SAdrian Chadd 774a043e8c7SAdrian Chadd /* bus interface */ 775a043e8c7SAdrian Chadd DEVMETHOD(bus_add_child, device_add_child_ordered), 776a043e8c7SAdrian Chadd 777a043e8c7SAdrian Chadd /* MII interface */ 778a043e8c7SAdrian Chadd DEVMETHOD(miibus_readreg, rtl_readphy), 779a043e8c7SAdrian Chadd DEVMETHOD(miibus_writereg, rtl_writephy), 780a043e8c7SAdrian Chadd 781a043e8c7SAdrian Chadd /* etherswitch interface */ 782bfae9329SLuiz Otavio O Souza DEVMETHOD(etherswitch_getconf, rtl_getconf), 783a043e8c7SAdrian Chadd DEVMETHOD(etherswitch_getinfo, rtl_getinfo), 784a043e8c7SAdrian Chadd DEVMETHOD(etherswitch_readreg, rtl_readreg), 785a043e8c7SAdrian Chadd DEVMETHOD(etherswitch_writereg, rtl_writereg), 786a043e8c7SAdrian Chadd DEVMETHOD(etherswitch_readphyreg, rtl_readphy), 787a043e8c7SAdrian Chadd DEVMETHOD(etherswitch_writephyreg, rtl_writephy), 788a043e8c7SAdrian Chadd DEVMETHOD(etherswitch_getport, rtl_getport), 789a043e8c7SAdrian Chadd DEVMETHOD(etherswitch_setport, rtl_setport), 790a043e8c7SAdrian Chadd DEVMETHOD(etherswitch_getvgroup, rtl_getvgroup), 791a043e8c7SAdrian Chadd DEVMETHOD(etherswitch_setvgroup, rtl_setvgroup), 792a043e8c7SAdrian Chadd 793a043e8c7SAdrian Chadd DEVMETHOD_END 794a043e8c7SAdrian Chadd }; 795a043e8c7SAdrian Chadd 796a043e8c7SAdrian Chadd DEFINE_CLASS_0(rtl8366rb, rtl8366rb_driver, rtl8366rb_methods, 797a043e8c7SAdrian Chadd sizeof(struct rtl8366rb_softc)); 798a043e8c7SAdrian Chadd static devclass_t rtl8366rb_devclass; 799a043e8c7SAdrian Chadd 800a043e8c7SAdrian Chadd DRIVER_MODULE(rtl8366rb, iicbus, rtl8366rb_driver, rtl8366rb_devclass, 0, 0); 801a043e8c7SAdrian Chadd DRIVER_MODULE(miibus, rtl8366rb, miibus_driver, miibus_devclass, 0, 0); 802a043e8c7SAdrian Chadd DRIVER_MODULE(etherswitch, rtl8366rb, etherswitch_driver, etherswitch_devclass, 0, 0); 803a043e8c7SAdrian Chadd MODULE_VERSION(rtl8366rb, 1); 804a043e8c7SAdrian Chadd MODULE_DEPEND(rtl8366rb, iicbus, 1, 1, 1); /* XXX which versions? */ 805a043e8c7SAdrian Chadd MODULE_DEPEND(rtl8366rb, miibus, 1, 1, 1); /* XXX which versions? */ 806a043e8c7SAdrian Chadd MODULE_DEPEND(rtl8366rb, etherswitch, 1, 1, 1); /* XXX which versions? */ 807