xref: /freebsd/sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.h (revision dfb5178f9bbdc1886adf41455c0380b48d221002)
1*dfb5178fSStanislav Galabov /*-
2*dfb5178fSStanislav Galabov  * Copyright (c) 2016 Stanislav Galabov.
3*dfb5178fSStanislav Galabov  * All rights reserved.
4*dfb5178fSStanislav Galabov  *
5*dfb5178fSStanislav Galabov  * Redistribution and use in source and binary forms, with or without
6*dfb5178fSStanislav Galabov  * modification, are permitted provided that the following conditions
7*dfb5178fSStanislav Galabov  * are met:
8*dfb5178fSStanislav Galabov  * 1. Redistributions of source code must retain the above copyright
9*dfb5178fSStanislav Galabov  *    notice, this list of conditions and the following disclaimer.
10*dfb5178fSStanislav Galabov  * 2. Redistributions in binary form must reproduce the above copyright
11*dfb5178fSStanislav Galabov  *    notice, this list of conditions and the following disclaimer in the
12*dfb5178fSStanislav Galabov  *    documentation and/or other materials provided with the distribution.
13*dfb5178fSStanislav Galabov  *
14*dfb5178fSStanislav Galabov  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15*dfb5178fSStanislav Galabov  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16*dfb5178fSStanislav Galabov  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17*dfb5178fSStanislav Galabov  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18*dfb5178fSStanislav Galabov  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19*dfb5178fSStanislav Galabov  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20*dfb5178fSStanislav Galabov  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21*dfb5178fSStanislav Galabov  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22*dfb5178fSStanislav Galabov  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23*dfb5178fSStanislav Galabov  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24*dfb5178fSStanislav Galabov  * SUCH DAMAGE.
25*dfb5178fSStanislav Galabov  *
26*dfb5178fSStanislav Galabov  * $FreeBSD$
27*dfb5178fSStanislav Galabov  */
28*dfb5178fSStanislav Galabov 
29*dfb5178fSStanislav Galabov #ifndef	__MTKSWITCH_MT7620_H__
30*dfb5178fSStanislav Galabov #define	__MTKSWITCH_MT7620_H__
31*dfb5178fSStanislav Galabov 
32*dfb5178fSStanislav Galabov #define	MTKSWITCH_ATC	0x0080
33*dfb5178fSStanislav Galabov #define		ATC_BUSY		(1u<<15)
34*dfb5178fSStanislav Galabov #define		ATC_AC_MAT_NON_STATIC_MACS	(4u<<8)
35*dfb5178fSStanislav Galabov #define		ATC_AC_CMD_CLEAN	(2u<<0)
36*dfb5178fSStanislav Galabov 
37*dfb5178fSStanislav Galabov #define	MTKSWITCH_VTCR	0x0090
38*dfb5178fSStanislav Galabov #define		VTCR_BUSY		(1u<<31)
39*dfb5178fSStanislav Galabov #define		VTCR_FUNC_VID_READ	(0u<<12)
40*dfb5178fSStanislav Galabov #define		VTCR_FUNC_VID_WRITE	(1u<<12)
41*dfb5178fSStanislav Galabov #define		VTCR_FUNC_VID_INVALID	(2u<<12)
42*dfb5178fSStanislav Galabov #define		VTCR_FUNC_VID_VALID	(3u<<12)
43*dfb5178fSStanislav Galabov #define		VTCR_IDX_INVALID	(1u<<16)
44*dfb5178fSStanislav Galabov #define		VTCR_VID_MASK		0xfff
45*dfb5178fSStanislav Galabov 
46*dfb5178fSStanislav Galabov #define	MTKSWITCH_VAWD1	0x0094
47*dfb5178fSStanislav Galabov #define		VAWD1_IVL_MAC		(1u<<30)
48*dfb5178fSStanislav Galabov #define		VAWD1_VTAG_EN		(1u<<28)
49*dfb5178fSStanislav Galabov #define		VAWD1_PORT_MEMBER(p)	((1u<<16)<<(p))
50*dfb5178fSStanislav Galabov #define		VAWD1_MEMBER_OFF	16
51*dfb5178fSStanislav Galabov #define		VAWD1_MEMBER_MASK	0xff
52*dfb5178fSStanislav Galabov #define		VAWD1_FID_OFFSET	1
53*dfb5178fSStanislav Galabov #define		VAWD1_VALID		(1u<<0)
54*dfb5178fSStanislav Galabov 
55*dfb5178fSStanislav Galabov #define	MTKSWITCH_VAWD2	0x0098
56*dfb5178fSStanislav Galabov #define		VAWD2_PORT_UNTAGGED(p)	(0u<<((p)*2))
57*dfb5178fSStanislav Galabov #define		VAWD2_PORT_TAGGED(p)	(2u<<((p)*2))
58*dfb5178fSStanislav Galabov #define		VAWD2_PORT_MASK(p)	(3u<<((p)*2))
59*dfb5178fSStanislav Galabov 
60*dfb5178fSStanislav Galabov #define	MTKSWITCH_VTIM(v)	((((v) >> 1) * 4) + 0x100)
61*dfb5178fSStanislav Galabov #define		VTIM_OFF(v)	(((v) & 1) ? 12 : 0)
62*dfb5178fSStanislav Galabov #define		VTIM_MASK	0xfff
63*dfb5178fSStanislav Galabov 
64*dfb5178fSStanislav Galabov #define	MTKSWITCH_PIAC	0x7004
65*dfb5178fSStanislav Galabov #define		PIAC_PHY_ACS_ST		(1u<<31)
66*dfb5178fSStanislav Galabov #define		PIAC_MDIO_REG_ADDR_OFF	25
67*dfb5178fSStanislav Galabov #define		PIAC_MDIO_PHY_ADDR_OFF	20
68*dfb5178fSStanislav Galabov #define		PIAC_MDIO_CMD_WRITE	(1u<<18)
69*dfb5178fSStanislav Galabov #define		PIAC_MDIO_CMD_READ	(2u<<18)
70*dfb5178fSStanislav Galabov #define		PIAC_MDIO_ST		(1u<<16)
71*dfb5178fSStanislav Galabov #define		PIAC_MDIO_RW_DATA_MASK	0xffff
72*dfb5178fSStanislav Galabov 
73*dfb5178fSStanislav Galabov #define	MTKSWITCH_PORTREG(r, p)	((r) + ((p) * 0x100))
74*dfb5178fSStanislav Galabov 
75*dfb5178fSStanislav Galabov #define	MTKSWITCH_PCR(x)	MTKSWITCH_PORTREG(0x2004, (x))
76*dfb5178fSStanislav Galabov #define		PCR_PORT_VLAN_SECURE	(3u<<0)
77*dfb5178fSStanislav Galabov 
78*dfb5178fSStanislav Galabov #define	MTKSWITCH_PVC(x)	MTKSWITCH_PORTREG(0x2010, (x))
79*dfb5178fSStanislav Galabov #define		PVC_VLAN_ATTR_MASK	(3u<<6)
80*dfb5178fSStanislav Galabov 
81*dfb5178fSStanislav Galabov #define	MTKSWITCH_PPBV1(x)	MTKSWITCH_PORTREG(0x2014, (x))
82*dfb5178fSStanislav Galabov #define	MTKSWITCH_PPBV2(x)	MTKSWITCH_PORTREG(0x2018, (x))
83*dfb5178fSStanislav Galabov #define		PPBV_VID(v)		(((v)<<16) | (v))
84*dfb5178fSStanislav Galabov #define		PPBV_VID_FROM_REG(x)	((x) & 0xfff)
85*dfb5178fSStanislav Galabov #define		PPBV_VID_MASK		0xfff
86*dfb5178fSStanislav Galabov 
87*dfb5178fSStanislav Galabov #define	MTKSWITCH_PMCR(x)	MTKSWITCH_PORTREG(0x3000, (x))
88*dfb5178fSStanislav Galabov #define		PMCR_BACKPR_EN		(1u<<8)
89*dfb5178fSStanislav Galabov #define		PMCR_BKOFF_EN		(1u<<9)
90*dfb5178fSStanislav Galabov #define		PMCR_MAC_RX_EN		(1u<<13)
91*dfb5178fSStanislav Galabov #define		PMCR_MAC_TX_EN		(1u<<14)
92*dfb5178fSStanislav Galabov #define		PMCR_IPG_CFG_RND	(1u<<18)
93*dfb5178fSStanislav Galabov #define		PMCR_CFG_DEFAULT	(PMCR_BACKPR_EN | PMCR_BKOFF_EN | \
94*dfb5178fSStanislav Galabov 		    PMCR_MAC_RX_EN | PMCR_MAC_TX_EN | PMCR_IPG_CFG_RND)
95*dfb5178fSStanislav Galabov 
96*dfb5178fSStanislav Galabov #define	MTKSWITCH_PMSR(x)	MTKSWITCH_PORTREG(0x3008, (x))
97*dfb5178fSStanislav Galabov #define		PMSR_MAC_LINK_STS	(1u<<0)
98*dfb5178fSStanislav Galabov #define		PMSR_MAC_DPX_STS	(1u<<1)
99*dfb5178fSStanislav Galabov #define		PMSR_MAC_SPD_STS	(3u<<2)
100*dfb5178fSStanislav Galabov #define		PMSR_MAC_SPD(x)		(((x)>>2) & 0x3)
101*dfb5178fSStanislav Galabov #define		PMSR_MAC_SPD_10		0
102*dfb5178fSStanislav Galabov #define		PMSR_MAC_SPD_100	1
103*dfb5178fSStanislav Galabov #define		PMSR_MAC_SPD_1000	2
104*dfb5178fSStanislav Galabov #define		PMSR_TX_FC_STS		(1u<<4)
105*dfb5178fSStanislav Galabov #define		PMSR_RX_FC_STS		(1u<<5)
106*dfb5178fSStanislav Galabov 
107*dfb5178fSStanislav Galabov #define	MTKSWITCH_REG_ADDR(r)	(((r) >> 6) & 0x3ff)
108*dfb5178fSStanislav Galabov #define	MTKSWITCH_REG_LO(r)	(((r) >> 2) & 0xf)
109*dfb5178fSStanislav Galabov #define	MTKSWITCH_REG_HI(r)	(1 << 4)
110*dfb5178fSStanislav Galabov #define MTKSWITCH_VAL_LO(v)	((v) & 0xffff)
111*dfb5178fSStanislav Galabov #define MTKSWITCH_VAL_HI(v)	(((v) >> 16) & 0xffff)
112*dfb5178fSStanislav Galabov #define MTKSWITCH_GLOBAL_PHY	31
113*dfb5178fSStanislav Galabov #define	MTKSWITCH_GLOBAL_REG	31
114*dfb5178fSStanislav Galabov 
115*dfb5178fSStanislav Galabov #define	MTKSWITCH_LAN_VID	0x001
116*dfb5178fSStanislav Galabov #define	MTKSWITCH_WAN_VID	0x002
117*dfb5178fSStanislav Galabov #define	MTKSWITCH_INVALID_VID	0xfff
118*dfb5178fSStanislav Galabov 
119*dfb5178fSStanislav Galabov #define	MTKSWITCH_LAN_FID	1
120*dfb5178fSStanislav Galabov #define	MTKSWITCH_WAN_FID	2
121*dfb5178fSStanislav Galabov 
122*dfb5178fSStanislav Galabov #endif	/* __MTKSWITCH_MT7620_H__ */
123