1 /*- 2 * Copyright (c) 2016 Stanislav Galabov. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include <sys/param.h> 30 #include <sys/bus.h> 31 #include <sys/errno.h> 32 #include <sys/kernel.h> 33 #include <sys/lock.h> 34 #include <sys/malloc.h> 35 #include <sys/module.h> 36 #include <sys/mutex.h> 37 #include <sys/rman.h> 38 #include <sys/socket.h> 39 #include <sys/sockio.h> 40 #include <sys/sysctl.h> 41 #include <sys/systm.h> 42 43 #include <net/if.h> 44 #include <net/if_var.h> 45 #include <net/ethernet.h> 46 #include <net/if_media.h> 47 #include <net/if_types.h> 48 49 #include <machine/bus.h> 50 #include <dev/mii/mii.h> 51 #include <dev/mii/miivar.h> 52 #include <dev/mdio/mdio.h> 53 54 #include <dev/etherswitch/etherswitch.h> 55 #include <dev/etherswitch/mtkswitch/mtkswitchvar.h> 56 #include <dev/etherswitch/mtkswitch/mtkswitch_mt7620.h> 57 58 static int 59 mtkswitch_phy_read_locked(struct mtkswitch_softc *sc, int phy, int reg) 60 { 61 uint32_t data; 62 63 MTKSWITCH_WRITE(sc, MTKSWITCH_PIAC, PIAC_PHY_ACS_ST | PIAC_MDIO_ST | 64 (reg << PIAC_MDIO_REG_ADDR_OFF) | (phy << PIAC_MDIO_PHY_ADDR_OFF) | 65 PIAC_MDIO_CMD_READ); 66 while ((data = MTKSWITCH_READ(sc, MTKSWITCH_PIAC)) & PIAC_PHY_ACS_ST); 67 68 return ((int)(data & PIAC_MDIO_RW_DATA_MASK)); 69 } 70 71 static int 72 mtkswitch_phy_read(device_t dev, int phy, int reg) 73 { 74 struct mtkswitch_softc *sc = device_get_softc(dev); 75 int data; 76 77 if ((phy < 0 || phy >= 32) || (reg < 0 || reg >= 32)) 78 return (ENXIO); 79 80 MTKSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); 81 MTKSWITCH_LOCK(sc); 82 data = mtkswitch_phy_read_locked(sc, phy, reg); 83 MTKSWITCH_UNLOCK(sc); 84 85 return (data); 86 } 87 88 static int 89 mtkswitch_phy_write_locked(struct mtkswitch_softc *sc, int phy, int reg, 90 int val) 91 { 92 93 MTKSWITCH_WRITE(sc, MTKSWITCH_PIAC, PIAC_PHY_ACS_ST | PIAC_MDIO_ST | 94 (reg << PIAC_MDIO_REG_ADDR_OFF) | (phy << PIAC_MDIO_PHY_ADDR_OFF) | 95 (val & PIAC_MDIO_RW_DATA_MASK) | PIAC_MDIO_CMD_WRITE); 96 while (MTKSWITCH_READ(sc, MTKSWITCH_PIAC) & PIAC_PHY_ACS_ST); 97 98 return (0); 99 } 100 101 static int 102 mtkswitch_phy_write(device_t dev, int phy, int reg, int val) 103 { 104 struct mtkswitch_softc *sc = device_get_softc(dev); 105 int res; 106 107 if ((phy < 0 || phy >= 32) || (reg < 0 || reg >= 32)) 108 return (ENXIO); 109 110 MTKSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); 111 MTKSWITCH_LOCK(sc); 112 res = mtkswitch_phy_write_locked(sc, phy, reg, val); 113 MTKSWITCH_UNLOCK(sc); 114 115 return (res); 116 } 117 118 static uint32_t 119 mtkswitch_reg_read32(struct mtkswitch_softc *sc, int reg) 120 { 121 122 MTKSWITCH_LOCK_ASSERT(sc, MA_OWNED); 123 return (MTKSWITCH_READ(sc, reg)); 124 } 125 126 static uint32_t 127 mtkswitch_reg_write32(struct mtkswitch_softc *sc, int reg, uint32_t val) 128 { 129 130 MTKSWITCH_LOCK_ASSERT(sc, MA_OWNED); 131 MTKSWITCH_WRITE(sc, reg, val); 132 return (0); 133 } 134 135 static uint32_t 136 mtkswitch_reg_read32_mt7621(struct mtkswitch_softc *sc, int reg) 137 { 138 uint32_t low, hi; 139 140 MTKSWITCH_LOCK_ASSERT(sc, MA_OWNED); 141 mtkswitch_phy_write_locked(sc, MTKSWITCH_GLOBAL_PHY, 142 MTKSWITCH_GLOBAL_REG, MTKSWITCH_REG_ADDR(reg)); 143 low = mtkswitch_phy_read_locked(sc, MTKSWITCH_GLOBAL_PHY, 144 MTKSWITCH_REG_LO(reg)); 145 hi = mtkswitch_phy_read_locked(sc, MTKSWITCH_GLOBAL_PHY, 146 MTKSWITCH_REG_HI(reg));; 147 return (low | (hi << 16)); 148 } 149 150 static uint32_t 151 mtkswitch_reg_write32_mt7621(struct mtkswitch_softc *sc, int reg, uint32_t val) 152 { 153 154 MTKSWITCH_LOCK_ASSERT(sc, MA_OWNED); 155 mtkswitch_phy_write_locked(sc, MTKSWITCH_GLOBAL_PHY, 156 MTKSWITCH_GLOBAL_REG, MTKSWITCH_REG_ADDR(reg)); 157 mtkswitch_phy_write_locked(sc, MTKSWITCH_GLOBAL_PHY, 158 MTKSWITCH_REG_LO(reg), MTKSWITCH_VAL_LO(val)); 159 mtkswitch_phy_write_locked(sc, MTKSWITCH_GLOBAL_PHY, 160 MTKSWITCH_REG_HI(reg), MTKSWITCH_VAL_HI(val)); 161 return (0); 162 } 163 164 static int 165 mtkswitch_reg_read(device_t dev, int reg) 166 { 167 struct mtkswitch_softc *sc = device_get_softc(dev); 168 uint32_t val; 169 170 val = sc->hal.mtkswitch_read(sc, MTKSWITCH_REG32(reg)); 171 if (MTKSWITCH_IS_HI16(reg)) 172 return (MTKSWITCH_HI16(val)); 173 return (MTKSWITCH_LO16(val)); 174 } 175 176 static int 177 mtkswitch_reg_write(device_t dev, int reg, int val) 178 { 179 struct mtkswitch_softc *sc = device_get_softc(dev); 180 uint32_t tmp; 181 182 tmp = sc->hal.mtkswitch_read(sc, MTKSWITCH_REG32(reg)); 183 if (MTKSWITCH_IS_HI16(reg)) { 184 tmp &= MTKSWITCH_LO16_MSK; 185 tmp |= MTKSWITCH_TO_HI16(val); 186 } else { 187 tmp &= MTKSWITCH_HI16_MSK; 188 tmp |= MTKSWITCH_TO_LO16(val); 189 } 190 sc->hal.mtkswitch_write(sc, MTKSWITCH_REG32(reg), tmp); 191 192 return (0); 193 } 194 195 static int 196 mtkswitch_reset(struct mtkswitch_softc *sc) 197 { 198 199 /* We don't reset the switch for now */ 200 return (0); 201 } 202 203 static int 204 mtkswitch_hw_setup(struct mtkswitch_softc *sc) 205 { 206 207 /* 208 * TODO: parse the device tree and see if we need to configure 209 * ports, etc. differently. For now we fallback to defaults. 210 */ 211 212 /* Called early and hence unlocked */ 213 return (0); 214 } 215 216 static int 217 mtkswitch_hw_global_setup(struct mtkswitch_softc *sc) 218 { 219 /* Currently does nothing */ 220 221 /* Called early and hence unlocked */ 222 return (0); 223 } 224 225 static void 226 mtkswitch_port_init(struct mtkswitch_softc *sc, int port) 227 { 228 uint32_t val; 229 230 /* Called early and hence unlocked */ 231 232 /* Set the port to secure mode */ 233 sc->hal.mtkswitch_write(sc, MTKSWITCH_PCR(port), PCR_PORT_VLAN_SECURE); 234 235 /* Set port's vlan_attr to user port */ 236 val = sc->hal.mtkswitch_read(sc, MTKSWITCH_PVC(port)); 237 val &= PVC_VLAN_ATTR_MASK; 238 sc->hal.mtkswitch_write(sc, MTKSWITCH_PVC(port), val); 239 240 /* Set port's MAC to default settings */ 241 sc->hal.mtkswitch_write(sc, MTKSWITCH_PMCR(port), PMCR_CFG_DEFAULT); 242 } 243 244 static uint32_t 245 mtkswitch_get_port_status(struct mtkswitch_softc *sc, int port) 246 { 247 uint32_t val, res, tmp; 248 249 MTKSWITCH_LOCK_ASSERT(sc, MA_OWNED); 250 res = 0; 251 val = sc->hal.mtkswitch_read(sc, MTKSWITCH_PMSR(port)); 252 253 if (val & PMSR_MAC_LINK_STS) 254 res |= MTKSWITCH_LINK_UP; 255 if (val & PMSR_MAC_DPX_STS) 256 res |= MTKSWITCH_DUPLEX; 257 tmp = PMSR_MAC_SPD(val); 258 if (tmp == 0) 259 res |= MTKSWITCH_SPEED_10; 260 else if (tmp == 1) 261 res |= MTKSWITCH_SPEED_100; 262 else if (tmp == 2) 263 res |= MTKSWITCH_SPEED_1000; 264 if (val & PMSR_TX_FC_STS) 265 res |= MTKSWITCH_TXFLOW; 266 if (val & PMSR_RX_FC_STS) 267 res |= MTKSWITCH_RXFLOW; 268 269 return (res); 270 } 271 272 static int 273 mtkswitch_atu_flush(struct mtkswitch_softc *sc) 274 { 275 276 MTKSWITCH_LOCK_ASSERT(sc, MA_OWNED); 277 278 /* Flush all non-static MAC addresses */ 279 while (sc->hal.mtkswitch_read(sc, MTKSWITCH_ATC) & ATC_BUSY); 280 sc->hal.mtkswitch_write(sc, MTKSWITCH_ATC, ATC_BUSY | 281 ATC_AC_MAT_NON_STATIC_MACS | ATC_AC_CMD_CLEAN); 282 while (sc->hal.mtkswitch_read(sc, MTKSWITCH_ATC) & ATC_BUSY); 283 284 return (0); 285 } 286 287 static int 288 mtkswitch_port_vlan_setup(struct mtkswitch_softc *sc, etherswitch_port_t *p) 289 { 290 int err; 291 292 /* 293 * Port behaviour wrt tag/untag/stack is currently defined per-VLAN. 294 * So we say we don't support it here. 295 */ 296 if ((p->es_flags & (ETHERSWITCH_PORT_DOUBLE_TAG | 297 ETHERSWITCH_PORT_ADDTAG | ETHERSWITCH_PORT_STRIPTAG)) != 0) 298 return (ENOTSUP); 299 300 MTKSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); 301 MTKSWITCH_LOCK(sc); 302 303 /* Set the PVID */ 304 if (p->es_pvid != 0) { 305 err = sc->hal.mtkswitch_vlan_set_pvid(sc, p->es_port, 306 p->es_pvid); 307 if (err != 0) { 308 MTKSWITCH_UNLOCK(sc); 309 return (err); 310 } 311 } 312 313 MTKSWITCH_UNLOCK(sc); 314 315 return (0); 316 } 317 318 static int 319 mtkswitch_port_vlan_get(struct mtkswitch_softc *sc, etherswitch_port_t *p) 320 { 321 322 MTKSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); 323 MTKSWITCH_LOCK(sc); 324 325 /* Retrieve the PVID */ 326 sc->hal.mtkswitch_vlan_get_pvid(sc, p->es_port, &p->es_pvid); 327 328 /* 329 * Port flags are not supported at the moment. 330 * Port's tag/untag/stack behaviour is defined per-VLAN. 331 */ 332 p->es_flags = 0; 333 334 MTKSWITCH_UNLOCK(sc); 335 336 return (0); 337 } 338 339 static void 340 mtkswitch_invalidate_vlan(struct mtkswitch_softc *sc, uint32_t vid) 341 { 342 343 while (sc->hal.mtkswitch_read(sc, MTKSWITCH_VTCR) & VTCR_BUSY); 344 sc->hal.mtkswitch_write(sc, MTKSWITCH_VTCR, VTCR_BUSY | 345 VTCR_FUNC_VID_INVALID | (vid & VTCR_VID_MASK)); 346 while (sc->hal.mtkswitch_read(sc, MTKSWITCH_VTCR) & VTCR_BUSY); 347 } 348 349 static void 350 mtkswitch_vlan_init_hw(struct mtkswitch_softc *sc) 351 { 352 uint32_t val, vid, i; 353 354 MTKSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); 355 MTKSWITCH_LOCK(sc); 356 357 /* Reset all VLANs to defaults first */ 358 for (i = 0; i < sc->info.es_nvlangroups; i++) { 359 mtkswitch_invalidate_vlan(sc, i); 360 if (sc->sc_switchtype == MTK_SWITCH_MT7620) { 361 val = sc->hal.mtkswitch_read(sc, MTKSWITCH_VTIM(i)); 362 val &= (VTIM_MASK << VTIM_OFF(i)); 363 val |= ((i + 1) << VTIM_OFF(i)); 364 sc->hal.mtkswitch_write(sc, MTKSWITCH_VTIM(i), val); 365 } 366 } 367 368 /* Now, add all ports as untagged members of VLAN 1 */ 369 if (sc->sc_switchtype == MTK_SWITCH_MT7620) { 370 /* MT7620 uses vid index instead of actual vid */ 371 vid = 0; 372 } else { 373 /* MT7621 uses the vid itself */ 374 vid = 1; 375 } 376 val = VAWD1_IVL_MAC | VAWD1_VTAG_EN | VAWD1_VALID; 377 for (i = 0; i < sc->info.es_nports; i++) 378 val |= VAWD1_PORT_MEMBER(i); 379 sc->hal.mtkswitch_write(sc, MTKSWITCH_VAWD1, val); 380 sc->hal.mtkswitch_write(sc, MTKSWITCH_VAWD2, 0); 381 val = VTCR_BUSY | VTCR_FUNC_VID_WRITE | vid; 382 sc->hal.mtkswitch_write(sc, MTKSWITCH_VTCR, val); 383 384 /* Set all port PVIDs to 1 */ 385 for (i = 0; i < sc->info.es_nports; i++) { 386 sc->hal.mtkswitch_vlan_set_pvid(sc, i, 1); 387 } 388 389 MTKSWITCH_UNLOCK(sc); 390 } 391 392 static int 393 mtkswitch_vlan_getvgroup(struct mtkswitch_softc *sc, etherswitch_vlangroup_t *v) 394 { 395 uint32_t val, i; 396 397 MTKSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); 398 399 if ((sc->vlan_mode != ETHERSWITCH_VLAN_DOT1Q) || 400 (v->es_vlangroup > sc->info.es_nvlangroups)) 401 return (EINVAL); 402 403 /* Reset the member ports. */ 404 v->es_untagged_ports = 0; 405 v->es_member_ports = 0; 406 407 /* Not supported for now */ 408 v->es_fid = 0; 409 410 MTKSWITCH_LOCK(sc); 411 if (sc->sc_switchtype == MTK_SWITCH_MT7620) { 412 v->es_vid = (sc->hal.mtkswitch_read(sc, 413 MTKSWITCH_VTIM(v->es_vlangroup)) >> 414 VTIM_OFF(v->es_vlangroup)) & VTIM_MASK; 415 } else { 416 v->es_vid = v->es_vlangroup; 417 } 418 419 while (sc->hal.mtkswitch_read(sc, MTKSWITCH_VTCR) & VTCR_BUSY); 420 sc->hal.mtkswitch_write(sc, MTKSWITCH_VTCR, VTCR_BUSY | 421 VTCR_FUNC_VID_READ | (v->es_vlangroup & VTCR_VID_MASK)); 422 while ((val = sc->hal.mtkswitch_read(sc, MTKSWITCH_VTCR)) & VTCR_BUSY); 423 if (val & VTCR_IDX_INVALID) { 424 MTKSWITCH_UNLOCK(sc); 425 return (0); 426 } 427 428 val = sc->hal.mtkswitch_read(sc, MTKSWITCH_VAWD1); 429 if (val & VAWD1_VALID) 430 v->es_vid |= ETHERSWITCH_VID_VALID; 431 else { 432 MTKSWITCH_UNLOCK(sc); 433 return (0); 434 } 435 v->es_member_ports = (val >> VAWD1_MEMBER_OFF) & VAWD1_MEMBER_MASK; 436 437 val = sc->hal.mtkswitch_read(sc, MTKSWITCH_VAWD2); 438 for (i = 0; i < sc->info.es_nports; i++) { 439 if ((val & VAWD2_PORT_MASK(i)) == VAWD2_PORT_UNTAGGED(i)) 440 v->es_untagged_ports |= (1<<i); 441 } 442 443 MTKSWITCH_UNLOCK(sc); 444 return (0); 445 } 446 447 static int 448 mtkswitch_vlan_setvgroup(struct mtkswitch_softc *sc, etherswitch_vlangroup_t *v) 449 { 450 uint32_t val, i, vid; 451 452 MTKSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); 453 454 if ((sc->vlan_mode != ETHERSWITCH_VLAN_DOT1Q) || 455 (v->es_vlangroup > sc->info.es_nvlangroups)) 456 return (EINVAL); 457 458 /* We currently don't support FID */ 459 if (v->es_fid != 0) 460 return (EINVAL); 461 462 MTKSWITCH_LOCK(sc); 463 while (sc->hal.mtkswitch_read(sc, MTKSWITCH_VTCR) & VTCR_BUSY); 464 if (sc->sc_switchtype == MTK_SWITCH_MT7620) { 465 val = sc->hal.mtkswitch_read(sc, 466 MTKSWITCH_VTIM(v->es_vlangroup)); 467 val &= (VTIM_MASK << VTIM_OFF(v->es_vlangroup)); 468 val |= ((v->es_vid & VTIM_MASK) << VTIM_OFF(v->es_vlangroup)); 469 sc->hal.mtkswitch_write(sc, MTKSWITCH_VTIM(v->es_vlangroup), 470 val); 471 vid = v->es_vlangroup; 472 } else 473 vid = v->es_vid; 474 475 /* We use FID 0 */ 476 val = VAWD1_IVL_MAC | VAWD1_VTAG_EN | VAWD1_VALID; 477 val |= ((v->es_member_ports & VAWD1_MEMBER_MASK) << VAWD1_MEMBER_OFF); 478 sc->hal.mtkswitch_write(sc, MTKSWITCH_VAWD1, val); 479 480 /* Set tagged ports */ 481 val = 0; 482 for (i = 0; i < sc->info.es_nports; i++) 483 if (((1<<i) & v->es_untagged_ports) == 0) 484 val |= VAWD2_PORT_TAGGED(i); 485 sc->hal.mtkswitch_write(sc, MTKSWITCH_VAWD2, val); 486 487 /* Write the VLAN entry */ 488 sc->hal.mtkswitch_write(sc, MTKSWITCH_VTCR, VTCR_BUSY | 489 VTCR_FUNC_VID_WRITE | (vid & VTCR_VID_MASK)); 490 while ((val = sc->hal.mtkswitch_read(sc, MTKSWITCH_VTCR)) & VTCR_BUSY); 491 492 MTKSWITCH_UNLOCK(sc); 493 494 if (val & VTCR_IDX_INVALID) 495 return (EINVAL); 496 497 return (0); 498 } 499 500 static int 501 mtkswitch_vlan_get_pvid(struct mtkswitch_softc *sc, int port, int *pvid) 502 { 503 504 MTKSWITCH_LOCK_ASSERT(sc, MA_OWNED); 505 506 *pvid = sc->hal.mtkswitch_read(sc, MTKSWITCH_PPBV1(port)); 507 *pvid = PPBV_VID_FROM_REG(*pvid); 508 509 return (0); 510 } 511 512 static int 513 mtkswitch_vlan_set_pvid(struct mtkswitch_softc *sc, int port, int pvid) 514 { 515 uint32_t val; 516 517 MTKSWITCH_LOCK_ASSERT(sc, MA_OWNED); 518 val = PPBV_VID(pvid & PPBV_VID_MASK); 519 sc->hal.mtkswitch_write(sc, MTKSWITCH_PPBV1(port), val); 520 sc->hal.mtkswitch_write(sc, MTKSWITCH_PPBV2(port), val); 521 522 return (0); 523 } 524 525 extern void 526 mtk_attach_switch_mt7620(struct mtkswitch_softc *sc) 527 { 528 529 sc->portmap = 0x7f; 530 sc->phymap = 0x1f; 531 532 sc->info.es_nports = 7; 533 sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q; 534 sc->info.es_nvlangroups = 16; 535 sprintf(sc->info.es_name, "Mediatek GSW"); 536 537 if (sc->sc_switchtype == MTK_SWITCH_MT7621) { 538 sc->hal.mtkswitch_read = mtkswitch_reg_read32_mt7621; 539 sc->hal.mtkswitch_write = mtkswitch_reg_write32_mt7621; 540 sc->info.es_nvlangroups = 4096; 541 } else { 542 sc->hal.mtkswitch_read = mtkswitch_reg_read32; 543 sc->hal.mtkswitch_write = mtkswitch_reg_write32; 544 } 545 546 sc->hal.mtkswitch_reset = mtkswitch_reset; 547 sc->hal.mtkswitch_hw_setup = mtkswitch_hw_setup; 548 sc->hal.mtkswitch_hw_global_setup = mtkswitch_hw_global_setup; 549 sc->hal.mtkswitch_port_init = mtkswitch_port_init; 550 sc->hal.mtkswitch_get_port_status = mtkswitch_get_port_status; 551 sc->hal.mtkswitch_atu_flush = mtkswitch_atu_flush; 552 sc->hal.mtkswitch_port_vlan_setup = mtkswitch_port_vlan_setup; 553 sc->hal.mtkswitch_port_vlan_get = mtkswitch_port_vlan_get; 554 sc->hal.mtkswitch_vlan_init_hw = mtkswitch_vlan_init_hw; 555 sc->hal.mtkswitch_vlan_getvgroup = mtkswitch_vlan_getvgroup; 556 sc->hal.mtkswitch_vlan_setvgroup = mtkswitch_vlan_setvgroup; 557 sc->hal.mtkswitch_vlan_get_pvid = mtkswitch_vlan_get_pvid; 558 sc->hal.mtkswitch_vlan_set_pvid = mtkswitch_vlan_set_pvid; 559 sc->hal.mtkswitch_phy_read = mtkswitch_phy_read; 560 sc->hal.mtkswitch_phy_write = mtkswitch_phy_write; 561 sc->hal.mtkswitch_reg_read = mtkswitch_reg_read; 562 sc->hal.mtkswitch_reg_write = mtkswitch_reg_write; 563 } 564