1 /*- 2 * Copyright (c) 2016 Hiroki Mori 3 * Copyright (c) 2013 Luiz Otavio O Souza. 4 * Copyright (c) 2011-2012 Stefan Bethke. 5 * Copyright (c) 2012 Adrian Chadd. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 /* 31 * This is Micrel KSZ8995MA driver code. KSZ8995MA use SPI bus on control. 32 * This code development on @SRCHACK's ksz8995ma board and FON2100 with 33 * gpiospi. 34 * etherswitchcfg command port option support addtag, ingress, striptag, 35 * dropuntagged. 36 */ 37 38 #include <sys/param.h> 39 #include <sys/bus.h> 40 #include <sys/errno.h> 41 #include <sys/kernel.h> 42 #include <sys/lock.h> 43 #include <sys/malloc.h> 44 #include <sys/module.h> 45 #include <sys/mutex.h> 46 #include <sys/socket.h> 47 #include <sys/sockio.h> 48 #include <sys/sysctl.h> 49 #include <sys/systm.h> 50 51 #include <net/if.h> 52 #include <net/if_var.h> 53 #include <net/ethernet.h> 54 #include <net/if_media.h> 55 #include <net/if_types.h> 56 57 #include <machine/bus.h> 58 #include <dev/mii/mii.h> 59 #include <dev/mii/miivar.h> 60 61 #include <dev/etherswitch/etherswitch.h> 62 63 #include <dev/spibus/spi.h> 64 65 #include "spibus_if.h" 66 #include "miibus_if.h" 67 #include "etherswitch_if.h" 68 69 #define KSZ8995MA_SPI_READ 0x03 70 #define KSZ8995MA_SPI_WRITE 0x02 71 72 #define KSZ8995MA_CID0 0x00 73 #define KSZ8995MA_CID1 0x01 74 75 #define KSZ8995MA_GC0 0x02 76 #define KSZ8995MA_GC1 0x03 77 #define KSZ8995MA_GC2 0x04 78 #define KSZ8995MA_GC3 0x05 79 80 #define KSZ8995MA_PORT_SIZE 0x10 81 82 #define KSZ8995MA_PC0_BASE 0x10 83 #define KSZ8995MA_PC1_BASE 0x11 84 #define KSZ8995MA_PC2_BASE 0x12 85 #define KSZ8995MA_PC3_BASE 0x13 86 #define KSZ8995MA_PC4_BASE 0x14 87 #define KSZ8995MA_PC5_BASE 0x15 88 #define KSZ8995MA_PC6_BASE 0x16 89 #define KSZ8995MA_PC7_BASE 0x17 90 #define KSZ8995MA_PC8_BASE 0x18 91 #define KSZ8995MA_PC9_BASE 0x19 92 #define KSZ8995MA_PC10_BASE 0x1a 93 #define KSZ8995MA_PC11_BASE 0x1b 94 #define KSZ8995MA_PC12_BASE 0x1c 95 #define KSZ8995MA_PC13_BASE 0x1d 96 97 #define KSZ8995MA_PS0_BASE 0x1e 98 99 #define KSZ8995MA_PC14_BASE 0x1f 100 101 #define KSZ8995MA_IAC0 0x6e 102 #define KSZ8995MA_IAC1 0x6f 103 #define KSZ8995MA_IDR8 0x70 104 #define KSZ8995MA_IDR7 0x71 105 #define KSZ8995MA_IDR6 0x72 106 #define KSZ8995MA_IDR5 0x73 107 #define KSZ8995MA_IDR4 0x74 108 #define KSZ8995MA_IDR3 0x75 109 #define KSZ8995MA_IDR2 0x76 110 #define KSZ8995MA_IDR1 0x77 111 #define KSZ8995MA_IDR0 0x78 112 113 #define KSZ8995MA_FAMILI_ID 0x95 114 #define KSZ8995MA_CHIP_ID 0x00 115 #define KSZ8995MA_CHIP_ID_MASK 0xf0 116 #define KSZ8995MA_START 0x01 117 #define KSZ8995MA_VLAN_ENABLE 0x80 118 #define KSZ8995MA_TAG_INS 0x04 119 #define KSZ8995MA_TAG_RM 0x02 120 #define KSZ8995MA_INGR_FILT 0x40 121 #define KSZ8995MA_DROP_NONPVID 0x20 122 123 #define KSZ8995MA_PDOWN 0x08 124 #define KSZ8995MA_STARTNEG 0x20 125 126 #define KSZ8995MA_MII_STAT 0x7808 127 #define KSZ8995MA_MII_PHYID_H 0x0022 128 #define KSZ8995MA_MII_PHYID_L 0x1450 129 #define KSZ8995MA_MII_AA 0x0401 130 131 #define KSZ8995MA_VLAN_TABLE_VALID 0x20 132 #define KSZ8995MA_VLAN_TABLE_READ 0x14 133 #define KSZ8995MA_VLAN_TABLE_WRITE 0x04 134 135 #define KSZ8995MA_MAX_PORT 5 136 137 MALLOC_DECLARE(M_KSZ8995MA); 138 MALLOC_DEFINE(M_KSZ8995MA, "ksz8995ma", "ksz8995ma data structures"); 139 140 struct ksz8995ma_softc { 141 struct mtx sc_mtx; /* serialize access to softc */ 142 device_t sc_dev; 143 int vlan_mode; 144 int media; /* cpu port media */ 145 int cpuport; /* which PHY is connected to the CPU */ 146 int phymask; /* PHYs we manage */ 147 int numports; /* number of ports */ 148 int ifpport[KSZ8995MA_MAX_PORT]; 149 int *portphy; 150 char **ifname; 151 device_t **miibus; 152 if_t *ifp; 153 struct callout callout_tick; 154 etherswitch_info_t info; 155 }; 156 157 #define KSZ8995MA_LOCK(_sc) \ 158 mtx_lock(&(_sc)->sc_mtx) 159 #define KSZ8995MA_UNLOCK(_sc) \ 160 mtx_unlock(&(_sc)->sc_mtx) 161 #define KSZ8995MA_LOCK_ASSERT(_sc, _what) \ 162 mtx_assert(&(_sc)->sc_mtx, (_what)) 163 #define KSZ8995MA_TRYLOCK(_sc) \ 164 mtx_trylock(&(_sc)->sc_mtx) 165 166 #if defined(DEBUG) 167 #define DPRINTF(dev, args...) device_printf(dev, args) 168 #else 169 #define DPRINTF(dev, args...) 170 #endif 171 172 static inline int ksz8995ma_portforphy(struct ksz8995ma_softc *, int); 173 static void ksz8995ma_tick(void *); 174 static int ksz8995ma_ifmedia_upd(if_t); 175 static void ksz8995ma_ifmedia_sts(if_t, struct ifmediareq *); 176 static int ksz8995ma_readreg(device_t dev, int addr); 177 static int ksz8995ma_writereg(device_t dev, int addr, int value); 178 static void ksz8995ma_portvlanreset(device_t dev); 179 180 static int 181 ksz8995ma_probe(device_t dev) 182 { 183 int id0, id1; 184 struct ksz8995ma_softc *sc; 185 186 sc = device_get_softc(dev); 187 bzero(sc, sizeof(*sc)); 188 189 id0 = ksz8995ma_readreg(dev, KSZ8995MA_CID0); 190 id1 = ksz8995ma_readreg(dev, KSZ8995MA_CID1); 191 if (bootverbose) 192 device_printf(dev,"Chip Identifier Register %x %x\n", id0, id1); 193 194 /* check Product Code */ 195 if (id0 != KSZ8995MA_FAMILI_ID || (id1 & KSZ8995MA_CHIP_ID_MASK) != 196 KSZ8995MA_CHIP_ID) { 197 return (ENXIO); 198 } 199 200 device_set_desc(dev, "Micrel KSZ8995MA SPI switch driver"); 201 return (BUS_PROBE_DEFAULT); 202 } 203 204 static int 205 ksz8995ma_attach_phys(struct ksz8995ma_softc *sc) 206 { 207 int phy, port, err; 208 char name[IFNAMSIZ]; 209 210 port = 0; 211 err = 0; 212 /* PHYs need an interface, so we generate a dummy one */ 213 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->sc_dev)); 214 for (phy = 0; phy < sc->numports; phy++) { 215 if (phy == sc->cpuport) 216 continue; 217 if (((1 << phy) & sc->phymask) == 0) 218 continue; 219 sc->ifpport[phy] = port; 220 sc->portphy[port] = phy; 221 sc->ifp[port] = if_alloc(IFT_ETHER); 222 sc->ifp[port]->if_softc = sc; 223 sc->ifp[port]->if_flags |= IFF_UP | IFF_BROADCAST | 224 IFF_DRV_RUNNING | IFF_SIMPLEX; 225 if_initname(sc->ifp[port], name, port); 226 sc->miibus[port] = malloc(sizeof(device_t), M_KSZ8995MA, 227 M_WAITOK | M_ZERO); 228 err = mii_attach(sc->sc_dev, sc->miibus[port], sc->ifp[port], 229 ksz8995ma_ifmedia_upd, ksz8995ma_ifmedia_sts, \ 230 BMSR_DEFCAPMASK, phy, MII_OFFSET_ANY, 0); 231 DPRINTF(sc->sc_dev, "%s attached to pseudo interface %s\n", 232 device_get_nameunit(*sc->miibus[port]), 233 sc->ifp[port]->if_xname); 234 if (err != 0) { 235 device_printf(sc->sc_dev, 236 "attaching PHY %d failed\n", 237 phy); 238 goto failed; 239 } 240 ++port; 241 } 242 sc->info.es_nports = port; 243 if (sc->cpuport != -1) { 244 /* cpu port is MAC5 on ksz8995ma */ 245 sc->ifpport[sc->cpuport] = port; 246 sc->portphy[port] = sc->cpuport; 247 ++sc->info.es_nports; 248 } 249 250 return (0); 251 252 failed: 253 for (phy = 0; phy < sc->numports; phy++) { 254 if (((1 << phy) & sc->phymask) == 0) 255 continue; 256 port = ksz8995ma_portforphy(sc, phy); 257 if (sc->miibus[port] != NULL) 258 device_delete_child(sc->sc_dev, (*sc->miibus[port])); 259 if (sc->ifp[port] != NULL) 260 if_free(sc->ifp[port]); 261 if (sc->ifname[port] != NULL) 262 free(sc->ifname[port], M_KSZ8995MA); 263 if (sc->miibus[port] != NULL) 264 free(sc->miibus[port], M_KSZ8995MA); 265 } 266 return (err); 267 } 268 269 static int 270 ksz8995ma_attach(device_t dev) 271 { 272 struct ksz8995ma_softc *sc; 273 int err, reg; 274 275 err = 0; 276 sc = device_get_softc(dev); 277 278 sc->sc_dev = dev; 279 mtx_init(&sc->sc_mtx, "ksz8995ma", NULL, MTX_DEF); 280 strlcpy(sc->info.es_name, device_get_desc(dev), 281 sizeof(sc->info.es_name)); 282 283 /* KSZ8995MA Defaults */ 284 sc->numports = KSZ8995MA_MAX_PORT; 285 sc->phymask = (1 << (KSZ8995MA_MAX_PORT + 1)) - 1; 286 sc->cpuport = -1; 287 sc->media = 100; 288 289 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 290 "cpuport", &sc->cpuport); 291 292 sc->info.es_nvlangroups = 16; 293 sc->info.es_vlan_caps = ETHERSWITCH_VLAN_PORT | ETHERSWITCH_VLAN_DOT1Q; 294 295 sc->ifp = malloc(sizeof(if_t) * sc->numports, M_KSZ8995MA, 296 M_WAITOK | M_ZERO); 297 sc->ifname = malloc(sizeof(char *) * sc->numports, M_KSZ8995MA, 298 M_WAITOK | M_ZERO); 299 sc->miibus = malloc(sizeof(device_t *) * sc->numports, M_KSZ8995MA, 300 M_WAITOK | M_ZERO); 301 sc->portphy = malloc(sizeof(int) * sc->numports, M_KSZ8995MA, 302 M_WAITOK | M_ZERO); 303 304 /* 305 * Attach the PHYs and complete the bus enumeration. 306 */ 307 err = ksz8995ma_attach_phys(sc); 308 if (err != 0) 309 goto failed; 310 311 bus_generic_probe(dev); 312 bus_enumerate_hinted_children(dev); 313 err = bus_generic_attach(dev); 314 if (err != 0) 315 goto failed; 316 317 callout_init(&sc->callout_tick, 0); 318 319 ksz8995ma_tick(sc); 320 321 /* start switch */ 322 sc->vlan_mode = 0; 323 reg = ksz8995ma_readreg(dev, KSZ8995MA_GC3); 324 ksz8995ma_writereg(dev, KSZ8995MA_GC3, 325 reg & ~KSZ8995MA_VLAN_ENABLE); 326 ksz8995ma_portvlanreset(dev); 327 ksz8995ma_writereg(dev, KSZ8995MA_CID1, KSZ8995MA_START); 328 329 return (0); 330 331 failed: 332 free(sc->portphy, M_KSZ8995MA); 333 free(sc->miibus, M_KSZ8995MA); 334 free(sc->ifname, M_KSZ8995MA); 335 free(sc->ifp, M_KSZ8995MA); 336 337 return (err); 338 } 339 340 static int 341 ksz8995ma_detach(device_t dev) 342 { 343 struct ksz8995ma_softc *sc; 344 int i, port; 345 346 sc = device_get_softc(dev); 347 348 callout_drain(&sc->callout_tick); 349 350 for (i = 0; i < KSZ8995MA_MAX_PORT; i++) { 351 if (((1 << i) & sc->phymask) == 0) 352 continue; 353 port = ksz8995ma_portforphy(sc, i); 354 if (sc->miibus[port] != NULL) 355 device_delete_child(dev, (*sc->miibus[port])); 356 if (sc->ifp[port] != NULL) 357 if_free(sc->ifp[port]); 358 free(sc->ifname[port], M_KSZ8995MA); 359 free(sc->miibus[port], M_KSZ8995MA); 360 } 361 362 free(sc->portphy, M_KSZ8995MA); 363 free(sc->miibus, M_KSZ8995MA); 364 free(sc->ifname, M_KSZ8995MA); 365 free(sc->ifp, M_KSZ8995MA); 366 367 bus_generic_detach(dev); 368 mtx_destroy(&sc->sc_mtx); 369 370 return (0); 371 } 372 373 /* 374 * Convert PHY number to port number. 375 */ 376 static inline int 377 ksz8995ma_portforphy(struct ksz8995ma_softc *sc, int phy) 378 { 379 380 return (sc->ifpport[phy]); 381 } 382 383 static inline struct mii_data * 384 ksz8995ma_miiforport(struct ksz8995ma_softc *sc, int port) 385 { 386 387 if (port < 0 || port > sc->numports) 388 return (NULL); 389 if (port == sc->cpuport) 390 return (NULL); 391 return (device_get_softc(*sc->miibus[port])); 392 } 393 394 static inline if_t 395 ksz8995ma_ifpforport(struct ksz8995ma_softc *sc, int port) 396 { 397 398 if (port < 0 || port > sc->numports) 399 return (NULL); 400 return (sc->ifp[port]); 401 } 402 403 /* 404 * Poll the status for all PHYs. 405 */ 406 static void 407 ksz8995ma_miipollstat(struct ksz8995ma_softc *sc) 408 { 409 int i, port; 410 struct mii_data *mii; 411 struct mii_softc *miisc; 412 413 KSZ8995MA_LOCK_ASSERT(sc, MA_NOTOWNED); 414 415 for (i = 0; i < KSZ8995MA_MAX_PORT; i++) { 416 if (i == sc->cpuport) 417 continue; 418 if (((1 << i) & sc->phymask) == 0) 419 continue; 420 port = ksz8995ma_portforphy(sc, i); 421 if ((*sc->miibus[port]) == NULL) 422 continue; 423 mii = device_get_softc(*sc->miibus[port]); 424 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) { 425 if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) != 426 miisc->mii_inst) 427 continue; 428 ukphy_status(miisc); 429 mii_phy_update(miisc, MII_POLLSTAT); 430 } 431 } 432 } 433 434 static void 435 ksz8995ma_tick(void *arg) 436 { 437 struct ksz8995ma_softc *sc; 438 439 sc = arg; 440 441 ksz8995ma_miipollstat(sc); 442 callout_reset(&sc->callout_tick, hz, ksz8995ma_tick, sc); 443 } 444 445 static void 446 ksz8995ma_lock(device_t dev) 447 { 448 struct ksz8995ma_softc *sc; 449 450 sc = device_get_softc(dev); 451 452 KSZ8995MA_LOCK_ASSERT(sc, MA_NOTOWNED); 453 KSZ8995MA_LOCK(sc); 454 } 455 456 static void 457 ksz8995ma_unlock(device_t dev) 458 { 459 struct ksz8995ma_softc *sc; 460 461 sc = device_get_softc(dev); 462 463 KSZ8995MA_LOCK_ASSERT(sc, MA_OWNED); 464 KSZ8995MA_UNLOCK(sc); 465 } 466 467 static etherswitch_info_t * 468 ksz8995ma_getinfo(device_t dev) 469 { 470 struct ksz8995ma_softc *sc; 471 472 sc = device_get_softc(dev); 473 474 return (&sc->info); 475 } 476 477 static int 478 ksz8995ma_getport(device_t dev, etherswitch_port_t *p) 479 { 480 struct ksz8995ma_softc *sc; 481 struct mii_data *mii; 482 struct ifmediareq *ifmr; 483 int phy, err; 484 int tag1, tag2, portreg; 485 486 sc = device_get_softc(dev); 487 ifmr = &p->es_ifmr; 488 489 if (p->es_port < 0 || p->es_port >= sc->numports) 490 return (ENXIO); 491 492 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) { 493 tag1 = ksz8995ma_readreg(dev, KSZ8995MA_PC3_BASE + 494 KSZ8995MA_PORT_SIZE * p->es_port); 495 tag2 = ksz8995ma_readreg(dev, KSZ8995MA_PC4_BASE + 496 KSZ8995MA_PORT_SIZE * p->es_port); 497 p->es_pvid = (tag1 & 0x0f) << 8 | tag2; 498 499 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC0_BASE + 500 KSZ8995MA_PORT_SIZE * p->es_port); 501 if (portreg & KSZ8995MA_TAG_INS) 502 p->es_flags |= ETHERSWITCH_PORT_ADDTAG; 503 if (portreg & KSZ8995MA_TAG_RM) 504 p->es_flags |= ETHERSWITCH_PORT_STRIPTAG; 505 506 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC2_BASE + 507 KSZ8995MA_PORT_SIZE * p->es_port); 508 if (portreg & KSZ8995MA_DROP_NONPVID) 509 p->es_flags |= ETHERSWITCH_PORT_DROPUNTAGGED; 510 if (portreg & KSZ8995MA_INGR_FILT) 511 p->es_flags |= ETHERSWITCH_PORT_INGRESS; 512 } 513 514 phy = sc->portphy[p->es_port]; 515 mii = ksz8995ma_miiforport(sc, p->es_port); 516 if (sc->cpuport != -1 && phy == sc->cpuport) { 517 /* fill in fixed values for CPU port */ 518 p->es_flags |= ETHERSWITCH_PORT_CPU; 519 ifmr->ifm_count = 0; 520 if (sc->media == 100) 521 ifmr->ifm_current = ifmr->ifm_active = 522 IFM_ETHER | IFM_100_TX | IFM_FDX; 523 else 524 ifmr->ifm_current = ifmr->ifm_active = 525 IFM_ETHER | IFM_1000_T | IFM_FDX; 526 ifmr->ifm_mask = 0; 527 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID; 528 } else if (mii != NULL) { 529 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, 530 &mii->mii_media, SIOCGIFMEDIA); 531 if (err) 532 return (err); 533 } else { 534 return (ENXIO); 535 } 536 537 return (0); 538 } 539 540 static int 541 ksz8995ma_setport(device_t dev, etherswitch_port_t *p) 542 { 543 struct ksz8995ma_softc *sc; 544 struct mii_data *mii; 545 struct ifmedia *ifm; 546 if_t ifp; 547 int phy, err; 548 int portreg; 549 550 sc = device_get_softc(dev); 551 552 if (p->es_port < 0 || p->es_port >= sc->numports) 553 return (ENXIO); 554 555 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) { 556 ksz8995ma_writereg(dev, KSZ8995MA_PC4_BASE + 557 KSZ8995MA_PORT_SIZE * p->es_port, p->es_pvid & 0xff); 558 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC3_BASE + 559 KSZ8995MA_PORT_SIZE * p->es_port); 560 ksz8995ma_writereg(dev, KSZ8995MA_PC3_BASE + 561 KSZ8995MA_PORT_SIZE * p->es_port, 562 (portreg & 0xf0) | ((p->es_pvid >> 8) & 0x0f)); 563 564 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC0_BASE + 565 KSZ8995MA_PORT_SIZE * p->es_port); 566 if (p->es_flags & ETHERSWITCH_PORT_ADDTAG) 567 portreg |= KSZ8995MA_TAG_INS; 568 else 569 portreg &= ~KSZ8995MA_TAG_INS; 570 if (p->es_flags & ETHERSWITCH_PORT_STRIPTAG) 571 portreg |= KSZ8995MA_TAG_RM; 572 else 573 portreg &= ~KSZ8995MA_TAG_RM; 574 ksz8995ma_writereg(dev, KSZ8995MA_PC0_BASE + 575 KSZ8995MA_PORT_SIZE * p->es_port, portreg); 576 577 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC2_BASE + 578 KSZ8995MA_PORT_SIZE * p->es_port); 579 if (p->es_flags & ETHERSWITCH_PORT_DROPUNTAGGED) 580 portreg |= KSZ8995MA_DROP_NONPVID; 581 else 582 portreg &= ~KSZ8995MA_DROP_NONPVID; 583 if (p->es_flags & ETHERSWITCH_PORT_INGRESS) 584 portreg |= KSZ8995MA_INGR_FILT; 585 else 586 portreg &= ~KSZ8995MA_INGR_FILT; 587 ksz8995ma_writereg(dev, KSZ8995MA_PC2_BASE + 588 KSZ8995MA_PORT_SIZE * p->es_port, portreg); 589 } 590 591 phy = sc->portphy[p->es_port]; 592 mii = ksz8995ma_miiforport(sc, p->es_port); 593 if (phy != sc->cpuport) { 594 if (mii == NULL) 595 return (ENXIO); 596 ifp = ksz8995ma_ifpforport(sc, p->es_port); 597 ifm = &mii->mii_media; 598 err = ifmedia_ioctl(ifp, &p->es_ifr, ifm, SIOCSIFMEDIA); 599 } 600 return (0); 601 } 602 603 static int 604 ksz8995ma_getvgroup(device_t dev, etherswitch_vlangroup_t *vg) 605 { 606 int data0, data1, data2; 607 int vlantab; 608 struct ksz8995ma_softc *sc; 609 610 sc = device_get_softc(dev); 611 612 if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT) { 613 if (vg->es_vlangroup < sc->numports) { 614 vg->es_vid = ETHERSWITCH_VID_VALID; 615 vg->es_vid |= vg->es_vlangroup; 616 data0 = ksz8995ma_readreg(dev, KSZ8995MA_PC1_BASE + 617 KSZ8995MA_PORT_SIZE * vg->es_vlangroup); 618 vg->es_member_ports = data0 & 0x1f; 619 vg->es_untagged_ports = vg->es_member_ports; 620 vg->es_fid = 0; 621 } else { 622 vg->es_vid = 0; 623 } 624 } else if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) { 625 ksz8995ma_writereg(dev, KSZ8995MA_IAC0, 626 KSZ8995MA_VLAN_TABLE_READ); 627 ksz8995ma_writereg(dev, KSZ8995MA_IAC1, vg->es_vlangroup); 628 data2 = ksz8995ma_readreg(dev, KSZ8995MA_IDR2); 629 data1 = ksz8995ma_readreg(dev, KSZ8995MA_IDR1); 630 data0 = ksz8995ma_readreg(dev, KSZ8995MA_IDR0); 631 vlantab = data2 << 16 | data1 << 8 | data0; 632 if (data2 & KSZ8995MA_VLAN_TABLE_VALID) { 633 vg->es_vid = ETHERSWITCH_VID_VALID; 634 vg->es_vid |= vlantab & 0xfff; 635 vg->es_member_ports = (vlantab >> 16) & 0x1f; 636 vg->es_untagged_ports = vg->es_member_ports; 637 vg->es_fid = (vlantab >> 12) & 0x0f; 638 } else { 639 vg->es_fid = 0; 640 } 641 } 642 643 return (0); 644 } 645 646 static int 647 ksz8995ma_setvgroup(device_t dev, etherswitch_vlangroup_t *vg) 648 { 649 struct ksz8995ma_softc *sc; 650 int data0; 651 652 sc = device_get_softc(dev); 653 654 if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT) { 655 data0 = ksz8995ma_readreg(dev, KSZ8995MA_PC1_BASE + 656 KSZ8995MA_PORT_SIZE * vg->es_vlangroup); 657 ksz8995ma_writereg(dev, KSZ8995MA_PC1_BASE + 658 KSZ8995MA_PORT_SIZE * vg->es_vlangroup, 659 (data0 & 0xe0) | (vg->es_member_ports & 0x1f)); 660 } else if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) { 661 if (vg->es_member_ports != 0) { 662 ksz8995ma_writereg(dev, KSZ8995MA_IDR2, 663 KSZ8995MA_VLAN_TABLE_VALID | 664 (vg->es_member_ports & 0x1f)); 665 ksz8995ma_writereg(dev, KSZ8995MA_IDR1, 666 vg->es_fid << 4 | vg->es_vid >> 8); 667 ksz8995ma_writereg(dev, KSZ8995MA_IDR0, 668 vg->es_vid & 0xff); 669 } else { 670 ksz8995ma_writereg(dev, KSZ8995MA_IDR2, 0); 671 ksz8995ma_writereg(dev, KSZ8995MA_IDR1, 0); 672 ksz8995ma_writereg(dev, KSZ8995MA_IDR0, 0); 673 } 674 ksz8995ma_writereg(dev, KSZ8995MA_IAC0, 675 KSZ8995MA_VLAN_TABLE_WRITE); 676 ksz8995ma_writereg(dev, KSZ8995MA_IAC1, vg->es_vlangroup); 677 } 678 679 return (0); 680 } 681 682 static int 683 ksz8995ma_getconf(device_t dev, etherswitch_conf_t *conf) 684 { 685 struct ksz8995ma_softc *sc; 686 687 sc = device_get_softc(dev); 688 689 /* Return the VLAN mode. */ 690 conf->cmd = ETHERSWITCH_CONF_VLAN_MODE; 691 conf->vlan_mode = sc->vlan_mode; 692 693 return (0); 694 } 695 696 static void 697 ksz8995ma_portvlanreset(device_t dev) 698 { 699 int i, data; 700 struct ksz8995ma_softc *sc; 701 702 sc = device_get_softc(dev); 703 704 for (i = 0; i < sc->numports; ++i) { 705 data = ksz8995ma_readreg(dev, KSZ8995MA_PC1_BASE + 706 KSZ8995MA_PORT_SIZE * i); 707 ksz8995ma_writereg(dev, KSZ8995MA_PC1_BASE + 708 KSZ8995MA_PORT_SIZE * i, (data & 0xe0) | 0x1f); 709 } 710 } 711 712 static int 713 ksz8995ma_setconf(device_t dev, etherswitch_conf_t *conf) 714 { 715 int reg; 716 struct ksz8995ma_softc *sc; 717 718 sc = device_get_softc(dev); 719 720 if ((conf->cmd & ETHERSWITCH_CONF_VLAN_MODE) == 0) 721 return (0); 722 723 if (conf->vlan_mode == ETHERSWITCH_VLAN_PORT) { 724 sc->vlan_mode = ETHERSWITCH_VLAN_PORT; 725 reg = ksz8995ma_readreg(dev, KSZ8995MA_GC3); 726 ksz8995ma_writereg(dev, KSZ8995MA_GC3, 727 reg & ~KSZ8995MA_VLAN_ENABLE); 728 ksz8995ma_portvlanreset(dev); 729 } else if (conf->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) { 730 sc->vlan_mode = ETHERSWITCH_VLAN_DOT1Q; 731 reg = ksz8995ma_readreg(dev, KSZ8995MA_GC3); 732 ksz8995ma_writereg(dev, KSZ8995MA_GC3, 733 reg | KSZ8995MA_VLAN_ENABLE); 734 } else { 735 sc->vlan_mode = 0; 736 reg = ksz8995ma_readreg(dev, KSZ8995MA_GC3); 737 ksz8995ma_writereg(dev, KSZ8995MA_GC3, 738 reg & ~KSZ8995MA_VLAN_ENABLE); 739 ksz8995ma_portvlanreset(dev); 740 } 741 return (0); 742 } 743 744 static void 745 ksz8995ma_statchg(device_t dev) 746 { 747 748 DPRINTF(dev, "%s\n", __func__); 749 } 750 751 static int 752 ksz8995ma_ifmedia_upd(if_t ifp) 753 { 754 struct ksz8995ma_softc *sc; 755 struct mii_data *mii; 756 757 sc = if_getsoftc(ifp); 758 mii = ksz8995ma_miiforport(sc, if_getdunit(ifp)); 759 760 DPRINTF(sc->sc_dev, "%s\n", __func__); 761 if (mii == NULL) 762 return (ENXIO); 763 mii_mediachg(mii); 764 return (0); 765 } 766 767 static void 768 ksz8995ma_ifmedia_sts(if_t ifp, struct ifmediareq *ifmr) 769 { 770 struct ksz8995ma_softc *sc; 771 struct mii_data *mii; 772 773 sc = if_getsoftc(ifp); 774 mii = ksz8995ma_miiforport(sc, if_getdunit(ifp)); 775 776 DPRINTF(sc->sc_dev, "%s\n", __func__); 777 778 if (mii == NULL) 779 return; 780 mii_pollstat(mii); 781 ifmr->ifm_active = mii->mii_media_active; 782 ifmr->ifm_status = mii->mii_media_status; 783 } 784 785 static int 786 ksz8995ma_readphy(device_t dev, int phy, int reg) 787 { 788 int portreg; 789 790 /* 791 * This is no mdio/mdc connection code. 792 * simulate MIIM Registers via the SPI interface 793 */ 794 if (reg == MII_BMSR) { 795 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PS0_BASE + 796 KSZ8995MA_PORT_SIZE * phy); 797 return (KSZ8995MA_MII_STAT | 798 (portreg & 0x20 ? BMSR_LINK : 0x00) | 799 (portreg & 0x40 ? BMSR_ACOMP : 0x00)); 800 } else if (reg == MII_PHYIDR1) { 801 return (KSZ8995MA_MII_PHYID_H); 802 } else if (reg == MII_PHYIDR2) { 803 return (KSZ8995MA_MII_PHYID_L); 804 } else if (reg == MII_ANAR) { 805 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC12_BASE + 806 KSZ8995MA_PORT_SIZE * phy); 807 return (KSZ8995MA_MII_AA | (portreg & 0x0f) << 5); 808 } else if (reg == MII_ANLPAR) { 809 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PS0_BASE + 810 KSZ8995MA_PORT_SIZE * phy); 811 return (((portreg & 0x0f) << 5) | 0x01); 812 } 813 814 return (0); 815 } 816 817 static int 818 ksz8995ma_writephy(device_t dev, int phy, int reg, int data) 819 { 820 int portreg; 821 822 /* 823 * This is no mdio/mdc connection code. 824 * simulate MIIM Registers via the SPI interface 825 */ 826 if (reg == MII_BMCR) { 827 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC13_BASE + 828 KSZ8995MA_PORT_SIZE * phy); 829 if (data & BMCR_PDOWN) 830 portreg |= KSZ8995MA_PDOWN; 831 else 832 portreg &= ~KSZ8995MA_PDOWN; 833 if (data & BMCR_STARTNEG) 834 portreg |= KSZ8995MA_STARTNEG; 835 else 836 portreg &= ~KSZ8995MA_STARTNEG; 837 ksz8995ma_writereg(dev, KSZ8995MA_PC13_BASE + 838 KSZ8995MA_PORT_SIZE * phy, portreg); 839 } else if (reg == MII_ANAR) { 840 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC12_BASE + 841 KSZ8995MA_PORT_SIZE * phy); 842 portreg &= 0xf; 843 portreg |= ((data >> 5) & 0x0f); 844 ksz8995ma_writereg(dev, KSZ8995MA_PC12_BASE + 845 KSZ8995MA_PORT_SIZE * phy, portreg); 846 } 847 return (0); 848 } 849 850 static int 851 ksz8995ma_readreg(device_t dev, int addr) 852 { 853 uint8_t txBuf[8], rxBuf[8]; 854 struct spi_command cmd; 855 int err; 856 857 memset(&cmd, 0, sizeof(cmd)); 858 memset(txBuf, 0, sizeof(txBuf)); 859 memset(rxBuf, 0, sizeof(rxBuf)); 860 861 /* read spi */ 862 txBuf[0] = KSZ8995MA_SPI_READ; 863 txBuf[1] = addr; 864 cmd.tx_cmd = &txBuf; 865 cmd.rx_cmd = &rxBuf; 866 cmd.tx_cmd_sz = 3; 867 cmd.rx_cmd_sz = 3; 868 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); 869 if (err) 870 return(0); 871 872 return (rxBuf[2]); 873 } 874 875 static int 876 ksz8995ma_writereg(device_t dev, int addr, int value) 877 { 878 uint8_t txBuf[8], rxBuf[8]; 879 struct spi_command cmd; 880 int err; 881 882 memset(&cmd, 0, sizeof(cmd)); 883 memset(txBuf, 0, sizeof(txBuf)); 884 memset(rxBuf, 0, sizeof(rxBuf)); 885 886 /* write spi */ 887 txBuf[0] = KSZ8995MA_SPI_WRITE; 888 txBuf[1] = addr; 889 txBuf[2] = value; 890 cmd.tx_cmd = &txBuf; 891 cmd.rx_cmd = &rxBuf; 892 cmd.tx_cmd_sz = 3; 893 cmd.rx_cmd_sz = 3; 894 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); 895 if (err) 896 return(0); 897 898 return (0); 899 } 900 901 static device_method_t ksz8995ma_methods[] = { 902 /* Device interface */ 903 DEVMETHOD(device_probe, ksz8995ma_probe), 904 DEVMETHOD(device_attach, ksz8995ma_attach), 905 DEVMETHOD(device_detach, ksz8995ma_detach), 906 907 /* bus interface */ 908 DEVMETHOD(bus_add_child, device_add_child_ordered), 909 910 /* MII interface */ 911 DEVMETHOD(miibus_readreg, ksz8995ma_readphy), 912 DEVMETHOD(miibus_writereg, ksz8995ma_writephy), 913 DEVMETHOD(miibus_statchg, ksz8995ma_statchg), 914 915 /* etherswitch interface */ 916 DEVMETHOD(etherswitch_lock, ksz8995ma_lock), 917 DEVMETHOD(etherswitch_unlock, ksz8995ma_unlock), 918 DEVMETHOD(etherswitch_getinfo, ksz8995ma_getinfo), 919 DEVMETHOD(etherswitch_readreg, ksz8995ma_readreg), 920 DEVMETHOD(etherswitch_writereg, ksz8995ma_writereg), 921 DEVMETHOD(etherswitch_readphyreg, ksz8995ma_readphy), 922 DEVMETHOD(etherswitch_writephyreg, ksz8995ma_writephy), 923 DEVMETHOD(etherswitch_getport, ksz8995ma_getport), 924 DEVMETHOD(etherswitch_setport, ksz8995ma_setport), 925 DEVMETHOD(etherswitch_getvgroup, ksz8995ma_getvgroup), 926 DEVMETHOD(etherswitch_setvgroup, ksz8995ma_setvgroup), 927 DEVMETHOD(etherswitch_setconf, ksz8995ma_setconf), 928 DEVMETHOD(etherswitch_getconf, ksz8995ma_getconf), 929 930 DEVMETHOD_END 931 }; 932 933 DEFINE_CLASS_0(ksz8995ma, ksz8995ma_driver, ksz8995ma_methods, 934 sizeof(struct ksz8995ma_softc)); 935 936 DRIVER_MODULE(ksz8995ma, spibus, ksz8995ma_driver, 0, 0); 937 DRIVER_MODULE(miibus, ksz8995ma, miibus_driver, 0, 0); 938 DRIVER_MODULE(etherswitch, ksz8995ma, etherswitch_driver, 0, 0); 939 MODULE_VERSION(ksz8995ma, 1); 940 MODULE_DEPEND(ksz8995ma, spibus, 1, 1, 1); /* XXX which versions? */ 941 MODULE_DEPEND(ksz8995ma, miibus, 1, 1, 1); /* XXX which versions? */ 942 MODULE_DEPEND(ksz8995ma, etherswitch, 1, 1, 1); /* XXX which versions? */ 943