1 /*- 2 * Copyright (c) 2013 Luiz Otavio O Souza. 3 * Copyright (c) 2011-2012 Stefan Bethke. 4 * Copyright (c) 2012 Adrian Chadd. 5 * Copyright (C) 2008 Patrick Horn. 6 * Copyright (C) 2008, 2010 Martin Mares. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD$ 31 */ 32 33 #include <sys/param.h> 34 #include <sys/bus.h> 35 #include <sys/kernel.h> 36 #include <sys/lock.h> 37 #include <sys/mutex.h> 38 #include <sys/systm.h> 39 #include <sys/socket.h> 40 41 #include <net/if.h> 42 43 #include <dev/mii/mii.h> 44 45 #include <dev/etherswitch/etherswitch.h> 46 #include <dev/etherswitch/ip17x/ip17x_phy.h> 47 #include <dev/etherswitch/ip17x/ip17x_reg.h> 48 #include <dev/etherswitch/ip17x/ip17x_var.h> 49 #include <dev/etherswitch/ip17x/ip17x_vlans.h> 50 #include <dev/etherswitch/ip17x/ip175d.h> 51 52 /* 53 * IP175D specific functions. 54 */ 55 56 /* 57 * Reset the switch to default state. 58 */ 59 static int 60 ip175d_reset(struct ip17x_softc *sc) 61 { 62 63 /* Reset all the switch settings. */ 64 ip17x_writephy(sc->sc_dev, IP175D_RESET_PHY, IP175D_RESET_REG, 0x175d); 65 DELAY(2); 66 67 /* Disable the special tagging mode. */ 68 ip17x_updatephy(sc->sc_dev, 21, 22, 0x3, 0x0); 69 70 /* Set 802.1q protocol type. */ 71 ip17x_writephy(sc->sc_dev, 22, 3, 0x8100); 72 73 return (0); 74 } 75 76 /* 77 * Set the Switch configuration. 78 */ 79 static int 80 ip175d_hw_setup(struct ip17x_softc *sc) 81 { 82 struct ip17x_vlan *v; 83 uint32_t ports[IP17X_MAX_VLANS]; 84 uint32_t addtag[IP17X_MAX_VLANS]; 85 uint32_t striptag[IP17X_MAX_VLANS]; 86 uint32_t vlan_mask; 87 int i, j; 88 89 vlan_mask = 0; 90 for (i = 0; i < IP17X_MAX_VLANS; i++) { 91 92 ports[i] = 0; 93 addtag[i] = 0; 94 striptag[i] = 0; 95 96 v = &sc->vlan[i]; 97 if ((v->vlanid & ETHERSWITCH_VID_VALID) == 0 || 98 sc->vlan_mode == 0) { 99 /* Vlangroup disabled. Reset the filter. */ 100 ip17x_writephy(sc->sc_dev, 22, 14 + i, i + 1); 101 ports[i] = 0x3f; 102 continue; 103 } 104 105 vlan_mask |= (1 << i); 106 ports[i] = v->ports; 107 108 /* Setup the filter, write the VLAN id. */ 109 ip17x_writephy(sc->sc_dev, 22, 14 + i, 110 v->vlanid & ETHERSWITCH_VID_MASK); 111 112 for (j = 0; j < MII_NPHY; j++) { 113 if ((ports[i] & (1 << j)) == 0) 114 continue; 115 if (sc->addtag & (1 << j)) 116 addtag[i] |= (1 << j); 117 if (sc->striptag & (1 << j)) 118 striptag[i] |= (1 << j); 119 } 120 } 121 122 /* Write the port masks, tag adds and removals. */ 123 for (i = 0; i < IP17X_MAX_VLANS / 2; i++) { 124 ip17x_writephy(sc->sc_dev, 23, i, 125 ports[2 * i] | (ports[2 * i + 1] << 8)); 126 ip17x_writephy(sc->sc_dev, 23, i + 8, 127 addtag[2 * i] | (addtag[2 * i + 1] << 8)); 128 ip17x_writephy(sc->sc_dev, 23, i + 16, 129 striptag[2 * i] | (striptag[2 * i + 1] << 8)); 130 } 131 132 /* Write the in use vlan mask. */ 133 ip17x_writephy(sc->sc_dev, 22, 10, vlan_mask); 134 135 /* Write the PVID of each port. */ 136 for (i = 0; i < sc->numports; i++) 137 ip17x_writephy(sc->sc_dev, 22, 4 + i, sc->pvid[i]); 138 139 return (0); 140 } 141 142 /* 143 * Set the switch VLAN mode. 144 */ 145 static int 146 ip175d_set_vlan_mode(struct ip17x_softc *sc, uint32_t mode) 147 { 148 149 switch (mode) { 150 case ETHERSWITCH_VLAN_DOT1Q: 151 /* 152 * VLAN classification rules: tag-based VLANs, 153 * use VID to classify, drop packets that cannot 154 * be classified. 155 */ 156 ip17x_updatephy(sc->sc_dev, 22, 0, 0x3fff, 0x003f); 157 sc->vlan_mode = mode; 158 break; 159 case ETHERSWITCH_VLAN_PORT: 160 sc->vlan_mode = mode; 161 /* fallthrough */ 162 default: 163 /* 164 * VLAN classification rules: everything off & 165 * clear table. 166 */ 167 ip17x_updatephy(sc->sc_dev, 22, 0, 0xbfff, 0x8000); 168 sc->vlan_mode = 0; 169 break; 170 }; 171 172 if (sc->vlan_mode != 0) { 173 /* 174 * Ingress rules: CFI=1 dropped, null VID is untagged, VID=1 passed, 175 * VID=0xfff discarded, admin both tagged and untagged, ingress 176 * filters enabled. 177 */ 178 ip17x_updatephy(sc->sc_dev, 22, 1, 0x0fff, 0x0c3f); 179 180 /* Egress rules: IGMP processing off, keep VLAN header off. */ 181 ip17x_updatephy(sc->sc_dev, 22, 2, 0x0fff, 0x0000); 182 } else { 183 ip17x_updatephy(sc->sc_dev, 22, 1, 0x0fff, 0x043f); 184 ip17x_updatephy(sc->sc_dev, 22, 2, 0x0fff, 0x0020); 185 } 186 187 /* Reset vlans. */ 188 ip17x_reset_vlans(sc, sc->vlan_mode); 189 190 /* Update switch configuration. */ 191 ip175d_hw_setup(sc); 192 193 return (0); 194 } 195 196 /* 197 * Get the switch VLAN mode. 198 */ 199 static int 200 ip175d_get_vlan_mode(struct ip17x_softc *sc) 201 { 202 203 return (sc->vlan_mode); 204 } 205 206 void 207 ip175d_attach(struct ip17x_softc *sc) 208 { 209 210 sc->hal.ip17x_reset = ip175d_reset; 211 sc->hal.ip17x_hw_setup = ip175d_hw_setup; 212 sc->hal.ip17x_get_vlan_mode = ip175d_get_vlan_mode; 213 sc->hal.ip17x_set_vlan_mode = ip175d_set_vlan_mode; 214 215 /* Defaults for IP175C. */ 216 sc->cpuport = IP175X_CPU_PORT; 217 sc->numports = IP175X_NUM_PORTS; 218 sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q; 219 220 device_printf(sc->sc_dev, "type: IP175D\n"); 221 } 222