1a043e8c7SAdrian Chadd 2a043e8c7SAdrian Chadd#include <sys/bus.h> 3a043e8c7SAdrian Chadd 4a043e8c7SAdrian Chadd# Needed for ifreq/ifmediareq 5a043e8c7SAdrian Chadd#include <sys/socket.h> 6a043e8c7SAdrian Chadd#include <net/if.h> 7a043e8c7SAdrian Chadd 8a043e8c7SAdrian Chadd#include <dev/etherswitch/etherswitch.h> 9a043e8c7SAdrian Chadd 10a043e8c7SAdrian ChaddINTERFACE etherswitch; 11a043e8c7SAdrian Chadd 12a043e8c7SAdrian Chadd# 13454d507aSAleksandr Rybalko# Default implementation 14454d507aSAleksandr Rybalko# 15454d507aSAleksandr RybalkoCODE { 16454d507aSAleksandr Rybalko static void 17454d507aSAleksandr Rybalko null_etherswitch_lock(device_t dev) 18454d507aSAleksandr Rybalko { 19454d507aSAleksandr Rybalko } 20454d507aSAleksandr Rybalko 21454d507aSAleksandr Rybalko static void 22454d507aSAleksandr Rybalko null_etherswitch_unlock(device_t dev) 23454d507aSAleksandr Rybalko { 24454d507aSAleksandr Rybalko } 25a48a9355SAdrian Chadd 26a48a9355SAdrian Chadd static int 27a48a9355SAdrian Chadd null_etherswitch_getconf(device_t dev, etherswitch_conf_t *conf) 28a48a9355SAdrian Chadd { 29a48a9355SAdrian Chadd return (0); 30a48a9355SAdrian Chadd } 31a48a9355SAdrian Chadd 32a48a9355SAdrian Chadd static int 33a48a9355SAdrian Chadd null_etherswitch_setconf(device_t dev, etherswitch_conf_t *conf) 34a48a9355SAdrian Chadd { 35a48a9355SAdrian Chadd return (0); 36a48a9355SAdrian Chadd } 37*877d73ecSAdrian Chadd 38*877d73ecSAdrian Chadd static int 39*877d73ecSAdrian Chadd null_etherswitch_flush_all(device_t dev) 40*877d73ecSAdrian Chadd { 41*877d73ecSAdrian Chadd 42*877d73ecSAdrian Chadd return (ENXIO); 43*877d73ecSAdrian Chadd } 44*877d73ecSAdrian Chadd 45*877d73ecSAdrian Chadd static int 46*877d73ecSAdrian Chadd null_etherswitch_flush_port(device_t dev, int port) 47*877d73ecSAdrian Chadd { 48*877d73ecSAdrian Chadd 49*877d73ecSAdrian Chadd return (ENXIO); 50*877d73ecSAdrian Chadd } 51*877d73ecSAdrian Chadd 52*877d73ecSAdrian Chadd static int 53*877d73ecSAdrian Chadd null_etherswitch_flush_mac(device_t dev, 54*877d73ecSAdrian Chadd etherswitch_atu_flush_macentry_t *e) 55*877d73ecSAdrian Chadd { 56*877d73ecSAdrian Chadd 57*877d73ecSAdrian Chadd return (ENXIO); 58*877d73ecSAdrian Chadd } 59*877d73ecSAdrian Chadd 60*877d73ecSAdrian Chadd static int 61*877d73ecSAdrian Chadd null_etherswitch_fetch_table(device_t dev, 62*877d73ecSAdrian Chadd etherswitch_atu_table_t *table) 63*877d73ecSAdrian Chadd { 64*877d73ecSAdrian Chadd 65*877d73ecSAdrian Chadd table->es_nitems = 0; 66*877d73ecSAdrian Chadd return (ENXIO); 67*877d73ecSAdrian Chadd } 68*877d73ecSAdrian Chadd 69*877d73ecSAdrian Chadd static int 70*877d73ecSAdrian Chadd null_etherswitch_fetch_entry(device_t dev, 71*877d73ecSAdrian Chadd etherswitch_atu_entry_t *e) 72*877d73ecSAdrian Chadd { 73*877d73ecSAdrian Chadd 74*877d73ecSAdrian Chadd return (ENXIO); 75*877d73ecSAdrian Chadd } 76454d507aSAleksandr Rybalko}; 77454d507aSAleksandr Rybalko 78454d507aSAleksandr Rybalko# 79a043e8c7SAdrian Chadd# Return device info 80a043e8c7SAdrian Chadd# 81a043e8c7SAdrian ChaddMETHOD etherswitch_info_t* getinfo { 82a043e8c7SAdrian Chadd device_t dev; 83a043e8c7SAdrian Chadd} 84a043e8c7SAdrian Chadd 85a043e8c7SAdrian Chadd# 86454d507aSAleksandr Rybalko# Lock access to switch registers 87454d507aSAleksandr Rybalko# 88454d507aSAleksandr RybalkoMETHOD void lock { 89454d507aSAleksandr Rybalko device_t dev; 90454d507aSAleksandr Rybalko} DEFAULT null_etherswitch_lock; 91454d507aSAleksandr Rybalko 92454d507aSAleksandr Rybalko# 93454d507aSAleksandr Rybalko# Unlock access to switch registers 94454d507aSAleksandr Rybalko# 95454d507aSAleksandr RybalkoMETHOD void unlock { 96454d507aSAleksandr Rybalko device_t dev; 97454d507aSAleksandr Rybalko} DEFAULT null_etherswitch_unlock; 98454d507aSAleksandr Rybalko 99454d507aSAleksandr Rybalko# 100a043e8c7SAdrian Chadd# Read switch register 101a043e8c7SAdrian Chadd# 102a043e8c7SAdrian ChaddMETHOD int readreg { 103a043e8c7SAdrian Chadd device_t dev; 104a043e8c7SAdrian Chadd int reg; 105a043e8c7SAdrian Chadd}; 106a043e8c7SAdrian Chadd 107a043e8c7SAdrian Chadd# 108a043e8c7SAdrian Chadd# Write switch register 109a043e8c7SAdrian Chadd# 110a043e8c7SAdrian ChaddMETHOD int writereg { 111a043e8c7SAdrian Chadd device_t dev; 112a043e8c7SAdrian Chadd int reg; 113a043e8c7SAdrian Chadd int value; 114a043e8c7SAdrian Chadd}; 115a043e8c7SAdrian Chadd 116a043e8c7SAdrian Chadd# 117a043e8c7SAdrian Chadd# Read PHY register 118a043e8c7SAdrian Chadd# 119a043e8c7SAdrian ChaddMETHOD int readphyreg { 120a043e8c7SAdrian Chadd device_t dev; 121a043e8c7SAdrian Chadd int phy; 122a043e8c7SAdrian Chadd int reg; 123a043e8c7SAdrian Chadd}; 124a043e8c7SAdrian Chadd 125a043e8c7SAdrian Chadd# 126a043e8c7SAdrian Chadd# Write PHY register 127a043e8c7SAdrian Chadd# 128a043e8c7SAdrian ChaddMETHOD int writephyreg { 129a043e8c7SAdrian Chadd device_t dev; 130a043e8c7SAdrian Chadd int phy; 131a043e8c7SAdrian Chadd int reg; 132a043e8c7SAdrian Chadd int value; 133a043e8c7SAdrian Chadd}; 134a043e8c7SAdrian Chadd 135a043e8c7SAdrian Chadd# 136a043e8c7SAdrian Chadd# Get port configuration 137a043e8c7SAdrian Chadd# 138a043e8c7SAdrian ChaddMETHOD int getport { 139a043e8c7SAdrian Chadd device_t dev; 140a043e8c7SAdrian Chadd etherswitch_port_t *vg; 141a043e8c7SAdrian Chadd} 142a043e8c7SAdrian Chadd 143a043e8c7SAdrian Chadd# 144a043e8c7SAdrian Chadd# Set port configuration 145a043e8c7SAdrian Chadd# 146a043e8c7SAdrian ChaddMETHOD int setport { 147a043e8c7SAdrian Chadd device_t dev; 148a043e8c7SAdrian Chadd etherswitch_port_t *vg; 149a043e8c7SAdrian Chadd} 150a043e8c7SAdrian Chadd 151a043e8c7SAdrian Chadd# 152a043e8c7SAdrian Chadd# Get VLAN group configuration 153a043e8c7SAdrian Chadd# 154a043e8c7SAdrian ChaddMETHOD int getvgroup { 155a043e8c7SAdrian Chadd device_t dev; 156a043e8c7SAdrian Chadd etherswitch_vlangroup_t *vg; 157a043e8c7SAdrian Chadd} 158a043e8c7SAdrian Chadd 159a043e8c7SAdrian Chadd# 160a043e8c7SAdrian Chadd# Set VLAN group configuration 161a043e8c7SAdrian Chadd# 162a043e8c7SAdrian ChaddMETHOD int setvgroup { 163a043e8c7SAdrian Chadd device_t dev; 164a043e8c7SAdrian Chadd etherswitch_vlangroup_t *vg; 165a043e8c7SAdrian Chadd} 166a48a9355SAdrian Chadd 167a48a9355SAdrian Chadd# 168a48a9355SAdrian Chadd# Get the Switch configuration 169a48a9355SAdrian Chadd# 170a48a9355SAdrian ChaddMETHOD int getconf { 171a48a9355SAdrian Chadd device_t dev; 172a48a9355SAdrian Chadd etherswitch_conf_t *conf; 173a48a9355SAdrian Chadd} DEFAULT null_etherswitch_getconf; 174a48a9355SAdrian Chadd 175a48a9355SAdrian Chadd# 176a48a9355SAdrian Chadd# Set the Switch configuration 177a48a9355SAdrian Chadd# 178a48a9355SAdrian ChaddMETHOD int setconf { 179a48a9355SAdrian Chadd device_t dev; 180a48a9355SAdrian Chadd etherswitch_conf_t *conf; 181a48a9355SAdrian Chadd} DEFAULT null_etherswitch_setconf; 182*877d73ecSAdrian Chadd 183*877d73ecSAdrian Chadd# 184*877d73ecSAdrian Chadd# Flush all of the programmed/learnt MAC addresses 185*877d73ecSAdrian Chadd# 186*877d73ecSAdrian ChaddMETHOD int flush_all { 187*877d73ecSAdrian Chadd device_t dev; 188*877d73ecSAdrian Chadd} DEFAULT null_etherswitch_flush_all; 189*877d73ecSAdrian Chadd 190*877d73ecSAdrian Chadd# 191*877d73ecSAdrian Chadd# Flush a single MAC address entry 192*877d73ecSAdrian Chadd# 193*877d73ecSAdrian ChaddMETHOD int flush_mac { 194*877d73ecSAdrian Chadd device_t dev; 195*877d73ecSAdrian Chadd etherswitch_atu_flush_macentry_t *entry; 196*877d73ecSAdrian Chadd} DEFAULT null_etherswitch_flush_mac; 197*877d73ecSAdrian Chadd 198*877d73ecSAdrian Chadd# 199*877d73ecSAdrian Chadd# Flush all of the dynamic MAC addresses on a given port 200*877d73ecSAdrian Chadd# 201*877d73ecSAdrian ChaddMETHOD int flush_port { 202*877d73ecSAdrian Chadd device_t dev; 203*877d73ecSAdrian Chadd int port; 204*877d73ecSAdrian Chadd} DEFAULT null_etherswitch_flush_port; 205*877d73ecSAdrian Chadd 206*877d73ecSAdrian Chadd# 207*877d73ecSAdrian Chadd# Fetch the address table from the ethernet switch. 208*877d73ecSAdrian Chadd# 209*877d73ecSAdrian ChaddMETHOD int fetch_table { 210*877d73ecSAdrian Chadd device_t dev; 211*877d73ecSAdrian Chadd etherswitch_atu_table_t *table; 212*877d73ecSAdrian Chadd} DEFAULT null_etherswitch_fetch_table; 213*877d73ecSAdrian Chadd 214*877d73ecSAdrian Chadd# 215*877d73ecSAdrian Chadd# Fetch a single entry from the ethernet switch table. 216*877d73ecSAdrian Chadd# 217*877d73ecSAdrian ChaddMETHOD int fetch_table_entry { 218*877d73ecSAdrian Chadd device_t dev; 219*877d73ecSAdrian Chadd etherswitch_atu_entry_t *entry; 220*877d73ecSAdrian Chadd} DEFAULT null_etherswitch_fetch_entry; 221