1 /*- 2 * Copyright (c) 2015 Semihalf 3 * Copyright (c) 2015 Stormshield 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/types.h> 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/sockio.h> 35 #include <sys/kernel.h> 36 #include <sys/kthread.h> 37 #include <sys/socket.h> 38 #include <sys/module.h> 39 #include <sys/errno.h> 40 #include <sys/bus.h> 41 #include <sys/conf.h> 42 #include <sys/uio.h> 43 #include <sys/fcntl.h> 44 45 #include <net/if.h> 46 #include <net/if_media.h> 47 #include <net/if_types.h> 48 49 #include <machine/bus.h> 50 #include <machine/resource.h> 51 52 #include <arm/mv/mvwin.h> 53 #include <arm/mv/mvreg.h> 54 #include <arm/mv/mvvar.h> 55 56 #include <dev/etherswitch/etherswitch.h> 57 #include <dev/mdio/mdio.h> 58 #include <dev/mii/mii.h> 59 #include <dev/mii/miivar.h> 60 #include <dev/mge/if_mgevar.h> 61 62 #include <dev/fdt/fdt_common.h> 63 #include <dev/ofw/ofw_bus.h> 64 #include <dev/ofw/ofw_bus_subr.h> 65 66 #include "e6000swreg.h" 67 #include "etherswitch_if.h" 68 #include "miibus_if.h" 69 #include "mdio_if.h" 70 71 MALLOC_DECLARE(M_E6000SW); 72 MALLOC_DEFINE(M_E6000SW, "e6000sw", "e6000sw switch"); 73 74 #define E6000SW_LOCK(_sc) \ 75 sx_xlock(&(_sc)->sx) 76 #define E6000SW_UNLOCK(_sc) \ 77 sx_unlock(&(_sc)->sx) 78 #define E6000SW_LOCK_ASSERT(_sc, _what) \ 79 sx_assert(&(_sc)->sx, (_what)) 80 #define E6000SW_TRYLOCK(_sc) \ 81 sx_tryxlock(&(_sc)->sx) 82 83 typedef struct e6000sw_softc { 84 device_t dev; 85 phandle_t node; 86 87 struct sx sx; 88 struct ifnet *ifp[E6000SW_MAX_PORTS]; 89 char *ifname[E6000SW_MAX_PORTS]; 90 device_t miibus[E6000SW_MAX_PORTS]; 91 struct mii_data *mii[E6000SW_MAX_PORTS]; 92 struct callout tick_callout; 93 94 uint32_t cpuports_mask; 95 uint32_t fixed_mask; 96 int sw_addr; 97 int num_ports; 98 boolean_t multi_chip; 99 100 int vid[E6000SW_NUM_VGROUPS]; 101 int members[E6000SW_NUM_VGROUPS]; 102 int vgroup[E6000SW_MAX_PORTS]; 103 } e6000sw_softc_t; 104 105 static etherswitch_info_t etherswitch_info = { 106 .es_nports = 0, 107 .es_nvlangroups = E6000SW_NUM_VGROUPS, 108 .es_name = "Marvell 6000 series switch" 109 }; 110 111 static void e6000sw_identify(driver_t *driver, device_t parent); 112 static int e6000sw_probe(device_t dev); 113 static int e6000sw_attach(device_t dev); 114 static int e6000sw_detach(device_t dev); 115 static int e6000sw_readphy(device_t dev, int phy, int reg); 116 static int e6000sw_writephy(device_t dev, int phy, int reg, int data); 117 static etherswitch_info_t* e6000sw_getinfo(device_t dev); 118 static void e6000sw_lock(device_t dev); 119 static void e6000sw_unlock(device_t dev); 120 static int e6000sw_getport(device_t dev, etherswitch_port_t *p); 121 static int e6000sw_setport(device_t dev, etherswitch_port_t *p); 122 static int e6000sw_readreg_wrapper(device_t dev, int addr_reg); 123 static int e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val); 124 static int e6000sw_readphy_wrapper(device_t dev, int phy, int reg); 125 static int e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data); 126 static int e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg); 127 static int e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg); 128 static int e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg); 129 static int e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg); 130 static void e6000sw_setup(device_t dev, e6000sw_softc_t *sc); 131 static void e6000sw_port_vlan_conf(e6000sw_softc_t *sc); 132 static void e6000sw_tick(void *arg); 133 static void e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin, 134 int flag); 135 static int e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag); 136 static __inline void e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, 137 int val); 138 static __inline uint32_t e6000sw_readreg(e6000sw_softc_t *sc, int addr, 139 int reg); 140 static int e6000sw_ifmedia_upd(struct ifnet *ifp); 141 static void e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr); 142 static int e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct 143 atu_opt *atu, int flag); 144 static int e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid); 145 static int e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid); 146 static __inline int e6000sw_is_cpuport(e6000sw_softc_t *sc, int port); 147 static __inline int e6000sw_is_fixedport(e6000sw_softc_t *sc, int port); 148 static __inline int e6000sw_is_phyport(e6000sw_softc_t *sc, int port); 149 static __inline struct mii_data *e6000sw_miiforphy(e6000sw_softc_t *sc, 150 unsigned int phy); 151 152 static struct proc *e6000sw_kproc; 153 154 static device_method_t e6000sw_methods[] = { 155 /* device interface */ 156 DEVMETHOD(device_identify, e6000sw_identify), 157 DEVMETHOD(device_probe, e6000sw_probe), 158 DEVMETHOD(device_attach, e6000sw_attach), 159 DEVMETHOD(device_detach, e6000sw_detach), 160 161 /* bus interface */ 162 DEVMETHOD(bus_add_child, device_add_child_ordered), 163 164 /* mii interface */ 165 DEVMETHOD(miibus_readreg, e6000sw_readphy), 166 DEVMETHOD(miibus_writereg, e6000sw_writephy), 167 168 /* etherswitch interface */ 169 DEVMETHOD(etherswitch_getinfo, e6000sw_getinfo), 170 DEVMETHOD(etherswitch_lock, e6000sw_lock), 171 DEVMETHOD(etherswitch_unlock, e6000sw_unlock), 172 DEVMETHOD(etherswitch_getport, e6000sw_getport), 173 DEVMETHOD(etherswitch_setport, e6000sw_setport), 174 DEVMETHOD(etherswitch_readreg, e6000sw_readreg_wrapper), 175 DEVMETHOD(etherswitch_writereg, e6000sw_writereg_wrapper), 176 DEVMETHOD(etherswitch_readphyreg, e6000sw_readphy_wrapper), 177 DEVMETHOD(etherswitch_writephyreg, e6000sw_writephy_wrapper), 178 DEVMETHOD(etherswitch_setvgroup, e6000sw_setvgroup_wrapper), 179 DEVMETHOD(etherswitch_getvgroup, e6000sw_getvgroup_wrapper), 180 181 DEVMETHOD_END 182 }; 183 184 static devclass_t e6000sw_devclass; 185 186 DEFINE_CLASS_0(e6000sw, e6000sw_driver, e6000sw_methods, 187 sizeof(e6000sw_softc_t)); 188 189 DRIVER_MODULE(e6000sw, mdio, e6000sw_driver, e6000sw_devclass, 0, 0); 190 DRIVER_MODULE(etherswitch, e6000sw, etherswitch_driver, etherswitch_devclass, 0, 191 0); 192 DRIVER_MODULE(miibus, e6000sw, miibus_driver, miibus_devclass, 0, 0); 193 MODULE_DEPEND(e6000sw, mdio, 1, 1, 1); 194 195 #define SMI_CMD 0 196 #define SMI_CMD_BUSY (1<<15) 197 #define SMI_CMD_OP_READ ((2<<10)|SMI_CMD_BUSY|(1<<12)) 198 #define SMI_CMD_OP_WRITE ((1<<10)|SMI_CMD_BUSY|(1<<12)) 199 #define SMI_DATA 1 200 201 #define MDIO_READ(dev, addr, reg) MDIO_READREG(device_get_parent(dev), (addr), (reg)) 202 #define MDIO_WRITE(dev, addr, reg, val) MDIO_WRITEREG(device_get_parent(dev), (addr), (reg), (val)) 203 static void 204 e6000sw_identify(driver_t *driver, device_t parent) 205 { 206 207 if (device_find_child(parent, "e6000sw", -1) == NULL) 208 BUS_ADD_CHILD(parent, 0, "e6000sw", -1); 209 } 210 211 static int 212 e6000sw_probe(device_t dev) 213 { 214 e6000sw_softc_t *sc; 215 const char *description; 216 unsigned int id; 217 phandle_t dsa_node, switch_node; 218 219 dsa_node = fdt_find_compatible(OF_finddevice("/"), 220 "marvell,dsa", 0); 221 switch_node = OF_child(dsa_node); 222 223 if (switch_node == 0) 224 return (ENXIO); 225 226 sc = device_get_softc(dev); 227 bzero(sc, sizeof(e6000sw_softc_t)); 228 sc->dev = dev; 229 sc->node = switch_node; 230 231 if (OF_getencprop(sc->node, "reg", &sc->sw_addr, 232 sizeof(sc->sw_addr)) < 0) 233 return (ENXIO); 234 if (sc->sw_addr != 0 && (sc->sw_addr % 2) == 0) 235 sc->multi_chip = true; 236 237 /* Lock is necessary due to assertions. */ 238 sx_init(&sc->sx, "e6000sw"); 239 E6000SW_LOCK(sc); 240 241 id = e6000sw_readreg(sc, REG_PORT(0), SWITCH_ID); 242 243 switch (id & 0xfff0) { 244 case 0x3520: 245 description = "Marvell 88E6352"; 246 break; 247 case 0x1720: 248 description = "Marvell 88E6172"; 249 break; 250 case 0x1760: 251 description = "Marvell 88E6176"; 252 break; 253 default: 254 E6000SW_UNLOCK(sc); 255 sx_destroy(&sc->sx); 256 device_printf(dev, "Unrecognized device, id 0x%x.\n", id); 257 return (ENXIO); 258 } 259 260 device_set_desc(dev, description); 261 262 E6000SW_UNLOCK(sc); 263 264 return (BUS_PROBE_DEFAULT); 265 } 266 267 static int 268 e6000sw_parse_child_fdt(device_t dev, phandle_t child, uint32_t *fixed_mask, 269 uint32_t *cpu_mask, int *pport, int *pvlangroup) 270 { 271 char portlabel[100]; 272 uint32_t port, vlangroup; 273 boolean_t fixed_link; 274 275 if (fixed_mask == NULL || cpu_mask == NULL || pport == NULL) 276 return (ENXIO); 277 278 OF_getprop(child, "label", (void *)portlabel, 100); 279 OF_getencprop(child, "reg", (void *)&port, sizeof(port)); 280 281 if (OF_getencprop(child, "vlangroup", (void *)&vlangroup, 282 sizeof(vlangroup)) > 0) { 283 if (vlangroup >= E6000SW_NUM_VGROUPS) 284 return (ENXIO); 285 *pvlangroup = vlangroup; 286 } else { 287 *pvlangroup = -1; 288 } 289 290 if (port >= E6000SW_MAX_PORTS) 291 return (ENXIO); 292 *pport = port; 293 294 if (strncmp(portlabel, "cpu", 3) == 0) { 295 device_printf(dev, "CPU port at %d\n", port); 296 *cpu_mask |= (1 << port); 297 return (0); 298 } 299 300 fixed_link = OF_child(child); 301 if (fixed_link) { 302 *fixed_mask |= (1 << port); 303 device_printf(dev, "fixed port at %d\n", port); 304 } else { 305 device_printf(dev, "PHY at %d\n", port); 306 } 307 308 return (0); 309 } 310 311 static int 312 e6000sw_init_interface(e6000sw_softc_t *sc, int port) 313 { 314 char name[IFNAMSIZ]; 315 316 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->dev)); 317 318 sc->ifp[port] = if_alloc(IFT_ETHER); 319 if (sc->ifp[port] == NULL) 320 return (ENOMEM); 321 sc->ifp[port]->if_softc = sc; 322 sc->ifp[port]->if_flags |= IFF_UP | IFF_BROADCAST | 323 IFF_DRV_RUNNING | IFF_SIMPLEX; 324 sc->ifname[port] = malloc(strlen(name) + 1, M_E6000SW, M_WAITOK); 325 if (sc->ifname[port] == NULL) 326 return (ENOMEM); 327 memcpy(sc->ifname[port], name, strlen(name) + 1); 328 if_initname(sc->ifp[port], sc->ifname[port], port); 329 330 return (0); 331 } 332 333 static int 334 e6000sw_attach_miibus(e6000sw_softc_t *sc, int port) 335 { 336 int err; 337 338 err = mii_attach(sc->dev, &sc->miibus[port], sc->ifp[port], 339 e6000sw_ifmedia_upd, e6000sw_ifmedia_sts, BMSR_DEFCAPMASK, 340 port, MII_OFFSET_ANY, 0); 341 if (err != 0) 342 return (err); 343 344 sc->mii[port] = device_get_softc(sc->miibus[port]); 345 return (0); 346 } 347 348 static int 349 e6000sw_attach(device_t dev) 350 { 351 e6000sw_softc_t *sc; 352 phandle_t child; 353 int err, port, vlangroup; 354 int member_ports[E6000SW_NUM_VGROUPS]; 355 etherswitch_vlangroup_t vg; 356 357 err = 0; 358 sc = device_get_softc(dev); 359 360 if (sc->multi_chip) 361 device_printf(dev, "multi-chip addressing mode\n"); 362 else 363 device_printf(dev, "single-chip addressing mode\n"); 364 365 E6000SW_LOCK(sc); 366 e6000sw_setup(dev, sc); 367 bzero(member_ports, sizeof(member_ports)); 368 369 for (child = OF_child(sc->node); child != 0; child = OF_peer(child)) { 370 err = e6000sw_parse_child_fdt(dev, child, &sc->fixed_mask, 371 &sc->cpuports_mask, &port, &vlangroup); 372 if (err != 0) { 373 device_printf(sc->dev, "failed to parse DTS\n"); 374 goto out_fail; 375 } 376 377 if (vlangroup != -1) 378 member_ports[vlangroup] |= (1 << port); 379 380 sc->num_ports++; 381 382 err = e6000sw_init_interface(sc, port); 383 if (err != 0) { 384 device_printf(sc->dev, "failed to init interface\n"); 385 goto out_fail; 386 } 387 388 /* Don't attach miibus at CPU/fixed ports */ 389 if (!e6000sw_is_phyport(sc, port)) 390 continue; 391 392 err = e6000sw_attach_miibus(sc, port); 393 if (err != 0) { 394 device_printf(sc->dev, "failed to attach miibus\n"); 395 goto out_fail; 396 } 397 } 398 399 etherswitch_info.es_nports = sc->num_ports; 400 for (port = 0; port < sc->num_ports; port++) 401 sc->vgroup[port] = E6000SW_PORT_NO_VGROUP; 402 403 /* Set VLAN configuration */ 404 e6000sw_port_vlan_conf(sc); 405 406 /* Set vlangroups */ 407 for (vlangroup = 0; vlangroup < E6000SW_NUM_VGROUPS; vlangroup++) 408 if (member_ports[vlangroup] != 0) { 409 vg.es_vlangroup = vg.es_vid = vlangroup; 410 vg.es_member_ports = vg.es_untagged_ports = 411 member_ports[vlangroup]; 412 e6000sw_setvgroup(dev, &vg); 413 } 414 415 E6000SW_UNLOCK(sc); 416 417 bus_generic_probe(dev); 418 bus_generic_attach(dev); 419 420 kproc_create(e6000sw_tick, sc, &e6000sw_kproc, 0, 0, 421 "e6000sw tick kproc"); 422 423 return (0); 424 425 out_fail: 426 e6000sw_detach(dev); 427 428 return (err); 429 } 430 431 static __inline void 432 e6000sw_poll_done(e6000sw_softc_t *sc) 433 { 434 435 while (e6000sw_readreg(sc, REG_GLOBAL2, PHY_CMD) & 436 (1 << PHY_CMD_SMI_BUSY)) 437 continue; 438 } 439 440 /* 441 * PHY registers are paged. Put page index in reg 22 (accessible from every 442 * page), then access specific register. 443 */ 444 static int 445 e6000sw_readphy(device_t dev, int phy, int reg) 446 { 447 e6000sw_softc_t *sc; 448 uint32_t val; 449 450 sc = device_get_softc(dev); 451 val = 0; 452 453 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) { 454 device_printf(dev, "Wrong register address.\n"); 455 return (EINVAL); 456 } 457 458 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 459 460 e6000sw_poll_done(sc); 461 val |= 1 << PHY_CMD_SMI_BUSY; 462 val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE; 463 val |= PHY_CMD_OPCODE_READ << PHY_CMD_OPCODE; 464 val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK; 465 val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK; 466 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val); 467 e6000sw_poll_done(sc); 468 val = e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG) 469 & PHY_DATA_MASK; 470 471 return (val); 472 } 473 474 static int 475 e6000sw_writephy(device_t dev, int phy, int reg, int data) 476 { 477 e6000sw_softc_t *sc; 478 uint32_t val; 479 480 sc = device_get_softc(dev); 481 val = 0; 482 483 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) { 484 device_printf(dev, "Wrong register address.\n"); 485 return (EINVAL); 486 } 487 488 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 489 490 e6000sw_poll_done(sc); 491 val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE; 492 val |= 1 << PHY_CMD_SMI_BUSY; 493 val |= PHY_CMD_OPCODE_WRITE << PHY_CMD_OPCODE; 494 val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK; 495 val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK; 496 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG, 497 data & PHY_DATA_MASK); 498 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val); 499 e6000sw_poll_done(sc); 500 501 return (0); 502 } 503 504 static int 505 e6000sw_detach(device_t dev) 506 { 507 int phy; 508 e6000sw_softc_t *sc; 509 510 sc = device_get_softc(dev); 511 bus_generic_detach(dev); 512 sx_destroy(&sc->sx); 513 for (phy = 0; phy < sc->num_ports; phy++) { 514 if (sc->miibus[phy] != NULL) 515 device_delete_child(dev, sc->miibus[phy]); 516 if (sc->ifp[phy] != NULL) 517 if_free(sc->ifp[phy]); 518 if (sc->ifname[phy] != NULL) 519 free(sc->ifname[phy], M_E6000SW); 520 } 521 522 return (0); 523 } 524 525 static etherswitch_info_t* 526 e6000sw_getinfo(device_t dev) 527 { 528 529 return (ðerswitch_info); 530 } 531 532 static void 533 e6000sw_lock(device_t dev) 534 { 535 struct e6000sw_softc *sc; 536 537 sc = device_get_softc(dev); 538 539 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 540 E6000SW_LOCK(sc); 541 } 542 543 static void 544 e6000sw_unlock(device_t dev) 545 { 546 struct e6000sw_softc *sc; 547 548 sc = device_get_softc(dev); 549 550 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 551 E6000SW_UNLOCK(sc); 552 } 553 554 static int 555 e6000sw_getport(device_t dev, etherswitch_port_t *p) 556 { 557 struct mii_data *mii; 558 int err; 559 struct ifmediareq *ifmr; 560 561 err = 0; 562 e6000sw_softc_t *sc = device_get_softc(dev); 563 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 564 565 E6000SW_LOCK(sc); 566 567 if (p->es_port >= sc->num_ports || 568 p->es_port < 0) { 569 err = EINVAL; 570 goto out; 571 } 572 573 e6000sw_get_pvid(sc, p->es_port, &p->es_pvid); 574 575 if (e6000sw_is_cpuport(sc, p->es_port)) { 576 p->es_flags |= ETHERSWITCH_PORT_CPU; 577 ifmr = &p->es_ifmr; 578 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID; 579 ifmr->ifm_count = 0; 580 ifmr->ifm_current = ifmr->ifm_active = 581 IFM_ETHER | IFM_1000_T | IFM_FDX; 582 ifmr->ifm_mask = 0; 583 } else if (e6000sw_is_fixedport(sc, p->es_port)) { 584 ifmr = &p->es_ifmr; 585 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID; 586 ifmr->ifm_count = 0; 587 ifmr->ifm_current = ifmr->ifm_active = 588 IFM_ETHER | IFM_1000_T | IFM_FDX; 589 ifmr->ifm_mask = 0; 590 } else { 591 mii = e6000sw_miiforphy(sc, p->es_port); 592 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, 593 &mii->mii_media, SIOCGIFMEDIA); 594 } 595 596 out: 597 E6000SW_UNLOCK(sc); 598 return (err); 599 } 600 601 static int 602 e6000sw_setport(device_t dev, etherswitch_port_t *p) 603 { 604 e6000sw_softc_t *sc; 605 int err; 606 struct mii_data *mii; 607 608 err = 0; 609 sc = device_get_softc(dev); 610 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 611 612 E6000SW_LOCK(sc); 613 614 if (p->es_port >= sc->num_ports || 615 p->es_port < 0) { 616 err = EINVAL; 617 goto out; 618 } 619 620 if (p->es_pvid != 0) 621 e6000sw_set_pvid(sc, p->es_port, p->es_pvid); 622 if (!e6000sw_is_cpuport(sc, p->es_port)) { 623 mii = e6000sw_miiforphy(sc, p->es_port); 624 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, &mii->mii_media, 625 SIOCSIFMEDIA); 626 } 627 628 out: 629 E6000SW_UNLOCK(sc); 630 return (err); 631 } 632 633 /* 634 * Registers in this switch are divided into sections, specified in 635 * documentation. So as to access any of them, section index and reg index 636 * is necessary. etherswitchcfg uses only one variable, so indexes were 637 * compressed into addr_reg: 32 * section_index + reg_index. 638 */ 639 static int 640 e6000sw_readreg_wrapper(device_t dev, int addr_reg) 641 { 642 643 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) || 644 (addr_reg < (REG_PORT(0) * 32))) { 645 device_printf(dev, "Wrong register address.\n"); 646 return (EINVAL); 647 } 648 649 return (e6000sw_readreg(device_get_softc(dev), addr_reg / 32, 650 addr_reg % 32)); 651 } 652 653 static int 654 e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val) 655 { 656 657 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) || 658 (addr_reg < (REG_PORT(0) * 32))) { 659 device_printf(dev, "Wrong register address.\n"); 660 return (EINVAL); 661 } 662 e6000sw_writereg(device_get_softc(dev), addr_reg / 5, 663 addr_reg % 32, val); 664 665 return (0); 666 } 667 668 /* 669 * These wrappers are necessary because PHY accesses from etherswitchcfg 670 * need to be synchronized with locks, while miibus PHY accesses do not. 671 */ 672 static int 673 e6000sw_readphy_wrapper(device_t dev, int phy, int reg) 674 { 675 e6000sw_softc_t *sc; 676 int ret; 677 678 sc = device_get_softc(dev); 679 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 680 681 E6000SW_LOCK(sc); 682 ret = e6000sw_readphy(dev, phy, reg); 683 E6000SW_UNLOCK(sc); 684 685 return (ret); 686 } 687 688 static int 689 e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data) 690 { 691 e6000sw_softc_t *sc; 692 int ret; 693 694 sc = device_get_softc(dev); 695 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 696 697 E6000SW_LOCK(sc); 698 ret = e6000sw_writephy(dev, phy, reg, data); 699 E6000SW_UNLOCK(sc); 700 701 return (ret); 702 } 703 704 /* 705 * setvgroup/getvgroup called from etherswitchfcg need to be locked, 706 * while internal calls do not. 707 */ 708 static int 709 e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg) 710 { 711 e6000sw_softc_t *sc; 712 int ret; 713 714 sc = device_get_softc(dev); 715 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 716 717 E6000SW_LOCK(sc); 718 ret = e6000sw_setvgroup(dev, vg); 719 E6000SW_UNLOCK(sc); 720 721 return (ret); 722 } 723 724 static int 725 e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg) 726 { 727 e6000sw_softc_t *sc; 728 int ret; 729 730 sc = device_get_softc(dev); 731 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 732 733 E6000SW_LOCK(sc); 734 ret = e6000sw_getvgroup(dev, vg); 735 E6000SW_UNLOCK(sc); 736 737 return (ret); 738 } 739 740 static __inline void 741 e6000sw_flush_port(e6000sw_softc_t *sc, int port) 742 { 743 uint32_t reg; 744 745 reg = e6000sw_readreg(sc, REG_PORT(port), 746 PORT_VLAN_MAP); 747 reg &= ~PORT_VLAN_MAP_TABLE_MASK; 748 reg &= ~PORT_VLAN_MAP_FID_MASK; 749 e6000sw_writereg(sc, REG_PORT(port), 750 PORT_VLAN_MAP, reg); 751 if (sc->vgroup[port] != E6000SW_PORT_NO_VGROUP) { 752 /* 753 * If port belonged somewhere, owner-group 754 * should have its entry removed. 755 */ 756 sc->members[sc->vgroup[port]] &= ~(1 << port); 757 sc->vgroup[port] = E6000SW_PORT_NO_VGROUP; 758 } 759 } 760 761 static __inline void 762 e6000sw_port_assign_vgroup(e6000sw_softc_t *sc, int port, int fid, int vgroup, 763 int members) 764 { 765 uint32_t reg; 766 767 reg = e6000sw_readreg(sc, REG_PORT(port), 768 PORT_VLAN_MAP); 769 reg &= ~PORT_VLAN_MAP_TABLE_MASK; 770 reg &= ~PORT_VLAN_MAP_FID_MASK; 771 reg |= members & ~(1 << port); 772 reg |= (fid << PORT_VLAN_MAP_FID) & PORT_VLAN_MAP_FID_MASK; 773 e6000sw_writereg(sc, REG_PORT(port), PORT_VLAN_MAP, 774 reg); 775 sc->vgroup[port] = vgroup; 776 } 777 778 static int 779 e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg) 780 { 781 e6000sw_softc_t *sc; 782 int port, fid; 783 784 sc = device_get_softc(dev); 785 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 786 787 if (vg->es_vlangroup >= E6000SW_NUM_VGROUPS) 788 return (EINVAL); 789 if (vg->es_member_ports != vg->es_untagged_ports) { 790 device_printf(dev, "Tagged ports not supported.\n"); 791 return (EINVAL); 792 } 793 794 vg->es_untagged_ports &= PORT_VLAN_MAP_TABLE_MASK; 795 fid = vg->es_vlangroup + 1; 796 for (port = 0; port < sc->num_ports; port++) { 797 if ((sc->members[vg->es_vlangroup] & (1 << port)) || 798 (vg->es_untagged_ports & (1 << port))) 799 e6000sw_flush_port(sc, port); 800 if (vg->es_untagged_ports & (1 << port)) 801 e6000sw_port_assign_vgroup(sc, port, fid, 802 vg->es_vlangroup, vg->es_untagged_ports); 803 } 804 sc->vid[vg->es_vlangroup] = vg->es_vid; 805 sc->members[vg->es_vlangroup] = vg->es_untagged_ports; 806 807 return (0); 808 } 809 810 static int 811 e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg) 812 { 813 e6000sw_softc_t *sc; 814 815 sc = device_get_softc(dev); 816 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 817 818 if (vg->es_vlangroup >= E6000SW_NUM_VGROUPS) 819 return (EINVAL); 820 vg->es_untagged_ports = vg->es_member_ports = 821 sc->members[vg->es_vlangroup]; 822 vg->es_vid = ETHERSWITCH_VID_VALID; 823 824 return (0); 825 } 826 827 static __inline struct mii_data* 828 e6000sw_miiforphy(e6000sw_softc_t *sc, unsigned int phy) 829 { 830 831 if (!e6000sw_is_phyport(sc, phy)) 832 return (NULL); 833 834 return (device_get_softc(sc->miibus[phy])); 835 } 836 837 static int 838 e6000sw_ifmedia_upd(struct ifnet *ifp) 839 { 840 e6000sw_softc_t *sc; 841 struct mii_data *mii; 842 843 sc = ifp->if_softc; 844 mii = e6000sw_miiforphy(sc, ifp->if_dunit); 845 if (mii == NULL) 846 return (ENXIO); 847 mii_mediachg(mii); 848 849 return (0); 850 } 851 852 static void 853 e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 854 { 855 e6000sw_softc_t *sc; 856 struct mii_data *mii; 857 858 sc = ifp->if_softc; 859 mii = e6000sw_miiforphy(sc, ifp->if_dunit); 860 861 if (mii == NULL) 862 return; 863 864 mii_pollstat(mii); 865 ifmr->ifm_active = mii->mii_media_active; 866 ifmr->ifm_status = mii->mii_media_status; 867 } 868 869 870 static int 871 e6000sw_smi_waitready(e6000sw_softc_t *sc, int phy) 872 { 873 int i; 874 875 for (i = 0; i < E6000SW_SMI_TIMEOUT; i++) { 876 if ((MDIO_READ(sc->dev, phy, SMI_CMD) 877 & SMI_CMD_BUSY) == 0) 878 return 0; 879 } 880 881 return 1; 882 } 883 884 static __inline uint32_t 885 e6000sw_readreg(e6000sw_softc_t *sc, int addr, int reg) 886 { 887 888 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 889 890 if (!sc->multi_chip) 891 return (MDIO_READ(sc->dev, addr, reg) & 0xffff); 892 893 if (e6000sw_smi_waitready(sc, sc->sw_addr)) { 894 printf("e6000sw: readreg timeout\n"); 895 return (0xffff); 896 } 897 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD, SMI_CMD_OP_READ | 898 (addr << 5) | reg); 899 if (e6000sw_smi_waitready(sc, sc->sw_addr)) { 900 printf("e6000sw: readreg timeout\n"); 901 return (0xffff); 902 } 903 904 return (MDIO_READ(sc->dev, sc->sw_addr, SMI_DATA) & 0xffff); 905 } 906 907 static __inline void 908 e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, int val) 909 { 910 911 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 912 913 if (!sc->multi_chip) { 914 MDIO_WRITE(sc->dev, addr, reg, val); 915 return; 916 } 917 918 if (e6000sw_smi_waitready(sc, sc->sw_addr)) { 919 printf("e6000sw: readreg timeout\n"); 920 return; 921 } 922 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_DATA, val); 923 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD, SMI_CMD_OP_WRITE | 924 (addr << 5) | reg); 925 if (e6000sw_smi_waitready(sc, sc->sw_addr)) { 926 printf("e6000sw: readreg timeout\n"); 927 return; 928 } 929 930 return; 931 } 932 933 static __inline int 934 e6000sw_is_cpuport(e6000sw_softc_t *sc, int port) 935 { 936 937 return (sc->cpuports_mask & (1 << port)); 938 } 939 940 static __inline int 941 e6000sw_is_fixedport(e6000sw_softc_t *sc, int port) 942 { 943 944 return (sc->fixed_mask & (1 << port)); 945 } 946 947 static __inline int 948 e6000sw_is_phyport(e6000sw_softc_t *sc, int port) 949 { 950 uint32_t phy_mask; 951 phy_mask = ~(sc->fixed_mask | sc->cpuports_mask); 952 953 return (phy_mask & (1 << port)); 954 } 955 956 static __inline int 957 e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid) 958 { 959 960 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, pvid & 961 PORT_VID_DEF_VID_MASK); 962 963 return (0); 964 } 965 966 static __inline int 967 e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid) 968 { 969 970 if (pvid == NULL) 971 return (ENXIO); 972 973 *pvid = e6000sw_readreg(sc, REG_PORT(port), PORT_VID) & 974 PORT_VID_DEF_VID_MASK; 975 976 return (0); 977 } 978 979 static void 980 e6000sw_tick (void *arg) 981 { 982 e6000sw_softc_t *sc; 983 struct mii_softc *miisc; 984 int port; 985 986 sc = arg; 987 988 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 989 for (;;) { 990 E6000SW_LOCK(sc); 991 for (port = 0; port < sc->num_ports; port++) { 992 /* Tick only on PHY ports */ 993 if (!e6000sw_is_phyport(sc, port)) 994 continue; 995 mii_tick(sc->mii[port]); 996 LIST_FOREACH(miisc, &sc->mii[port]->mii_phys, mii_list) { 997 if (IFM_INST(sc->mii[port]->mii_media.ifm_cur->ifm_media) 998 != miisc->mii_inst) 999 continue; 1000 mii_phy_update(miisc, MII_POLLSTAT); 1001 } 1002 } 1003 E6000SW_UNLOCK(sc); 1004 pause("e6000sw tick", 1000); 1005 } 1006 } 1007 1008 static void 1009 e6000sw_setup(device_t dev, e6000sw_softc_t *sc) 1010 { 1011 uint16_t atu_ctrl, atu_age; 1012 1013 /* Set aging time */ 1014 e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL, 1015 (E6000SW_DEFAULT_AGETIME << ATU_CONTROL_AGETIME) | 1016 (1 << ATU_CONTROL_LEARN2ALL)); 1017 1018 /* Send all with specific mac address to cpu port */ 1019 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_2x, MGMT_EN_ALL); 1020 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_0x, MGMT_EN_ALL); 1021 1022 /* Disable Remote Management */ 1023 e6000sw_writereg(sc, REG_GLOBAL, SWITCH_GLOBAL_CONTROL2, 0); 1024 1025 /* Disable loopback filter and flow control messages */ 1026 e6000sw_writereg(sc, REG_GLOBAL2, SWITCH_MGMT, 1027 SWITCH_MGMT_PRI_MASK | 1028 (1 << SWITCH_MGMT_RSVD2CPU) | 1029 SWITCH_MGMT_FC_PRI_MASK | 1030 (1 << SWITCH_MGMT_FORCEFLOW)); 1031 1032 e6000sw_atu_flush(dev, sc, NO_OPERATION); 1033 e6000sw_atu_mac_table(dev, sc, NULL, NO_OPERATION); 1034 e6000sw_set_atustat(dev, sc, 0, COUNT_ALL); 1035 1036 /* Set ATU AgeTime to 15 seconds */ 1037 atu_age = 1; 1038 1039 atu_ctrl = e6000sw_readreg(sc, REG_GLOBAL, ATU_CONTROL); 1040 1041 /* Set new AgeTime field */ 1042 atu_ctrl &= ~ATU_CONTROL_AGETIME_MASK; 1043 e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL, atu_ctrl | 1044 (atu_age << ATU_CONTROL_AGETIME)); 1045 } 1046 1047 static void 1048 e6000sw_port_vlan_conf(e6000sw_softc_t *sc) 1049 { 1050 int port, ret; 1051 device_t dev; 1052 1053 dev = sc->dev; 1054 /* Disable all ports */ 1055 for (port = 0; port < sc->num_ports; port++) { 1056 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL); 1057 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL, 1058 (ret & ~PORT_CONTROL_ENABLE)); 1059 } 1060 1061 /* Set port priority */ 1062 for (port = 0; port < sc->num_ports; port++) { 1063 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID); 1064 ret &= ~PORT_VID_PRIORITY_MASK; 1065 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret); 1066 } 1067 1068 /* Set VID map */ 1069 for (port = 0; port < sc->num_ports; port++) { 1070 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID); 1071 ret &= ~PORT_VID_DEF_VID_MASK; 1072 ret |= (port + 1); 1073 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret); 1074 } 1075 1076 /* Enable all ports */ 1077 for (port = 0; port < sc->num_ports; port++) { 1078 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL); 1079 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL, (ret | 1080 PORT_CONTROL_ENABLE)); 1081 } 1082 } 1083 1084 static void 1085 e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin, int flag) 1086 { 1087 uint16_t ret; 1088 1089 ret = e6000sw_readreg(sc, REG_GLOBAL2, ATU_STATS); 1090 e6000sw_writereg(sc, REG_GLOBAL2, ATU_STATS, (bin << ATU_STATS_BIN ) | 1091 (flag << ATU_STATS_FLAG)); 1092 } 1093 1094 static int 1095 e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct atu_opt *atu, 1096 int flag) 1097 { 1098 uint16_t ret_opt; 1099 uint16_t ret_data; 1100 int retries; 1101 1102 if (flag == NO_OPERATION) 1103 return (0); 1104 else if ((flag & (LOAD_FROM_FIB | PURGE_FROM_FIB | GET_NEXT_IN_FIB | 1105 GET_VIOLATION_DATA | CLEAR_VIOLATION_DATA)) == 0) { 1106 device_printf(dev, "Wrong Opcode for ATU operation\n"); 1107 return (EINVAL); 1108 } 1109 1110 ret_opt = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION); 1111 1112 if (ret_opt & ATU_UNIT_BUSY) { 1113 device_printf(dev, "ATU unit is busy, cannot access" 1114 "register\n"); 1115 return (EBUSY); 1116 } else { 1117 if(flag & LOAD_FROM_FIB) { 1118 ret_data = e6000sw_readreg(sc, REG_GLOBAL, ATU_DATA); 1119 e6000sw_writereg(sc, REG_GLOBAL2, ATU_DATA, (ret_data & 1120 ~ENTRY_STATE)); 1121 } 1122 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR01, atu->mac_01); 1123 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR23, atu->mac_23); 1124 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR45, atu->mac_45); 1125 e6000sw_writereg(sc, REG_GLOBAL, ATU_FID, atu->fid); 1126 1127 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret_opt | 1128 ATU_UNIT_BUSY | flag)); 1129 1130 retries = E6000SW_RETRIES; 1131 while (--retries & (e6000sw_readreg(sc, REG_GLOBAL, 1132 ATU_OPERATION) & ATU_UNIT_BUSY)) 1133 DELAY(1); 1134 1135 if (retries == 0) 1136 device_printf(dev, "Timeout while flushing\n"); 1137 else if (flag & GET_NEXT_IN_FIB) { 1138 atu->mac_01 = e6000sw_readreg(sc, REG_GLOBAL, 1139 ATU_MAC_ADDR01); 1140 atu->mac_23 = e6000sw_readreg(sc, REG_GLOBAL, 1141 ATU_MAC_ADDR23); 1142 atu->mac_45 = e6000sw_readreg(sc, REG_GLOBAL, 1143 ATU_MAC_ADDR45); 1144 } 1145 } 1146 1147 return (0); 1148 } 1149 1150 static int 1151 e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag) 1152 { 1153 uint16_t ret; 1154 int retries; 1155 1156 if (flag == NO_OPERATION) 1157 return (0); 1158 1159 ret = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION); 1160 if (ret & ATU_UNIT_BUSY) { 1161 device_printf(dev, "Atu unit is busy, cannot flush\n"); 1162 return (EBUSY); 1163 } else { 1164 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret | 1165 ATU_UNIT_BUSY | flag)); 1166 retries = E6000SW_RETRIES; 1167 while (--retries & (e6000sw_readreg(sc, REG_GLOBAL, 1168 ATU_OPERATION) & ATU_UNIT_BUSY)) 1169 DELAY(1); 1170 1171 if (retries == 0) 1172 device_printf(dev, "Timeout while flushing\n"); 1173 } 1174 1175 return (0); 1176 } 1177