1 /*- 2 * Copyright (c) 2015 Semihalf 3 * Copyright (c) 2015 Stormshield 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/types.h> 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/sockio.h> 35 #include <sys/kernel.h> 36 #include <sys/kthread.h> 37 #include <sys/socket.h> 38 #include <sys/module.h> 39 #include <sys/errno.h> 40 #include <sys/bus.h> 41 #include <sys/conf.h> 42 #include <sys/uio.h> 43 #include <sys/fcntl.h> 44 45 #include <net/if.h> 46 #include <net/if_media.h> 47 #include <net/if_types.h> 48 49 #include <machine/bus.h> 50 #include <machine/resource.h> 51 52 #include <arm/mv/mvwin.h> 53 #include <arm/mv/mvreg.h> 54 #include <arm/mv/mvvar.h> 55 56 #include <dev/etherswitch/etherswitch.h> 57 #include <dev/mdio/mdio.h> 58 #include <dev/mii/mii.h> 59 #include <dev/mii/miivar.h> 60 #include <dev/mge/if_mgevar.h> 61 62 #include <dev/fdt/fdt_common.h> 63 #include <dev/ofw/ofw_bus.h> 64 #include <dev/ofw/ofw_bus_subr.h> 65 66 #include "e6000swreg.h" 67 #include "etherswitch_if.h" 68 #include "miibus_if.h" 69 #include "mdio_if.h" 70 71 MALLOC_DECLARE(M_E6000SW); 72 MALLOC_DEFINE(M_E6000SW, "e6000sw", "e6000sw switch"); 73 74 #define E6000SW_LOCK(_sc) \ 75 sx_xlock(&(_sc)->sx) 76 #define E6000SW_UNLOCK(_sc) \ 77 sx_unlock(&(_sc)->sx) 78 #define E6000SW_LOCK_ASSERT(_sc, _what) \ 79 sx_assert(&(_sc)->sx, (_what)) 80 #define E6000SW_TRYLOCK(_sc) \ 81 sx_tryxlock(&(_sc)->sx) 82 83 typedef struct e6000sw_softc { 84 device_t dev; 85 phandle_t node; 86 87 struct sx sx; 88 struct ifnet *ifp[E6000SW_MAX_PORTS]; 89 char *ifname[E6000SW_MAX_PORTS]; 90 device_t miibus[E6000SW_MAX_PORTS]; 91 struct mii_data *mii[E6000SW_MAX_PORTS]; 92 struct proc *kproc; 93 94 uint32_t cpuports_mask; 95 uint32_t fixed_mask; 96 int sw_addr; 97 int num_ports; 98 boolean_t multi_chip; 99 100 int vid[E6000SW_NUM_VGROUPS]; 101 int members[E6000SW_NUM_VGROUPS]; 102 int vgroup[E6000SW_MAX_PORTS]; 103 } e6000sw_softc_t; 104 105 static etherswitch_info_t etherswitch_info = { 106 .es_nports = 0, 107 .es_nvlangroups = E6000SW_NUM_VGROUPS, 108 .es_name = "Marvell 6000 series switch" 109 }; 110 111 static void e6000sw_identify(driver_t *driver, device_t parent); 112 static int e6000sw_probe(device_t dev); 113 static int e6000sw_attach(device_t dev); 114 static int e6000sw_detach(device_t dev); 115 static int e6000sw_readphy(device_t dev, int phy, int reg); 116 static int e6000sw_writephy(device_t dev, int phy, int reg, int data); 117 static etherswitch_info_t* e6000sw_getinfo(device_t dev); 118 static void e6000sw_lock(device_t dev); 119 static void e6000sw_unlock(device_t dev); 120 static int e6000sw_getport(device_t dev, etherswitch_port_t *p); 121 static int e6000sw_setport(device_t dev, etherswitch_port_t *p); 122 static int e6000sw_readreg_wrapper(device_t dev, int addr_reg); 123 static int e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val); 124 static int e6000sw_readphy_wrapper(device_t dev, int phy, int reg); 125 static int e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data); 126 static int e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg); 127 static int e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg); 128 static int e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg); 129 static int e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg); 130 static void e6000sw_setup(device_t dev, e6000sw_softc_t *sc); 131 static void e6000sw_port_vlan_conf(e6000sw_softc_t *sc); 132 static void e6000sw_tick(void *arg); 133 static void e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin, 134 int flag); 135 static int e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag); 136 static __inline void e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, 137 int val); 138 static __inline uint32_t e6000sw_readreg(e6000sw_softc_t *sc, int addr, 139 int reg); 140 static int e6000sw_ifmedia_upd(struct ifnet *ifp); 141 static void e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr); 142 static int e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct 143 atu_opt *atu, int flag); 144 static int e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid); 145 static int e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid); 146 static __inline int e6000sw_is_cpuport(e6000sw_softc_t *sc, int port); 147 static __inline int e6000sw_is_fixedport(e6000sw_softc_t *sc, int port); 148 static __inline int e6000sw_is_phyport(e6000sw_softc_t *sc, int port); 149 static __inline struct mii_data *e6000sw_miiforphy(e6000sw_softc_t *sc, 150 unsigned int phy); 151 152 static device_method_t e6000sw_methods[] = { 153 /* device interface */ 154 DEVMETHOD(device_identify, e6000sw_identify), 155 DEVMETHOD(device_probe, e6000sw_probe), 156 DEVMETHOD(device_attach, e6000sw_attach), 157 DEVMETHOD(device_detach, e6000sw_detach), 158 159 /* bus interface */ 160 DEVMETHOD(bus_add_child, device_add_child_ordered), 161 162 /* mii interface */ 163 DEVMETHOD(miibus_readreg, e6000sw_readphy), 164 DEVMETHOD(miibus_writereg, e6000sw_writephy), 165 166 /* etherswitch interface */ 167 DEVMETHOD(etherswitch_getinfo, e6000sw_getinfo), 168 DEVMETHOD(etherswitch_lock, e6000sw_lock), 169 DEVMETHOD(etherswitch_unlock, e6000sw_unlock), 170 DEVMETHOD(etherswitch_getport, e6000sw_getport), 171 DEVMETHOD(etherswitch_setport, e6000sw_setport), 172 DEVMETHOD(etherswitch_readreg, e6000sw_readreg_wrapper), 173 DEVMETHOD(etherswitch_writereg, e6000sw_writereg_wrapper), 174 DEVMETHOD(etherswitch_readphyreg, e6000sw_readphy_wrapper), 175 DEVMETHOD(etherswitch_writephyreg, e6000sw_writephy_wrapper), 176 DEVMETHOD(etherswitch_setvgroup, e6000sw_setvgroup_wrapper), 177 DEVMETHOD(etherswitch_getvgroup, e6000sw_getvgroup_wrapper), 178 179 DEVMETHOD_END 180 }; 181 182 static devclass_t e6000sw_devclass; 183 184 DEFINE_CLASS_0(e6000sw, e6000sw_driver, e6000sw_methods, 185 sizeof(e6000sw_softc_t)); 186 187 DRIVER_MODULE(e6000sw, mdio, e6000sw_driver, e6000sw_devclass, 0, 0); 188 DRIVER_MODULE(etherswitch, e6000sw, etherswitch_driver, etherswitch_devclass, 0, 189 0); 190 DRIVER_MODULE(miibus, e6000sw, miibus_driver, miibus_devclass, 0, 0); 191 MODULE_DEPEND(e6000sw, mdio, 1, 1, 1); 192 193 #define SMI_CMD 0 194 #define SMI_CMD_BUSY (1<<15) 195 #define SMI_CMD_OP_READ ((2<<10)|SMI_CMD_BUSY|(1<<12)) 196 #define SMI_CMD_OP_WRITE ((1<<10)|SMI_CMD_BUSY|(1<<12)) 197 #define SMI_DATA 1 198 199 #define MDIO_READ(dev, addr, reg) MDIO_READREG(device_get_parent(dev), (addr), (reg)) 200 #define MDIO_WRITE(dev, addr, reg, val) MDIO_WRITEREG(device_get_parent(dev), (addr), (reg), (val)) 201 static void 202 e6000sw_identify(driver_t *driver, device_t parent) 203 { 204 205 if (device_find_child(parent, "e6000sw", -1) == NULL) 206 BUS_ADD_CHILD(parent, 0, "e6000sw", -1); 207 } 208 209 static int 210 e6000sw_probe(device_t dev) 211 { 212 e6000sw_softc_t *sc; 213 const char *description; 214 unsigned int id; 215 phandle_t dsa_node, switch_node; 216 217 dsa_node = fdt_find_compatible(OF_finddevice("/"), 218 "marvell,dsa", 0); 219 switch_node = OF_child(dsa_node); 220 221 if (switch_node == 0) 222 return (ENXIO); 223 224 sc = device_get_softc(dev); 225 bzero(sc, sizeof(e6000sw_softc_t)); 226 sc->dev = dev; 227 sc->node = switch_node; 228 229 if (OF_getencprop(sc->node, "reg", &sc->sw_addr, 230 sizeof(sc->sw_addr)) < 0) 231 return (ENXIO); 232 if (sc->sw_addr != 0 && (sc->sw_addr % 2) == 0) 233 sc->multi_chip = true; 234 235 /* Lock is necessary due to assertions. */ 236 sx_init(&sc->sx, "e6000sw"); 237 E6000SW_LOCK(sc); 238 239 id = e6000sw_readreg(sc, REG_PORT(0), SWITCH_ID); 240 241 switch (id & 0xfff0) { 242 case 0x3520: 243 description = "Marvell 88E6352"; 244 break; 245 case 0x1720: 246 description = "Marvell 88E6172"; 247 break; 248 case 0x1760: 249 description = "Marvell 88E6176"; 250 break; 251 default: 252 E6000SW_UNLOCK(sc); 253 sx_destroy(&sc->sx); 254 device_printf(dev, "Unrecognized device, id 0x%x.\n", id); 255 return (ENXIO); 256 } 257 258 device_set_desc(dev, description); 259 260 E6000SW_UNLOCK(sc); 261 262 return (BUS_PROBE_DEFAULT); 263 } 264 265 static int 266 e6000sw_parse_child_fdt(device_t dev, phandle_t child, uint32_t *fixed_mask, 267 uint32_t *cpu_mask, int *pport, int *pvlangroup) 268 { 269 char portlabel[100]; 270 uint32_t port, vlangroup; 271 boolean_t fixed_link; 272 273 if (fixed_mask == NULL || cpu_mask == NULL || pport == NULL) 274 return (ENXIO); 275 276 OF_getprop(child, "label", (void *)portlabel, 100); 277 OF_getencprop(child, "reg", (void *)&port, sizeof(port)); 278 279 if (OF_getencprop(child, "vlangroup", (void *)&vlangroup, 280 sizeof(vlangroup)) > 0) { 281 if (vlangroup >= E6000SW_NUM_VGROUPS) 282 return (ENXIO); 283 *pvlangroup = vlangroup; 284 } else { 285 *pvlangroup = -1; 286 } 287 288 if (port >= E6000SW_MAX_PORTS) 289 return (ENXIO); 290 *pport = port; 291 292 if (strncmp(portlabel, "cpu", 3) == 0) { 293 device_printf(dev, "CPU port at %d\n", port); 294 *cpu_mask |= (1 << port); 295 return (0); 296 } 297 298 fixed_link = OF_child(child); 299 if (fixed_link) { 300 *fixed_mask |= (1 << port); 301 device_printf(dev, "fixed port at %d\n", port); 302 } else { 303 device_printf(dev, "PHY at %d\n", port); 304 } 305 306 return (0); 307 } 308 309 static int 310 e6000sw_init_interface(e6000sw_softc_t *sc, int port) 311 { 312 char name[IFNAMSIZ]; 313 314 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->dev)); 315 316 sc->ifp[port] = if_alloc(IFT_ETHER); 317 if (sc->ifp[port] == NULL) 318 return (ENOMEM); 319 sc->ifp[port]->if_softc = sc; 320 sc->ifp[port]->if_flags |= IFF_UP | IFF_BROADCAST | 321 IFF_DRV_RUNNING | IFF_SIMPLEX; 322 sc->ifname[port] = malloc(strlen(name) + 1, M_E6000SW, M_NOWAIT); 323 if (sc->ifname[port] == NULL) { 324 if_free(sc->ifp[port]); 325 return (ENOMEM); 326 } 327 memcpy(sc->ifname[port], name, strlen(name) + 1); 328 if_initname(sc->ifp[port], sc->ifname[port], port); 329 330 return (0); 331 } 332 333 static int 334 e6000sw_attach_miibus(e6000sw_softc_t *sc, int port) 335 { 336 int err; 337 338 err = mii_attach(sc->dev, &sc->miibus[port], sc->ifp[port], 339 e6000sw_ifmedia_upd, e6000sw_ifmedia_sts, BMSR_DEFCAPMASK, 340 port, MII_OFFSET_ANY, 0); 341 if (err != 0) 342 return (err); 343 344 sc->mii[port] = device_get_softc(sc->miibus[port]); 345 return (0); 346 } 347 348 static int 349 e6000sw_attach(device_t dev) 350 { 351 e6000sw_softc_t *sc; 352 phandle_t child; 353 int err, port, vlangroup; 354 int member_ports[E6000SW_NUM_VGROUPS]; 355 etherswitch_vlangroup_t vg; 356 357 err = 0; 358 sc = device_get_softc(dev); 359 360 if (sc->multi_chip) 361 device_printf(dev, "multi-chip addressing mode\n"); 362 else 363 device_printf(dev, "single-chip addressing mode\n"); 364 365 E6000SW_LOCK(sc); 366 e6000sw_setup(dev, sc); 367 bzero(member_ports, sizeof(member_ports)); 368 369 for (child = OF_child(sc->node); child != 0; child = OF_peer(child)) { 370 err = e6000sw_parse_child_fdt(dev, child, &sc->fixed_mask, 371 &sc->cpuports_mask, &port, &vlangroup); 372 if (err != 0) { 373 device_printf(sc->dev, "failed to parse DTS\n"); 374 goto out_fail; 375 } 376 377 if (vlangroup != -1) 378 member_ports[vlangroup] |= (1 << port); 379 380 sc->num_ports++; 381 382 err = e6000sw_init_interface(sc, port); 383 if (err != 0) { 384 device_printf(sc->dev, "failed to init interface\n"); 385 goto out_fail; 386 } 387 388 /* Don't attach miibus at CPU/fixed ports */ 389 if (!e6000sw_is_phyport(sc, port)) 390 continue; 391 392 err = e6000sw_attach_miibus(sc, port); 393 if (err != 0) { 394 device_printf(sc->dev, "failed to attach miibus\n"); 395 goto out_fail; 396 } 397 } 398 399 etherswitch_info.es_nports = sc->num_ports; 400 for (port = 0; port < sc->num_ports; port++) 401 sc->vgroup[port] = E6000SW_PORT_NO_VGROUP; 402 403 /* Set VLAN configuration */ 404 e6000sw_port_vlan_conf(sc); 405 406 /* Set vlangroups */ 407 for (vlangroup = 0; vlangroup < E6000SW_NUM_VGROUPS; vlangroup++) 408 if (member_ports[vlangroup] != 0) { 409 vg.es_vlangroup = vg.es_vid = vlangroup; 410 vg.es_member_ports = vg.es_untagged_ports = 411 member_ports[vlangroup]; 412 e6000sw_setvgroup(dev, &vg); 413 } 414 415 E6000SW_UNLOCK(sc); 416 417 bus_generic_probe(dev); 418 bus_generic_attach(dev); 419 420 kproc_create(e6000sw_tick, sc, &sc->kproc, 0, 0, "e6000sw tick kproc"); 421 422 return (0); 423 424 out_fail: 425 E6000SW_UNLOCK(sc); 426 e6000sw_detach(dev); 427 428 return (err); 429 } 430 431 static __inline int 432 e6000sw_poll_done(e6000sw_softc_t *sc) 433 { 434 int i; 435 436 for (i = 0; i < 16; i++) { 437 438 if (!(e6000sw_readreg(sc, REG_GLOBAL2, PHY_CMD) & 439 (1 << PHY_CMD_SMI_BUSY))) 440 return (0); 441 442 pause("e6000sw PHY poll", hz/1000); 443 } 444 445 return (ETIMEDOUT); 446 } 447 448 /* 449 * PHY registers are paged. Put page index in reg 22 (accessible from every 450 * page), then access specific register. 451 */ 452 static int 453 e6000sw_readphy(device_t dev, int phy, int reg) 454 { 455 e6000sw_softc_t *sc; 456 uint32_t val; 457 int err; 458 459 sc = device_get_softc(dev); 460 val = 0; 461 462 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) { 463 device_printf(dev, "Wrong register address.\n"); 464 return (EINVAL); 465 } 466 467 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 468 469 err = e6000sw_poll_done(sc); 470 if (err != 0) { 471 device_printf(dev, "Timeout while waiting for switch\n"); 472 return (err); 473 } 474 475 val |= 1 << PHY_CMD_SMI_BUSY; 476 val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE; 477 val |= PHY_CMD_OPCODE_READ << PHY_CMD_OPCODE; 478 val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK; 479 val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK; 480 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val); 481 482 err = e6000sw_poll_done(sc); 483 if (err != 0) { 484 device_printf(dev, "Timeout while waiting for switch\n"); 485 return (err); 486 } 487 488 val = e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG) 489 & PHY_DATA_MASK; 490 491 return (val); 492 } 493 494 static int 495 e6000sw_writephy(device_t dev, int phy, int reg, int data) 496 { 497 e6000sw_softc_t *sc; 498 uint32_t val; 499 int err; 500 501 sc = device_get_softc(dev); 502 val = 0; 503 504 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) { 505 device_printf(dev, "Wrong register address.\n"); 506 return (EINVAL); 507 } 508 509 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 510 511 err = e6000sw_poll_done(sc); 512 if (err != 0) { 513 device_printf(dev, "Timeout while waiting for switch\n"); 514 return (err); 515 } 516 517 val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE; 518 val |= 1 << PHY_CMD_SMI_BUSY; 519 val |= PHY_CMD_OPCODE_WRITE << PHY_CMD_OPCODE; 520 val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK; 521 val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK; 522 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG, 523 data & PHY_DATA_MASK); 524 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val); 525 526 err = e6000sw_poll_done(sc); 527 if (err != 0) { 528 device_printf(dev, "Timeout while waiting for switch\n"); 529 return (err); 530 } 531 532 return (0); 533 } 534 535 static int 536 e6000sw_detach(device_t dev) 537 { 538 int phy; 539 e6000sw_softc_t *sc; 540 541 sc = device_get_softc(dev); 542 bus_generic_detach(dev); 543 sx_destroy(&sc->sx); 544 for (phy = 0; phy < sc->num_ports; phy++) { 545 if (sc->miibus[phy] != NULL) 546 device_delete_child(dev, sc->miibus[phy]); 547 if (sc->ifp[phy] != NULL) 548 if_free(sc->ifp[phy]); 549 if (sc->ifname[phy] != NULL) 550 free(sc->ifname[phy], M_E6000SW); 551 } 552 553 return (0); 554 } 555 556 static etherswitch_info_t* 557 e6000sw_getinfo(device_t dev) 558 { 559 560 return (ðerswitch_info); 561 } 562 563 static void 564 e6000sw_lock(device_t dev) 565 { 566 struct e6000sw_softc *sc; 567 568 sc = device_get_softc(dev); 569 570 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 571 E6000SW_LOCK(sc); 572 } 573 574 static void 575 e6000sw_unlock(device_t dev) 576 { 577 struct e6000sw_softc *sc; 578 579 sc = device_get_softc(dev); 580 581 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 582 E6000SW_UNLOCK(sc); 583 } 584 585 static int 586 e6000sw_getport(device_t dev, etherswitch_port_t *p) 587 { 588 struct mii_data *mii; 589 int err; 590 struct ifmediareq *ifmr; 591 592 err = 0; 593 e6000sw_softc_t *sc = device_get_softc(dev); 594 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 595 596 E6000SW_LOCK(sc); 597 598 if (p->es_port >= sc->num_ports || 599 p->es_port < 0) { 600 err = EINVAL; 601 goto out; 602 } 603 604 e6000sw_get_pvid(sc, p->es_port, &p->es_pvid); 605 606 if (e6000sw_is_cpuport(sc, p->es_port)) { 607 p->es_flags |= ETHERSWITCH_PORT_CPU; 608 ifmr = &p->es_ifmr; 609 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID; 610 ifmr->ifm_count = 0; 611 ifmr->ifm_current = ifmr->ifm_active = 612 IFM_ETHER | IFM_1000_T | IFM_FDX; 613 ifmr->ifm_mask = 0; 614 } else if (e6000sw_is_fixedport(sc, p->es_port)) { 615 ifmr = &p->es_ifmr; 616 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID; 617 ifmr->ifm_count = 0; 618 ifmr->ifm_current = ifmr->ifm_active = 619 IFM_ETHER | IFM_1000_T | IFM_FDX; 620 ifmr->ifm_mask = 0; 621 } else { 622 mii = e6000sw_miiforphy(sc, p->es_port); 623 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, 624 &mii->mii_media, SIOCGIFMEDIA); 625 } 626 627 out: 628 E6000SW_UNLOCK(sc); 629 return (err); 630 } 631 632 static int 633 e6000sw_setport(device_t dev, etherswitch_port_t *p) 634 { 635 e6000sw_softc_t *sc; 636 int err; 637 struct mii_data *mii; 638 639 err = 0; 640 sc = device_get_softc(dev); 641 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 642 643 E6000SW_LOCK(sc); 644 645 if (p->es_port >= sc->num_ports || 646 p->es_port < 0) { 647 err = EINVAL; 648 goto out; 649 } 650 651 if (p->es_pvid != 0) 652 e6000sw_set_pvid(sc, p->es_port, p->es_pvid); 653 if (!e6000sw_is_cpuport(sc, p->es_port)) { 654 mii = e6000sw_miiforphy(sc, p->es_port); 655 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, &mii->mii_media, 656 SIOCSIFMEDIA); 657 } 658 659 out: 660 E6000SW_UNLOCK(sc); 661 return (err); 662 } 663 664 /* 665 * Registers in this switch are divided into sections, specified in 666 * documentation. So as to access any of them, section index and reg index 667 * is necessary. etherswitchcfg uses only one variable, so indexes were 668 * compressed into addr_reg: 32 * section_index + reg_index. 669 */ 670 static int 671 e6000sw_readreg_wrapper(device_t dev, int addr_reg) 672 { 673 674 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) || 675 (addr_reg < (REG_PORT(0) * 32))) { 676 device_printf(dev, "Wrong register address.\n"); 677 return (EINVAL); 678 } 679 680 return (e6000sw_readreg(device_get_softc(dev), addr_reg / 32, 681 addr_reg % 32)); 682 } 683 684 static int 685 e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val) 686 { 687 688 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) || 689 (addr_reg < (REG_PORT(0) * 32))) { 690 device_printf(dev, "Wrong register address.\n"); 691 return (EINVAL); 692 } 693 e6000sw_writereg(device_get_softc(dev), addr_reg / 5, 694 addr_reg % 32, val); 695 696 return (0); 697 } 698 699 /* 700 * These wrappers are necessary because PHY accesses from etherswitchcfg 701 * need to be synchronized with locks, while miibus PHY accesses do not. 702 */ 703 static int 704 e6000sw_readphy_wrapper(device_t dev, int phy, int reg) 705 { 706 e6000sw_softc_t *sc; 707 int ret; 708 709 sc = device_get_softc(dev); 710 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 711 712 E6000SW_LOCK(sc); 713 ret = e6000sw_readphy(dev, phy, reg); 714 E6000SW_UNLOCK(sc); 715 716 return (ret); 717 } 718 719 static int 720 e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data) 721 { 722 e6000sw_softc_t *sc; 723 int ret; 724 725 sc = device_get_softc(dev); 726 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 727 728 E6000SW_LOCK(sc); 729 ret = e6000sw_writephy(dev, phy, reg, data); 730 E6000SW_UNLOCK(sc); 731 732 return (ret); 733 } 734 735 /* 736 * setvgroup/getvgroup called from etherswitchfcg need to be locked, 737 * while internal calls do not. 738 */ 739 static int 740 e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg) 741 { 742 e6000sw_softc_t *sc; 743 int ret; 744 745 sc = device_get_softc(dev); 746 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 747 748 E6000SW_LOCK(sc); 749 ret = e6000sw_setvgroup(dev, vg); 750 E6000SW_UNLOCK(sc); 751 752 return (ret); 753 } 754 755 static int 756 e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg) 757 { 758 e6000sw_softc_t *sc; 759 int ret; 760 761 sc = device_get_softc(dev); 762 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 763 764 E6000SW_LOCK(sc); 765 ret = e6000sw_getvgroup(dev, vg); 766 E6000SW_UNLOCK(sc); 767 768 return (ret); 769 } 770 771 static __inline void 772 e6000sw_flush_port(e6000sw_softc_t *sc, int port) 773 { 774 uint32_t reg; 775 776 reg = e6000sw_readreg(sc, REG_PORT(port), 777 PORT_VLAN_MAP); 778 reg &= ~PORT_VLAN_MAP_TABLE_MASK; 779 reg &= ~PORT_VLAN_MAP_FID_MASK; 780 e6000sw_writereg(sc, REG_PORT(port), 781 PORT_VLAN_MAP, reg); 782 if (sc->vgroup[port] != E6000SW_PORT_NO_VGROUP) { 783 /* 784 * If port belonged somewhere, owner-group 785 * should have its entry removed. 786 */ 787 sc->members[sc->vgroup[port]] &= ~(1 << port); 788 sc->vgroup[port] = E6000SW_PORT_NO_VGROUP; 789 } 790 } 791 792 static __inline void 793 e6000sw_port_assign_vgroup(e6000sw_softc_t *sc, int port, int fid, int vgroup, 794 int members) 795 { 796 uint32_t reg; 797 798 reg = e6000sw_readreg(sc, REG_PORT(port), 799 PORT_VLAN_MAP); 800 reg &= ~PORT_VLAN_MAP_TABLE_MASK; 801 reg &= ~PORT_VLAN_MAP_FID_MASK; 802 reg |= members & ~(1 << port); 803 reg |= (fid << PORT_VLAN_MAP_FID) & PORT_VLAN_MAP_FID_MASK; 804 e6000sw_writereg(sc, REG_PORT(port), PORT_VLAN_MAP, 805 reg); 806 sc->vgroup[port] = vgroup; 807 } 808 809 static int 810 e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg) 811 { 812 e6000sw_softc_t *sc; 813 int port, fid; 814 815 sc = device_get_softc(dev); 816 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 817 818 if (vg->es_vlangroup >= E6000SW_NUM_VGROUPS) 819 return (EINVAL); 820 if (vg->es_member_ports != vg->es_untagged_ports) { 821 device_printf(dev, "Tagged ports not supported.\n"); 822 return (EINVAL); 823 } 824 825 vg->es_untagged_ports &= PORT_VLAN_MAP_TABLE_MASK; 826 fid = vg->es_vlangroup + 1; 827 for (port = 0; port < sc->num_ports; port++) { 828 if ((sc->members[vg->es_vlangroup] & (1 << port)) || 829 (vg->es_untagged_ports & (1 << port))) 830 e6000sw_flush_port(sc, port); 831 if (vg->es_untagged_ports & (1 << port)) 832 e6000sw_port_assign_vgroup(sc, port, fid, 833 vg->es_vlangroup, vg->es_untagged_ports); 834 } 835 sc->vid[vg->es_vlangroup] = vg->es_vid; 836 sc->members[vg->es_vlangroup] = vg->es_untagged_ports; 837 838 return (0); 839 } 840 841 static int 842 e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg) 843 { 844 e6000sw_softc_t *sc; 845 846 sc = device_get_softc(dev); 847 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 848 849 if (vg->es_vlangroup >= E6000SW_NUM_VGROUPS) 850 return (EINVAL); 851 vg->es_untagged_ports = vg->es_member_ports = 852 sc->members[vg->es_vlangroup]; 853 vg->es_vid = ETHERSWITCH_VID_VALID; 854 855 return (0); 856 } 857 858 static __inline struct mii_data* 859 e6000sw_miiforphy(e6000sw_softc_t *sc, unsigned int phy) 860 { 861 862 if (!e6000sw_is_phyport(sc, phy)) 863 return (NULL); 864 865 return (device_get_softc(sc->miibus[phy])); 866 } 867 868 static int 869 e6000sw_ifmedia_upd(struct ifnet *ifp) 870 { 871 e6000sw_softc_t *sc; 872 struct mii_data *mii; 873 874 sc = ifp->if_softc; 875 mii = e6000sw_miiforphy(sc, ifp->if_dunit); 876 if (mii == NULL) 877 return (ENXIO); 878 mii_mediachg(mii); 879 880 return (0); 881 } 882 883 static void 884 e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 885 { 886 e6000sw_softc_t *sc; 887 struct mii_data *mii; 888 889 sc = ifp->if_softc; 890 mii = e6000sw_miiforphy(sc, ifp->if_dunit); 891 892 if (mii == NULL) 893 return; 894 895 mii_pollstat(mii); 896 ifmr->ifm_active = mii->mii_media_active; 897 ifmr->ifm_status = mii->mii_media_status; 898 } 899 900 901 static int 902 e6000sw_smi_waitready(e6000sw_softc_t *sc, int phy) 903 { 904 int i; 905 906 for (i = 0; i < E6000SW_SMI_TIMEOUT; i++) { 907 if ((MDIO_READ(sc->dev, phy, SMI_CMD) 908 & SMI_CMD_BUSY) == 0) 909 return 0; 910 } 911 912 return 1; 913 } 914 915 static __inline uint32_t 916 e6000sw_readreg(e6000sw_softc_t *sc, int addr, int reg) 917 { 918 919 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 920 921 if (!sc->multi_chip) 922 return (MDIO_READ(sc->dev, addr, reg) & 0xffff); 923 924 if (e6000sw_smi_waitready(sc, sc->sw_addr)) { 925 printf("e6000sw: readreg timeout\n"); 926 return (0xffff); 927 } 928 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD, SMI_CMD_OP_READ | 929 (addr << 5) | reg); 930 if (e6000sw_smi_waitready(sc, sc->sw_addr)) { 931 printf("e6000sw: readreg timeout\n"); 932 return (0xffff); 933 } 934 935 return (MDIO_READ(sc->dev, sc->sw_addr, SMI_DATA) & 0xffff); 936 } 937 938 static __inline void 939 e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, int val) 940 { 941 942 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 943 944 if (!sc->multi_chip) { 945 MDIO_WRITE(sc->dev, addr, reg, val); 946 return; 947 } 948 949 if (e6000sw_smi_waitready(sc, sc->sw_addr)) { 950 printf("e6000sw: readreg timeout\n"); 951 return; 952 } 953 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_DATA, val); 954 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD, SMI_CMD_OP_WRITE | 955 (addr << 5) | reg); 956 if (e6000sw_smi_waitready(sc, sc->sw_addr)) { 957 printf("e6000sw: readreg timeout\n"); 958 return; 959 } 960 961 return; 962 } 963 964 static __inline int 965 e6000sw_is_cpuport(e6000sw_softc_t *sc, int port) 966 { 967 968 return (sc->cpuports_mask & (1 << port)); 969 } 970 971 static __inline int 972 e6000sw_is_fixedport(e6000sw_softc_t *sc, int port) 973 { 974 975 return (sc->fixed_mask & (1 << port)); 976 } 977 978 static __inline int 979 e6000sw_is_phyport(e6000sw_softc_t *sc, int port) 980 { 981 uint32_t phy_mask; 982 phy_mask = ~(sc->fixed_mask | sc->cpuports_mask); 983 984 return (phy_mask & (1 << port)); 985 } 986 987 static __inline int 988 e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid) 989 { 990 991 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, pvid & 992 PORT_VID_DEF_VID_MASK); 993 994 return (0); 995 } 996 997 static __inline int 998 e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid) 999 { 1000 1001 if (pvid == NULL) 1002 return (ENXIO); 1003 1004 *pvid = e6000sw_readreg(sc, REG_PORT(port), PORT_VID) & 1005 PORT_VID_DEF_VID_MASK; 1006 1007 return (0); 1008 } 1009 1010 /* 1011 * Convert port status to ifmedia. 1012 */ 1013 static void 1014 e6000sw_update_ifmedia(uint16_t portstatus, u_int *media_status, u_int *media_active) 1015 { 1016 *media_active = IFM_ETHER; 1017 *media_status = IFM_AVALID; 1018 1019 if ((portstatus & PORT_STATUS_LINK_MASK) != 0) 1020 *media_status |= IFM_ACTIVE; 1021 else { 1022 *media_active |= IFM_NONE; 1023 return; 1024 } 1025 1026 switch (portstatus & PORT_STATUS_SPEED_MASK) { 1027 case PORT_STATUS_SPEED_10: 1028 *media_active |= IFM_10_T; 1029 break; 1030 case PORT_STATUS_SPEED_100: 1031 *media_active |= IFM_100_TX; 1032 break; 1033 case PORT_STATUS_SPEED_1000: 1034 *media_active |= IFM_1000_T; 1035 break; 1036 } 1037 1038 if ((portstatus & PORT_STATUS_DUPLEX_MASK) == 0) 1039 *media_active |= IFM_FDX; 1040 else 1041 *media_active |= IFM_HDX; 1042 } 1043 1044 static void 1045 e6000sw_tick (void *arg) 1046 { 1047 e6000sw_softc_t *sc; 1048 struct mii_softc *miisc; 1049 uint16_t portstatus; 1050 int port; 1051 1052 sc = arg; 1053 1054 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 1055 1056 for (;;) { 1057 E6000SW_LOCK(sc); 1058 for (port = 0; port < sc->num_ports; port++) { 1059 /* Tick only on PHY ports */ 1060 if (!e6000sw_is_phyport(sc, port)) 1061 continue; 1062 1063 portstatus = e6000sw_readreg(sc, REG_PORT(port), PORT_STATUS); 1064 1065 e6000sw_update_ifmedia(portstatus, 1066 &sc->mii[port]->mii_media_status, 1067 &sc->mii[port]->mii_media_active); 1068 1069 LIST_FOREACH(miisc, &sc->mii[port]->mii_phys, mii_list) { 1070 if (IFM_INST(sc->mii[port]->mii_media.ifm_cur->ifm_media) 1071 != miisc->mii_inst) 1072 continue; 1073 mii_phy_update(miisc, MII_POLLSTAT); 1074 } 1075 } 1076 E6000SW_UNLOCK(sc); 1077 pause("e6000sw tick", 1000); 1078 } 1079 } 1080 1081 static void 1082 e6000sw_setup(device_t dev, e6000sw_softc_t *sc) 1083 { 1084 uint16_t atu_ctrl, atu_age; 1085 1086 /* Set aging time */ 1087 e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL, 1088 (E6000SW_DEFAULT_AGETIME << ATU_CONTROL_AGETIME) | 1089 (1 << ATU_CONTROL_LEARN2ALL)); 1090 1091 /* Send all with specific mac address to cpu port */ 1092 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_2x, MGMT_EN_ALL); 1093 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_0x, MGMT_EN_ALL); 1094 1095 /* Disable Remote Management */ 1096 e6000sw_writereg(sc, REG_GLOBAL, SWITCH_GLOBAL_CONTROL2, 0); 1097 1098 /* Disable loopback filter and flow control messages */ 1099 e6000sw_writereg(sc, REG_GLOBAL2, SWITCH_MGMT, 1100 SWITCH_MGMT_PRI_MASK | 1101 (1 << SWITCH_MGMT_RSVD2CPU) | 1102 SWITCH_MGMT_FC_PRI_MASK | 1103 (1 << SWITCH_MGMT_FORCEFLOW)); 1104 1105 e6000sw_atu_flush(dev, sc, NO_OPERATION); 1106 e6000sw_atu_mac_table(dev, sc, NULL, NO_OPERATION); 1107 e6000sw_set_atustat(dev, sc, 0, COUNT_ALL); 1108 1109 /* Set ATU AgeTime to 15 seconds */ 1110 atu_age = 1; 1111 1112 atu_ctrl = e6000sw_readreg(sc, REG_GLOBAL, ATU_CONTROL); 1113 1114 /* Set new AgeTime field */ 1115 atu_ctrl &= ~ATU_CONTROL_AGETIME_MASK; 1116 e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL, atu_ctrl | 1117 (atu_age << ATU_CONTROL_AGETIME)); 1118 } 1119 1120 static void 1121 e6000sw_port_vlan_conf(e6000sw_softc_t *sc) 1122 { 1123 int port, ret; 1124 device_t dev; 1125 1126 dev = sc->dev; 1127 /* Disable all ports */ 1128 for (port = 0; port < sc->num_ports; port++) { 1129 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL); 1130 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL, 1131 (ret & ~PORT_CONTROL_ENABLE)); 1132 } 1133 1134 /* Set port priority */ 1135 for (port = 0; port < sc->num_ports; port++) { 1136 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID); 1137 ret &= ~PORT_VID_PRIORITY_MASK; 1138 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret); 1139 } 1140 1141 /* Set VID map */ 1142 for (port = 0; port < sc->num_ports; port++) { 1143 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID); 1144 ret &= ~PORT_VID_DEF_VID_MASK; 1145 ret |= (port + 1); 1146 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret); 1147 } 1148 1149 /* Enable all ports */ 1150 for (port = 0; port < sc->num_ports; port++) { 1151 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL); 1152 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL, (ret | 1153 PORT_CONTROL_ENABLE)); 1154 } 1155 } 1156 1157 static void 1158 e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin, int flag) 1159 { 1160 uint16_t ret; 1161 1162 ret = e6000sw_readreg(sc, REG_GLOBAL2, ATU_STATS); 1163 e6000sw_writereg(sc, REG_GLOBAL2, ATU_STATS, (bin << ATU_STATS_BIN ) | 1164 (flag << ATU_STATS_FLAG)); 1165 } 1166 1167 static int 1168 e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct atu_opt *atu, 1169 int flag) 1170 { 1171 uint16_t ret_opt; 1172 uint16_t ret_data; 1173 int retries; 1174 1175 if (flag == NO_OPERATION) 1176 return (0); 1177 else if ((flag & (LOAD_FROM_FIB | PURGE_FROM_FIB | GET_NEXT_IN_FIB | 1178 GET_VIOLATION_DATA | CLEAR_VIOLATION_DATA)) == 0) { 1179 device_printf(dev, "Wrong Opcode for ATU operation\n"); 1180 return (EINVAL); 1181 } 1182 1183 ret_opt = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION); 1184 1185 if (ret_opt & ATU_UNIT_BUSY) { 1186 device_printf(dev, "ATU unit is busy, cannot access" 1187 "register\n"); 1188 return (EBUSY); 1189 } else { 1190 if(flag & LOAD_FROM_FIB) { 1191 ret_data = e6000sw_readreg(sc, REG_GLOBAL, ATU_DATA); 1192 e6000sw_writereg(sc, REG_GLOBAL2, ATU_DATA, (ret_data & 1193 ~ENTRY_STATE)); 1194 } 1195 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR01, atu->mac_01); 1196 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR23, atu->mac_23); 1197 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR45, atu->mac_45); 1198 e6000sw_writereg(sc, REG_GLOBAL, ATU_FID, atu->fid); 1199 1200 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret_opt | 1201 ATU_UNIT_BUSY | flag)); 1202 1203 retries = E6000SW_RETRIES; 1204 while (--retries & (e6000sw_readreg(sc, REG_GLOBAL, 1205 ATU_OPERATION) & ATU_UNIT_BUSY)) 1206 DELAY(1); 1207 1208 if (retries == 0) 1209 device_printf(dev, "Timeout while flushing\n"); 1210 else if (flag & GET_NEXT_IN_FIB) { 1211 atu->mac_01 = e6000sw_readreg(sc, REG_GLOBAL, 1212 ATU_MAC_ADDR01); 1213 atu->mac_23 = e6000sw_readreg(sc, REG_GLOBAL, 1214 ATU_MAC_ADDR23); 1215 atu->mac_45 = e6000sw_readreg(sc, REG_GLOBAL, 1216 ATU_MAC_ADDR45); 1217 } 1218 } 1219 1220 return (0); 1221 } 1222 1223 static int 1224 e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag) 1225 { 1226 uint16_t ret; 1227 int retries; 1228 1229 if (flag == NO_OPERATION) 1230 return (0); 1231 1232 ret = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION); 1233 if (ret & ATU_UNIT_BUSY) { 1234 device_printf(dev, "Atu unit is busy, cannot flush\n"); 1235 return (EBUSY); 1236 } else { 1237 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret | 1238 ATU_UNIT_BUSY | flag)); 1239 retries = E6000SW_RETRIES; 1240 while (--retries & (e6000sw_readreg(sc, REG_GLOBAL, 1241 ATU_OPERATION) & ATU_UNIT_BUSY)) 1242 DELAY(1); 1243 1244 if (retries == 0) 1245 device_printf(dev, "Timeout while flushing\n"); 1246 } 1247 1248 return (0); 1249 } 1250