xref: /freebsd/sys/dev/etherswitch/e6000sw/e6000sw.c (revision b9f654b163bce26de79705e77b872427c9f2afa1)
1 /*-
2  * Copyright (c) 2015 Semihalf
3  * Copyright (c) 2015 Stormshield
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include <sys/param.h>
32 #include <sys/bus.h>
33 #include <sys/errno.h>
34 #include <sys/kernel.h>
35 #include <sys/kthread.h>
36 #include <sys/module.h>
37 #include <sys/socket.h>
38 #include <sys/sockio.h>
39 
40 #include <net/if.h>
41 #include <net/if_media.h>
42 #include <net/if_types.h>
43 
44 #include <dev/etherswitch/etherswitch.h>
45 #include <dev/mii/mii.h>
46 #include <dev/mii/miivar.h>
47 
48 #include <dev/ofw/ofw_bus.h>
49 #include <dev/ofw/ofw_bus_subr.h>
50 
51 #include "e6000swreg.h"
52 #include "etherswitch_if.h"
53 #include "miibus_if.h"
54 #include "mdio_if.h"
55 
56 MALLOC_DECLARE(M_E6000SW);
57 MALLOC_DEFINE(M_E6000SW, "e6000sw", "e6000sw switch");
58 
59 #define	E6000SW_LOCK(_sc)		sx_xlock(&(_sc)->sx)
60 #define	E6000SW_UNLOCK(_sc)		sx_unlock(&(_sc)->sx)
61 #define	E6000SW_LOCK_ASSERT(_sc, _what)	sx_assert(&(_sc)->sx, (_what))
62 #define	E6000SW_TRYLOCK(_sc)		sx_tryxlock(&(_sc)->sx)
63 
64 typedef struct e6000sw_softc {
65 	device_t		dev;
66 	phandle_t		node;
67 
68 	struct sx		sx;
69 	struct ifnet		*ifp[E6000SW_MAX_PORTS];
70 	char			*ifname[E6000SW_MAX_PORTS];
71 	device_t		miibus[E6000SW_MAX_PORTS];
72 	struct proc		*kproc;
73 
74 	uint32_t		swid;
75 	uint32_t		vlan_mode;
76 	uint32_t		cpuports_mask;
77 	uint32_t		fixed_mask;
78 	uint32_t		fixed25_mask;
79 	uint32_t		ports_mask;
80 	int			phy_base;
81 	int			sw_addr;
82 	int			num_ports;
83 	boolean_t		multi_chip;
84 } e6000sw_softc_t;
85 
86 static etherswitch_info_t etherswitch_info = {
87 	.es_nports =		0,
88 	.es_nvlangroups =	0,
89 	.es_vlan_caps =		ETHERSWITCH_VLAN_PORT,
90 	.es_name =		"Marvell 6000 series switch"
91 };
92 
93 static void e6000sw_identify(driver_t *, device_t);
94 static int e6000sw_probe(device_t);
95 static int e6000sw_parse_fixed_link(e6000sw_softc_t *, phandle_t, uint32_t);
96 static int e6000sw_parse_ethernet(e6000sw_softc_t *, phandle_t, uint32_t);
97 static int e6000sw_attach(device_t);
98 static int e6000sw_detach(device_t);
99 static int e6000sw_readphy(device_t, int, int);
100 static int e6000sw_writephy(device_t, int, int, int);
101 static etherswitch_info_t* e6000sw_getinfo(device_t);
102 static int e6000sw_getconf(device_t, etherswitch_conf_t *);
103 static void e6000sw_lock(device_t);
104 static void e6000sw_unlock(device_t);
105 static int e6000sw_getport(device_t, etherswitch_port_t *);
106 static int e6000sw_setport(device_t, etherswitch_port_t *);
107 static int e6000sw_readreg_wrapper(device_t, int);
108 static int e6000sw_writereg_wrapper(device_t, int, int);
109 static int e6000sw_readphy_wrapper(device_t, int, int);
110 static int e6000sw_writephy_wrapper(device_t, int, int, int);
111 static int e6000sw_getvgroup_wrapper(device_t, etherswitch_vlangroup_t *);
112 static int e6000sw_setvgroup_wrapper(device_t, etherswitch_vlangroup_t *);
113 static int e6000sw_setvgroup(device_t, etherswitch_vlangroup_t *);
114 static int e6000sw_getvgroup(device_t, etherswitch_vlangroup_t *);
115 static void e6000sw_setup(device_t, e6000sw_softc_t *);
116 static void e6000sw_port_vlan_conf(e6000sw_softc_t *);
117 static void e6000sw_tick(void *);
118 static void e6000sw_set_atustat(device_t, e6000sw_softc_t *, int, int);
119 static int e6000sw_atu_flush(device_t, e6000sw_softc_t *, int);
120 static __inline void e6000sw_writereg(e6000sw_softc_t *, int, int, int);
121 static __inline uint32_t e6000sw_readreg(e6000sw_softc_t *, int, int);
122 static int e6000sw_ifmedia_upd(struct ifnet *);
123 static void e6000sw_ifmedia_sts(struct ifnet *, struct ifmediareq *);
124 static int e6000sw_atu_mac_table(device_t, e6000sw_softc_t *, struct atu_opt *,
125     int);
126 static int e6000sw_get_pvid(e6000sw_softc_t *, int, int *);
127 static int e6000sw_set_pvid(e6000sw_softc_t *, int, int);
128 static __inline bool e6000sw_is_cpuport(e6000sw_softc_t *, int);
129 static __inline bool e6000sw_is_fixedport(e6000sw_softc_t *, int);
130 static __inline bool e6000sw_is_fixed25port(e6000sw_softc_t *, int);
131 static __inline bool e6000sw_is_phyport(e6000sw_softc_t *, int);
132 static __inline bool e6000sw_is_portenabled(e6000sw_softc_t *, int);
133 static __inline struct mii_data *e6000sw_miiforphy(e6000sw_softc_t *,
134     unsigned int);
135 
136 static device_method_t e6000sw_methods[] = {
137 	/* device interface */
138 	DEVMETHOD(device_identify,		e6000sw_identify),
139 	DEVMETHOD(device_probe,			e6000sw_probe),
140 	DEVMETHOD(device_attach,		e6000sw_attach),
141 	DEVMETHOD(device_detach,		e6000sw_detach),
142 
143 	/* bus interface */
144 	DEVMETHOD(bus_add_child,		device_add_child_ordered),
145 
146 	/* mii interface */
147 	DEVMETHOD(miibus_readreg,		e6000sw_readphy),
148 	DEVMETHOD(miibus_writereg,		e6000sw_writephy),
149 
150 	/* etherswitch interface */
151 	DEVMETHOD(etherswitch_getinfo,		e6000sw_getinfo),
152 	DEVMETHOD(etherswitch_getconf,		e6000sw_getconf),
153 	DEVMETHOD(etherswitch_lock,		e6000sw_lock),
154 	DEVMETHOD(etherswitch_unlock,		e6000sw_unlock),
155 	DEVMETHOD(etherswitch_getport,		e6000sw_getport),
156 	DEVMETHOD(etherswitch_setport,		e6000sw_setport),
157 	DEVMETHOD(etherswitch_readreg,		e6000sw_readreg_wrapper),
158 	DEVMETHOD(etherswitch_writereg,		e6000sw_writereg_wrapper),
159 	DEVMETHOD(etherswitch_readphyreg,	e6000sw_readphy_wrapper),
160 	DEVMETHOD(etherswitch_writephyreg,	e6000sw_writephy_wrapper),
161 	DEVMETHOD(etherswitch_setvgroup,	e6000sw_setvgroup_wrapper),
162 	DEVMETHOD(etherswitch_getvgroup,	e6000sw_getvgroup_wrapper),
163 
164 	DEVMETHOD_END
165 };
166 
167 static devclass_t e6000sw_devclass;
168 
169 DEFINE_CLASS_0(e6000sw, e6000sw_driver, e6000sw_methods,
170     sizeof(e6000sw_softc_t));
171 
172 DRIVER_MODULE(e6000sw, mdio, e6000sw_driver, e6000sw_devclass, 0, 0);
173 DRIVER_MODULE(etherswitch, e6000sw, etherswitch_driver, etherswitch_devclass, 0,
174     0);
175 DRIVER_MODULE(miibus, e6000sw, miibus_driver, miibus_devclass, 0, 0);
176 MODULE_DEPEND(e6000sw, mdio, 1, 1, 1);
177 
178 #define	SMI_CMD			0
179 #define	SMI_CMD_BUSY		(1 << 15)
180 #define	SMI_CMD_OP_READ		((2 << 10) | SMI_CMD_BUSY | (1 << 12))
181 #define	SMI_CMD_OP_WRITE	((1 << 10) | SMI_CMD_BUSY | (1 << 12))
182 #define	SMI_DATA		1
183 
184 #define	MDIO_READ(dev, addr, reg)					\
185 	MDIO_READREG(device_get_parent(dev), (addr), (reg))
186 #define	MDIO_WRITE(dev, addr, reg, val)					\
187 	MDIO_WRITEREG(device_get_parent(dev), (addr), (reg), (val))
188 
189 static void
190 e6000sw_identify(driver_t *driver, device_t parent)
191 {
192 
193 	if (device_find_child(parent, "e6000sw", -1) == NULL)
194 		BUS_ADD_CHILD(parent, 0, "e6000sw", -1);
195 }
196 
197 static int
198 e6000sw_probe(device_t dev)
199 {
200 	e6000sw_softc_t *sc;
201 	const char *description;
202 	phandle_t switch_node;
203 
204 	switch_node = ofw_bus_find_compatible(OF_finddevice("/"),
205 	    "marvell,mv88e6085");
206 
207 	if (switch_node == 0)
208 		return (ENXIO);
209 
210 	if (bootverbose)
211 		device_printf(dev, "Found switch_node: 0x%x\n", switch_node);
212 
213 	sc = device_get_softc(dev);
214 	sc->dev = dev;
215 	sc->node = switch_node;
216 
217 	if (OF_getencprop(sc->node, "reg", &sc->sw_addr,
218 	    sizeof(sc->sw_addr)) < 0)
219 		return (ENXIO);
220 
221 	/*
222 	 * According to the Linux source code, all of the Switch IDs we support
223 	 * are multi_chip capable, and should go into multi-chip mode if the
224 	 * sw_addr != 0.
225 	 */
226 	if (!OF_hasprop(sc->node, "single-chip-addressing") && sc->sw_addr != 0)
227 		sc->multi_chip = true;
228 
229 	/*
230 	 * Create temporary lock, just to satisfy assertions,
231 	 * when obtaining the switch ID. Destroy immediately afterwards.
232 	 */
233 	sx_init(&sc->sx, "e6000sw_tmp");
234 	E6000SW_LOCK(sc);
235 	sc->swid = e6000sw_readreg(sc, REG_PORT(0), SWITCH_ID) & 0xfff0;
236 	E6000SW_UNLOCK(sc);
237 	sx_destroy(&sc->sx);
238 
239 	switch (sc->swid) {
240 	case MV88E6141:
241 		description = "Marvell 88E6141";
242 		sc->phy_base = 0x10;
243 		sc->num_ports = 6;
244 		break;
245 	case MV88E6341:
246 		description = "Marvell 88E6341";
247 		sc->phy_base = 0x10;
248 		sc->num_ports = 6;
249 		break;
250 	case MV88E6352:
251 		description = "Marvell 88E6352";
252 		sc->num_ports = 7;
253 		break;
254 	case MV88E6172:
255 		description = "Marvell 88E6172";
256 		sc->num_ports = 7;
257 		break;
258 	case MV88E6176:
259 		description = "Marvell 88E6176";
260 		sc->num_ports = 7;
261 		break;
262 	default:
263 		device_printf(dev, "Unrecognized device, id 0x%x.\n", sc->swid);
264 		return (ENXIO);
265 	}
266 
267 	device_set_desc(dev, description);
268 
269 	return (BUS_PROBE_DEFAULT);
270 }
271 
272 static int
273 e6000sw_parse_fixed_link(e6000sw_softc_t *sc, phandle_t node, uint32_t port)
274 {
275 	int speed;
276 	phandle_t fixed_link;
277 
278 	fixed_link = ofw_bus_find_child(node, "fixed-link");
279 
280 	if (fixed_link != 0) {
281 		sc->fixed_mask |= (1 << port);
282 
283 		if (OF_getencprop(fixed_link, "speed", &speed, sizeof(speed))> 0) {
284 			if (speed == 2500 &&
285 			    (MVSWITCH(sc, MV88E6141) ||
286 			     MVSWITCH(sc, MV88E6341)))
287 				sc->fixed25_mask |= (1 << port);
288 		} else {
289 		    device_printf(sc->dev,
290 			    "Port %d has a fixed-link node without a speed "
291 			    "property\n", port);
292 
293 		    return (ENXIO);
294 		}
295 	}
296 
297 	return (0);
298 }
299 
300 static int
301 e6000sw_parse_ethernet(e6000sw_softc_t *sc, phandle_t port_handle, uint32_t port) {
302 	phandle_t switch_eth, switch_eth_handle;
303 
304 	if (OF_getencprop(port_handle, "ethernet", (void*)&switch_eth_handle,
305 	    sizeof(switch_eth_handle)) > 0) {
306 		if (switch_eth_handle > 0) {
307 			switch_eth = OF_node_from_xref(switch_eth_handle);
308 
309 			device_printf(sc->dev, "CPU port at %d\n", port);
310 			sc->cpuports_mask |= (1 << port);
311 
312 			return (e6000sw_parse_fixed_link(sc, switch_eth, port));
313 		} else
314 			device_printf(sc->dev,
315 				"Port %d has ethernet property but it points "
316 				"to an invalid location\n", port);
317 	}
318 
319 	return (0);
320 }
321 
322 static int
323 e6000sw_parse_child_fdt(e6000sw_softc_t *sc, phandle_t child, int *pport)
324 {
325 	uint32_t port;
326 
327 	if (pport == NULL)
328 		return (ENXIO);
329 
330 	if (OF_getencprop(child, "reg", (void *)&port, sizeof(port)) < 0)
331 		return (ENXIO);
332 	if (port >= sc->num_ports)
333 		return (ENXIO);
334 	*pport = port;
335 
336 	if (e6000sw_parse_fixed_link(sc, child, port) != 0)
337 		return (ENXIO);
338 
339 	if (e6000sw_parse_ethernet(sc, child, port) != 0)
340 		return (ENXIO);
341 
342 	if ((sc->fixed_mask & (1 << port)) != 0)
343 		device_printf(sc->dev, "fixed port at %d\n", port);
344 	else
345 		device_printf(sc->dev, "PHY at port %d\n", port);
346 
347 	return (0);
348 }
349 
350 static int
351 e6000sw_init_interface(e6000sw_softc_t *sc, int port)
352 {
353 	char name[IFNAMSIZ];
354 
355 	snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->dev));
356 
357 	sc->ifp[port] = if_alloc(IFT_ETHER);
358 	if (sc->ifp[port] == NULL)
359 		return (ENOMEM);
360 	sc->ifp[port]->if_softc = sc;
361 	sc->ifp[port]->if_flags |= IFF_UP | IFF_BROADCAST |
362 	    IFF_DRV_RUNNING | IFF_SIMPLEX;
363 	sc->ifname[port] = malloc(strlen(name) + 1, M_E6000SW, M_NOWAIT);
364 	if (sc->ifname[port] == NULL) {
365 		if_free(sc->ifp[port]);
366 		return (ENOMEM);
367 	}
368 	memcpy(sc->ifname[port], name, strlen(name) + 1);
369 	if_initname(sc->ifp[port], sc->ifname[port], port);
370 
371 	return (0);
372 }
373 
374 static int
375 e6000sw_attach_miibus(e6000sw_softc_t *sc, int port)
376 {
377 	int err;
378 
379 	err = mii_attach(sc->dev, &sc->miibus[port], sc->ifp[port],
380 	    e6000sw_ifmedia_upd, e6000sw_ifmedia_sts, BMSR_DEFCAPMASK,
381 	    port + sc->phy_base, MII_OFFSET_ANY, 0);
382 	if (err != 0)
383 		return (err);
384 
385 	return (0);
386 }
387 
388 static int
389 e6000sw_attach(device_t dev)
390 {
391 	e6000sw_softc_t *sc;
392 	phandle_t child, ports;
393 	int err, port;
394 	uint32_t reg;
395 
396 	err = 0;
397 	sc = device_get_softc(dev);
398 
399 	if (sc->multi_chip)
400 		device_printf(dev, "multi-chip addressing mode\n");
401 	else
402 		device_printf(dev, "single-chip addressing mode\n");
403 
404 	sx_init(&sc->sx, "e6000sw");
405 
406 	E6000SW_LOCK(sc);
407 	e6000sw_setup(dev, sc);
408 
409 	ports = ofw_bus_find_child(sc->node, "ports");
410 
411 	if (ports == 0) {
412 		device_printf(dev, "failed to parse DTS: no ports found for "
413 		    "switch\n");
414 		return (ENXIO);
415 	}
416 
417 	for (child = OF_child(ports); child != 0; child = OF_peer(child)) {
418 		err = e6000sw_parse_child_fdt(sc, child, &port);
419 		if (err != 0) {
420 			device_printf(sc->dev, "failed to parse DTS\n");
421 			goto out_fail;
422 		}
423 
424 		/* Port is in use. */
425 		sc->ports_mask |= (1 << port);
426 
427 		err = e6000sw_init_interface(sc, port);
428 		if (err != 0) {
429 			device_printf(sc->dev, "failed to init interface\n");
430 			goto out_fail;
431 		}
432 
433 		if (e6000sw_is_fixedport(sc, port)) {
434 			/* Link must be down to change speed force value. */
435 			reg = e6000sw_readreg(sc, REG_PORT(port), PSC_CONTROL);
436 			reg &= ~PSC_CONTROL_LINK_UP;
437 			reg |= PSC_CONTROL_FORCED_LINK;
438 			e6000sw_writereg(sc, REG_PORT(port), PSC_CONTROL, reg);
439 
440 			/*
441 			 * Force speed, full-duplex, EEE off and flow-control
442 			 * on.
443 			 */
444 			reg &= ~(PSC_CONTROL_SPD2500 | PSC_CONTROL_ALT_SPD |
445 			    PSC_CONTROL_FORCED_EEE);
446 			if (e6000sw_is_fixed25port(sc, port))
447 				reg |= PSC_CONTROL_SPD2500;
448 			else
449 				reg |= PSC_CONTROL_SPD1000;
450 			reg |= PSC_CONTROL_FORCED_DPX | PSC_CONTROL_FULLDPX |
451 			    PSC_CONTROL_FORCED_LINK | PSC_CONTROL_LINK_UP |
452 			    PSC_CONTROL_FORCED_FC | PSC_CONTROL_FC_ON |
453 			    PSC_CONTROL_FORCED_SPD;
454 			if (MVSWITCH(sc, MV88E6141) || MVSWITCH(sc, MV88E6341))
455 			    reg |= PSC_CONTROL_FORCED_EEE;
456 			e6000sw_writereg(sc, REG_PORT(port), PSC_CONTROL, reg);
457 		}
458 
459 		/* Don't attach miibus at CPU/fixed ports */
460 		if (!e6000sw_is_phyport(sc, port))
461 			continue;
462 
463 		err = e6000sw_attach_miibus(sc, port);
464 		if (err != 0) {
465 			device_printf(sc->dev, "failed to attach miibus\n");
466 			goto out_fail;
467 		}
468 	}
469 
470 	etherswitch_info.es_nports = sc->num_ports;
471 
472 	/* Default to port vlan. */
473 	e6000sw_port_vlan_conf(sc);
474 	E6000SW_UNLOCK(sc);
475 
476 	bus_generic_probe(dev);
477 	bus_generic_attach(dev);
478 
479 	kproc_create(e6000sw_tick, sc, &sc->kproc, 0, 0, "e6000sw tick kproc");
480 
481 	return (0);
482 
483 out_fail:
484 	E6000SW_UNLOCK(sc);
485 	e6000sw_detach(dev);
486 
487 	return (err);
488 }
489 
490 static __inline int
491 e6000sw_poll_done(e6000sw_softc_t *sc)
492 {
493 	int i;
494 
495 	for (i = 0; i < E6000SW_SMI_TIMEOUT; i++) {
496 
497 		if ((e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG) &
498 		    (1 << PHY_CMD_SMI_BUSY)) == 0)
499 			return (0);
500 
501 		pause("e6000sw PHY poll", hz/1000);
502 	}
503 
504 	return (ETIMEDOUT);
505 }
506 
507 /*
508  * PHY registers are paged. Put page index in reg 22 (accessible from every
509  * page), then access specific register.
510  */
511 static int
512 e6000sw_readphy(device_t dev, int phy, int reg)
513 {
514 	e6000sw_softc_t *sc;
515 	uint32_t val;
516 	int err;
517 
518 	sc = device_get_softc(dev);
519 	if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
520 		device_printf(dev, "Wrong register address.\n");
521 		return (EINVAL);
522 	}
523 
524 	E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
525 
526 	err = e6000sw_poll_done(sc);
527 	if (err != 0) {
528 		device_printf(dev, "Timeout while waiting for switch\n");
529 		return (err);
530 	}
531 
532 	val = 1 << PHY_CMD_SMI_BUSY;
533 	val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE;
534 	val |= PHY_CMD_OPCODE_READ << PHY_CMD_OPCODE;
535 	val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK;
536 	val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK;
537 	e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val);
538 
539 	err = e6000sw_poll_done(sc);
540 	if (err != 0) {
541 		device_printf(dev, "Timeout while waiting for switch\n");
542 		return (err);
543 	}
544 
545 	val = e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG);
546 
547 	return (val & PHY_DATA_MASK);
548 }
549 
550 static int
551 e6000sw_writephy(device_t dev, int phy, int reg, int data)
552 {
553 	e6000sw_softc_t *sc;
554 	uint32_t val;
555 	int err;
556 
557 	sc = device_get_softc(dev);
558 	if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
559 		device_printf(dev, "Wrong register address.\n");
560 		return (EINVAL);
561 	}
562 
563 	E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
564 
565 	err = e6000sw_poll_done(sc);
566 	if (err != 0) {
567 		device_printf(dev, "Timeout while waiting for switch\n");
568 		return (err);
569 	}
570 
571 	val = 1 << PHY_CMD_SMI_BUSY;
572 	val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE;
573 	val |= PHY_CMD_OPCODE_WRITE << PHY_CMD_OPCODE;
574 	val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK;
575 	val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK;
576 	e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG,
577 	    data & PHY_DATA_MASK);
578 	e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val);
579 
580 	err = e6000sw_poll_done(sc);
581 	if (err != 0)
582 		device_printf(dev, "Timeout while waiting for switch\n");
583 
584 	return (err);
585 }
586 
587 static int
588 e6000sw_detach(device_t dev)
589 {
590 	int phy;
591 	e6000sw_softc_t *sc;
592 
593 	sc = device_get_softc(dev);
594 	bus_generic_detach(dev);
595 	sx_destroy(&sc->sx);
596 	for (phy = 0; phy < sc->num_ports; phy++) {
597 		if (sc->miibus[phy] != NULL)
598 			device_delete_child(dev, sc->miibus[phy]);
599 		if (sc->ifp[phy] != NULL)
600 			if_free(sc->ifp[phy]);
601 		if (sc->ifname[phy] != NULL)
602 			free(sc->ifname[phy], M_E6000SW);
603 	}
604 
605 	return (0);
606 }
607 
608 static etherswitch_info_t*
609 e6000sw_getinfo(device_t dev)
610 {
611 
612 	return (&etherswitch_info);
613 }
614 
615 static int
616 e6000sw_getconf(device_t dev, etherswitch_conf_t *conf)
617 {
618 	struct e6000sw_softc *sc;
619 
620 	/* Return the VLAN mode. */
621 	sc = device_get_softc(dev);
622 	conf->cmd = ETHERSWITCH_CONF_VLAN_MODE;
623 	conf->vlan_mode = sc->vlan_mode;
624 
625 	return (0);
626 }
627 
628 static void
629 e6000sw_lock(device_t dev)
630 {
631 	struct e6000sw_softc *sc;
632 
633 	sc = device_get_softc(dev);
634 
635 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
636 	E6000SW_LOCK(sc);
637 }
638 
639 static void
640 e6000sw_unlock(device_t dev)
641 {
642 	struct e6000sw_softc *sc;
643 
644 	sc = device_get_softc(dev);
645 
646 	E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
647 	E6000SW_UNLOCK(sc);
648 }
649 
650 static int
651 e6000sw_getport(device_t dev, etherswitch_port_t *p)
652 {
653 	struct mii_data *mii;
654 	int err;
655 	struct ifmediareq *ifmr;
656 
657 	e6000sw_softc_t *sc = device_get_softc(dev);
658 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
659 
660 	if (p->es_port >= sc->num_ports || p->es_port < 0)
661 		return (EINVAL);
662 	if (!e6000sw_is_portenabled(sc, p->es_port))
663 		return (0);
664 
665 	err = 0;
666 	E6000SW_LOCK(sc);
667 	e6000sw_get_pvid(sc, p->es_port, &p->es_pvid);
668 
669 	if (e6000sw_is_fixedport(sc, p->es_port)) {
670 		if (e6000sw_is_cpuport(sc, p->es_port))
671 			p->es_flags |= ETHERSWITCH_PORT_CPU;
672 		ifmr = &p->es_ifmr;
673 		ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
674 		ifmr->ifm_count = 0;
675 		if (e6000sw_is_fixed25port(sc, p->es_port))
676 			ifmr->ifm_active = IFM_2500_T;
677 		else
678 			ifmr->ifm_active = IFM_1000_T;
679 		ifmr->ifm_active |= IFM_ETHER | IFM_FDX;
680 		ifmr->ifm_current = ifmr->ifm_active;
681 		ifmr->ifm_mask = 0;
682 	} else {
683 		mii = e6000sw_miiforphy(sc, p->es_port);
684 		err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
685 		    &mii->mii_media, SIOCGIFMEDIA);
686 	}
687 	E6000SW_UNLOCK(sc);
688 
689 	return (err);
690 }
691 
692 static int
693 e6000sw_setport(device_t dev, etherswitch_port_t *p)
694 {
695 	e6000sw_softc_t *sc;
696 	int err;
697 	struct mii_data *mii;
698 
699 	sc = device_get_softc(dev);
700 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
701 
702 	if (p->es_port >= sc->num_ports || p->es_port < 0)
703 		return (EINVAL);
704 	if (!e6000sw_is_portenabled(sc, p->es_port))
705 		return (0);
706 
707 	err = 0;
708 	E6000SW_LOCK(sc);
709 	if (p->es_pvid != 0)
710 		e6000sw_set_pvid(sc, p->es_port, p->es_pvid);
711 	if (e6000sw_is_phyport(sc, p->es_port)) {
712 		mii = e6000sw_miiforphy(sc, p->es_port);
713 		err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, &mii->mii_media,
714 		    SIOCSIFMEDIA);
715 	}
716 	E6000SW_UNLOCK(sc);
717 
718 	return (err);
719 }
720 
721 /*
722  * Registers in this switch are divided into sections, specified in
723  * documentation. So as to access any of them, section index and reg index
724  * is necessary. etherswitchcfg uses only one variable, so indexes were
725  * compressed into addr_reg: 32 * section_index + reg_index.
726  */
727 static int
728 e6000sw_readreg_wrapper(device_t dev, int addr_reg)
729 {
730 
731 	if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
732 	    (addr_reg < (REG_PORT(0) * 32))) {
733 		device_printf(dev, "Wrong register address.\n");
734 		return (EINVAL);
735 	}
736 
737 	return (e6000sw_readreg(device_get_softc(dev), addr_reg / 32,
738 	    addr_reg % 32));
739 }
740 
741 static int
742 e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val)
743 {
744 
745 	if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
746 	    (addr_reg < (REG_PORT(0) * 32))) {
747 		device_printf(dev, "Wrong register address.\n");
748 		return (EINVAL);
749 	}
750 	e6000sw_writereg(device_get_softc(dev), addr_reg / 5,
751 	    addr_reg % 32, val);
752 
753 	return (0);
754 }
755 
756 /*
757  * These wrappers are necessary because PHY accesses from etherswitchcfg
758  * need to be synchronized with locks, while miibus PHY accesses do not.
759  */
760 static int
761 e6000sw_readphy_wrapper(device_t dev, int phy, int reg)
762 {
763 	e6000sw_softc_t *sc;
764 	int ret;
765 
766 	sc = device_get_softc(dev);
767 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
768 
769 	E6000SW_LOCK(sc);
770 	ret = e6000sw_readphy(dev, phy, reg);
771 	E6000SW_UNLOCK(sc);
772 
773 	return (ret);
774 }
775 
776 static int
777 e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data)
778 {
779 	e6000sw_softc_t *sc;
780 	int ret;
781 
782 	sc = device_get_softc(dev);
783 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
784 
785 	E6000SW_LOCK(sc);
786 	ret = e6000sw_writephy(dev, phy, reg, data);
787 	E6000SW_UNLOCK(sc);
788 
789 	return (ret);
790 }
791 
792 /*
793  * setvgroup/getvgroup called from etherswitchfcg need to be locked,
794  * while internal calls do not.
795  */
796 static int
797 e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
798 {
799 	e6000sw_softc_t *sc;
800 	int ret;
801 
802 	sc = device_get_softc(dev);
803 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
804 
805 	E6000SW_LOCK(sc);
806 	ret = e6000sw_setvgroup(dev, vg);
807 	E6000SW_UNLOCK(sc);
808 
809 	return (ret);
810 }
811 
812 static int
813 e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
814 {
815 	e6000sw_softc_t *sc;
816 	int ret;
817 
818 	sc = device_get_softc(dev);
819 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
820 
821 	E6000SW_LOCK(sc);
822 	ret = e6000sw_getvgroup(dev, vg);
823 	E6000SW_UNLOCK(sc);
824 
825 	return (ret);
826 }
827 
828 static __inline void
829 e6000sw_port_vlan_assign(e6000sw_softc_t *sc, int port, uint32_t fid,
830     uint32_t members)
831 {
832 	uint32_t reg;
833 
834 	reg = e6000sw_readreg(sc, REG_PORT(port), PORT_VLAN_MAP);
835 	reg &= ~PORT_VLAN_MAP_TABLE_MASK;
836 	reg &= ~PORT_VLAN_MAP_FID_MASK;
837 	reg |= members & PORT_VLAN_MAP_TABLE_MASK & ~(1 << port);
838 	reg |= (fid << PORT_VLAN_MAP_FID) & PORT_VLAN_MAP_FID_MASK;
839 	e6000sw_writereg(sc, REG_PORT(port), PORT_VLAN_MAP, reg);
840 	reg = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL_1);
841 	reg &= ~PORT_CONTROL_1_FID_MASK;
842 	reg |= (fid >> 4) & PORT_CONTROL_1_FID_MASK;
843 	e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL_1, reg);
844 }
845 
846 static int
847 e6000sw_set_port_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg)
848 {
849 	uint32_t port;
850 
851 	port = vg->es_vlangroup;
852 	if (port > sc->num_ports)
853 		return (EINVAL);
854 
855 	if (vg->es_member_ports != vg->es_untagged_ports) {
856 		device_printf(sc->dev, "Tagged ports not supported.\n");
857 		return (EINVAL);
858 	}
859 
860 	e6000sw_port_vlan_assign(sc, port, port + 1, vg->es_untagged_ports);
861 	vg->es_vid = port | ETHERSWITCH_VID_VALID;
862 
863 	return (0);
864 }
865 
866 static int
867 e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
868 {
869 	e6000sw_softc_t *sc;
870 
871 	sc = device_get_softc(dev);
872 	E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
873 
874 	if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT)
875 		return (e6000sw_set_port_vlan(sc, vg));
876 
877 	return (EINVAL);
878 }
879 
880 static int
881 e6000sw_get_port_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg)
882 {
883 	uint32_t port, reg;
884 
885 	port = vg->es_vlangroup;
886 	if (port > sc->num_ports)
887 		return (EINVAL);
888 
889 	if (!e6000sw_is_portenabled(sc, port)) {
890 		vg->es_vid = port;
891 		return (0);
892 	}
893 
894 	reg = e6000sw_readreg(sc, REG_PORT(port), PORT_VLAN_MAP);
895 	vg->es_untagged_ports = vg->es_member_ports =
896 	    reg & PORT_VLAN_MAP_TABLE_MASK;
897 	vg->es_vid = port | ETHERSWITCH_VID_VALID;
898 	vg->es_fid = (reg & PORT_VLAN_MAP_FID_MASK) >> PORT_VLAN_MAP_FID;
899 	reg = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL_1);
900 	vg->es_fid |= (reg & PORT_CONTROL_1_FID_MASK) << 4;
901 
902 	return (0);
903 }
904 
905 static int
906 e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
907 {
908 	e6000sw_softc_t *sc;
909 
910 	sc = device_get_softc(dev);
911 	E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
912 
913 	if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT)
914 		return (e6000sw_get_port_vlan(sc, vg));
915 
916 	return (EINVAL);
917 }
918 
919 static __inline struct mii_data*
920 e6000sw_miiforphy(e6000sw_softc_t *sc, unsigned int phy)
921 {
922 
923 	if (!e6000sw_is_phyport(sc, phy))
924 		return (NULL);
925 
926 	return (device_get_softc(sc->miibus[phy]));
927 }
928 
929 static int
930 e6000sw_ifmedia_upd(struct ifnet *ifp)
931 {
932 	e6000sw_softc_t *sc;
933 	struct mii_data *mii;
934 
935 	sc = ifp->if_softc;
936 	mii = e6000sw_miiforphy(sc, ifp->if_dunit);
937 	if (mii == NULL)
938 		return (ENXIO);
939 	mii_mediachg(mii);
940 
941 	return (0);
942 }
943 
944 static void
945 e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
946 {
947 	e6000sw_softc_t *sc;
948 	struct mii_data *mii;
949 
950 	sc = ifp->if_softc;
951 	mii = e6000sw_miiforphy(sc, ifp->if_dunit);
952 
953 	if (mii == NULL)
954 		return;
955 
956 	mii_pollstat(mii);
957 	ifmr->ifm_active = mii->mii_media_active;
958 	ifmr->ifm_status = mii->mii_media_status;
959 }
960 
961 static int
962 e6000sw_smi_waitready(e6000sw_softc_t *sc, int phy)
963 {
964 	int i;
965 
966 	for (i = 0; i < E6000SW_SMI_TIMEOUT; i++) {
967 		if ((MDIO_READ(sc->dev, phy, SMI_CMD) & SMI_CMD_BUSY) == 0)
968 			return (0);
969 		DELAY(1);
970 	}
971 
972 	return (1);
973 }
974 
975 static __inline uint32_t
976 e6000sw_readreg(e6000sw_softc_t *sc, int addr, int reg)
977 {
978 
979 	E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
980 
981 	if (!sc->multi_chip)
982 		return (MDIO_READ(sc->dev, addr, reg) & 0xffff);
983 
984 	if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
985 		printf("e6000sw: readreg timeout\n");
986 		return (0xffff);
987 	}
988 	MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD,
989 	    SMI_CMD_OP_READ | (addr << 5) | reg);
990 	if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
991 		printf("e6000sw: readreg timeout\n");
992 		return (0xffff);
993 	}
994 
995 	return (MDIO_READ(sc->dev, sc->sw_addr, SMI_DATA) & 0xffff);
996 }
997 
998 static __inline void
999 e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, int val)
1000 {
1001 
1002 	E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
1003 
1004 	if (!sc->multi_chip) {
1005 		MDIO_WRITE(sc->dev, addr, reg, val);
1006 		return;
1007 	}
1008 
1009 	if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
1010 		printf("e6000sw: readreg timeout\n");
1011 		return;
1012 	}
1013 	MDIO_WRITE(sc->dev, sc->sw_addr, SMI_DATA, val);
1014 	MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD,
1015 	    SMI_CMD_OP_WRITE | (addr << 5) | reg);
1016 	if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
1017 		printf("e6000sw: readreg timeout\n");
1018 		return;
1019 	}
1020 }
1021 
1022 static __inline bool
1023 e6000sw_is_cpuport(e6000sw_softc_t *sc, int port)
1024 {
1025 
1026 	return ((sc->cpuports_mask & (1 << port)) ? true : false);
1027 }
1028 
1029 static __inline bool
1030 e6000sw_is_fixedport(e6000sw_softc_t *sc, int port)
1031 {
1032 
1033 	return ((sc->fixed_mask & (1 << port)) ? true : false);
1034 }
1035 
1036 static __inline bool
1037 e6000sw_is_fixed25port(e6000sw_softc_t *sc, int port)
1038 {
1039 
1040 	return ((sc->fixed25_mask & (1 << port)) ? true : false);
1041 }
1042 
1043 static __inline bool
1044 e6000sw_is_phyport(e6000sw_softc_t *sc, int port)
1045 {
1046 	uint32_t phy_mask;
1047 	phy_mask = ~(sc->fixed_mask | sc->cpuports_mask);
1048 
1049 	return ((phy_mask & (1 << port)) ? true : false);
1050 }
1051 
1052 static __inline bool
1053 e6000sw_is_portenabled(e6000sw_softc_t *sc, int port)
1054 {
1055 
1056 	return ((sc->ports_mask & (1 << port)) ? true : false);
1057 }
1058 
1059 static __inline int
1060 e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid)
1061 {
1062 
1063 	e6000sw_writereg(sc, REG_PORT(port), PORT_VID, pvid &
1064 	    PORT_VID_DEF_VID_MASK);
1065 
1066 	return (0);
1067 }
1068 
1069 static __inline int
1070 e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid)
1071 {
1072 
1073 	if (pvid == NULL)
1074 		return (ENXIO);
1075 
1076 	*pvid = e6000sw_readreg(sc, REG_PORT(port), PORT_VID) &
1077 	    PORT_VID_DEF_VID_MASK;
1078 
1079 	return (0);
1080 }
1081 
1082 /*
1083  * Convert port status to ifmedia.
1084  */
1085 static void
1086 e6000sw_update_ifmedia(uint16_t portstatus, u_int *media_status, u_int *media_active)
1087 {
1088 	*media_active = IFM_ETHER;
1089 	*media_status = IFM_AVALID;
1090 
1091 	if ((portstatus & PORT_STATUS_LINK_MASK) != 0)
1092 		*media_status |= IFM_ACTIVE;
1093 	else {
1094 		*media_active |= IFM_NONE;
1095 		return;
1096 	}
1097 
1098 	switch (portstatus & PORT_STATUS_SPEED_MASK) {
1099 	case PORT_STATUS_SPEED_10:
1100 		*media_active |= IFM_10_T;
1101 		break;
1102 	case PORT_STATUS_SPEED_100:
1103 		*media_active |= IFM_100_TX;
1104 		break;
1105 	case PORT_STATUS_SPEED_1000:
1106 		*media_active |= IFM_1000_T;
1107 		break;
1108 	}
1109 
1110 	if ((portstatus & PORT_STATUS_DUPLEX_MASK) == 0)
1111 		*media_active |= IFM_FDX;
1112 	else
1113 		*media_active |= IFM_HDX;
1114 }
1115 
1116 static void
1117 e6000sw_tick (void *arg)
1118 {
1119 	e6000sw_softc_t *sc;
1120 	struct mii_data *mii;
1121 	struct mii_softc *miisc;
1122 	uint16_t portstatus;
1123 	int port;
1124 
1125 	sc = arg;
1126 
1127 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
1128 
1129 	for (;;) {
1130 		E6000SW_LOCK(sc);
1131 		for (port = 0; port < sc->num_ports; port++) {
1132 			/* Tick only on PHY ports */
1133 			if (!e6000sw_is_portenabled(sc, port) ||
1134 			    !e6000sw_is_phyport(sc, port))
1135 				continue;
1136 
1137 			mii = e6000sw_miiforphy(sc, port);
1138 			if (mii == NULL)
1139 				continue;
1140 
1141 			portstatus = e6000sw_readreg(sc, REG_PORT(port),
1142 			    PORT_STATUS);
1143 
1144 			e6000sw_update_ifmedia(portstatus,
1145 			    &mii->mii_media_status, &mii->mii_media_active);
1146 
1147 			LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
1148 				if (IFM_INST(mii->mii_media.ifm_cur->ifm_media)
1149 				    != miisc->mii_inst)
1150 					continue;
1151 				mii_phy_update(miisc, MII_POLLSTAT);
1152 			}
1153 		}
1154 		E6000SW_UNLOCK(sc);
1155 		pause("e6000sw tick", 1000);
1156 	}
1157 }
1158 
1159 static void
1160 e6000sw_setup(device_t dev, e6000sw_softc_t *sc)
1161 {
1162 	uint16_t atu_ctrl, atu_age;
1163 
1164 	/* Set aging time */
1165 	e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL,
1166 	    (E6000SW_DEFAULT_AGETIME << ATU_CONTROL_AGETIME) |
1167 	    (1 << ATU_CONTROL_LEARN2ALL));
1168 
1169 	/* Send all with specific mac address to cpu port */
1170 	e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_2x, MGMT_EN_ALL);
1171 	e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_0x, MGMT_EN_ALL);
1172 
1173 	/* Disable Remote Management */
1174 	e6000sw_writereg(sc, REG_GLOBAL, SWITCH_GLOBAL_CONTROL2, 0);
1175 
1176 	/* Disable loopback filter and flow control messages */
1177 	e6000sw_writereg(sc, REG_GLOBAL2, SWITCH_MGMT,
1178 	    SWITCH_MGMT_PRI_MASK |
1179 	    (1 << SWITCH_MGMT_RSVD2CPU) |
1180 	    SWITCH_MGMT_FC_PRI_MASK |
1181 	    (1 << SWITCH_MGMT_FORCEFLOW));
1182 
1183 	e6000sw_atu_flush(dev, sc, NO_OPERATION);
1184 	e6000sw_atu_mac_table(dev, sc, NULL, NO_OPERATION);
1185 	e6000sw_set_atustat(dev, sc, 0, COUNT_ALL);
1186 
1187 	/* Set ATU AgeTime to 15 seconds */
1188 	atu_age = 1;
1189 
1190 	atu_ctrl = e6000sw_readreg(sc, REG_GLOBAL, ATU_CONTROL);
1191 
1192 	/* Set new AgeTime field */
1193 	atu_ctrl &= ~ATU_CONTROL_AGETIME_MASK;
1194 	e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL, atu_ctrl |
1195 	    (atu_age << ATU_CONTROL_AGETIME));
1196 }
1197 
1198 static void
1199 e6000sw_port_vlan_conf(e6000sw_softc_t *sc)
1200 {
1201 	int i, port, ret;
1202 	uint32_t members;
1203 
1204 	/* Disable all ports */
1205 	for (port = 0; port < sc->num_ports; port++) {
1206 		ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL);
1207 		e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL,
1208 		    (ret & ~PORT_CONTROL_ENABLE));
1209 	}
1210 
1211 	/* Set port priority */
1212 	for (port = 0; port < sc->num_ports; port++) {
1213 		if (!e6000sw_is_portenabled(sc, port))
1214 			continue;
1215 		ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID);
1216 		ret &= ~PORT_VID_PRIORITY_MASK;
1217 		e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret);
1218 	}
1219 
1220 	/* Set VID map */
1221 	for (port = 0; port < sc->num_ports; port++) {
1222 		if (!e6000sw_is_portenabled(sc, port))
1223 			continue;
1224 		ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID);
1225 		ret &= ~PORT_VID_DEF_VID_MASK;
1226 		ret |= (port + 1);
1227 		e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret);
1228 	}
1229 
1230 	/* Enable all ports */
1231 	for (port = 0; port < sc->num_ports; port++) {
1232 		if (!e6000sw_is_portenabled(sc, port))
1233 			continue;
1234 		ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL);
1235 		e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL,
1236 		    (ret | PORT_CONTROL_ENABLE));
1237 	}
1238 
1239 	/* Set VLAN mode. */
1240 	sc->vlan_mode = ETHERSWITCH_VLAN_PORT;
1241 	etherswitch_info.es_nvlangroups = sc->num_ports;
1242 	for (port = 0; port < sc->num_ports; port++) {
1243 		members = 0;
1244 		if (e6000sw_is_portenabled(sc, port)) {
1245 			for (i = 0; i < sc->num_ports; i++) {
1246 				if (i == port || !e6000sw_is_portenabled(sc, i))
1247 					continue;
1248 				members |= (1 << i);
1249 			}
1250 		}
1251 		e6000sw_port_vlan_assign(sc, port, port + 1, members);
1252 	}
1253 }
1254 
1255 static void
1256 e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin, int flag)
1257 {
1258 	uint16_t ret;
1259 
1260 	ret = e6000sw_readreg(sc, REG_GLOBAL2, ATU_STATS);
1261 	e6000sw_writereg(sc, REG_GLOBAL2, ATU_STATS, (bin << ATU_STATS_BIN ) |
1262 	    (flag << ATU_STATS_FLAG));
1263 }
1264 
1265 static int
1266 e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct atu_opt *atu,
1267     int flag)
1268 {
1269 	uint16_t ret_opt;
1270 	uint16_t ret_data;
1271 	int retries;
1272 
1273 	if (flag == NO_OPERATION)
1274 		return (0);
1275 	else if ((flag & (LOAD_FROM_FIB | PURGE_FROM_FIB | GET_NEXT_IN_FIB |
1276 	    GET_VIOLATION_DATA | CLEAR_VIOLATION_DATA)) == 0) {
1277 		device_printf(dev, "Wrong Opcode for ATU operation\n");
1278 		return (EINVAL);
1279 	}
1280 
1281 	ret_opt = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1282 
1283 	if (ret_opt & ATU_UNIT_BUSY) {
1284 		device_printf(dev, "ATU unit is busy, cannot access"
1285 		    "register\n");
1286 		return (EBUSY);
1287 	} else {
1288 		if(flag & LOAD_FROM_FIB) {
1289 			ret_data = e6000sw_readreg(sc, REG_GLOBAL, ATU_DATA);
1290 			e6000sw_writereg(sc, REG_GLOBAL2, ATU_DATA, (ret_data &
1291 			    ~ENTRY_STATE));
1292 		}
1293 		e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR01, atu->mac_01);
1294 		e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR23, atu->mac_23);
1295 		e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR45, atu->mac_45);
1296 		e6000sw_writereg(sc, REG_GLOBAL, ATU_FID, atu->fid);
1297 
1298 		e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret_opt |
1299 		    ATU_UNIT_BUSY | flag));
1300 
1301 		retries = E6000SW_RETRIES;
1302 		while (--retries & (e6000sw_readreg(sc, REG_GLOBAL,
1303 		    ATU_OPERATION) & ATU_UNIT_BUSY))
1304 			DELAY(1);
1305 
1306 		if (retries == 0)
1307 			device_printf(dev, "Timeout while flushing\n");
1308 		else if (flag & GET_NEXT_IN_FIB) {
1309 			atu->mac_01 = e6000sw_readreg(sc, REG_GLOBAL,
1310 			    ATU_MAC_ADDR01);
1311 			atu->mac_23 = e6000sw_readreg(sc, REG_GLOBAL,
1312 			    ATU_MAC_ADDR23);
1313 			atu->mac_45 = e6000sw_readreg(sc, REG_GLOBAL,
1314 			    ATU_MAC_ADDR45);
1315 		}
1316 	}
1317 
1318 	return (0);
1319 }
1320 
1321 static int
1322 e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag)
1323 {
1324 	uint16_t ret;
1325 	int retries;
1326 
1327 	if (flag == NO_OPERATION)
1328 		return (0);
1329 
1330 	ret = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1331 	if (ret & ATU_UNIT_BUSY) {
1332 		device_printf(dev, "Atu unit is busy, cannot flush\n");
1333 		return (EBUSY);
1334 	} else {
1335 		e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret |
1336 		    ATU_UNIT_BUSY | flag));
1337 		retries = E6000SW_RETRIES;
1338 		while (--retries & (e6000sw_readreg(sc, REG_GLOBAL,
1339 		    ATU_OPERATION) & ATU_UNIT_BUSY))
1340 			DELAY(1);
1341 
1342 		if (retries == 0)
1343 			device_printf(dev, "Timeout while flushing\n");
1344 	}
1345 
1346 	return (0);
1347 }
1348