xref: /freebsd/sys/dev/etherswitch/e6000sw/e6000sw.c (revision 43d1e6ee299ad4e143d90d3ad374d1c24bd3306f)
1 /*-
2  * Copyright (c) 2015 Semihalf
3  * Copyright (c) 2015 Stormshield
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include <sys/param.h>
32 #include <sys/bus.h>
33 #include <sys/errno.h>
34 #include <sys/kernel.h>
35 #include <sys/kthread.h>
36 #include <sys/module.h>
37 #include <sys/socket.h>
38 #include <sys/sockio.h>
39 
40 #include <net/if.h>
41 #include <net/if_media.h>
42 #include <net/if_types.h>
43 
44 #include <dev/etherswitch/etherswitch.h>
45 #include <dev/mii/mii.h>
46 #include <dev/mii/miivar.h>
47 
48 #include <dev/ofw/ofw_bus.h>
49 #include <dev/ofw/ofw_bus_subr.h>
50 
51 #include "e6000swreg.h"
52 #include "etherswitch_if.h"
53 #include "miibus_if.h"
54 #include "mdio_if.h"
55 
56 MALLOC_DECLARE(M_E6000SW);
57 MALLOC_DEFINE(M_E6000SW, "e6000sw", "e6000sw switch");
58 
59 #define	E6000SW_LOCK(_sc)		sx_xlock(&(_sc)->sx)
60 #define	E6000SW_UNLOCK(_sc)		sx_unlock(&(_sc)->sx)
61 #define	E6000SW_LOCK_ASSERT(_sc, _what)	sx_assert(&(_sc)->sx, (_what))
62 #define	E6000SW_TRYLOCK(_sc)		sx_tryxlock(&(_sc)->sx)
63 
64 typedef struct e6000sw_softc {
65 	device_t		dev;
66 	phandle_t		node;
67 
68 	struct sx		sx;
69 	struct ifnet		*ifp[E6000SW_MAX_PORTS];
70 	char			*ifname[E6000SW_MAX_PORTS];
71 	device_t		miibus[E6000SW_MAX_PORTS];
72 	struct proc		*kproc;
73 
74 	uint32_t		swid;
75 	uint32_t		vlan_mode;
76 	uint32_t		cpuports_mask;
77 	uint32_t		fixed_mask;
78 	uint32_t		fixed25_mask;
79 	uint32_t		ports_mask;
80 	int			phy_base;
81 	int			sw_addr;
82 	int			num_ports;
83 	boolean_t		multi_chip;
84 } e6000sw_softc_t;
85 
86 static etherswitch_info_t etherswitch_info = {
87 	.es_nports =		0,
88 	.es_nvlangroups =	0,
89 	.es_vlan_caps =		ETHERSWITCH_VLAN_PORT,
90 	.es_name =		"Marvell 6000 series switch"
91 };
92 
93 static void e6000sw_identify(driver_t *, device_t);
94 static int e6000sw_probe(device_t);
95 static int e6000sw_parse_fixed_link(e6000sw_softc_t *, phandle_t, uint32_t);
96 static int e6000sw_parse_ethernet(e6000sw_softc_t *, phandle_t, uint32_t);
97 static int e6000sw_attach(device_t);
98 static int e6000sw_detach(device_t);
99 static int e6000sw_readphy(device_t, int, int);
100 static int e6000sw_writephy(device_t, int, int, int);
101 static etherswitch_info_t* e6000sw_getinfo(device_t);
102 static int e6000sw_getconf(device_t, etherswitch_conf_t *);
103 static void e6000sw_lock(device_t);
104 static void e6000sw_unlock(device_t);
105 static int e6000sw_getport(device_t, etherswitch_port_t *);
106 static int e6000sw_setport(device_t, etherswitch_port_t *);
107 static int e6000sw_readreg_wrapper(device_t, int);
108 static int e6000sw_writereg_wrapper(device_t, int, int);
109 static int e6000sw_readphy_wrapper(device_t, int, int);
110 static int e6000sw_writephy_wrapper(device_t, int, int, int);
111 static int e6000sw_getvgroup_wrapper(device_t, etherswitch_vlangroup_t *);
112 static int e6000sw_setvgroup_wrapper(device_t, etherswitch_vlangroup_t *);
113 static int e6000sw_setvgroup(device_t, etherswitch_vlangroup_t *);
114 static int e6000sw_getvgroup(device_t, etherswitch_vlangroup_t *);
115 static void e6000sw_setup(device_t, e6000sw_softc_t *);
116 static void e6000sw_port_vlan_conf(e6000sw_softc_t *);
117 static void e6000sw_tick(void *);
118 static void e6000sw_set_atustat(device_t, e6000sw_softc_t *, int, int);
119 static int e6000sw_atu_flush(device_t, e6000sw_softc_t *, int);
120 static __inline void e6000sw_writereg(e6000sw_softc_t *, int, int, int);
121 static __inline uint32_t e6000sw_readreg(e6000sw_softc_t *, int, int);
122 static int e6000sw_ifmedia_upd(struct ifnet *);
123 static void e6000sw_ifmedia_sts(struct ifnet *, struct ifmediareq *);
124 static int e6000sw_atu_mac_table(device_t, e6000sw_softc_t *, struct atu_opt *,
125     int);
126 static int e6000sw_get_pvid(e6000sw_softc_t *, int, int *);
127 static int e6000sw_set_pvid(e6000sw_softc_t *, int, int);
128 static __inline bool e6000sw_is_cpuport(e6000sw_softc_t *, int);
129 static __inline bool e6000sw_is_fixedport(e6000sw_softc_t *, int);
130 static __inline bool e6000sw_is_fixed25port(e6000sw_softc_t *, int);
131 static __inline bool e6000sw_is_phyport(e6000sw_softc_t *, int);
132 static __inline bool e6000sw_is_portenabled(e6000sw_softc_t *, int);
133 static __inline struct mii_data *e6000sw_miiforphy(e6000sw_softc_t *,
134     unsigned int);
135 
136 static device_method_t e6000sw_methods[] = {
137 	/* device interface */
138 	DEVMETHOD(device_identify,		e6000sw_identify),
139 	DEVMETHOD(device_probe,			e6000sw_probe),
140 	DEVMETHOD(device_attach,		e6000sw_attach),
141 	DEVMETHOD(device_detach,		e6000sw_detach),
142 
143 	/* bus interface */
144 	DEVMETHOD(bus_add_child,		device_add_child_ordered),
145 
146 	/* mii interface */
147 	DEVMETHOD(miibus_readreg,		e6000sw_readphy),
148 	DEVMETHOD(miibus_writereg,		e6000sw_writephy),
149 
150 	/* etherswitch interface */
151 	DEVMETHOD(etherswitch_getinfo,		e6000sw_getinfo),
152 	DEVMETHOD(etherswitch_getconf,		e6000sw_getconf),
153 	DEVMETHOD(etherswitch_lock,		e6000sw_lock),
154 	DEVMETHOD(etherswitch_unlock,		e6000sw_unlock),
155 	DEVMETHOD(etherswitch_getport,		e6000sw_getport),
156 	DEVMETHOD(etherswitch_setport,		e6000sw_setport),
157 	DEVMETHOD(etherswitch_readreg,		e6000sw_readreg_wrapper),
158 	DEVMETHOD(etherswitch_writereg,		e6000sw_writereg_wrapper),
159 	DEVMETHOD(etherswitch_readphyreg,	e6000sw_readphy_wrapper),
160 	DEVMETHOD(etherswitch_writephyreg,	e6000sw_writephy_wrapper),
161 	DEVMETHOD(etherswitch_setvgroup,	e6000sw_setvgroup_wrapper),
162 	DEVMETHOD(etherswitch_getvgroup,	e6000sw_getvgroup_wrapper),
163 
164 	DEVMETHOD_END
165 };
166 
167 static devclass_t e6000sw_devclass;
168 
169 DEFINE_CLASS_0(e6000sw, e6000sw_driver, e6000sw_methods,
170     sizeof(e6000sw_softc_t));
171 
172 DRIVER_MODULE(e6000sw, mdio, e6000sw_driver, e6000sw_devclass, 0, 0);
173 DRIVER_MODULE(etherswitch, e6000sw, etherswitch_driver, etherswitch_devclass, 0,
174     0);
175 DRIVER_MODULE(miibus, e6000sw, miibus_driver, miibus_devclass, 0, 0);
176 MODULE_DEPEND(e6000sw, mdio, 1, 1, 1);
177 
178 #define	SMI_CMD			0
179 #define	SMI_CMD_BUSY		(1 << 15)
180 #define	SMI_CMD_OP_READ		((2 << 10) | SMI_CMD_BUSY | (1 << 12))
181 #define	SMI_CMD_OP_WRITE	((1 << 10) | SMI_CMD_BUSY | (1 << 12))
182 #define	SMI_DATA		1
183 
184 #define	MDIO_READ(dev, addr, reg)					\
185 	MDIO_READREG(device_get_parent(dev), (addr), (reg))
186 #define	MDIO_WRITE(dev, addr, reg, val)					\
187 	MDIO_WRITEREG(device_get_parent(dev), (addr), (reg), (val))
188 
189 static void
190 e6000sw_identify(driver_t *driver, device_t parent)
191 {
192 
193 	if (device_find_child(parent, "e6000sw", -1) == NULL)
194 		BUS_ADD_CHILD(parent, 0, "e6000sw", -1);
195 }
196 
197 static int
198 e6000sw_probe(device_t dev)
199 {
200 	e6000sw_softc_t *sc;
201 	const char *description;
202 	phandle_t switch_node;
203 
204 	switch_node = ofw_bus_find_compatible(OF_finddevice("/"),
205 	    "marvell,mv88e6085");
206 
207 	if (switch_node == 0)
208 		return (ENXIO);
209 
210 	if (bootverbose)
211 		device_printf(dev, "Found switch_node: 0x%x\n", switch_node);
212 
213 	sc = device_get_softc(dev);
214 	sc->dev = dev;
215 	sc->node = switch_node;
216 
217 	if (OF_getencprop(sc->node, "reg", &sc->sw_addr,
218 	    sizeof(sc->sw_addr)) < 0)
219 		return (ENXIO);
220 
221 	/*
222 	 * According to the Linux source code, all of the Switch IDs we support
223 	 * are multi_chip capable, and should go into multi-chip mode if the
224 	 * sw_addr != 0.
225 	 */
226 	if (!OF_hasprop(sc->node, "single-chip-addressing") && sc->sw_addr != 0)
227 		sc->multi_chip = true;
228 
229 	/*
230 	 * Create temporary lock, just to satisfy assertions,
231 	 * when obtaining the switch ID. Destroy immediately afterwards.
232 	 */
233 	sx_init(&sc->sx, "e6000sw_tmp");
234 	E6000SW_LOCK(sc);
235 	sc->swid = e6000sw_readreg(sc, REG_PORT(0), SWITCH_ID) & 0xfff0;
236 	E6000SW_UNLOCK(sc);
237 	sx_destroy(&sc->sx);
238 
239 	switch (sc->swid) {
240 	case MV88E6141:
241 		description = "Marvell 88E6141";
242 		sc->phy_base = 0x10;
243 		sc->num_ports = 6;
244 		break;
245 	case MV88E6341:
246 		description = "Marvell 88E6341";
247 		sc->phy_base = 0x10;
248 		sc->num_ports = 6;
249 		break;
250 	case MV88E6352:
251 		description = "Marvell 88E6352";
252 		sc->num_ports = 7;
253 		break;
254 	case MV88E6172:
255 		description = "Marvell 88E6172";
256 		sc->num_ports = 7;
257 		break;
258 	case MV88E6176:
259 		description = "Marvell 88E6176";
260 		sc->num_ports = 7;
261 		break;
262 	default:
263 		device_printf(dev, "Unrecognized device, id 0x%x.\n", sc->swid);
264 		return (ENXIO);
265 	}
266 
267 	device_set_desc(dev, description);
268 
269 	return (BUS_PROBE_DEFAULT);
270 }
271 
272 static int
273 e6000sw_parse_fixed_link(e6000sw_softc_t *sc, phandle_t node, uint32_t port)
274 {
275 	int speed;
276 	phandle_t fixed_link;
277 
278 	fixed_link = ofw_bus_find_child(node, "fixed-link");
279 
280 	if (fixed_link != 0) {
281 		sc->fixed_mask |= (1 << port);
282 
283 		if (OF_getencprop(fixed_link, "speed", &speed, sizeof(speed))> 0) {
284 			if (speed == 2500 &&
285 			    (MVSWITCH(sc, MV88E6141) ||
286 			     MVSWITCH(sc, MV88E6341)))
287 				sc->fixed25_mask |= (1 << port);
288 		} else {
289 		    device_printf(sc->dev,
290 			    "Port %d has a fixed-link node without a speed "
291 			    "property\n", port);
292 
293 		    return (ENXIO);
294 		}
295 	}
296 
297 	return (0);
298 }
299 
300 static int
301 e6000sw_parse_ethernet(e6000sw_softc_t *sc, phandle_t port_handle, uint32_t port) {
302 	phandle_t switch_eth, switch_eth_handle;
303 
304 	if (OF_getencprop(port_handle, "ethernet", (void*)&switch_eth_handle,
305 	    sizeof(switch_eth_handle)) > 0) {
306 		if (switch_eth_handle > 0) {
307 			switch_eth = OF_node_from_xref(switch_eth_handle);
308 
309 			device_printf(sc->dev, "CPU port at %d\n", port);
310 			sc->cpuports_mask |= (1 << port);
311 
312 			return (e6000sw_parse_fixed_link(sc, switch_eth, port));
313 		} else
314 			device_printf(sc->dev,
315 				"Port %d has ethernet property but it points "
316 				"to an invalid location\n", port);
317 	}
318 
319 	return (0);
320 }
321 
322 static int
323 e6000sw_parse_child_fdt(e6000sw_softc_t *sc, phandle_t child, int *pport)
324 {
325 	uint32_t port;
326 
327 	if (pport == NULL)
328 		return (ENXIO);
329 
330 	if (OF_getencprop(child, "reg", (void *)&port, sizeof(port)) < 0)
331 		return (ENXIO);
332 	if (port >= sc->num_ports)
333 		return (ENXIO);
334 	*pport = port;
335 
336 	if (e6000sw_parse_fixed_link(sc, child, port) != 0)
337 		return (ENXIO);
338 
339 	if (e6000sw_parse_ethernet(sc, child, port) != 0)
340 		return (ENXIO);
341 
342 	if ((sc->fixed_mask & (1 << port)) != 0)
343 		device_printf(sc->dev, "fixed port at %d\n", port);
344 	else
345 		device_printf(sc->dev, "PHY at port %d\n", port);
346 
347 	return (0);
348 }
349 
350 static int
351 e6000sw_init_interface(e6000sw_softc_t *sc, int port)
352 {
353 	char name[IFNAMSIZ];
354 
355 	snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->dev));
356 
357 	sc->ifp[port] = if_alloc(IFT_ETHER);
358 	if (sc->ifp[port] == NULL)
359 		return (ENOMEM);
360 	sc->ifp[port]->if_softc = sc;
361 	sc->ifp[port]->if_flags |= IFF_UP | IFF_BROADCAST |
362 	    IFF_DRV_RUNNING | IFF_SIMPLEX;
363 	sc->ifname[port] = malloc(strlen(name) + 1, M_E6000SW, M_NOWAIT);
364 	if (sc->ifname[port] == NULL) {
365 		if_free(sc->ifp[port]);
366 		return (ENOMEM);
367 	}
368 	memcpy(sc->ifname[port], name, strlen(name) + 1);
369 	if_initname(sc->ifp[port], sc->ifname[port], port);
370 
371 	return (0);
372 }
373 
374 static int
375 e6000sw_attach_miibus(e6000sw_softc_t *sc, int port)
376 {
377 	int err;
378 
379 	err = mii_attach(sc->dev, &sc->miibus[port], sc->ifp[port],
380 	    e6000sw_ifmedia_upd, e6000sw_ifmedia_sts, BMSR_DEFCAPMASK,
381 	    port + sc->phy_base, MII_OFFSET_ANY, 0);
382 	if (err != 0)
383 		return (err);
384 
385 	return (0);
386 }
387 
388 static int
389 e6000sw_attach(device_t dev)
390 {
391 	e6000sw_softc_t *sc;
392 	phandle_t child, ports;
393 	int err, port;
394 	uint32_t reg;
395 
396 	err = 0;
397 	sc = device_get_softc(dev);
398 
399 	if (sc->multi_chip)
400 		device_printf(dev, "multi-chip addressing mode\n");
401 	else
402 		device_printf(dev, "single-chip addressing mode\n");
403 
404 	sx_init(&sc->sx, "e6000sw");
405 
406 	E6000SW_LOCK(sc);
407 	e6000sw_setup(dev, sc);
408 
409 	ports = ofw_bus_find_child(sc->node, "ports");
410 
411 	if (ports == 0) {
412 		device_printf(dev, "failed to parse DTS: no ports found for "
413 		    "switch\n");
414 		return (ENXIO);
415 	}
416 
417 	for (child = OF_child(ports); child != 0; child = OF_peer(child)) {
418 		err = e6000sw_parse_child_fdt(sc, child, &port);
419 		if (err != 0) {
420 			device_printf(sc->dev, "failed to parse DTS\n");
421 			goto out_fail;
422 		}
423 
424 		/* Port is in use. */
425 		sc->ports_mask |= (1 << port);
426 
427 		err = e6000sw_init_interface(sc, port);
428 		if (err != 0) {
429 			device_printf(sc->dev, "failed to init interface\n");
430 			goto out_fail;
431 		}
432 
433 		if (e6000sw_is_fixedport(sc, port)) {
434 			/* Link must be down to change speed force value. */
435 			reg = e6000sw_readreg(sc, REG_PORT(port), PSC_CONTROL);
436 			reg &= ~PSC_CONTROL_LINK_UP;
437 			reg |= PSC_CONTROL_FORCED_LINK;
438 			e6000sw_writereg(sc, REG_PORT(port), PSC_CONTROL, reg);
439 
440 			/*
441 			 * Force speed, full-duplex, EEE off and flow-control
442 			 * on.
443 			 */
444 			if (e6000sw_is_fixed25port(sc, port))
445 				reg = PSC_CONTROL_SPD2500;
446 			else
447 				reg = PSC_CONTROL_SPD1000;
448 			reg |= PSC_CONTROL_FORCED_DPX | PSC_CONTROL_FULLDPX |
449 			    PSC_CONTROL_FORCED_LINK | PSC_CONTROL_LINK_UP |
450 			    PSC_CONTROL_FORCED_FC | PSC_CONTROL_FC_ON |
451 			    PSC_CONTROL_FORCED_SPD;
452 			if (MVSWITCH(sc, MV88E6141) || MVSWITCH(sc, MV88E6341))
453 			    reg |= PSC_CONTROL_FORCED_EEE;
454 			e6000sw_writereg(sc, REG_PORT(port), PSC_CONTROL, reg);
455 		}
456 
457 		/* Don't attach miibus at CPU/fixed ports */
458 		if (!e6000sw_is_phyport(sc, port))
459 			continue;
460 
461 		err = e6000sw_attach_miibus(sc, port);
462 		if (err != 0) {
463 			device_printf(sc->dev, "failed to attach miibus\n");
464 			goto out_fail;
465 		}
466 	}
467 
468 	etherswitch_info.es_nports = sc->num_ports;
469 
470 	/* Default to port vlan. */
471 	e6000sw_port_vlan_conf(sc);
472 	E6000SW_UNLOCK(sc);
473 
474 	bus_generic_probe(dev);
475 	bus_generic_attach(dev);
476 
477 	kproc_create(e6000sw_tick, sc, &sc->kproc, 0, 0, "e6000sw tick kproc");
478 
479 	return (0);
480 
481 out_fail:
482 	E6000SW_UNLOCK(sc);
483 	e6000sw_detach(dev);
484 
485 	return (err);
486 }
487 
488 static __inline int
489 e6000sw_poll_done(e6000sw_softc_t *sc)
490 {
491 	int i;
492 
493 	for (i = 0; i < E6000SW_SMI_TIMEOUT; i++) {
494 
495 		if ((e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG) &
496 		    (1 << PHY_CMD_SMI_BUSY)) == 0)
497 			return (0);
498 
499 		pause("e6000sw PHY poll", hz/1000);
500 	}
501 
502 	return (ETIMEDOUT);
503 }
504 
505 /*
506  * PHY registers are paged. Put page index in reg 22 (accessible from every
507  * page), then access specific register.
508  */
509 static int
510 e6000sw_readphy(device_t dev, int phy, int reg)
511 {
512 	e6000sw_softc_t *sc;
513 	uint32_t val;
514 	int err;
515 
516 	sc = device_get_softc(dev);
517 	if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
518 		device_printf(dev, "Wrong register address.\n");
519 		return (EINVAL);
520 	}
521 
522 	E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
523 
524 	err = e6000sw_poll_done(sc);
525 	if (err != 0) {
526 		device_printf(dev, "Timeout while waiting for switch\n");
527 		return (err);
528 	}
529 
530 	val = 1 << PHY_CMD_SMI_BUSY;
531 	val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE;
532 	val |= PHY_CMD_OPCODE_READ << PHY_CMD_OPCODE;
533 	val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK;
534 	val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK;
535 	e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val);
536 
537 	err = e6000sw_poll_done(sc);
538 	if (err != 0) {
539 		device_printf(dev, "Timeout while waiting for switch\n");
540 		return (err);
541 	}
542 
543 	val = e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG);
544 
545 	return (val & PHY_DATA_MASK);
546 }
547 
548 static int
549 e6000sw_writephy(device_t dev, int phy, int reg, int data)
550 {
551 	e6000sw_softc_t *sc;
552 	uint32_t val;
553 	int err;
554 
555 	sc = device_get_softc(dev);
556 	if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
557 		device_printf(dev, "Wrong register address.\n");
558 		return (EINVAL);
559 	}
560 
561 	E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
562 
563 	err = e6000sw_poll_done(sc);
564 	if (err != 0) {
565 		device_printf(dev, "Timeout while waiting for switch\n");
566 		return (err);
567 	}
568 
569 	val = 1 << PHY_CMD_SMI_BUSY;
570 	val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE;
571 	val |= PHY_CMD_OPCODE_WRITE << PHY_CMD_OPCODE;
572 	val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK;
573 	val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK;
574 	e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG,
575 	    data & PHY_DATA_MASK);
576 	e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val);
577 
578 	err = e6000sw_poll_done(sc);
579 	if (err != 0)
580 		device_printf(dev, "Timeout while waiting for switch\n");
581 
582 	return (err);
583 }
584 
585 static int
586 e6000sw_detach(device_t dev)
587 {
588 	int phy;
589 	e6000sw_softc_t *sc;
590 
591 	sc = device_get_softc(dev);
592 	bus_generic_detach(dev);
593 	sx_destroy(&sc->sx);
594 	for (phy = 0; phy < sc->num_ports; phy++) {
595 		if (sc->miibus[phy] != NULL)
596 			device_delete_child(dev, sc->miibus[phy]);
597 		if (sc->ifp[phy] != NULL)
598 			if_free(sc->ifp[phy]);
599 		if (sc->ifname[phy] != NULL)
600 			free(sc->ifname[phy], M_E6000SW);
601 	}
602 
603 	return (0);
604 }
605 
606 static etherswitch_info_t*
607 e6000sw_getinfo(device_t dev)
608 {
609 
610 	return (&etherswitch_info);
611 }
612 
613 static int
614 e6000sw_getconf(device_t dev, etherswitch_conf_t *conf)
615 {
616 	struct e6000sw_softc *sc;
617 
618 	/* Return the VLAN mode. */
619 	sc = device_get_softc(dev);
620 	conf->cmd = ETHERSWITCH_CONF_VLAN_MODE;
621 	conf->vlan_mode = sc->vlan_mode;
622 
623 	return (0);
624 }
625 
626 static void
627 e6000sw_lock(device_t dev)
628 {
629 	struct e6000sw_softc *sc;
630 
631 	sc = device_get_softc(dev);
632 
633 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
634 	E6000SW_LOCK(sc);
635 }
636 
637 static void
638 e6000sw_unlock(device_t dev)
639 {
640 	struct e6000sw_softc *sc;
641 
642 	sc = device_get_softc(dev);
643 
644 	E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
645 	E6000SW_UNLOCK(sc);
646 }
647 
648 static int
649 e6000sw_getport(device_t dev, etherswitch_port_t *p)
650 {
651 	struct mii_data *mii;
652 	int err;
653 	struct ifmediareq *ifmr;
654 
655 	e6000sw_softc_t *sc = device_get_softc(dev);
656 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
657 
658 	if (p->es_port >= sc->num_ports || p->es_port < 0)
659 		return (EINVAL);
660 	if (!e6000sw_is_portenabled(sc, p->es_port))
661 		return (0);
662 
663 	err = 0;
664 	E6000SW_LOCK(sc);
665 	e6000sw_get_pvid(sc, p->es_port, &p->es_pvid);
666 
667 	if (e6000sw_is_fixedport(sc, p->es_port)) {
668 		if (e6000sw_is_cpuport(sc, p->es_port))
669 			p->es_flags |= ETHERSWITCH_PORT_CPU;
670 		ifmr = &p->es_ifmr;
671 		ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
672 		ifmr->ifm_count = 0;
673 		if (e6000sw_is_fixed25port(sc, p->es_port))
674 			ifmr->ifm_active = IFM_2500_T;
675 		else
676 			ifmr->ifm_active = IFM_1000_T;
677 		ifmr->ifm_active |= IFM_ETHER | IFM_FDX;
678 		ifmr->ifm_current = ifmr->ifm_active;
679 		ifmr->ifm_mask = 0;
680 	} else {
681 		mii = e6000sw_miiforphy(sc, p->es_port);
682 		err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
683 		    &mii->mii_media, SIOCGIFMEDIA);
684 	}
685 	E6000SW_UNLOCK(sc);
686 
687 	return (err);
688 }
689 
690 static int
691 e6000sw_setport(device_t dev, etherswitch_port_t *p)
692 {
693 	e6000sw_softc_t *sc;
694 	int err;
695 	struct mii_data *mii;
696 
697 	sc = device_get_softc(dev);
698 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
699 
700 	if (p->es_port >= sc->num_ports || p->es_port < 0)
701 		return (EINVAL);
702 	if (!e6000sw_is_portenabled(sc, p->es_port))
703 		return (0);
704 
705 	err = 0;
706 	E6000SW_LOCK(sc);
707 	if (p->es_pvid != 0)
708 		e6000sw_set_pvid(sc, p->es_port, p->es_pvid);
709 	if (e6000sw_is_phyport(sc, p->es_port)) {
710 		mii = e6000sw_miiforphy(sc, p->es_port);
711 		err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, &mii->mii_media,
712 		    SIOCSIFMEDIA);
713 	}
714 	E6000SW_UNLOCK(sc);
715 
716 	return (err);
717 }
718 
719 /*
720  * Registers in this switch are divided into sections, specified in
721  * documentation. So as to access any of them, section index and reg index
722  * is necessary. etherswitchcfg uses only one variable, so indexes were
723  * compressed into addr_reg: 32 * section_index + reg_index.
724  */
725 static int
726 e6000sw_readreg_wrapper(device_t dev, int addr_reg)
727 {
728 
729 	if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
730 	    (addr_reg < (REG_PORT(0) * 32))) {
731 		device_printf(dev, "Wrong register address.\n");
732 		return (EINVAL);
733 	}
734 
735 	return (e6000sw_readreg(device_get_softc(dev), addr_reg / 32,
736 	    addr_reg % 32));
737 }
738 
739 static int
740 e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val)
741 {
742 
743 	if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
744 	    (addr_reg < (REG_PORT(0) * 32))) {
745 		device_printf(dev, "Wrong register address.\n");
746 		return (EINVAL);
747 	}
748 	e6000sw_writereg(device_get_softc(dev), addr_reg / 5,
749 	    addr_reg % 32, val);
750 
751 	return (0);
752 }
753 
754 /*
755  * These wrappers are necessary because PHY accesses from etherswitchcfg
756  * need to be synchronized with locks, while miibus PHY accesses do not.
757  */
758 static int
759 e6000sw_readphy_wrapper(device_t dev, int phy, int reg)
760 {
761 	e6000sw_softc_t *sc;
762 	int ret;
763 
764 	sc = device_get_softc(dev);
765 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
766 
767 	E6000SW_LOCK(sc);
768 	ret = e6000sw_readphy(dev, phy, reg);
769 	E6000SW_UNLOCK(sc);
770 
771 	return (ret);
772 }
773 
774 static int
775 e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data)
776 {
777 	e6000sw_softc_t *sc;
778 	int ret;
779 
780 	sc = device_get_softc(dev);
781 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
782 
783 	E6000SW_LOCK(sc);
784 	ret = e6000sw_writephy(dev, phy, reg, data);
785 	E6000SW_UNLOCK(sc);
786 
787 	return (ret);
788 }
789 
790 /*
791  * setvgroup/getvgroup called from etherswitchfcg need to be locked,
792  * while internal calls do not.
793  */
794 static int
795 e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
796 {
797 	e6000sw_softc_t *sc;
798 	int ret;
799 
800 	sc = device_get_softc(dev);
801 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
802 
803 	E6000SW_LOCK(sc);
804 	ret = e6000sw_setvgroup(dev, vg);
805 	E6000SW_UNLOCK(sc);
806 
807 	return (ret);
808 }
809 
810 static int
811 e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
812 {
813 	e6000sw_softc_t *sc;
814 	int ret;
815 
816 	sc = device_get_softc(dev);
817 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
818 
819 	E6000SW_LOCK(sc);
820 	ret = e6000sw_getvgroup(dev, vg);
821 	E6000SW_UNLOCK(sc);
822 
823 	return (ret);
824 }
825 
826 static __inline void
827 e6000sw_port_vlan_assign(e6000sw_softc_t *sc, int port, uint32_t fid,
828     uint32_t members)
829 {
830 	uint32_t reg;
831 
832 	reg = e6000sw_readreg(sc, REG_PORT(port), PORT_VLAN_MAP);
833 	reg &= ~PORT_VLAN_MAP_TABLE_MASK;
834 	reg &= ~PORT_VLAN_MAP_FID_MASK;
835 	reg |= members & PORT_VLAN_MAP_TABLE_MASK & ~(1 << port);
836 	reg |= (fid << PORT_VLAN_MAP_FID) & PORT_VLAN_MAP_FID_MASK;
837 	e6000sw_writereg(sc, REG_PORT(port), PORT_VLAN_MAP, reg);
838 	reg = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL_1);
839 	reg &= ~PORT_CONTROL_1_FID_MASK;
840 	reg |= (fid >> 4) & PORT_CONTROL_1_FID_MASK;
841 	e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL_1, reg);
842 }
843 
844 static int
845 e6000sw_set_port_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg)
846 {
847 	uint32_t port;
848 
849 	port = vg->es_vlangroup;
850 	if (port > sc->num_ports)
851 		return (EINVAL);
852 
853 	if (vg->es_member_ports != vg->es_untagged_ports) {
854 		device_printf(sc->dev, "Tagged ports not supported.\n");
855 		return (EINVAL);
856 	}
857 
858 	e6000sw_port_vlan_assign(sc, port, port + 1, vg->es_untagged_ports);
859 	vg->es_vid = port | ETHERSWITCH_VID_VALID;
860 
861 	return (0);
862 }
863 
864 static int
865 e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
866 {
867 	e6000sw_softc_t *sc;
868 
869 	sc = device_get_softc(dev);
870 	E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
871 
872 	if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT)
873 		return (e6000sw_set_port_vlan(sc, vg));
874 
875 	return (EINVAL);
876 }
877 
878 static int
879 e6000sw_get_port_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg)
880 {
881 	uint32_t port, reg;
882 
883 	port = vg->es_vlangroup;
884 	if (port > sc->num_ports)
885 		return (EINVAL);
886 
887 	if (!e6000sw_is_portenabled(sc, port)) {
888 		vg->es_vid = port;
889 		return (0);
890 	}
891 
892 	reg = e6000sw_readreg(sc, REG_PORT(port), PORT_VLAN_MAP);
893 	vg->es_untagged_ports = vg->es_member_ports =
894 	    reg & PORT_VLAN_MAP_TABLE_MASK;
895 	vg->es_vid = port | ETHERSWITCH_VID_VALID;
896 	vg->es_fid = (reg & PORT_VLAN_MAP_FID_MASK) >> PORT_VLAN_MAP_FID;
897 	reg = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL_1);
898 	vg->es_fid |= (reg & PORT_CONTROL_1_FID_MASK) << 4;
899 
900 	return (0);
901 }
902 
903 static int
904 e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
905 {
906 	e6000sw_softc_t *sc;
907 
908 	sc = device_get_softc(dev);
909 	E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
910 
911 	if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT)
912 		return (e6000sw_get_port_vlan(sc, vg));
913 
914 	return (EINVAL);
915 }
916 
917 static __inline struct mii_data*
918 e6000sw_miiforphy(e6000sw_softc_t *sc, unsigned int phy)
919 {
920 
921 	if (!e6000sw_is_phyport(sc, phy))
922 		return (NULL);
923 
924 	return (device_get_softc(sc->miibus[phy]));
925 }
926 
927 static int
928 e6000sw_ifmedia_upd(struct ifnet *ifp)
929 {
930 	e6000sw_softc_t *sc;
931 	struct mii_data *mii;
932 
933 	sc = ifp->if_softc;
934 	mii = e6000sw_miiforphy(sc, ifp->if_dunit);
935 	if (mii == NULL)
936 		return (ENXIO);
937 	mii_mediachg(mii);
938 
939 	return (0);
940 }
941 
942 static void
943 e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
944 {
945 	e6000sw_softc_t *sc;
946 	struct mii_data *mii;
947 
948 	sc = ifp->if_softc;
949 	mii = e6000sw_miiforphy(sc, ifp->if_dunit);
950 
951 	if (mii == NULL)
952 		return;
953 
954 	mii_pollstat(mii);
955 	ifmr->ifm_active = mii->mii_media_active;
956 	ifmr->ifm_status = mii->mii_media_status;
957 }
958 
959 static int
960 e6000sw_smi_waitready(e6000sw_softc_t *sc, int phy)
961 {
962 	int i;
963 
964 	for (i = 0; i < E6000SW_SMI_TIMEOUT; i++) {
965 		if ((MDIO_READ(sc->dev, phy, SMI_CMD) & SMI_CMD_BUSY) == 0)
966 			return (0);
967 		DELAY(1);
968 	}
969 
970 	return (1);
971 }
972 
973 static __inline uint32_t
974 e6000sw_readreg(e6000sw_softc_t *sc, int addr, int reg)
975 {
976 
977 	E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
978 
979 	if (!sc->multi_chip)
980 		return (MDIO_READ(sc->dev, addr, reg) & 0xffff);
981 
982 	if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
983 		printf("e6000sw: readreg timeout\n");
984 		return (0xffff);
985 	}
986 	MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD,
987 	    SMI_CMD_OP_READ | (addr << 5) | reg);
988 	if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
989 		printf("e6000sw: readreg timeout\n");
990 		return (0xffff);
991 	}
992 
993 	return (MDIO_READ(sc->dev, sc->sw_addr, SMI_DATA) & 0xffff);
994 }
995 
996 static __inline void
997 e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, int val)
998 {
999 
1000 	E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
1001 
1002 	if (!sc->multi_chip) {
1003 		MDIO_WRITE(sc->dev, addr, reg, val);
1004 		return;
1005 	}
1006 
1007 	if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
1008 		printf("e6000sw: readreg timeout\n");
1009 		return;
1010 	}
1011 	MDIO_WRITE(sc->dev, sc->sw_addr, SMI_DATA, val);
1012 	MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD,
1013 	    SMI_CMD_OP_WRITE | (addr << 5) | reg);
1014 	if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
1015 		printf("e6000sw: readreg timeout\n");
1016 		return;
1017 	}
1018 }
1019 
1020 static __inline bool
1021 e6000sw_is_cpuport(e6000sw_softc_t *sc, int port)
1022 {
1023 
1024 	return ((sc->cpuports_mask & (1 << port)) ? true : false);
1025 }
1026 
1027 static __inline bool
1028 e6000sw_is_fixedport(e6000sw_softc_t *sc, int port)
1029 {
1030 
1031 	return ((sc->fixed_mask & (1 << port)) ? true : false);
1032 }
1033 
1034 static __inline bool
1035 e6000sw_is_fixed25port(e6000sw_softc_t *sc, int port)
1036 {
1037 
1038 	return ((sc->fixed25_mask & (1 << port)) ? true : false);
1039 }
1040 
1041 static __inline bool
1042 e6000sw_is_phyport(e6000sw_softc_t *sc, int port)
1043 {
1044 	uint32_t phy_mask;
1045 	phy_mask = ~(sc->fixed_mask | sc->cpuports_mask);
1046 
1047 	return ((phy_mask & (1 << port)) ? true : false);
1048 }
1049 
1050 static __inline bool
1051 e6000sw_is_portenabled(e6000sw_softc_t *sc, int port)
1052 {
1053 
1054 	return ((sc->ports_mask & (1 << port)) ? true : false);
1055 }
1056 
1057 static __inline int
1058 e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid)
1059 {
1060 
1061 	e6000sw_writereg(sc, REG_PORT(port), PORT_VID, pvid &
1062 	    PORT_VID_DEF_VID_MASK);
1063 
1064 	return (0);
1065 }
1066 
1067 static __inline int
1068 e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid)
1069 {
1070 
1071 	if (pvid == NULL)
1072 		return (ENXIO);
1073 
1074 	*pvid = e6000sw_readreg(sc, REG_PORT(port), PORT_VID) &
1075 	    PORT_VID_DEF_VID_MASK;
1076 
1077 	return (0);
1078 }
1079 
1080 /*
1081  * Convert port status to ifmedia.
1082  */
1083 static void
1084 e6000sw_update_ifmedia(uint16_t portstatus, u_int *media_status, u_int *media_active)
1085 {
1086 	*media_active = IFM_ETHER;
1087 	*media_status = IFM_AVALID;
1088 
1089 	if ((portstatus & PORT_STATUS_LINK_MASK) != 0)
1090 		*media_status |= IFM_ACTIVE;
1091 	else {
1092 		*media_active |= IFM_NONE;
1093 		return;
1094 	}
1095 
1096 	switch (portstatus & PORT_STATUS_SPEED_MASK) {
1097 	case PORT_STATUS_SPEED_10:
1098 		*media_active |= IFM_10_T;
1099 		break;
1100 	case PORT_STATUS_SPEED_100:
1101 		*media_active |= IFM_100_TX;
1102 		break;
1103 	case PORT_STATUS_SPEED_1000:
1104 		*media_active |= IFM_1000_T;
1105 		break;
1106 	}
1107 
1108 	if ((portstatus & PORT_STATUS_DUPLEX_MASK) == 0)
1109 		*media_active |= IFM_FDX;
1110 	else
1111 		*media_active |= IFM_HDX;
1112 }
1113 
1114 static void
1115 e6000sw_tick (void *arg)
1116 {
1117 	e6000sw_softc_t *sc;
1118 	struct mii_data *mii;
1119 	struct mii_softc *miisc;
1120 	uint16_t portstatus;
1121 	int port;
1122 
1123 	sc = arg;
1124 
1125 	E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
1126 
1127 	for (;;) {
1128 		E6000SW_LOCK(sc);
1129 		for (port = 0; port < sc->num_ports; port++) {
1130 			/* Tick only on PHY ports */
1131 			if (!e6000sw_is_portenabled(sc, port) ||
1132 			    !e6000sw_is_phyport(sc, port))
1133 				continue;
1134 
1135 			mii = e6000sw_miiforphy(sc, port);
1136 			if (mii == NULL)
1137 				continue;
1138 
1139 			portstatus = e6000sw_readreg(sc, REG_PORT(port),
1140 			    PORT_STATUS);
1141 
1142 			e6000sw_update_ifmedia(portstatus,
1143 			    &mii->mii_media_status, &mii->mii_media_active);
1144 
1145 			LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
1146 				if (IFM_INST(mii->mii_media.ifm_cur->ifm_media)
1147 				    != miisc->mii_inst)
1148 					continue;
1149 				mii_phy_update(miisc, MII_POLLSTAT);
1150 			}
1151 		}
1152 		E6000SW_UNLOCK(sc);
1153 		pause("e6000sw tick", 1000);
1154 	}
1155 }
1156 
1157 static void
1158 e6000sw_setup(device_t dev, e6000sw_softc_t *sc)
1159 {
1160 	uint16_t atu_ctrl, atu_age;
1161 
1162 	/* Set aging time */
1163 	e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL,
1164 	    (E6000SW_DEFAULT_AGETIME << ATU_CONTROL_AGETIME) |
1165 	    (1 << ATU_CONTROL_LEARN2ALL));
1166 
1167 	/* Send all with specific mac address to cpu port */
1168 	e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_2x, MGMT_EN_ALL);
1169 	e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_0x, MGMT_EN_ALL);
1170 
1171 	/* Disable Remote Management */
1172 	e6000sw_writereg(sc, REG_GLOBAL, SWITCH_GLOBAL_CONTROL2, 0);
1173 
1174 	/* Disable loopback filter and flow control messages */
1175 	e6000sw_writereg(sc, REG_GLOBAL2, SWITCH_MGMT,
1176 	    SWITCH_MGMT_PRI_MASK |
1177 	    (1 << SWITCH_MGMT_RSVD2CPU) |
1178 	    SWITCH_MGMT_FC_PRI_MASK |
1179 	    (1 << SWITCH_MGMT_FORCEFLOW));
1180 
1181 	e6000sw_atu_flush(dev, sc, NO_OPERATION);
1182 	e6000sw_atu_mac_table(dev, sc, NULL, NO_OPERATION);
1183 	e6000sw_set_atustat(dev, sc, 0, COUNT_ALL);
1184 
1185 	/* Set ATU AgeTime to 15 seconds */
1186 	atu_age = 1;
1187 
1188 	atu_ctrl = e6000sw_readreg(sc, REG_GLOBAL, ATU_CONTROL);
1189 
1190 	/* Set new AgeTime field */
1191 	atu_ctrl &= ~ATU_CONTROL_AGETIME_MASK;
1192 	e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL, atu_ctrl |
1193 	    (atu_age << ATU_CONTROL_AGETIME));
1194 }
1195 
1196 static void
1197 e6000sw_port_vlan_conf(e6000sw_softc_t *sc)
1198 {
1199 	int i, port, ret;
1200 	uint32_t members;
1201 
1202 	/* Disable all ports */
1203 	for (port = 0; port < sc->num_ports; port++) {
1204 		ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL);
1205 		e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL,
1206 		    (ret & ~PORT_CONTROL_ENABLE));
1207 	}
1208 
1209 	/* Set port priority */
1210 	for (port = 0; port < sc->num_ports; port++) {
1211 		if (!e6000sw_is_portenabled(sc, port))
1212 			continue;
1213 		ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID);
1214 		ret &= ~PORT_VID_PRIORITY_MASK;
1215 		e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret);
1216 	}
1217 
1218 	/* Set VID map */
1219 	for (port = 0; port < sc->num_ports; port++) {
1220 		if (!e6000sw_is_portenabled(sc, port))
1221 			continue;
1222 		ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID);
1223 		ret &= ~PORT_VID_DEF_VID_MASK;
1224 		ret |= (port + 1);
1225 		e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret);
1226 	}
1227 
1228 	/* Enable all ports */
1229 	for (port = 0; port < sc->num_ports; port++) {
1230 		if (!e6000sw_is_portenabled(sc, port))
1231 			continue;
1232 		ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL);
1233 		e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL,
1234 		    (ret | PORT_CONTROL_ENABLE));
1235 	}
1236 
1237 	/* Set VLAN mode. */
1238 	sc->vlan_mode = ETHERSWITCH_VLAN_PORT;
1239 	etherswitch_info.es_nvlangroups = sc->num_ports;
1240 	for (port = 0; port < sc->num_ports; port++) {
1241 		members = 0;
1242 		if (e6000sw_is_portenabled(sc, port)) {
1243 			for (i = 0; i < sc->num_ports; i++) {
1244 				if (i == port || !e6000sw_is_portenabled(sc, i))
1245 					continue;
1246 				members |= (1 << i);
1247 			}
1248 		}
1249 		e6000sw_port_vlan_assign(sc, port, port + 1, members);
1250 	}
1251 }
1252 
1253 static void
1254 e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin, int flag)
1255 {
1256 	uint16_t ret;
1257 
1258 	ret = e6000sw_readreg(sc, REG_GLOBAL2, ATU_STATS);
1259 	e6000sw_writereg(sc, REG_GLOBAL2, ATU_STATS, (bin << ATU_STATS_BIN ) |
1260 	    (flag << ATU_STATS_FLAG));
1261 }
1262 
1263 static int
1264 e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct atu_opt *atu,
1265     int flag)
1266 {
1267 	uint16_t ret_opt;
1268 	uint16_t ret_data;
1269 	int retries;
1270 
1271 	if (flag == NO_OPERATION)
1272 		return (0);
1273 	else if ((flag & (LOAD_FROM_FIB | PURGE_FROM_FIB | GET_NEXT_IN_FIB |
1274 	    GET_VIOLATION_DATA | CLEAR_VIOLATION_DATA)) == 0) {
1275 		device_printf(dev, "Wrong Opcode for ATU operation\n");
1276 		return (EINVAL);
1277 	}
1278 
1279 	ret_opt = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1280 
1281 	if (ret_opt & ATU_UNIT_BUSY) {
1282 		device_printf(dev, "ATU unit is busy, cannot access"
1283 		    "register\n");
1284 		return (EBUSY);
1285 	} else {
1286 		if(flag & LOAD_FROM_FIB) {
1287 			ret_data = e6000sw_readreg(sc, REG_GLOBAL, ATU_DATA);
1288 			e6000sw_writereg(sc, REG_GLOBAL2, ATU_DATA, (ret_data &
1289 			    ~ENTRY_STATE));
1290 		}
1291 		e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR01, atu->mac_01);
1292 		e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR23, atu->mac_23);
1293 		e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR45, atu->mac_45);
1294 		e6000sw_writereg(sc, REG_GLOBAL, ATU_FID, atu->fid);
1295 
1296 		e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret_opt |
1297 		    ATU_UNIT_BUSY | flag));
1298 
1299 		retries = E6000SW_RETRIES;
1300 		while (--retries & (e6000sw_readreg(sc, REG_GLOBAL,
1301 		    ATU_OPERATION) & ATU_UNIT_BUSY))
1302 			DELAY(1);
1303 
1304 		if (retries == 0)
1305 			device_printf(dev, "Timeout while flushing\n");
1306 		else if (flag & GET_NEXT_IN_FIB) {
1307 			atu->mac_01 = e6000sw_readreg(sc, REG_GLOBAL,
1308 			    ATU_MAC_ADDR01);
1309 			atu->mac_23 = e6000sw_readreg(sc, REG_GLOBAL,
1310 			    ATU_MAC_ADDR23);
1311 			atu->mac_45 = e6000sw_readreg(sc, REG_GLOBAL,
1312 			    ATU_MAC_ADDR45);
1313 		}
1314 	}
1315 
1316 	return (0);
1317 }
1318 
1319 static int
1320 e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag)
1321 {
1322 	uint16_t ret;
1323 	int retries;
1324 
1325 	if (flag == NO_OPERATION)
1326 		return (0);
1327 
1328 	ret = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1329 	if (ret & ATU_UNIT_BUSY) {
1330 		device_printf(dev, "Atu unit is busy, cannot flush\n");
1331 		return (EBUSY);
1332 	} else {
1333 		e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret |
1334 		    ATU_UNIT_BUSY | flag));
1335 		retries = E6000SW_RETRIES;
1336 		while (--retries & (e6000sw_readreg(sc, REG_GLOBAL,
1337 		    ATU_OPERATION) & ATU_UNIT_BUSY))
1338 			DELAY(1);
1339 
1340 		if (retries == 0)
1341 			device_printf(dev, "Timeout while flushing\n");
1342 	}
1343 
1344 	return (0);
1345 }
1346