1 /*- 2 * Copyright (c) 2015 Semihalf 3 * Copyright (c) 2015 Stormshield 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/bus.h> 33 #include <sys/errno.h> 34 #include <sys/kernel.h> 35 #include <sys/kthread.h> 36 #include <sys/module.h> 37 #include <sys/socket.h> 38 #include <sys/sockio.h> 39 40 #include <net/if.h> 41 #include <net/if_media.h> 42 #include <net/if_types.h> 43 44 #include <dev/etherswitch/etherswitch.h> 45 #include <dev/mii/mii.h> 46 #include <dev/mii/miivar.h> 47 48 #include <dev/fdt/fdt_common.h> 49 #include <dev/ofw/ofw_bus.h> 50 51 #include "e6000swreg.h" 52 #include "etherswitch_if.h" 53 #include "miibus_if.h" 54 #include "mdio_if.h" 55 56 MALLOC_DECLARE(M_E6000SW); 57 MALLOC_DEFINE(M_E6000SW, "e6000sw", "e6000sw switch"); 58 59 #define E6000SW_LOCK(_sc) sx_xlock(&(_sc)->sx) 60 #define E6000SW_UNLOCK(_sc) sx_unlock(&(_sc)->sx) 61 #define E6000SW_LOCK_ASSERT(_sc, _what) sx_assert(&(_sc)->sx, (_what)) 62 #define E6000SW_TRYLOCK(_sc) sx_tryxlock(&(_sc)->sx) 63 64 typedef struct e6000sw_softc { 65 device_t dev; 66 phandle_t node; 67 68 struct sx sx; 69 struct ifnet *ifp[E6000SW_MAX_PORTS]; 70 char *ifname[E6000SW_MAX_PORTS]; 71 device_t miibus[E6000SW_MAX_PORTS]; 72 struct proc *kproc; 73 74 uint32_t swid; 75 uint32_t vlan_mode; 76 uint32_t cpuports_mask; 77 uint32_t fixed_mask; 78 uint32_t fixed25_mask; 79 uint32_t ports_mask; 80 int phy_base; 81 int sw_addr; 82 int num_ports; 83 boolean_t multi_chip; 84 } e6000sw_softc_t; 85 86 static etherswitch_info_t etherswitch_info = { 87 .es_nports = 0, 88 .es_nvlangroups = 0, 89 .es_vlan_caps = ETHERSWITCH_VLAN_PORT, 90 .es_name = "Marvell 6000 series switch" 91 }; 92 93 static void e6000sw_identify(driver_t *, device_t); 94 static int e6000sw_probe(device_t); 95 static int e6000sw_attach(device_t); 96 static int e6000sw_detach(device_t); 97 static int e6000sw_readphy(device_t, int, int); 98 static int e6000sw_writephy(device_t, int, int, int); 99 static etherswitch_info_t* e6000sw_getinfo(device_t); 100 static int e6000sw_getconf(device_t, etherswitch_conf_t *); 101 static void e6000sw_lock(device_t); 102 static void e6000sw_unlock(device_t); 103 static int e6000sw_getport(device_t, etherswitch_port_t *); 104 static int e6000sw_setport(device_t, etherswitch_port_t *); 105 static int e6000sw_readreg_wrapper(device_t, int); 106 static int e6000sw_writereg_wrapper(device_t, int, int); 107 static int e6000sw_readphy_wrapper(device_t, int, int); 108 static int e6000sw_writephy_wrapper(device_t, int, int, int); 109 static int e6000sw_getvgroup_wrapper(device_t, etherswitch_vlangroup_t *); 110 static int e6000sw_setvgroup_wrapper(device_t, etherswitch_vlangroup_t *); 111 static int e6000sw_setvgroup(device_t, etherswitch_vlangroup_t *); 112 static int e6000sw_getvgroup(device_t, etherswitch_vlangroup_t *); 113 static void e6000sw_setup(device_t, e6000sw_softc_t *); 114 static void e6000sw_port_vlan_conf(e6000sw_softc_t *); 115 static void e6000sw_tick(void *); 116 static void e6000sw_set_atustat(device_t, e6000sw_softc_t *, int, int); 117 static int e6000sw_atu_flush(device_t, e6000sw_softc_t *, int); 118 static __inline void e6000sw_writereg(e6000sw_softc_t *, int, int, int); 119 static __inline uint32_t e6000sw_readreg(e6000sw_softc_t *, int, int); 120 static int e6000sw_ifmedia_upd(struct ifnet *); 121 static void e6000sw_ifmedia_sts(struct ifnet *, struct ifmediareq *); 122 static int e6000sw_atu_mac_table(device_t, e6000sw_softc_t *, struct atu_opt *, 123 int); 124 static int e6000sw_get_pvid(e6000sw_softc_t *, int, int *); 125 static int e6000sw_set_pvid(e6000sw_softc_t *, int, int); 126 static __inline bool e6000sw_is_cpuport(e6000sw_softc_t *, int); 127 static __inline bool e6000sw_is_fixedport(e6000sw_softc_t *, int); 128 static __inline bool e6000sw_is_fixed25port(e6000sw_softc_t *, int); 129 static __inline bool e6000sw_is_phyport(e6000sw_softc_t *, int); 130 static __inline bool e6000sw_is_portenabled(e6000sw_softc_t *, int); 131 static __inline struct mii_data *e6000sw_miiforphy(e6000sw_softc_t *, 132 unsigned int); 133 134 static device_method_t e6000sw_methods[] = { 135 /* device interface */ 136 DEVMETHOD(device_identify, e6000sw_identify), 137 DEVMETHOD(device_probe, e6000sw_probe), 138 DEVMETHOD(device_attach, e6000sw_attach), 139 DEVMETHOD(device_detach, e6000sw_detach), 140 141 /* bus interface */ 142 DEVMETHOD(bus_add_child, device_add_child_ordered), 143 144 /* mii interface */ 145 DEVMETHOD(miibus_readreg, e6000sw_readphy), 146 DEVMETHOD(miibus_writereg, e6000sw_writephy), 147 148 /* etherswitch interface */ 149 DEVMETHOD(etherswitch_getinfo, e6000sw_getinfo), 150 DEVMETHOD(etherswitch_getconf, e6000sw_getconf), 151 DEVMETHOD(etherswitch_lock, e6000sw_lock), 152 DEVMETHOD(etherswitch_unlock, e6000sw_unlock), 153 DEVMETHOD(etherswitch_getport, e6000sw_getport), 154 DEVMETHOD(etherswitch_setport, e6000sw_setport), 155 DEVMETHOD(etherswitch_readreg, e6000sw_readreg_wrapper), 156 DEVMETHOD(etherswitch_writereg, e6000sw_writereg_wrapper), 157 DEVMETHOD(etherswitch_readphyreg, e6000sw_readphy_wrapper), 158 DEVMETHOD(etherswitch_writephyreg, e6000sw_writephy_wrapper), 159 DEVMETHOD(etherswitch_setvgroup, e6000sw_setvgroup_wrapper), 160 DEVMETHOD(etherswitch_getvgroup, e6000sw_getvgroup_wrapper), 161 162 DEVMETHOD_END 163 }; 164 165 static devclass_t e6000sw_devclass; 166 167 DEFINE_CLASS_0(e6000sw, e6000sw_driver, e6000sw_methods, 168 sizeof(e6000sw_softc_t)); 169 170 DRIVER_MODULE(e6000sw, mdio, e6000sw_driver, e6000sw_devclass, 0, 0); 171 DRIVER_MODULE(etherswitch, e6000sw, etherswitch_driver, etherswitch_devclass, 0, 172 0); 173 DRIVER_MODULE(miibus, e6000sw, miibus_driver, miibus_devclass, 0, 0); 174 MODULE_DEPEND(e6000sw, mdio, 1, 1, 1); 175 176 #define SMI_CMD 0 177 #define SMI_CMD_BUSY (1 << 15) 178 #define SMI_CMD_OP_READ ((2 << 10) | SMI_CMD_BUSY | (1 << 12)) 179 #define SMI_CMD_OP_WRITE ((1 << 10) | SMI_CMD_BUSY | (1 << 12)) 180 #define SMI_DATA 1 181 182 #define MDIO_READ(dev, addr, reg) \ 183 MDIO_READREG(device_get_parent(dev), (addr), (reg)) 184 #define MDIO_WRITE(dev, addr, reg, val) \ 185 MDIO_WRITEREG(device_get_parent(dev), (addr), (reg), (val)) 186 187 static void 188 e6000sw_identify(driver_t *driver, device_t parent) 189 { 190 191 if (device_find_child(parent, "e6000sw", -1) == NULL) 192 BUS_ADD_CHILD(parent, 0, "e6000sw", -1); 193 } 194 195 static int 196 e6000sw_probe(device_t dev) 197 { 198 e6000sw_softc_t *sc; 199 const char *description; 200 phandle_t dsa_node, switch_node; 201 202 dsa_node = fdt_find_compatible(OF_finddevice("/"), 203 "marvell,dsa", 0); 204 switch_node = OF_child(dsa_node); 205 206 if (switch_node == 0) 207 return (ENXIO); 208 209 sc = device_get_softc(dev); 210 sc->dev = dev; 211 sc->node = switch_node; 212 213 if (OF_getencprop(sc->node, "reg", &sc->sw_addr, 214 sizeof(sc->sw_addr)) < 0) 215 return (ENXIO); 216 if (sc->sw_addr != 0 && (sc->sw_addr % 2) == 0) 217 sc->multi_chip = true; 218 219 /* 220 * Create temporary lock, just to satisfy assertions, 221 * when obtaining the switch ID. Destroy immediately afterwards. 222 */ 223 sx_init(&sc->sx, "e6000sw_tmp"); 224 E6000SW_LOCK(sc); 225 sc->swid = e6000sw_readreg(sc, REG_PORT(0), SWITCH_ID) & 0xfff0; 226 E6000SW_UNLOCK(sc); 227 sx_destroy(&sc->sx); 228 229 switch (sc->swid) { 230 case MV88E6141: 231 description = "Marvell 88E6141"; 232 sc->phy_base = 0x10; 233 sc->num_ports = 6; 234 break; 235 case MV88E6341: 236 description = "Marvell 88E6341"; 237 sc->phy_base = 0x10; 238 sc->num_ports = 6; 239 break; 240 case MV88E6352: 241 description = "Marvell 88E6352"; 242 sc->num_ports = 7; 243 break; 244 case MV88E6172: 245 description = "Marvell 88E6172"; 246 sc->num_ports = 7; 247 break; 248 case MV88E6176: 249 description = "Marvell 88E6176"; 250 sc->num_ports = 7; 251 break; 252 default: 253 device_printf(dev, "Unrecognized device, id 0x%x.\n", sc->swid); 254 return (ENXIO); 255 } 256 257 device_set_desc(dev, description); 258 259 return (BUS_PROBE_DEFAULT); 260 } 261 262 static int 263 e6000sw_parse_child_fdt(e6000sw_softc_t *sc, phandle_t child, int *pport) 264 { 265 char *name, *portlabel; 266 int speed; 267 phandle_t fixed_link; 268 uint32_t port; 269 270 if (pport == NULL) 271 return (ENXIO); 272 273 if (OF_getencprop(child, "reg", (void *)&port, sizeof(port)) < 0) 274 return (ENXIO); 275 if (port >= sc->num_ports) 276 return (ENXIO); 277 *pport = port; 278 279 if (OF_getprop_alloc(child, "label", 1, (void **)&portlabel) > 0) { 280 if (strncmp(portlabel, "cpu", 3) == 0) { 281 device_printf(sc->dev, "CPU port at %d\n", port); 282 sc->cpuports_mask |= (1 << port); 283 sc->fixed_mask |= (1 << port); 284 } 285 free(portlabel, M_OFWPROP); 286 } 287 288 fixed_link = OF_child(child); 289 if (fixed_link != 0 && 290 OF_getprop_alloc(fixed_link, "name", 1, (void **)&name) > 0) { 291 if (strncmp(name, "fixed-link", 10) == 0) { 292 /* Assume defaults: 1g - full-duplex. */ 293 sc->fixed_mask |= (1 << port); 294 if (OF_getencprop(fixed_link, "speed", &speed, 295 sizeof(speed)) > 0) { 296 if (speed == 2500 && 297 (MVSWITCH(sc, MV88E6141) || 298 MVSWITCH(sc, MV88E6341))) { 299 sc->fixed25_mask |= (1 << port); 300 } 301 } 302 } 303 free(name, M_OFWPROP); 304 } 305 if ((sc->fixed_mask & (1 << port)) != 0) 306 device_printf(sc->dev, "fixed port at %d\n", port); 307 else 308 device_printf(sc->dev, "PHY at port %d\n", port); 309 310 return (0); 311 } 312 313 static int 314 e6000sw_init_interface(e6000sw_softc_t *sc, int port) 315 { 316 char name[IFNAMSIZ]; 317 318 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->dev)); 319 320 sc->ifp[port] = if_alloc(IFT_ETHER); 321 if (sc->ifp[port] == NULL) 322 return (ENOMEM); 323 sc->ifp[port]->if_softc = sc; 324 sc->ifp[port]->if_flags |= IFF_UP | IFF_BROADCAST | 325 IFF_DRV_RUNNING | IFF_SIMPLEX; 326 sc->ifname[port] = malloc(strlen(name) + 1, M_E6000SW, M_NOWAIT); 327 if (sc->ifname[port] == NULL) { 328 if_free(sc->ifp[port]); 329 return (ENOMEM); 330 } 331 memcpy(sc->ifname[port], name, strlen(name) + 1); 332 if_initname(sc->ifp[port], sc->ifname[port], port); 333 334 return (0); 335 } 336 337 static int 338 e6000sw_attach_miibus(e6000sw_softc_t *sc, int port) 339 { 340 int err; 341 342 err = mii_attach(sc->dev, &sc->miibus[port], sc->ifp[port], 343 e6000sw_ifmedia_upd, e6000sw_ifmedia_sts, BMSR_DEFCAPMASK, 344 port + sc->phy_base, MII_OFFSET_ANY, 0); 345 if (err != 0) 346 return (err); 347 348 return (0); 349 } 350 351 static int 352 e6000sw_attach(device_t dev) 353 { 354 e6000sw_softc_t *sc; 355 phandle_t child; 356 int err, port; 357 uint32_t reg; 358 359 err = 0; 360 sc = device_get_softc(dev); 361 362 if (sc->multi_chip) 363 device_printf(dev, "multi-chip addressing mode\n"); 364 else 365 device_printf(dev, "single-chip addressing mode\n"); 366 367 sx_init(&sc->sx, "e6000sw"); 368 369 E6000SW_LOCK(sc); 370 e6000sw_setup(dev, sc); 371 372 for (child = OF_child(sc->node); child != 0; child = OF_peer(child)) { 373 err = e6000sw_parse_child_fdt(sc, child, &port); 374 if (err != 0) { 375 device_printf(sc->dev, "failed to parse DTS\n"); 376 goto out_fail; 377 } 378 379 /* Port is in use. */ 380 sc->ports_mask |= (1 << port); 381 382 err = e6000sw_init_interface(sc, port); 383 if (err != 0) { 384 device_printf(sc->dev, "failed to init interface\n"); 385 goto out_fail; 386 } 387 388 if (e6000sw_is_fixedport(sc, port)) { 389 /* Link must be down to change speed force value. */ 390 reg = e6000sw_readreg(sc, REG_PORT(port), PSC_CONTROL); 391 reg &= ~PSC_CONTROL_LINK_UP; 392 reg |= PSC_CONTROL_FORCED_LINK; 393 e6000sw_writereg(sc, REG_PORT(port), PSC_CONTROL, reg); 394 395 /* 396 * Force speed, full-duplex, EEE off and flow-control 397 * on. 398 */ 399 if (e6000sw_is_fixed25port(sc, port)) 400 reg = PSC_CONTROL_SPD2500; 401 else 402 reg = PSC_CONTROL_SPD1000; 403 reg |= PSC_CONTROL_FORCED_DPX | PSC_CONTROL_FULLDPX | 404 PSC_CONTROL_FORCED_LINK | PSC_CONTROL_LINK_UP | 405 PSC_CONTROL_FORCED_FC | PSC_CONTROL_FC_ON | 406 PSC_CONTROL_FORCED_SPD; 407 if (MVSWITCH(sc, MV88E6141) || MVSWITCH(sc, MV88E6341)) 408 reg |= PSC_CONTROL_FORCED_EEE; 409 e6000sw_writereg(sc, REG_PORT(port), PSC_CONTROL, reg); 410 } 411 412 /* Don't attach miibus at CPU/fixed ports */ 413 if (!e6000sw_is_phyport(sc, port)) 414 continue; 415 416 err = e6000sw_attach_miibus(sc, port); 417 if (err != 0) { 418 device_printf(sc->dev, "failed to attach miibus\n"); 419 goto out_fail; 420 } 421 } 422 423 etherswitch_info.es_nports = sc->num_ports; 424 425 /* Default to port vlan. */ 426 e6000sw_port_vlan_conf(sc); 427 E6000SW_UNLOCK(sc); 428 429 bus_generic_probe(dev); 430 bus_generic_attach(dev); 431 432 kproc_create(e6000sw_tick, sc, &sc->kproc, 0, 0, "e6000sw tick kproc"); 433 434 return (0); 435 436 out_fail: 437 E6000SW_UNLOCK(sc); 438 e6000sw_detach(dev); 439 440 return (err); 441 } 442 443 static __inline int 444 e6000sw_poll_done(e6000sw_softc_t *sc) 445 { 446 int i; 447 448 for (i = 0; i < E6000SW_SMI_TIMEOUT; i++) { 449 450 if ((e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG) & 451 (1 << PHY_CMD_SMI_BUSY)) == 0) 452 return (0); 453 454 pause("e6000sw PHY poll", hz/1000); 455 } 456 457 return (ETIMEDOUT); 458 } 459 460 /* 461 * PHY registers are paged. Put page index in reg 22 (accessible from every 462 * page), then access specific register. 463 */ 464 static int 465 e6000sw_readphy(device_t dev, int phy, int reg) 466 { 467 e6000sw_softc_t *sc; 468 uint32_t val; 469 int err; 470 471 sc = device_get_softc(dev); 472 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) { 473 device_printf(dev, "Wrong register address.\n"); 474 return (EINVAL); 475 } 476 477 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 478 479 err = e6000sw_poll_done(sc); 480 if (err != 0) { 481 device_printf(dev, "Timeout while waiting for switch\n"); 482 return (err); 483 } 484 485 val = 1 << PHY_CMD_SMI_BUSY; 486 val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE; 487 val |= PHY_CMD_OPCODE_READ << PHY_CMD_OPCODE; 488 val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK; 489 val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK; 490 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val); 491 492 err = e6000sw_poll_done(sc); 493 if (err != 0) { 494 device_printf(dev, "Timeout while waiting for switch\n"); 495 return (err); 496 } 497 498 val = e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG); 499 500 return (val & PHY_DATA_MASK); 501 } 502 503 static int 504 e6000sw_writephy(device_t dev, int phy, int reg, int data) 505 { 506 e6000sw_softc_t *sc; 507 uint32_t val; 508 int err; 509 510 sc = device_get_softc(dev); 511 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) { 512 device_printf(dev, "Wrong register address.\n"); 513 return (EINVAL); 514 } 515 516 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 517 518 err = e6000sw_poll_done(sc); 519 if (err != 0) { 520 device_printf(dev, "Timeout while waiting for switch\n"); 521 return (err); 522 } 523 524 val = 1 << PHY_CMD_SMI_BUSY; 525 val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE; 526 val |= PHY_CMD_OPCODE_WRITE << PHY_CMD_OPCODE; 527 val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK; 528 val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK; 529 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG, 530 data & PHY_DATA_MASK); 531 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val); 532 533 err = e6000sw_poll_done(sc); 534 if (err != 0) 535 device_printf(dev, "Timeout while waiting for switch\n"); 536 537 return (err); 538 } 539 540 static int 541 e6000sw_detach(device_t dev) 542 { 543 int phy; 544 e6000sw_softc_t *sc; 545 546 sc = device_get_softc(dev); 547 bus_generic_detach(dev); 548 sx_destroy(&sc->sx); 549 for (phy = 0; phy < sc->num_ports; phy++) { 550 if (sc->miibus[phy] != NULL) 551 device_delete_child(dev, sc->miibus[phy]); 552 if (sc->ifp[phy] != NULL) 553 if_free(sc->ifp[phy]); 554 if (sc->ifname[phy] != NULL) 555 free(sc->ifname[phy], M_E6000SW); 556 } 557 558 return (0); 559 } 560 561 static etherswitch_info_t* 562 e6000sw_getinfo(device_t dev) 563 { 564 565 return (ðerswitch_info); 566 } 567 568 static int 569 e6000sw_getconf(device_t dev, etherswitch_conf_t *conf) 570 { 571 struct e6000sw_softc *sc; 572 573 /* Return the VLAN mode. */ 574 sc = device_get_softc(dev); 575 conf->cmd = ETHERSWITCH_CONF_VLAN_MODE; 576 conf->vlan_mode = sc->vlan_mode; 577 578 return (0); 579 } 580 581 static void 582 e6000sw_lock(device_t dev) 583 { 584 struct e6000sw_softc *sc; 585 586 sc = device_get_softc(dev); 587 588 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 589 E6000SW_LOCK(sc); 590 } 591 592 static void 593 e6000sw_unlock(device_t dev) 594 { 595 struct e6000sw_softc *sc; 596 597 sc = device_get_softc(dev); 598 599 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 600 E6000SW_UNLOCK(sc); 601 } 602 603 static int 604 e6000sw_getport(device_t dev, etherswitch_port_t *p) 605 { 606 struct mii_data *mii; 607 int err; 608 struct ifmediareq *ifmr; 609 610 e6000sw_softc_t *sc = device_get_softc(dev); 611 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 612 613 if (p->es_port >= sc->num_ports || p->es_port < 0) 614 return (EINVAL); 615 if (!e6000sw_is_portenabled(sc, p->es_port)) 616 return (0); 617 618 err = 0; 619 E6000SW_LOCK(sc); 620 e6000sw_get_pvid(sc, p->es_port, &p->es_pvid); 621 622 if (e6000sw_is_fixedport(sc, p->es_port)) { 623 if (e6000sw_is_cpuport(sc, p->es_port)) 624 p->es_flags |= ETHERSWITCH_PORT_CPU; 625 ifmr = &p->es_ifmr; 626 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID; 627 ifmr->ifm_count = 0; 628 if (e6000sw_is_fixed25port(sc, p->es_port)) 629 ifmr->ifm_active = IFM_2500_T; 630 else 631 ifmr->ifm_active = IFM_1000_T; 632 ifmr->ifm_active |= IFM_ETHER | IFM_FDX; 633 ifmr->ifm_current = ifmr->ifm_active; 634 ifmr->ifm_mask = 0; 635 } else { 636 mii = e6000sw_miiforphy(sc, p->es_port); 637 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, 638 &mii->mii_media, SIOCGIFMEDIA); 639 } 640 E6000SW_UNLOCK(sc); 641 642 return (err); 643 } 644 645 static int 646 e6000sw_setport(device_t dev, etherswitch_port_t *p) 647 { 648 e6000sw_softc_t *sc; 649 int err; 650 struct mii_data *mii; 651 652 sc = device_get_softc(dev); 653 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 654 655 if (p->es_port >= sc->num_ports || p->es_port < 0) 656 return (EINVAL); 657 if (!e6000sw_is_portenabled(sc, p->es_port)) 658 return (0); 659 660 err = 0; 661 E6000SW_LOCK(sc); 662 if (p->es_pvid != 0) 663 e6000sw_set_pvid(sc, p->es_port, p->es_pvid); 664 if (e6000sw_is_phyport(sc, p->es_port)) { 665 mii = e6000sw_miiforphy(sc, p->es_port); 666 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, &mii->mii_media, 667 SIOCSIFMEDIA); 668 } 669 E6000SW_UNLOCK(sc); 670 671 return (err); 672 } 673 674 /* 675 * Registers in this switch are divided into sections, specified in 676 * documentation. So as to access any of them, section index and reg index 677 * is necessary. etherswitchcfg uses only one variable, so indexes were 678 * compressed into addr_reg: 32 * section_index + reg_index. 679 */ 680 static int 681 e6000sw_readreg_wrapper(device_t dev, int addr_reg) 682 { 683 684 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) || 685 (addr_reg < (REG_PORT(0) * 32))) { 686 device_printf(dev, "Wrong register address.\n"); 687 return (EINVAL); 688 } 689 690 return (e6000sw_readreg(device_get_softc(dev), addr_reg / 32, 691 addr_reg % 32)); 692 } 693 694 static int 695 e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val) 696 { 697 698 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) || 699 (addr_reg < (REG_PORT(0) * 32))) { 700 device_printf(dev, "Wrong register address.\n"); 701 return (EINVAL); 702 } 703 e6000sw_writereg(device_get_softc(dev), addr_reg / 5, 704 addr_reg % 32, val); 705 706 return (0); 707 } 708 709 /* 710 * These wrappers are necessary because PHY accesses from etherswitchcfg 711 * need to be synchronized with locks, while miibus PHY accesses do not. 712 */ 713 static int 714 e6000sw_readphy_wrapper(device_t dev, int phy, int reg) 715 { 716 e6000sw_softc_t *sc; 717 int ret; 718 719 sc = device_get_softc(dev); 720 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 721 722 E6000SW_LOCK(sc); 723 ret = e6000sw_readphy(dev, phy, reg); 724 E6000SW_UNLOCK(sc); 725 726 return (ret); 727 } 728 729 static int 730 e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data) 731 { 732 e6000sw_softc_t *sc; 733 int ret; 734 735 sc = device_get_softc(dev); 736 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 737 738 E6000SW_LOCK(sc); 739 ret = e6000sw_writephy(dev, phy, reg, data); 740 E6000SW_UNLOCK(sc); 741 742 return (ret); 743 } 744 745 /* 746 * setvgroup/getvgroup called from etherswitchfcg need to be locked, 747 * while internal calls do not. 748 */ 749 static int 750 e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg) 751 { 752 e6000sw_softc_t *sc; 753 int ret; 754 755 sc = device_get_softc(dev); 756 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 757 758 E6000SW_LOCK(sc); 759 ret = e6000sw_setvgroup(dev, vg); 760 E6000SW_UNLOCK(sc); 761 762 return (ret); 763 } 764 765 static int 766 e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg) 767 { 768 e6000sw_softc_t *sc; 769 int ret; 770 771 sc = device_get_softc(dev); 772 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 773 774 E6000SW_LOCK(sc); 775 ret = e6000sw_getvgroup(dev, vg); 776 E6000SW_UNLOCK(sc); 777 778 return (ret); 779 } 780 781 static __inline void 782 e6000sw_port_vlan_assign(e6000sw_softc_t *sc, int port, uint32_t fid, 783 uint32_t members) 784 { 785 uint32_t reg; 786 787 reg = e6000sw_readreg(sc, REG_PORT(port), PORT_VLAN_MAP); 788 reg &= ~PORT_VLAN_MAP_TABLE_MASK; 789 reg &= ~PORT_VLAN_MAP_FID_MASK; 790 reg |= members & PORT_VLAN_MAP_TABLE_MASK & ~(1 << port); 791 reg |= (fid << PORT_VLAN_MAP_FID) & PORT_VLAN_MAP_FID_MASK; 792 e6000sw_writereg(sc, REG_PORT(port), PORT_VLAN_MAP, reg); 793 reg = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL_1); 794 reg &= ~PORT_CONTROL_1_FID_MASK; 795 reg |= (fid >> 4) & PORT_CONTROL_1_FID_MASK; 796 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL_1, reg); 797 } 798 799 static int 800 e6000sw_set_port_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg) 801 { 802 uint32_t port; 803 804 port = vg->es_vlangroup; 805 if (port > sc->num_ports) 806 return (EINVAL); 807 808 if (vg->es_member_ports != vg->es_untagged_ports) { 809 device_printf(sc->dev, "Tagged ports not supported.\n"); 810 return (EINVAL); 811 } 812 813 e6000sw_port_vlan_assign(sc, port, port + 1, vg->es_untagged_ports); 814 vg->es_vid = port | ETHERSWITCH_VID_VALID; 815 816 return (0); 817 } 818 819 static int 820 e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg) 821 { 822 e6000sw_softc_t *sc; 823 824 sc = device_get_softc(dev); 825 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 826 827 if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT) 828 return (e6000sw_set_port_vlan(sc, vg)); 829 830 return (EINVAL); 831 } 832 833 static int 834 e6000sw_get_port_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg) 835 { 836 uint32_t port, reg; 837 838 port = vg->es_vlangroup; 839 if (port > sc->num_ports) 840 return (EINVAL); 841 842 if (!e6000sw_is_portenabled(sc, port)) { 843 vg->es_vid = port; 844 return (0); 845 } 846 847 reg = e6000sw_readreg(sc, REG_PORT(port), PORT_VLAN_MAP); 848 vg->es_untagged_ports = vg->es_member_ports = 849 reg & PORT_VLAN_MAP_TABLE_MASK; 850 vg->es_vid = port | ETHERSWITCH_VID_VALID; 851 vg->es_fid = (reg & PORT_VLAN_MAP_FID_MASK) >> PORT_VLAN_MAP_FID; 852 reg = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL_1); 853 vg->es_fid |= (reg & PORT_CONTROL_1_FID_MASK) << 4; 854 855 return (0); 856 } 857 858 static int 859 e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg) 860 { 861 e6000sw_softc_t *sc; 862 863 sc = device_get_softc(dev); 864 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 865 866 if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT) 867 return (e6000sw_get_port_vlan(sc, vg)); 868 869 return (EINVAL); 870 } 871 872 static __inline struct mii_data* 873 e6000sw_miiforphy(e6000sw_softc_t *sc, unsigned int phy) 874 { 875 876 if (!e6000sw_is_phyport(sc, phy)) 877 return (NULL); 878 879 return (device_get_softc(sc->miibus[phy])); 880 } 881 882 static int 883 e6000sw_ifmedia_upd(struct ifnet *ifp) 884 { 885 e6000sw_softc_t *sc; 886 struct mii_data *mii; 887 888 sc = ifp->if_softc; 889 mii = e6000sw_miiforphy(sc, ifp->if_dunit); 890 if (mii == NULL) 891 return (ENXIO); 892 mii_mediachg(mii); 893 894 return (0); 895 } 896 897 static void 898 e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 899 { 900 e6000sw_softc_t *sc; 901 struct mii_data *mii; 902 903 sc = ifp->if_softc; 904 mii = e6000sw_miiforphy(sc, ifp->if_dunit); 905 906 if (mii == NULL) 907 return; 908 909 mii_pollstat(mii); 910 ifmr->ifm_active = mii->mii_media_active; 911 ifmr->ifm_status = mii->mii_media_status; 912 } 913 914 static int 915 e6000sw_smi_waitready(e6000sw_softc_t *sc, int phy) 916 { 917 int i; 918 919 for (i = 0; i < E6000SW_SMI_TIMEOUT; i++) { 920 if ((MDIO_READ(sc->dev, phy, SMI_CMD) & SMI_CMD_BUSY) == 0) 921 return (0); 922 DELAY(1); 923 } 924 925 return (1); 926 } 927 928 static __inline uint32_t 929 e6000sw_readreg(e6000sw_softc_t *sc, int addr, int reg) 930 { 931 932 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 933 934 if (!sc->multi_chip) 935 return (MDIO_READ(sc->dev, addr, reg) & 0xffff); 936 937 if (e6000sw_smi_waitready(sc, sc->sw_addr)) { 938 printf("e6000sw: readreg timeout\n"); 939 return (0xffff); 940 } 941 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD, 942 SMI_CMD_OP_READ | (addr << 5) | reg); 943 if (e6000sw_smi_waitready(sc, sc->sw_addr)) { 944 printf("e6000sw: readreg timeout\n"); 945 return (0xffff); 946 } 947 948 return (MDIO_READ(sc->dev, sc->sw_addr, SMI_DATA) & 0xffff); 949 } 950 951 static __inline void 952 e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, int val) 953 { 954 955 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED); 956 957 if (!sc->multi_chip) { 958 MDIO_WRITE(sc->dev, addr, reg, val); 959 return; 960 } 961 962 if (e6000sw_smi_waitready(sc, sc->sw_addr)) { 963 printf("e6000sw: readreg timeout\n"); 964 return; 965 } 966 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_DATA, val); 967 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD, 968 SMI_CMD_OP_WRITE | (addr << 5) | reg); 969 if (e6000sw_smi_waitready(sc, sc->sw_addr)) { 970 printf("e6000sw: readreg timeout\n"); 971 return; 972 } 973 } 974 975 static __inline bool 976 e6000sw_is_cpuport(e6000sw_softc_t *sc, int port) 977 { 978 979 return ((sc->cpuports_mask & (1 << port)) ? true : false); 980 } 981 982 static __inline bool 983 e6000sw_is_fixedport(e6000sw_softc_t *sc, int port) 984 { 985 986 return ((sc->fixed_mask & (1 << port)) ? true : false); 987 } 988 989 static __inline bool 990 e6000sw_is_fixed25port(e6000sw_softc_t *sc, int port) 991 { 992 993 return ((sc->fixed25_mask & (1 << port)) ? true : false); 994 } 995 996 static __inline bool 997 e6000sw_is_phyport(e6000sw_softc_t *sc, int port) 998 { 999 uint32_t phy_mask; 1000 phy_mask = ~(sc->fixed_mask | sc->cpuports_mask); 1001 1002 return ((phy_mask & (1 << port)) ? true : false); 1003 } 1004 1005 static __inline bool 1006 e6000sw_is_portenabled(e6000sw_softc_t *sc, int port) 1007 { 1008 1009 return ((sc->ports_mask & (1 << port)) ? true : false); 1010 } 1011 1012 static __inline int 1013 e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid) 1014 { 1015 1016 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, pvid & 1017 PORT_VID_DEF_VID_MASK); 1018 1019 return (0); 1020 } 1021 1022 static __inline int 1023 e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid) 1024 { 1025 1026 if (pvid == NULL) 1027 return (ENXIO); 1028 1029 *pvid = e6000sw_readreg(sc, REG_PORT(port), PORT_VID) & 1030 PORT_VID_DEF_VID_MASK; 1031 1032 return (0); 1033 } 1034 1035 /* 1036 * Convert port status to ifmedia. 1037 */ 1038 static void 1039 e6000sw_update_ifmedia(uint16_t portstatus, u_int *media_status, u_int *media_active) 1040 { 1041 *media_active = IFM_ETHER; 1042 *media_status = IFM_AVALID; 1043 1044 if ((portstatus & PORT_STATUS_LINK_MASK) != 0) 1045 *media_status |= IFM_ACTIVE; 1046 else { 1047 *media_active |= IFM_NONE; 1048 return; 1049 } 1050 1051 switch (portstatus & PORT_STATUS_SPEED_MASK) { 1052 case PORT_STATUS_SPEED_10: 1053 *media_active |= IFM_10_T; 1054 break; 1055 case PORT_STATUS_SPEED_100: 1056 *media_active |= IFM_100_TX; 1057 break; 1058 case PORT_STATUS_SPEED_1000: 1059 *media_active |= IFM_1000_T; 1060 break; 1061 } 1062 1063 if ((portstatus & PORT_STATUS_DUPLEX_MASK) == 0) 1064 *media_active |= IFM_FDX; 1065 else 1066 *media_active |= IFM_HDX; 1067 } 1068 1069 static void 1070 e6000sw_tick (void *arg) 1071 { 1072 e6000sw_softc_t *sc; 1073 struct mii_data *mii; 1074 struct mii_softc *miisc; 1075 uint16_t portstatus; 1076 int port; 1077 1078 sc = arg; 1079 1080 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED); 1081 1082 for (;;) { 1083 E6000SW_LOCK(sc); 1084 for (port = 0; port < sc->num_ports; port++) { 1085 /* Tick only on PHY ports */ 1086 if (!e6000sw_is_portenabled(sc, port) || 1087 !e6000sw_is_phyport(sc, port)) 1088 continue; 1089 1090 mii = e6000sw_miiforphy(sc, port); 1091 if (mii == NULL) 1092 continue; 1093 1094 portstatus = e6000sw_readreg(sc, REG_PORT(port), 1095 PORT_STATUS); 1096 1097 e6000sw_update_ifmedia(portstatus, 1098 &mii->mii_media_status, &mii->mii_media_active); 1099 1100 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) { 1101 if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) 1102 != miisc->mii_inst) 1103 continue; 1104 mii_phy_update(miisc, MII_POLLSTAT); 1105 } 1106 } 1107 E6000SW_UNLOCK(sc); 1108 pause("e6000sw tick", 1000); 1109 } 1110 } 1111 1112 static void 1113 e6000sw_setup(device_t dev, e6000sw_softc_t *sc) 1114 { 1115 uint16_t atu_ctrl, atu_age; 1116 1117 /* Set aging time */ 1118 e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL, 1119 (E6000SW_DEFAULT_AGETIME << ATU_CONTROL_AGETIME) | 1120 (1 << ATU_CONTROL_LEARN2ALL)); 1121 1122 /* Send all with specific mac address to cpu port */ 1123 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_2x, MGMT_EN_ALL); 1124 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_0x, MGMT_EN_ALL); 1125 1126 /* Disable Remote Management */ 1127 e6000sw_writereg(sc, REG_GLOBAL, SWITCH_GLOBAL_CONTROL2, 0); 1128 1129 /* Disable loopback filter and flow control messages */ 1130 e6000sw_writereg(sc, REG_GLOBAL2, SWITCH_MGMT, 1131 SWITCH_MGMT_PRI_MASK | 1132 (1 << SWITCH_MGMT_RSVD2CPU) | 1133 SWITCH_MGMT_FC_PRI_MASK | 1134 (1 << SWITCH_MGMT_FORCEFLOW)); 1135 1136 e6000sw_atu_flush(dev, sc, NO_OPERATION); 1137 e6000sw_atu_mac_table(dev, sc, NULL, NO_OPERATION); 1138 e6000sw_set_atustat(dev, sc, 0, COUNT_ALL); 1139 1140 /* Set ATU AgeTime to 15 seconds */ 1141 atu_age = 1; 1142 1143 atu_ctrl = e6000sw_readreg(sc, REG_GLOBAL, ATU_CONTROL); 1144 1145 /* Set new AgeTime field */ 1146 atu_ctrl &= ~ATU_CONTROL_AGETIME_MASK; 1147 e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL, atu_ctrl | 1148 (atu_age << ATU_CONTROL_AGETIME)); 1149 } 1150 1151 static void 1152 e6000sw_port_vlan_conf(e6000sw_softc_t *sc) 1153 { 1154 int i, port, ret; 1155 uint32_t members; 1156 1157 /* Disable all ports */ 1158 for (port = 0; port < sc->num_ports; port++) { 1159 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL); 1160 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL, 1161 (ret & ~PORT_CONTROL_ENABLE)); 1162 } 1163 1164 /* Set port priority */ 1165 for (port = 0; port < sc->num_ports; port++) { 1166 if (!e6000sw_is_portenabled(sc, port)) 1167 continue; 1168 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID); 1169 ret &= ~PORT_VID_PRIORITY_MASK; 1170 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret); 1171 } 1172 1173 /* Set VID map */ 1174 for (port = 0; port < sc->num_ports; port++) { 1175 if (!e6000sw_is_portenabled(sc, port)) 1176 continue; 1177 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID); 1178 ret &= ~PORT_VID_DEF_VID_MASK; 1179 ret |= (port + 1); 1180 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret); 1181 } 1182 1183 /* Enable all ports */ 1184 for (port = 0; port < sc->num_ports; port++) { 1185 if (!e6000sw_is_portenabled(sc, port)) 1186 continue; 1187 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL); 1188 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL, 1189 (ret | PORT_CONTROL_ENABLE)); 1190 } 1191 1192 /* Set VLAN mode. */ 1193 sc->vlan_mode = ETHERSWITCH_VLAN_PORT; 1194 etherswitch_info.es_nvlangroups = sc->num_ports; 1195 for (port = 0; port < sc->num_ports; port++) { 1196 members = 0; 1197 if (e6000sw_is_portenabled(sc, port)) { 1198 for (i = 0; i < sc->num_ports; i++) { 1199 if (i == port || !e6000sw_is_portenabled(sc, i)) 1200 continue; 1201 members |= (1 << i); 1202 } 1203 } 1204 e6000sw_port_vlan_assign(sc, port, port + 1, members); 1205 } 1206 } 1207 1208 static void 1209 e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin, int flag) 1210 { 1211 uint16_t ret; 1212 1213 ret = e6000sw_readreg(sc, REG_GLOBAL2, ATU_STATS); 1214 e6000sw_writereg(sc, REG_GLOBAL2, ATU_STATS, (bin << ATU_STATS_BIN ) | 1215 (flag << ATU_STATS_FLAG)); 1216 } 1217 1218 static int 1219 e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct atu_opt *atu, 1220 int flag) 1221 { 1222 uint16_t ret_opt; 1223 uint16_t ret_data; 1224 int retries; 1225 1226 if (flag == NO_OPERATION) 1227 return (0); 1228 else if ((flag & (LOAD_FROM_FIB | PURGE_FROM_FIB | GET_NEXT_IN_FIB | 1229 GET_VIOLATION_DATA | CLEAR_VIOLATION_DATA)) == 0) { 1230 device_printf(dev, "Wrong Opcode for ATU operation\n"); 1231 return (EINVAL); 1232 } 1233 1234 ret_opt = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION); 1235 1236 if (ret_opt & ATU_UNIT_BUSY) { 1237 device_printf(dev, "ATU unit is busy, cannot access" 1238 "register\n"); 1239 return (EBUSY); 1240 } else { 1241 if(flag & LOAD_FROM_FIB) { 1242 ret_data = e6000sw_readreg(sc, REG_GLOBAL, ATU_DATA); 1243 e6000sw_writereg(sc, REG_GLOBAL2, ATU_DATA, (ret_data & 1244 ~ENTRY_STATE)); 1245 } 1246 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR01, atu->mac_01); 1247 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR23, atu->mac_23); 1248 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR45, atu->mac_45); 1249 e6000sw_writereg(sc, REG_GLOBAL, ATU_FID, atu->fid); 1250 1251 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret_opt | 1252 ATU_UNIT_BUSY | flag)); 1253 1254 retries = E6000SW_RETRIES; 1255 while (--retries & (e6000sw_readreg(sc, REG_GLOBAL, 1256 ATU_OPERATION) & ATU_UNIT_BUSY)) 1257 DELAY(1); 1258 1259 if (retries == 0) 1260 device_printf(dev, "Timeout while flushing\n"); 1261 else if (flag & GET_NEXT_IN_FIB) { 1262 atu->mac_01 = e6000sw_readreg(sc, REG_GLOBAL, 1263 ATU_MAC_ADDR01); 1264 atu->mac_23 = e6000sw_readreg(sc, REG_GLOBAL, 1265 ATU_MAC_ADDR23); 1266 atu->mac_45 = e6000sw_readreg(sc, REG_GLOBAL, 1267 ATU_MAC_ADDR45); 1268 } 1269 } 1270 1271 return (0); 1272 } 1273 1274 static int 1275 e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag) 1276 { 1277 uint16_t ret; 1278 int retries; 1279 1280 if (flag == NO_OPERATION) 1281 return (0); 1282 1283 ret = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION); 1284 if (ret & ATU_UNIT_BUSY) { 1285 device_printf(dev, "Atu unit is busy, cannot flush\n"); 1286 return (EBUSY); 1287 } else { 1288 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret | 1289 ATU_UNIT_BUSY | flag)); 1290 retries = E6000SW_RETRIES; 1291 while (--retries & (e6000sw_readreg(sc, REG_GLOBAL, 1292 ATU_OPERATION) & ATU_UNIT_BUSY)) 1293 DELAY(1); 1294 1295 if (retries == 0) 1296 device_printf(dev, "Timeout while flushing\n"); 1297 } 1298 1299 return (0); 1300 } 1301