1 /*- 2 * Copyright (c) 2013 Luiz Otavio O Souza. 3 * Copyright (c) 2011-2012 Stefan Bethke. 4 * Copyright (c) 2012 Adrian Chadd. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #include <sys/param.h> 32 #include <sys/bus.h> 33 #include <sys/errno.h> 34 #include <sys/lock.h> 35 #include <sys/kernel.h> 36 #include <sys/mutex.h> 37 #include <sys/systm.h> 38 #include <sys/socket.h> 39 40 #include <net/if.h> 41 #include <dev/mii/mii.h> 42 43 #include <dev/etherswitch/etherswitch.h> 44 #include <dev/etherswitch/arswitch/arswitchreg.h> 45 #include <dev/etherswitch/arswitch/arswitchvar.h> 46 #include <dev/etherswitch/arswitch/arswitch_reg.h> 47 #include <dev/etherswitch/arswitch/arswitch_vlans.h> 48 49 #include "mdio_if.h" 50 #include "miibus_if.h" 51 #include "etherswitch_if.h" 52 53 /* 54 * XXX TODO: teach about the AR933x SoC switch 55 * XXX TODO: teach about the AR934x SoC switch 56 */ 57 58 static int 59 ar8xxx_vlan_op(struct arswitch_softc *sc, uint32_t op, uint32_t vid, 60 uint32_t data) 61 { 62 int err; 63 64 if (arswitch_waitreg(sc->sc_dev, AR8X16_REG_VLAN_CTRL, 65 AR8X16_VLAN_ACTIVE, 0, 5)) 66 return (EBUSY); 67 68 /* Load the vlan data if needed. */ 69 if (op == AR8X16_VLAN_OP_LOAD) { 70 err = arswitch_writereg(sc->sc_dev, AR8X16_REG_VLAN_DATA, 71 (data & AR8X16_VLAN_MEMBER) | AR8X16_VLAN_VALID); 72 if (err) 73 return (err); 74 } 75 76 if (vid != 0) 77 op |= ((vid & ETHERSWITCH_VID_MASK) << AR8X16_VLAN_VID_SHIFT); 78 op |= AR8X16_VLAN_ACTIVE; 79 arswitch_writereg(sc->sc_dev, AR8X16_REG_VLAN_CTRL, op); 80 81 /* Wait for command processing. */ 82 if (arswitch_waitreg(sc->sc_dev, AR8X16_REG_VLAN_CTRL, 83 AR8X16_VLAN_ACTIVE, 0, 5)) 84 return (EBUSY); 85 86 return (0); 87 } 88 89 int 90 ar8xxx_flush_dot1q_vlan(struct arswitch_softc *sc) 91 { 92 93 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED); 94 return (ar8xxx_vlan_op(sc, AR8X16_VLAN_OP_FLUSH, 0, 0)); 95 } 96 97 int 98 ar8xxx_purge_dot1q_vlan(struct arswitch_softc *sc, int vid) 99 { 100 101 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED); 102 return (ar8xxx_vlan_op(sc, AR8X16_VLAN_OP_PURGE, vid, 0)); 103 } 104 105 int 106 ar8xxx_get_dot1q_vlan(struct arswitch_softc *sc, uint32_t *ports, int vid) 107 { 108 uint32_t reg; 109 int err; 110 111 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED); 112 err = ar8xxx_vlan_op(sc, AR8X16_VLAN_OP_GET, vid, 0); 113 if (err) 114 return (err); 115 116 reg = arswitch_readreg(sc->sc_dev, AR8X16_REG_VLAN_DATA); 117 if ((reg & AR8X16_VLAN_VALID) == 0) { 118 *ports = 0; 119 return (EINVAL); 120 } 121 reg &= ((1 << (sc->numphys + 1)) - 1); 122 *ports = reg; 123 return (0); 124 } 125 126 int 127 ar8xxx_set_dot1q_vlan(struct arswitch_softc *sc, uint32_t ports, int vid) 128 { 129 int err; 130 131 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED); 132 err = ar8xxx_vlan_op(sc, AR8X16_VLAN_OP_LOAD, vid, ports); 133 if (err) 134 return (err); 135 return (0); 136 } 137 138 int 139 ar8xxx_get_port_vlan(struct arswitch_softc *sc, uint32_t *ports, int vid) 140 { 141 int port; 142 uint32_t reg; 143 144 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED); 145 /* For port based vlans the vlanid is the same as the port index. */ 146 port = vid & ETHERSWITCH_VID_MASK; 147 reg = arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_VLAN(port)); 148 *ports = (reg >> AR8X16_PORT_VLAN_DEST_PORTS_SHIFT); 149 *ports &= AR8X16_VLAN_MEMBER; 150 return (0); 151 } 152 153 int 154 ar8xxx_set_port_vlan(struct arswitch_softc *sc, uint32_t ports, int vid) 155 { 156 int err, port; 157 158 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED); 159 /* For port based vlans the vlanid is the same as the port index. */ 160 port = vid & ETHERSWITCH_VID_MASK; 161 err = arswitch_modifyreg(sc->sc_dev, AR8X16_REG_PORT_VLAN(port), 162 AR8X16_VLAN_MEMBER << AR8X16_PORT_VLAN_DEST_PORTS_SHIFT, 163 (ports & AR8X16_VLAN_MEMBER) << AR8X16_PORT_VLAN_DEST_PORTS_SHIFT); 164 if (err) 165 return (err); 166 return (0); 167 } 168 169 /* 170 * Reset vlans to default state. 171 */ 172 void 173 ar8xxx_reset_vlans(struct arswitch_softc *sc) 174 { 175 uint32_t ports; 176 int i, j; 177 178 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); 179 180 ARSWITCH_LOCK(sc); 181 182 /* Reset all vlan data. */ 183 memset(sc->vid, 0, sizeof(sc->vid)); 184 185 /* Disable the QinQ and egress filters for all ports. */ 186 for (i = 0; i <= sc->numphys; i++) { 187 if (arswitch_modifyreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(i), 188 0x3 << AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT | 189 AR8X16_PORT_CTRL_DOUBLE_TAG, 0)) { 190 ARSWITCH_UNLOCK(sc); 191 return; 192 } 193 } 194 195 if (sc->hal.arswitch_flush_dot1q_vlan(sc)) { 196 ARSWITCH_UNLOCK(sc); 197 return; 198 } 199 200 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) { 201 /* 202 * Reset the port based vlan settings and turn on the 203 * ingress filter for all ports. 204 */ 205 ports = 0; 206 for (i = 0; i <= sc->numphys; i++) 207 arswitch_modifyreg(sc->sc_dev, 208 AR8X16_REG_PORT_VLAN(i), 209 AR8X16_PORT_VLAN_MODE_MASK | 210 AR8X16_VLAN_MEMBER << 211 AR8X16_PORT_VLAN_DEST_PORTS_SHIFT, 212 AR8X16_PORT_VLAN_MODE_SECURE << 213 AR8X16_PORT_VLAN_MODE_SHIFT); 214 215 /* 216 * Setup vlan 1 as PVID for all switch ports. Add all ports 217 * as members of vlan 1. 218 */ 219 sc->vid[0] = 1; 220 /* Set PVID for everyone. */ 221 for (i = 0; i <= sc->numphys; i++) 222 sc->hal.arswitch_vlan_set_pvid(sc, i, sc->vid[0]); 223 ports = 0; 224 for (i = 0; i <= sc->numphys; i++) 225 ports |= (1 << i); 226 sc->hal.arswitch_set_dot1q_vlan(sc, ports, sc->vid[0]); 227 sc->vid[0] |= ETHERSWITCH_VID_VALID; 228 } else if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT) { 229 /* Initialize the port based vlans. */ 230 for (i = 0; i <= sc->numphys; i++) { 231 sc->vid[i] = i | ETHERSWITCH_VID_VALID; 232 ports = 0; 233 for (j = 0; j <= sc->numphys; j++) 234 ports |= (1 << j); 235 arswitch_modifyreg(sc->sc_dev, 236 AR8X16_REG_PORT_VLAN(i), 237 AR8X16_PORT_VLAN_MODE_MASK | 238 AR8X16_VLAN_MEMBER << 239 AR8X16_PORT_VLAN_DEST_PORTS_SHIFT, 240 ports << AR8X16_PORT_VLAN_DEST_PORTS_SHIFT | 241 AR8X16_PORT_VLAN_MODE_SECURE << 242 AR8X16_PORT_VLAN_MODE_PORT_ONLY); 243 } 244 } else { 245 /* Disable the ingress filter and get everyone on all vlans. */ 246 for (i = 0; i <= sc->numphys; i++) 247 arswitch_modifyreg(sc->sc_dev, 248 AR8X16_REG_PORT_VLAN(i), 249 AR8X16_PORT_VLAN_MODE_MASK | 250 AR8X16_VLAN_MEMBER << 251 AR8X16_PORT_VLAN_DEST_PORTS_SHIFT, 252 AR8X16_VLAN_MEMBER << 253 AR8X16_PORT_VLAN_DEST_PORTS_SHIFT | 254 AR8X16_PORT_VLAN_MODE_SECURE << 255 AR8X16_PORT_VLAN_MODE_PORT_ONLY); 256 } 257 ARSWITCH_UNLOCK(sc); 258 } 259 260 int 261 ar8xxx_getvgroup(struct arswitch_softc *sc, etherswitch_vlangroup_t *vg) 262 { 263 int err; 264 265 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); 266 267 if (vg->es_vlangroup > sc->info.es_nvlangroups) 268 return (EINVAL); 269 270 /* Reset the members ports. */ 271 vg->es_untagged_ports = 0; 272 vg->es_member_ports = 0; 273 274 /* Not supported. */ 275 vg->es_fid = 0; 276 277 /* Vlan ID. */ 278 ARSWITCH_LOCK(sc); 279 vg->es_vid = sc->vid[vg->es_vlangroup]; 280 if ((vg->es_vid & ETHERSWITCH_VID_VALID) == 0) { 281 ARSWITCH_UNLOCK(sc); 282 return (0); 283 } 284 285 /* Member Ports. */ 286 switch (sc->vlan_mode) { 287 case ETHERSWITCH_VLAN_DOT1Q: 288 err = sc->hal.arswitch_get_dot1q_vlan(sc, &vg->es_member_ports, 289 vg->es_vid); 290 break; 291 case ETHERSWITCH_VLAN_PORT: 292 err = sc->hal.arswitch_get_port_vlan(sc, &vg->es_member_ports, 293 vg->es_vid); 294 break; 295 default: 296 vg->es_member_ports = 0; 297 err = -1; 298 } 299 ARSWITCH_UNLOCK(sc); 300 vg->es_untagged_ports = vg->es_member_ports; 301 return (err); 302 } 303 304 int 305 ar8xxx_setvgroup(struct arswitch_softc *sc, etherswitch_vlangroup_t *vg) 306 { 307 int err, vid; 308 309 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); 310 311 /* Check VLAN mode. */ 312 if (sc->vlan_mode == 0) 313 return (EINVAL); 314 315 /* 316 * Check if we are changing the vlanid for an already used vtu entry. 317 * Then purge the entry first. 318 */ 319 ARSWITCH_LOCK(sc); 320 vid = sc->vid[vg->es_vlangroup]; 321 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q && 322 (vid & ETHERSWITCH_VID_VALID) != 0 && 323 (vid & ETHERSWITCH_VID_MASK) != 324 (vg->es_vid & ETHERSWITCH_VID_MASK)) { 325 err = sc->hal.arswitch_purge_dot1q_vlan(sc, vid); 326 if (err) { 327 ARSWITCH_UNLOCK(sc); 328 return (err); 329 } 330 } 331 332 /* Vlan ID. */ 333 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) { 334 sc->vid[vg->es_vlangroup] = vg->es_vid & ETHERSWITCH_VID_MASK; 335 /* Setting the vlanid to zero disables the vlangroup. */ 336 if (sc->vid[vg->es_vlangroup] == 0) { 337 ARSWITCH_UNLOCK(sc); 338 return (0); 339 } 340 sc->vid[vg->es_vlangroup] |= ETHERSWITCH_VID_VALID; 341 vid = sc->vid[vg->es_vlangroup]; 342 } 343 344 /* Member Ports. */ 345 switch (sc->vlan_mode) { 346 case ETHERSWITCH_VLAN_DOT1Q: 347 err = sc->hal.arswitch_set_dot1q_vlan(sc, vg->es_member_ports, vid); 348 break; 349 case ETHERSWITCH_VLAN_PORT: 350 err = sc->hal.arswitch_set_port_vlan(sc, vg->es_member_ports, vid); 351 break; 352 default: 353 err = -1; 354 } 355 ARSWITCH_UNLOCK(sc); 356 return (err); 357 } 358 359 int 360 ar8xxx_get_pvid(struct arswitch_softc *sc, int port, int *pvid) 361 { 362 uint32_t reg; 363 364 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED); 365 reg = arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_VLAN(port)); 366 *pvid = reg & 0xfff; 367 return (0); 368 } 369 370 int 371 ar8xxx_set_pvid(struct arswitch_softc *sc, int port, int pvid) 372 { 373 374 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED); 375 return (arswitch_modifyreg(sc->sc_dev, 376 AR8X16_REG_PORT_VLAN(port), 0xfff, pvid)); 377 } 378