1a043e8c7SAdrian Chadd /*- 2*718cf2ccSPedro F. Giffuni * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3*718cf2ccSPedro F. Giffuni * 4a043e8c7SAdrian Chadd * Copyright (c) 2011-2012 Stefan Bethke. 5a043e8c7SAdrian Chadd * Copyright (c) 2012 Adrian Chadd. 6a043e8c7SAdrian Chadd * All rights reserved. 7a043e8c7SAdrian Chadd * 8a043e8c7SAdrian Chadd * Redistribution and use in source and binary forms, with or without 9a043e8c7SAdrian Chadd * modification, are permitted provided that the following conditions 10a043e8c7SAdrian Chadd * are met: 11a043e8c7SAdrian Chadd * 1. Redistributions of source code must retain the above copyright 12a043e8c7SAdrian Chadd * notice, this list of conditions and the following disclaimer. 13a043e8c7SAdrian Chadd * 2. Redistributions in binary form must reproduce the above copyright 14a043e8c7SAdrian Chadd * notice, this list of conditions and the following disclaimer in the 15a043e8c7SAdrian Chadd * documentation and/or other materials provided with the distribution. 16a043e8c7SAdrian Chadd * 17a043e8c7SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18a043e8c7SAdrian Chadd * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19a043e8c7SAdrian Chadd * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20a043e8c7SAdrian Chadd * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21a043e8c7SAdrian Chadd * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22a043e8c7SAdrian Chadd * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23a043e8c7SAdrian Chadd * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24a043e8c7SAdrian Chadd * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25a043e8c7SAdrian Chadd * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26a043e8c7SAdrian Chadd * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27a043e8c7SAdrian Chadd * SUCH DAMAGE. 28a043e8c7SAdrian Chadd * 29a043e8c7SAdrian Chadd * $FreeBSD$ 30a043e8c7SAdrian Chadd */ 31a043e8c7SAdrian Chadd 32a043e8c7SAdrian Chadd #include <sys/param.h> 33a043e8c7SAdrian Chadd #include <sys/bus.h> 34a043e8c7SAdrian Chadd #include <sys/errno.h> 35a043e8c7SAdrian Chadd #include <sys/kernel.h> 36a043e8c7SAdrian Chadd #include <sys/module.h> 37a043e8c7SAdrian Chadd #include <sys/socket.h> 38a043e8c7SAdrian Chadd #include <sys/sockio.h> 39a043e8c7SAdrian Chadd #include <sys/sysctl.h> 40a043e8c7SAdrian Chadd #include <sys/systm.h> 41a043e8c7SAdrian Chadd 42a043e8c7SAdrian Chadd #include <net/if.h> 43a043e8c7SAdrian Chadd #include <net/if_arp.h> 44a043e8c7SAdrian Chadd #include <net/ethernet.h> 45a043e8c7SAdrian Chadd #include <net/if_dl.h> 46a043e8c7SAdrian Chadd #include <net/if_media.h> 47a043e8c7SAdrian Chadd #include <net/if_types.h> 48a043e8c7SAdrian Chadd 49a043e8c7SAdrian Chadd #include <machine/bus.h> 50efce3748SRui Paulo #include <dev/iicbus/iic.h> 51a043e8c7SAdrian Chadd #include <dev/iicbus/iiconf.h> 52a043e8c7SAdrian Chadd #include <dev/iicbus/iicbus.h> 53a043e8c7SAdrian Chadd #include <dev/mii/mii.h> 54a043e8c7SAdrian Chadd #include <dev/mii/miivar.h> 5571e8eac4SAdrian Chadd #include <dev/mdio/mdio.h> 56a043e8c7SAdrian Chadd 57a043e8c7SAdrian Chadd #include <dev/etherswitch/etherswitch.h> 58a043e8c7SAdrian Chadd 59a043e8c7SAdrian Chadd #include <dev/etherswitch/arswitch/arswitchreg.h> 60a043e8c7SAdrian Chadd #include <dev/etherswitch/arswitch/arswitchvar.h> 61a043e8c7SAdrian Chadd #include <dev/etherswitch/arswitch/arswitch_reg.h> 62a043e8c7SAdrian Chadd #include <dev/etherswitch/arswitch/arswitch_8316.h> 63a043e8c7SAdrian Chadd 64a043e8c7SAdrian Chadd #include "mdio_if.h" 65a043e8c7SAdrian Chadd #include "miibus_if.h" 66a043e8c7SAdrian Chadd #include "etherswitch_if.h" 67a043e8c7SAdrian Chadd 68a043e8c7SAdrian Chadd /* 69a043e8c7SAdrian Chadd * AR8316 specific functions 70a043e8c7SAdrian Chadd */ 71a043e8c7SAdrian Chadd static int 72a043e8c7SAdrian Chadd ar8316_hw_setup(struct arswitch_softc *sc) 73a043e8c7SAdrian Chadd { 74a043e8c7SAdrian Chadd 75a043e8c7SAdrian Chadd /* 76a043e8c7SAdrian Chadd * Configure the switch mode based on whether: 77a043e8c7SAdrian Chadd * 78a043e8c7SAdrian Chadd * + The switch port is GMII/RGMII; 79a043e8c7SAdrian Chadd * + Port 4 is either connected to the CPU or to the internal switch. 80a043e8c7SAdrian Chadd */ 81a043e8c7SAdrian Chadd if (sc->is_rgmii && sc->phy4cpu) { 82a043e8c7SAdrian Chadd arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE, 83a043e8c7SAdrian Chadd AR8X16_MODE_RGMII_PORT4_ISO); 84a043e8c7SAdrian Chadd device_printf(sc->sc_dev, 85a043e8c7SAdrian Chadd "%s: MAC port == RGMII, port 4 = dedicated PHY\n", 86a043e8c7SAdrian Chadd __func__); 87a043e8c7SAdrian Chadd } else if (sc->is_rgmii) { 88a043e8c7SAdrian Chadd arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE, 89a043e8c7SAdrian Chadd AR8X16_MODE_RGMII_PORT4_SWITCH); 90a043e8c7SAdrian Chadd device_printf(sc->sc_dev, 91a043e8c7SAdrian Chadd "%s: MAC port == RGMII, port 4 = switch port\n", 92a043e8c7SAdrian Chadd __func__); 93a043e8c7SAdrian Chadd } else if (sc->is_gmii) { 94a043e8c7SAdrian Chadd arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE, 95a043e8c7SAdrian Chadd AR8X16_MODE_GMII); 96a043e8c7SAdrian Chadd device_printf(sc->sc_dev, "%s: MAC port == GMII\n", __func__); 97a043e8c7SAdrian Chadd } else { 98a043e8c7SAdrian Chadd device_printf(sc->sc_dev, "%s: unknown switch PHY config\n", 99a043e8c7SAdrian Chadd __func__); 100a043e8c7SAdrian Chadd return (ENXIO); 101a043e8c7SAdrian Chadd } 102a043e8c7SAdrian Chadd 103a043e8c7SAdrian Chadd DELAY(1000); /* 1ms wait for things to settle */ 104a043e8c7SAdrian Chadd 105a043e8c7SAdrian Chadd /* 106a043e8c7SAdrian Chadd * If port 4 is RGMII, force workaround 107a043e8c7SAdrian Chadd */ 108a043e8c7SAdrian Chadd if (sc->is_rgmii && sc->phy4cpu) { 109a043e8c7SAdrian Chadd device_printf(sc->sc_dev, 110a043e8c7SAdrian Chadd "%s: port 4 RGMII workaround\n", 111a043e8c7SAdrian Chadd __func__); 112a043e8c7SAdrian Chadd 113a043e8c7SAdrian Chadd /* work around for phy4 rgmii mode */ 114a043e8c7SAdrian Chadd arswitch_writedbg(sc->sc_dev, 4, 0x12, 0x480c); 115a043e8c7SAdrian Chadd /* rx delay */ 116a043e8c7SAdrian Chadd arswitch_writedbg(sc->sc_dev, 4, 0x0, 0x824e); 117a043e8c7SAdrian Chadd /* tx delay */ 118a043e8c7SAdrian Chadd arswitch_writedbg(sc->sc_dev, 4, 0x5, 0x3d47); 119a043e8c7SAdrian Chadd DELAY(1000); /* 1ms, again to let things settle */ 120a043e8c7SAdrian Chadd } 121a043e8c7SAdrian Chadd 122a043e8c7SAdrian Chadd return (0); 123a043e8c7SAdrian Chadd } 124a043e8c7SAdrian Chadd 125a043e8c7SAdrian Chadd /* 126a043e8c7SAdrian Chadd * Initialise other global values, for the AR8316. 127a043e8c7SAdrian Chadd */ 128a043e8c7SAdrian Chadd static int 129a043e8c7SAdrian Chadd ar8316_hw_global_setup(struct arswitch_softc *sc) 130a043e8c7SAdrian Chadd { 131a043e8c7SAdrian Chadd 1326d011946SKristof Provost ARSWITCH_LOCK(sc); 1336d011946SKristof Provost 134b9f07b86SLuiz Otavio O Souza arswitch_writereg(sc->sc_dev, 0x38, AR8X16_MAGIC); 135b9f07b86SLuiz Otavio O Souza 136b9f07b86SLuiz Otavio O Souza /* Enable CPU port and disable mirror port. */ 137b9f07b86SLuiz Otavio O Souza arswitch_writereg(sc->sc_dev, AR8X16_REG_CPU_PORT, 138b9f07b86SLuiz Otavio O Souza AR8X16_CPU_PORT_EN | AR8X16_CPU_MIRROR_DIS); 139b9f07b86SLuiz Otavio O Souza 140b9f07b86SLuiz Otavio O Souza /* Setup TAG priority mapping. */ 141b9f07b86SLuiz Otavio O Souza arswitch_writereg(sc->sc_dev, AR8X16_REG_TAG_PRIO, 0xfa50); 142b9f07b86SLuiz Otavio O Souza 143b9f07b86SLuiz Otavio O Souza /* Enable ARP frame acknowledge. */ 144a6840191SAdrian Chadd /* XXX TODO: aging? */ 145b9f07b86SLuiz Otavio O Souza arswitch_modifyreg(sc->sc_dev, AR8X16_REG_AT_CTRL, 0, 146b9f07b86SLuiz Otavio O Souza AR8X16_AT_CTRL_ARP_EN); 147031f3eaeSAdrian Chadd 148031f3eaeSAdrian Chadd /* 149031f3eaeSAdrian Chadd * Flood address table misses to all ports, and enable forwarding of 150031f3eaeSAdrian Chadd * broadcasts to the cpu port. 151031f3eaeSAdrian Chadd */ 152031f3eaeSAdrian Chadd arswitch_writereg(sc->sc_dev, AR8X16_REG_FLOOD_MASK, 153031f3eaeSAdrian Chadd AR8X16_FLOOD_MASK_BCAST_TO_CPU | 0x003f003f); 154031f3eaeSAdrian Chadd 155b9f07b86SLuiz Otavio O Souza /* Enable jumbo frames. */ 156a043e8c7SAdrian Chadd arswitch_modifyreg(sc->sc_dev, AR8X16_REG_GLOBAL_CTRL, 157a043e8c7SAdrian Chadd AR8316_GLOBAL_CTRL_MTU_MASK, 9018 + 8 + 2); 158a043e8c7SAdrian Chadd 159b9f07b86SLuiz Otavio O Souza /* Setup service TAG. */ 160b9f07b86SLuiz Otavio O Souza arswitch_modifyreg(sc->sc_dev, AR8X16_REG_SERVICE_TAG, 161b9f07b86SLuiz Otavio O Souza AR8X16_SERVICE_TAG_MASK, 0); 162b9f07b86SLuiz Otavio O Souza 1636d011946SKristof Provost ARSWITCH_UNLOCK(sc); 164a043e8c7SAdrian Chadd return (0); 165a043e8c7SAdrian Chadd } 166a043e8c7SAdrian Chadd 167a043e8c7SAdrian Chadd void 168a043e8c7SAdrian Chadd ar8316_attach(struct arswitch_softc *sc) 169a043e8c7SAdrian Chadd { 170a043e8c7SAdrian Chadd 171a043e8c7SAdrian Chadd sc->hal.arswitch_hw_setup = ar8316_hw_setup; 172a043e8c7SAdrian Chadd sc->hal.arswitch_hw_global_setup = ar8316_hw_global_setup; 173b9f07b86SLuiz Otavio O Souza 174b9f07b86SLuiz Otavio O Souza /* Set the switch vlan capabilities. */ 175b9f07b86SLuiz Otavio O Souza sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q | 176b9f07b86SLuiz Otavio O Souza ETHERSWITCH_VLAN_PORT | ETHERSWITCH_VLAN_DOUBLE_TAG; 177b9f07b86SLuiz Otavio O Souza sc->info.es_nvlangroups = AR8X16_MAX_VLANS; 178a043e8c7SAdrian Chadd } 179