1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2008-2017 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 */ 5 6 #include "enic.h" 7 #include "vnic_dev.h" 8 #include "vnic_rq.h" 9 10 void vnic_rq_init_start(struct vnic_rq *rq, unsigned int cq_index, 11 unsigned int fetch_index, unsigned int posted_index, 12 unsigned int error_interrupt_enable, 13 unsigned int error_interrupt_offset) 14 { 15 u64 paddr; 16 unsigned int count = rq->ring.desc_count; 17 18 paddr = (u64)rq->ring.base_addr | VNIC_PADDR_TARGET; 19 ENIC_BUS_WRITE_8(rq->ctrl, RX_RING_BASE, paddr); 20 ENIC_BUS_WRITE_4(rq->ctrl, RX_RING_SIZE, count); 21 ENIC_BUS_WRITE_4(rq->ctrl, RX_CQ_INDEX, cq_index); 22 ENIC_BUS_WRITE_4(rq->ctrl, RX_ERROR_INTR_ENABLE, error_interrupt_enable); 23 ENIC_BUS_WRITE_4(rq->ctrl, RX_ERROR_INTR_OFFSET, error_interrupt_offset); 24 ENIC_BUS_WRITE_4(rq->ctrl, RX_ERROR_STATUS, 0); 25 ENIC_BUS_WRITE_4(rq->ctrl, RX_FETCH_INDEX, fetch_index); 26 ENIC_BUS_WRITE_4(rq->ctrl, RX_POSTED_INDEX, posted_index); 27 } 28 29 void vnic_rq_init(struct vnic_rq *rq, unsigned int cq_index, 30 unsigned int error_interrupt_enable, 31 unsigned int error_interrupt_offset) 32 { 33 u32 fetch_index = 0; 34 35 /* Use current fetch_index as the ring starting point */ 36 fetch_index = ENIC_BUS_READ_4(rq->ctrl, RX_FETCH_INDEX); 37 38 if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone */ 39 /* Hardware surprise removal: reset fetch_index */ 40 fetch_index = 0; 41 } 42 43 fetch_index = 0; 44 vnic_rq_init_start(rq, cq_index, 45 fetch_index, fetch_index, 46 error_interrupt_enable, 47 error_interrupt_offset); 48 rq->rxst_idx = 0; 49 rq->tot_pkts = 0; 50 } 51 52 unsigned int vnic_rq_error_status(struct vnic_rq *rq) 53 { 54 return (ENIC_BUS_READ_4(rq->ctrl, RX_ERROR_STATUS)); 55 } 56 57 void vnic_rq_enable(struct vnic_rq *rq) 58 { 59 ENIC_BUS_WRITE_4(rq->ctrl, RX_ENABLE, 1); 60 } 61 62 int vnic_rq_disable(struct vnic_rq *rq) 63 { 64 unsigned int wait; 65 66 ENIC_BUS_WRITE_4(rq->ctrl, RX_ENABLE, 0); 67 68 /* Wait for HW to ACK disable request */ 69 for (wait = 0; wait < 1000; wait++) { 70 if (!(ENIC_BUS_READ_4(rq->ctrl, RX_RUNNING))) 71 return 0; 72 udelay(10); 73 } 74 75 pr_err("Failed to disable RQ[%d]\n", rq->index); 76 77 return (ETIMEDOUT); 78 } 79 80 void vnic_rq_clean(struct vnic_rq *rq) 81 { 82 u32 fetch_index; 83 unsigned int count = rq->ring.desc_count; 84 85 rq->ring.desc_avail = count - 1; 86 rq->rx_nb_hold = 0; 87 88 /* Use current fetch_index as the ring starting point */ 89 fetch_index = ENIC_BUS_READ_4(rq->ctrl, RX_FETCH_INDEX); 90 if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone */ 91 /* Hardware surprise removal: reset fetch_index */ 92 fetch_index = 0; 93 } 94 95 ENIC_BUS_WRITE_4(rq->ctrl, RX_POSTED_INDEX, fetch_index); 96 97 vnic_dev_clear_desc_ring(&rq->ring); 98 } 99