1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) 2015-2017 Amazon.com, Inc. or its affiliates. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 #include <sys/endian.h> 37 #include <sys/kernel.h> 38 #include <sys/kthread.h> 39 #include <sys/malloc.h> 40 #include <sys/mbuf.h> 41 #include <sys/module.h> 42 #include <sys/rman.h> 43 #include <sys/smp.h> 44 #include <sys/socket.h> 45 #include <sys/sockio.h> 46 #include <sys/sysctl.h> 47 #include <sys/taskqueue.h> 48 #include <sys/time.h> 49 #include <sys/eventhandler.h> 50 51 #include <machine/bus.h> 52 #include <machine/resource.h> 53 #include <machine/in_cksum.h> 54 55 #include <net/bpf.h> 56 #include <net/ethernet.h> 57 #include <net/if.h> 58 #include <net/if_var.h> 59 #include <net/if_arp.h> 60 #include <net/if_dl.h> 61 #include <net/if_media.h> 62 #include <net/rss_config.h> 63 #include <net/if_types.h> 64 #include <net/if_vlan_var.h> 65 66 #include <netinet/in_rss.h> 67 #include <netinet/in_systm.h> 68 #include <netinet/in.h> 69 #include <netinet/if_ether.h> 70 #include <netinet/ip.h> 71 #include <netinet/ip6.h> 72 #include <netinet/tcp.h> 73 #include <netinet/udp.h> 74 75 #include <dev/pci/pcivar.h> 76 #include <dev/pci/pcireg.h> 77 78 #include "ena.h" 79 #include "ena_sysctl.h" 80 81 /********************************************************* 82 * Function prototypes 83 *********************************************************/ 84 static int ena_probe(device_t); 85 static void ena_intr_msix_mgmnt(void *); 86 static int ena_allocate_pci_resources(struct ena_adapter*); 87 static void ena_free_pci_resources(struct ena_adapter *); 88 static int ena_change_mtu(if_t, int); 89 static inline void ena_alloc_counters(counter_u64_t *, int); 90 static inline void ena_free_counters(counter_u64_t *, int); 91 static inline void ena_reset_counters(counter_u64_t *, int); 92 static void ena_init_io_rings_common(struct ena_adapter *, 93 struct ena_ring *, uint16_t); 94 static int ena_init_io_rings(struct ena_adapter *); 95 static void ena_free_io_ring_resources(struct ena_adapter *, unsigned int); 96 static void ena_free_all_io_rings_resources(struct ena_adapter *); 97 static int ena_setup_tx_dma_tag(struct ena_adapter *); 98 static int ena_free_tx_dma_tag(struct ena_adapter *); 99 static int ena_setup_rx_dma_tag(struct ena_adapter *); 100 static int ena_free_rx_dma_tag(struct ena_adapter *); 101 static int ena_setup_tx_resources(struct ena_adapter *, int); 102 static void ena_free_tx_resources(struct ena_adapter *, int); 103 static int ena_setup_all_tx_resources(struct ena_adapter *); 104 static void ena_free_all_tx_resources(struct ena_adapter *); 105 static int ena_setup_rx_resources(struct ena_adapter *, unsigned int); 106 static void ena_free_rx_resources(struct ena_adapter *, unsigned int); 107 static int ena_setup_all_rx_resources(struct ena_adapter *); 108 static void ena_free_all_rx_resources(struct ena_adapter *); 109 static inline int ena_alloc_rx_mbuf(struct ena_adapter *, struct ena_ring *, 110 struct ena_rx_buffer *); 111 static void ena_free_rx_mbuf(struct ena_adapter *, struct ena_ring *, 112 struct ena_rx_buffer *); 113 static int ena_refill_rx_bufs(struct ena_ring *, uint32_t); 114 static void ena_free_rx_bufs(struct ena_adapter *, unsigned int); 115 static void ena_refill_all_rx_bufs(struct ena_adapter *); 116 static void ena_free_all_rx_bufs(struct ena_adapter *); 117 static void ena_free_tx_bufs(struct ena_adapter *, unsigned int); 118 static void ena_free_all_tx_bufs(struct ena_adapter *); 119 static void ena_destroy_all_tx_queues(struct ena_adapter *); 120 static void ena_destroy_all_rx_queues(struct ena_adapter *); 121 static void ena_destroy_all_io_queues(struct ena_adapter *); 122 static int ena_create_io_queues(struct ena_adapter *); 123 static int ena_tx_cleanup(struct ena_ring *); 124 static int ena_rx_cleanup(struct ena_ring *); 125 static int validate_tx_req_id(struct ena_ring *, uint16_t); 126 static void ena_rx_hash_mbuf(struct ena_ring *, struct ena_com_rx_ctx *, 127 struct mbuf *); 128 static struct mbuf* ena_rx_mbuf(struct ena_ring *, struct ena_com_rx_buf_info *, 129 struct ena_com_rx_ctx *, uint16_t *); 130 static inline void ena_rx_checksum(struct ena_ring *, struct ena_com_rx_ctx *, 131 struct mbuf *); 132 static void ena_handle_msix(void *); 133 static int ena_enable_msix(struct ena_adapter *); 134 static void ena_setup_mgmnt_intr(struct ena_adapter *); 135 static void ena_setup_io_intr(struct ena_adapter *); 136 static int ena_request_mgmnt_irq(struct ena_adapter *); 137 static int ena_request_io_irq(struct ena_adapter *); 138 static void ena_free_mgmnt_irq(struct ena_adapter *); 139 static void ena_free_io_irq(struct ena_adapter *); 140 static void ena_free_irqs(struct ena_adapter*); 141 static void ena_disable_msix(struct ena_adapter *); 142 static void ena_unmask_all_io_irqs(struct ena_adapter *); 143 static int ena_rss_configure(struct ena_adapter *); 144 static void ena_update_hw_stats(void *, int); 145 static int ena_up_complete(struct ena_adapter *); 146 static int ena_up(struct ena_adapter *); 147 static void ena_down(struct ena_adapter *); 148 static uint64_t ena_get_counter(if_t, ift_counter); 149 static int ena_media_change(if_t); 150 static void ena_media_status(if_t, struct ifmediareq *); 151 static void ena_init(void *); 152 static int ena_ioctl(if_t, u_long, caddr_t); 153 static int ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *); 154 static void ena_update_host_info(struct ena_admin_host_info *, if_t); 155 static void ena_update_hwassist(struct ena_adapter *); 156 static int ena_setup_ifnet(device_t, struct ena_adapter *, 157 struct ena_com_dev_get_features_ctx *); 158 static void ena_tx_csum(struct ena_com_tx_ctx *, struct mbuf *); 159 static int ena_xmit_mbuf(struct ena_ring *, struct mbuf **); 160 static void ena_start_xmit(struct ena_ring *); 161 static int ena_mq_start(if_t, struct mbuf *); 162 static void ena_deferred_mq_start(void *, int); 163 static void ena_qflush(if_t); 164 static int ena_calc_io_queue_num(struct ena_adapter *, 165 struct ena_com_dev_get_features_ctx *); 166 static int ena_calc_queue_size(struct ena_adapter *, uint16_t *, 167 uint16_t *, struct ena_com_dev_get_features_ctx *); 168 static int ena_rss_init_default(struct ena_adapter *); 169 static void ena_rss_init_default_deferred(void *); 170 static void ena_config_host_info(struct ena_com_dev *); 171 static int ena_attach(device_t); 172 static int ena_detach(device_t); 173 static int ena_device_init(struct ena_adapter *, device_t, 174 struct ena_com_dev_get_features_ctx *, int *); 175 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *, 176 int); 177 static void ena_update_on_link_change(void *, struct ena_admin_aenq_entry *); 178 static void unimplemented_aenq_handler(void *, 179 struct ena_admin_aenq_entry *); 180 static void ena_timer_service(void *); 181 182 static char ena_version[] = DEVICE_NAME DRV_MODULE_NAME " v" DRV_MODULE_VERSION; 183 184 static SYSCTL_NODE(_hw, OID_AUTO, ena, CTLFLAG_RD, 0, "ENA driver parameters"); 185 186 /* 187 * Tuneable number of buffers in the buf-ring (drbr) 188 */ 189 static int ena_buf_ring_size = 4096; 190 SYSCTL_INT(_hw_ena, OID_AUTO, buf_ring_size, CTLFLAG_RWTUN, 191 &ena_buf_ring_size, 0, "Size of the bufring"); 192 193 194 static ena_vendor_info_t ena_vendor_info_array[] = { 195 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_PF, 0}, 196 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_LLQ_PF, 0}, 197 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_VF, 0}, 198 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_LLQ_VF, 0}, 199 /* Last entry */ 200 { 0, 0, 0 } 201 }; 202 203 /* 204 * Contains pointers to event handlers, e.g. link state chage. 205 */ 206 static struct ena_aenq_handlers aenq_handlers; 207 208 void 209 ena_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nseg, int error) 210 { 211 if (error) 212 return; 213 *(bus_addr_t *) arg = segs[0].ds_addr; 214 return; 215 } 216 217 int 218 ena_dma_alloc(device_t dmadev, bus_size_t size, 219 ena_mem_handle_t *dma , int mapflags) 220 { 221 struct ena_adapter* adapter = device_get_softc(dmadev); 222 uint32_t maxsize = ((size - 1)/PAGE_SIZE + 1) * PAGE_SIZE; 223 uint64_t dma_space_addr = ENA_DMA_BIT_MASK(adapter->dma_width); 224 int error; 225 226 if (dma_space_addr == 0) 227 dma_space_addr = BUS_SPACE_MAXADDR; 228 error = bus_dma_tag_create(bus_get_dma_tag(dmadev), /* parent */ 229 8, 0, /* alignment, bounds */ 230 dma_space_addr, /* lowaddr */ 231 dma_space_addr, /* highaddr */ 232 NULL, NULL, /* filter, filterarg */ 233 maxsize, /* maxsize */ 234 1, /* nsegments */ 235 maxsize, /* maxsegsize */ 236 BUS_DMA_ALLOCNOW, /* flags */ 237 NULL, /* lockfunc */ 238 NULL, /* lockarg */ 239 &dma->tag); 240 if (error) { 241 device_printf(dmadev, 242 "%s: bus_dma_tag_create failed: %d\n", 243 __func__, error); 244 goto fail_tag; 245 } 246 247 error = bus_dmamem_alloc(dma->tag, (void**) &dma->vaddr, 248 BUS_DMA_COHERENT | BUS_DMA_ZERO, &dma->map); 249 if (error) { 250 device_printf(dmadev, 251 "%s: bus_dmamem_alloc(%ju) failed: %d\n", 252 __func__, (uintmax_t)size, error); 253 goto fail_map_create; 254 } 255 256 dma->paddr = 0; 257 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, 258 size, ena_dmamap_callback, &dma->paddr, mapflags); 259 if (error || dma->paddr == 0) { 260 device_printf(dmadev, 261 "%s: bus_dmamap_load failed: %d\n", 262 __func__, error); 263 goto fail_map_load; 264 } 265 266 return (0); 267 268 fail_map_load: 269 bus_dmamap_unload(dma->tag, dma->map); 270 fail_map_create: 271 bus_dmamem_free(dma->tag, dma->vaddr, dma->map); 272 bus_dma_tag_destroy(dma->tag); 273 fail_tag: 274 dma->tag = NULL; 275 276 return (error); 277 } 278 279 static int 280 ena_allocate_pci_resources(struct ena_adapter* adapter) 281 { 282 device_t pdev = adapter->pdev; 283 int rid; 284 285 rid = PCIR_BAR(ENA_REG_BAR); 286 adapter->memory = NULL; 287 adapter->registers = bus_alloc_resource_any(pdev, SYS_RES_MEMORY, 288 &rid, RF_ACTIVE); 289 if (adapter->registers == NULL) { 290 device_printf(pdev, "Unable to allocate bus resource: " 291 "registers\n"); 292 return (ENXIO); 293 } 294 295 return (0); 296 } 297 298 static void 299 ena_free_pci_resources(struct ena_adapter *adapter) 300 { 301 device_t pdev = adapter->pdev; 302 303 if (adapter->memory != NULL) { 304 bus_release_resource(pdev, SYS_RES_MEMORY, 305 PCIR_BAR(ENA_MEM_BAR), adapter->memory); 306 } 307 308 if (adapter->registers != NULL) { 309 bus_release_resource(pdev, SYS_RES_MEMORY, 310 PCIR_BAR(ENA_REG_BAR), adapter->registers); 311 } 312 313 return; 314 } 315 316 static int 317 ena_probe(device_t dev) 318 { 319 ena_vendor_info_t *ent; 320 char adapter_name[60]; 321 uint16_t pci_vendor_id = 0; 322 uint16_t pci_device_id = 0; 323 324 pci_vendor_id = pci_get_vendor(dev); 325 pci_device_id = pci_get_device(dev); 326 327 ent = ena_vendor_info_array; 328 while (ent->vendor_id != 0) { 329 if ((pci_vendor_id == ent->vendor_id) && 330 (pci_device_id == ent->device_id)) { 331 ena_trace(ENA_DBG, "vendor=%x device=%x ", 332 pci_vendor_id, pci_device_id); 333 334 sprintf(adapter_name, DEVICE_DESC); 335 device_set_desc_copy(dev, adapter_name); 336 return (BUS_PROBE_DEFAULT); 337 } 338 339 ent++; 340 341 } 342 343 return (ENXIO); 344 } 345 346 static int 347 ena_change_mtu(if_t ifp, int new_mtu) 348 { 349 struct ena_adapter *adapter = if_getsoftc(ifp); 350 struct ena_com_dev_get_features_ctx get_feat_ctx; 351 int rc, old_mtu, max_frame; 352 353 rc = ena_com_get_dev_attr_feat(adapter->ena_dev, &get_feat_ctx); 354 if (rc) { 355 device_printf(adapter->pdev, 356 "Cannot get attribute for ena device\n"); 357 return (ENXIO); 358 } 359 360 /* Save old MTU in case of fail */ 361 old_mtu = if_getmtu(ifp); 362 363 /* Change MTU and calculate max frame */ 364 if_setmtu(ifp, new_mtu); 365 max_frame = ETHER_MAX_FRAME(ifp, ETHERTYPE_VLAN, 1); 366 367 if ((new_mtu < ENA_MIN_FRAME_LEN) || 368 (new_mtu > get_feat_ctx.dev_attr.max_mtu) || 369 (max_frame > ENA_MAX_FRAME_LEN)) { 370 device_printf(adapter->pdev, "Invalid MTU setting. " 371 "new_mtu: %d\n", new_mtu); 372 goto error; 373 } 374 375 rc = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu); 376 if (rc != 0) 377 goto error; 378 379 return (0); 380 error: 381 if_setmtu(ifp, old_mtu); 382 return (EINVAL); 383 } 384 385 static inline void 386 ena_alloc_counters(counter_u64_t *begin, int size) 387 { 388 counter_u64_t *end = (counter_u64_t *)((char *)begin + size); 389 390 for (; begin < end; ++begin) 391 *begin = counter_u64_alloc(M_WAITOK); 392 } 393 394 static inline void 395 ena_free_counters(counter_u64_t *begin, int size) 396 { 397 counter_u64_t *end = (counter_u64_t *)((char *)begin + size); 398 399 for (; begin < end; ++begin) 400 counter_u64_free(*begin); 401 } 402 403 static inline void 404 ena_reset_counters(counter_u64_t *begin, int size) 405 { 406 counter_u64_t *end = (counter_u64_t *)((char *)begin + size); 407 408 for (; begin < end; ++begin) 409 counter_u64_zero(*begin); 410 } 411 412 static void 413 ena_init_io_rings_common(struct ena_adapter *adapter, struct ena_ring *ring, 414 uint16_t qid) 415 { 416 417 ring->qid = qid; 418 ring->adapter = adapter; 419 ring->ena_dev = adapter->ena_dev; 420 } 421 422 static int 423 ena_init_io_rings(struct ena_adapter *adapter) 424 { 425 struct ena_com_dev *ena_dev; 426 struct ena_ring *txr, *rxr; 427 struct ena_que *que; 428 int i; 429 int rc; 430 431 ena_dev = adapter->ena_dev; 432 433 for (i = 0; i < adapter->num_queues; i++) { 434 txr = &adapter->tx_ring[i]; 435 rxr = &adapter->rx_ring[i]; 436 437 /* TX/RX common ring state */ 438 ena_init_io_rings_common(adapter, txr, i); 439 ena_init_io_rings_common(adapter, rxr, i); 440 441 /* TX specific ring state */ 442 txr->ring_size = adapter->tx_ring_size; 443 txr->tx_max_header_size = ena_dev->tx_max_header_size; 444 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 445 txr->smoothed_interval = 446 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev); 447 448 /* Allocate a buf ring */ 449 txr->br = buf_ring_alloc(ena_buf_ring_size, M_DEVBUF, 450 M_WAITOK, &txr->ring_mtx); 451 if (txr->br == NULL) { 452 device_printf(adapter->pdev, 453 "Error while setting up bufring\n"); 454 rc = ENOMEM; 455 goto err_bufr_free; 456 } 457 458 /* Alloc TX statistics. */ 459 ena_alloc_counters((counter_u64_t *)&txr->tx_stats, 460 sizeof(txr->tx_stats)); 461 462 /* RX specific ring state */ 463 rxr->ring_size = adapter->rx_ring_size; 464 rxr->rx_small_copy_len = adapter->small_copy_len; 465 rxr->smoothed_interval = 466 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev); 467 468 /* Alloc RX statistics. */ 469 ena_alloc_counters((counter_u64_t *)&rxr->rx_stats, 470 sizeof(rxr->rx_stats)); 471 472 /* Initialize locks */ 473 snprintf(txr->mtx_name, nitems(txr->mtx_name), "%s:tx(%d)", 474 device_get_nameunit(adapter->pdev), i); 475 snprintf(rxr->mtx_name, nitems(rxr->mtx_name), "%s:rx(%d)", 476 device_get_nameunit(adapter->pdev), i); 477 478 mtx_init(&txr->ring_mtx, txr->mtx_name, NULL, MTX_DEF); 479 mtx_init(&rxr->ring_mtx, rxr->mtx_name, NULL, MTX_DEF); 480 481 que = &adapter->que[i]; 482 que->adapter = adapter; 483 que->id = i; 484 que->tx_ring = txr; 485 que->rx_ring = rxr; 486 487 txr->que = que; 488 rxr->que = que; 489 } 490 491 return 0; 492 493 err_bufr_free: 494 while (i--) 495 ena_free_io_ring_resources(adapter, i); 496 497 return (rc); 498 } 499 500 static void 501 ena_free_io_ring_resources(struct ena_adapter *adapter, unsigned int qid) 502 { 503 struct ena_ring *txr = &adapter->tx_ring[qid]; 504 struct ena_ring *rxr = &adapter->rx_ring[qid]; 505 506 ena_free_counters((counter_u64_t *)&txr->tx_stats, 507 sizeof(txr->tx_stats)); 508 ena_free_counters((counter_u64_t *)&rxr->rx_stats, 509 sizeof(rxr->rx_stats)); 510 511 mtx_destroy(&txr->ring_mtx); 512 mtx_destroy(&rxr->ring_mtx); 513 514 drbr_free(txr->br, M_DEVBUF); 515 516 } 517 518 static void 519 ena_free_all_io_rings_resources(struct ena_adapter *adapter) 520 { 521 int i; 522 523 for (i = 0; i < adapter->num_queues; i++) 524 ena_free_io_ring_resources(adapter, i); 525 526 } 527 528 static int 529 ena_setup_tx_dma_tag(struct ena_adapter *adapter) 530 { 531 int ret; 532 533 /* Create DMA tag for Tx buffers */ 534 ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev), 535 1, 0, /* alignment, bounds */ 536 ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr */ 537 ENA_DMA_BIT_MASK(adapter->dma_width), /* highaddr */ 538 NULL, NULL, /* filter, filterarg */ 539 ENA_TSO_MAXSIZE, /* maxsize */ 540 adapter->max_tx_sgl_size, /* nsegments */ 541 ENA_TSO_MAXSIZE, /* maxsegsize */ 542 0, /* flags */ 543 NULL, /* lockfunc */ 544 NULL, /* lockfuncarg */ 545 &adapter->tx_buf_tag); 546 547 if (ret != 0) 548 device_printf(adapter->pdev, "Unable to create Tx DMA tag\n"); 549 550 return (ret); 551 } 552 553 static int 554 ena_free_tx_dma_tag(struct ena_adapter *adapter) 555 { 556 int ret; 557 558 ret = bus_dma_tag_destroy(adapter->tx_buf_tag); 559 560 if (ret == 0) 561 adapter->tx_buf_tag = NULL; 562 563 return (ret); 564 } 565 566 static int 567 ena_setup_rx_dma_tag(struct ena_adapter *adapter) 568 { 569 int ret; 570 571 /* Create DMA tag for Rx buffers*/ 572 ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev), /* parent */ 573 1, 0, /* alignment, bounds */ 574 ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr */ 575 ENA_DMA_BIT_MASK(adapter->dma_width), /* highaddr */ 576 NULL, NULL, /* filter, filterarg */ 577 MJUM16BYTES, /* maxsize */ 578 1, /* nsegments */ 579 MJUM16BYTES, /* maxsegsize */ 580 0, /* flags */ 581 NULL, /* lockfunc */ 582 NULL, /* lockarg */ 583 &adapter->rx_buf_tag); 584 585 if (ret != 0) 586 device_printf(adapter->pdev, "Unable to create Rx DMA tag\n"); 587 588 return (ret); 589 } 590 591 static int 592 ena_free_rx_dma_tag(struct ena_adapter *adapter) 593 { 594 int ret; 595 596 ret = bus_dma_tag_destroy(adapter->rx_buf_tag); 597 598 if (ret == 0) 599 adapter->rx_buf_tag = NULL; 600 601 return (ret); 602 } 603 604 605 /** 606 * ena_setup_tx_resources - allocate Tx resources (Descriptors) 607 * @adapter: network interface device structure 608 * @qid: queue index 609 * 610 * Returns 0 on success, otherwise on failure. 611 **/ 612 static int 613 ena_setup_tx_resources(struct ena_adapter *adapter, int qid) 614 { 615 struct ena_que *que = &adapter->que[qid]; 616 struct ena_ring *tx_ring = que->tx_ring; 617 int size, i, err; 618 #ifdef RSS 619 cpuset_t cpu_mask; 620 #endif 621 622 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size; 623 624 tx_ring->tx_buffer_info = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); 625 if (!tx_ring->tx_buffer_info) 626 goto err_tx_buffer_info; 627 628 size = sizeof(uint16_t) * tx_ring->ring_size; 629 tx_ring->free_tx_ids = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); 630 if (!tx_ring->free_tx_ids) 631 goto err_tx_reqs; 632 633 /* Req id stack for TX OOO completions */ 634 for (i = 0; i < tx_ring->ring_size; i++) 635 tx_ring->free_tx_ids[i] = i; 636 637 /* Reset TX statistics. */ 638 ena_reset_counters((counter_u64_t *)&tx_ring->tx_stats, 639 sizeof(tx_ring->tx_stats)); 640 641 tx_ring->next_to_use = 0; 642 tx_ring->next_to_clean = 0; 643 644 /* Make sure that drbr is empty */ 645 ENA_RING_MTX_LOCK(tx_ring); 646 drbr_flush(adapter->ifp, tx_ring->br); 647 ENA_RING_MTX_UNLOCK(tx_ring); 648 649 /* ... and create the buffer DMA maps */ 650 for (i = 0; i < tx_ring->ring_size; i++) { 651 err = bus_dmamap_create(adapter->tx_buf_tag, 0, 652 &tx_ring->tx_buffer_info[i].map); 653 if (err != 0) { 654 device_printf(adapter->pdev, 655 "Unable to create Tx DMA map for buffer %d\n", i); 656 goto err_tx_map; 657 } 658 } 659 660 /* Allocate taskqueues */ 661 TASK_INIT(&tx_ring->enqueue_task, 0, ena_deferred_mq_start, tx_ring); 662 tx_ring->enqueue_tq = taskqueue_create_fast("ena_tx_enque", M_NOWAIT, 663 taskqueue_thread_enqueue, &tx_ring->enqueue_tq); 664 if (tx_ring->enqueue_tq == NULL) { 665 device_printf(adapter->pdev, 666 "Unable to create taskqueue for enqueue task\n"); 667 i = tx_ring->ring_size; 668 goto err_tx_map; 669 } 670 671 /* RSS set cpu for thread */ 672 #ifdef RSS 673 CPU_SETOF(que->cpu, &cpu_mask); 674 taskqueue_start_threads_cpuset(&tx_ring->enqueue_tq, 1, PI_NET, 675 &cpu_mask, "%s tx_ring enq (bucket %d)", 676 device_get_nameunit(adapter->pdev), que->cpu); 677 #else /* RSS */ 678 taskqueue_start_threads(&tx_ring->enqueue_tq, 1, PI_NET, 679 "%s txeq %d", device_get_nameunit(adapter->pdev), que->cpu); 680 #endif /* RSS */ 681 682 return (0); 683 684 err_tx_map: 685 while (i--) { 686 bus_dmamap_destroy(adapter->tx_buf_tag, 687 tx_ring->tx_buffer_info[i].map); 688 } 689 ENA_MEM_FREE(adapter->ena_dev->dmadev, tx_ring->free_tx_ids); 690 err_tx_reqs: 691 ENA_MEM_FREE(adapter->ena_dev->dmadev, tx_ring->tx_buffer_info); 692 err_tx_buffer_info: 693 return (ENOMEM); 694 } 695 696 /** 697 * ena_free_tx_resources - Free Tx Resources per Queue 698 * @adapter: network interface device structure 699 * @qid: queue index 700 * 701 * Free all transmit software resources 702 **/ 703 static void 704 ena_free_tx_resources(struct ena_adapter *adapter, int qid) 705 { 706 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 707 708 while (taskqueue_cancel(tx_ring->enqueue_tq, &tx_ring->enqueue_task, 709 NULL)) 710 taskqueue_drain(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 711 712 taskqueue_free(tx_ring->enqueue_tq); 713 714 ENA_RING_MTX_LOCK(tx_ring); 715 /* Flush buffer ring, */ 716 drbr_flush(adapter->ifp, tx_ring->br); 717 718 /* Free buffer DMA maps, */ 719 for (int i = 0; i < tx_ring->ring_size; i++) { 720 m_freem(tx_ring->tx_buffer_info[i].mbuf); 721 tx_ring->tx_buffer_info[i].mbuf = NULL; 722 bus_dmamap_unload(adapter->tx_buf_tag, 723 tx_ring->tx_buffer_info[i].map); 724 bus_dmamap_destroy(adapter->tx_buf_tag, 725 tx_ring->tx_buffer_info[i].map); 726 } 727 ENA_RING_MTX_UNLOCK(tx_ring); 728 729 /* And free allocated memory. */ 730 ENA_MEM_FREE(adapter->ena_dev->dmadev, tx_ring->tx_buffer_info); 731 tx_ring->tx_buffer_info = NULL; 732 733 ENA_MEM_FREE(adapter->ena_dev->dmadev, tx_ring->free_tx_ids); 734 tx_ring->free_tx_ids = NULL; 735 } 736 737 /** 738 * ena_setup_all_tx_resources - allocate all queues Tx resources 739 * @adapter: network interface device structure 740 * 741 * Returns 0 on success, otherwise on failure. 742 **/ 743 static int 744 ena_setup_all_tx_resources(struct ena_adapter *adapter) 745 { 746 int i, rc; 747 748 for (i = 0; i < adapter->num_queues; i++) { 749 rc = ena_setup_tx_resources(adapter, i); 750 if (!rc) 751 continue; 752 753 device_printf(adapter->pdev, 754 "Allocation for Tx Queue %u failed\n", i); 755 goto err_setup_tx; 756 } 757 758 return (0); 759 760 err_setup_tx: 761 /* Rewind the index freeing the rings as we go */ 762 while (i--) 763 ena_free_tx_resources(adapter, i); 764 return (rc); 765 } 766 767 /** 768 * ena_free_all_tx_resources - Free Tx Resources for All Queues 769 * @adapter: network interface device structure 770 * 771 * Free all transmit software resources 772 **/ 773 static void 774 ena_free_all_tx_resources(struct ena_adapter *adapter) 775 { 776 int i; 777 778 for (i = 0; i < adapter->num_queues; i++) 779 ena_free_tx_resources(adapter, i); 780 781 return; 782 } 783 784 /** 785 * ena_setup_rx_resources - allocate Rx resources (Descriptors) 786 * @adapter: network interface device structure 787 * @qid: queue index 788 * 789 * Returns 0 on success, otherwise on failure. 790 **/ 791 static int 792 ena_setup_rx_resources(struct ena_adapter *adapter, unsigned int qid) 793 { 794 struct ena_que *que = &adapter->que[qid]; 795 struct ena_ring *rx_ring = que->rx_ring; 796 int size, err, i; 797 #ifdef RSS 798 cpuset_t cpu_mask; 799 #endif 800 801 size = sizeof(struct ena_rx_buffer) * rx_ring->ring_size; 802 803 /* 804 * Alloc extra element so in rx path 805 * we can always prefetch rx_info + 1 806 */ 807 size += sizeof(struct ena_rx_buffer); 808 809 rx_ring->rx_buffer_info = ENA_MEM_ALLOC(adapter->ena_dev->dmadev, size); 810 if (!rx_ring->rx_buffer_info) 811 return (ENOMEM); 812 813 /* Reset RX statistics. */ 814 ena_reset_counters((counter_u64_t *)&rx_ring->rx_stats, 815 sizeof(rx_ring->rx_stats)); 816 817 rx_ring->next_to_clean = 0; 818 rx_ring->next_to_use = 0; 819 820 /* ... and create the buffer DMA maps */ 821 for (i = 0; i < rx_ring->ring_size; i++) { 822 err = bus_dmamap_create(adapter->rx_buf_tag, 0, 823 &(rx_ring->rx_buffer_info[i].map)); 824 if (err != 0) { 825 device_printf(adapter->pdev, 826 "Unable to create Rx DMA map for buffer %d\n", i); 827 goto err_rx_dma; 828 } 829 } 830 831 /* Create LRO for the ring */ 832 if (adapter->ifp->if_capenable & IFCAP_LRO) { 833 int err = tcp_lro_init(&rx_ring->lro); 834 if (err) { 835 device_printf(adapter->pdev, 836 "LRO[%d] Initialization failed!\n", qid); 837 } else { 838 ena_trace(ENA_INFO, 839 "RX Soft LRO[%d] Initialized\n", qid); 840 rx_ring->lro.ifp = adapter->ifp; 841 } 842 } 843 844 return (0); 845 846 err_rx_dma: 847 while (i--) { 848 bus_dmamap_destroy(adapter->rx_buf_tag, 849 rx_ring->rx_buffer_info[i].map); 850 } 851 852 ENA_MEM_FREE(adapter->ena_dev->dmadev, rx_ring->rx_buffer_info); 853 rx_ring->rx_buffer_info = NULL; 854 ena_trace(ENA_ALERT, "RX resource allocation fail"); 855 return (ENOMEM); 856 } 857 858 /** 859 * ena_free_rx_resources - Free Rx Resources 860 * @adapter: network interface device structure 861 * @qid: queue index 862 * 863 * Free all receive software resources 864 **/ 865 static void 866 ena_free_rx_resources(struct ena_adapter *adapter, unsigned int qid) 867 { 868 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 869 870 ena_trace(ENA_INFO, "%s qid %d\n", __func__, qid); 871 872 /* Free buffer DMA maps, */ 873 for (int i = 0; i < rx_ring->ring_size; i++) { 874 m_freem(rx_ring->rx_buffer_info[i].mbuf); 875 rx_ring->rx_buffer_info[i].mbuf = NULL; 876 bus_dmamap_unload(adapter->rx_buf_tag, 877 rx_ring->rx_buffer_info[i].map); 878 bus_dmamap_destroy(adapter->rx_buf_tag, 879 rx_ring->rx_buffer_info[i].map); 880 } 881 882 /* free LRO resources, */ 883 tcp_lro_free(&rx_ring->lro); 884 885 /* free allocated memory */ 886 ENA_MEM_FREE(adapter->ena_dev->dmadev, rx_ring->rx_buffer_info); 887 rx_ring->rx_buffer_info = NULL; 888 889 return; 890 } 891 892 /** 893 * ena_setup_all_rx_resources - allocate all queues Rx resources 894 * @adapter: network interface device structure 895 * 896 * Returns 0 on success, otherwise on failure. 897 **/ 898 static int 899 ena_setup_all_rx_resources(struct ena_adapter *adapter) 900 { 901 int i, rc = 0; 902 903 for (i = 0; i < adapter->num_queues; i++) { 904 rc = ena_setup_rx_resources(adapter, i); 905 if (!rc) 906 continue; 907 908 device_printf(adapter->pdev, 909 "Allocation for Rx Queue %u failed\n", i); 910 goto err_setup_rx; 911 } 912 return (0); 913 914 err_setup_rx: 915 /* rewind the index freeing the rings as we go */ 916 while (i--) 917 ena_free_rx_resources(adapter, i); 918 return (rc); 919 } 920 921 /** 922 * ena_free_all_rx_resources - Free Rx resources for all queues 923 * @adapter: network interface device structure 924 * 925 * Free all receive software resources 926 **/ 927 static void 928 ena_free_all_rx_resources(struct ena_adapter *adapter) 929 { 930 int i; 931 932 for (i = 0; i < adapter->num_queues; i++) 933 ena_free_rx_resources(adapter, i); 934 935 return; 936 } 937 938 static inline int 939 ena_alloc_rx_mbuf(struct ena_adapter *adapter, 940 struct ena_ring *rx_ring, struct ena_rx_buffer *rx_info) 941 { 942 struct ena_com_buf *ena_buf; 943 bus_dma_segment_t segs[1]; 944 int nsegs, error; 945 946 /* if previous allocated frag is not used */ 947 if (rx_info->mbuf != NULL) 948 return (0); 949 950 ENA_RING_MTX_LOCK(rx_ring); 951 /* Get mbuf using UMA allocator */ 952 rx_info->mbuf = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUM16BYTES); 953 ENA_RING_MTX_UNLOCK(rx_ring); 954 955 if (!rx_info->mbuf) { 956 counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1); 957 return (ENOMEM); 958 } 959 /* Set mbuf length*/ 960 rx_info->mbuf->m_pkthdr.len = rx_info->mbuf->m_len = MJUM16BYTES; 961 962 /* Map packets for DMA */ 963 ena_trace(ENA_DBG | ENA_RSC | ENA_RXPTH, 964 "Using tag %p for buffers' DMA mapping, mbuf %p len: %d", 965 adapter->rx_buf_tag,rx_info->mbuf, rx_info->mbuf->m_len); 966 error = bus_dmamap_load_mbuf_sg(adapter->rx_buf_tag, rx_info->map, 967 rx_info->mbuf, segs, &nsegs, BUS_DMA_NOWAIT); 968 if (error || (nsegs != 1)) { 969 device_printf(adapter->pdev, "failed to map mbuf, error: %d, " 970 "nsegs: %d\n", error, nsegs); 971 counter_u64_add(rx_ring->rx_stats.dma_mapping_err, 1); 972 goto exit; 973 974 } 975 976 bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map, BUS_DMASYNC_PREREAD); 977 978 ena_buf = &rx_info->ena_buf; 979 ena_buf->paddr = segs[0].ds_addr; 980 ena_buf->len = MJUM16BYTES; 981 982 ena_trace(ENA_DBG | ENA_RSC | ENA_RXPTH, 983 "ALLOC RX BUF: mbuf %p, rx_info %p, len %d, paddr %#jx\n", 984 rx_info->mbuf, rx_info,ena_buf->len, (uintmax_t)ena_buf->paddr); 985 986 return (0); 987 988 exit: 989 m_freem(rx_info->mbuf); 990 rx_info->mbuf = NULL; 991 return (EFAULT); 992 } 993 994 static void 995 ena_free_rx_mbuf(struct ena_adapter *adapter, struct ena_ring *rx_ring, 996 struct ena_rx_buffer *rx_info) 997 { 998 999 if (!rx_info->mbuf) 1000 return; 1001 1002 bus_dmamap_unload(adapter->rx_buf_tag, rx_info->map); 1003 m_freem(rx_info->mbuf); 1004 rx_info->mbuf = NULL; 1005 1006 return; 1007 } 1008 1009 1010 /** 1011 * ena_refill_rx_bufs - Refills ring with descriptors 1012 * @rx_ring: the ring which we want to feed with free descriptors 1013 * @num: number of descriptors to refill 1014 * Refills the ring with newly allocated DMA-mapped mbufs for receiving 1015 **/ 1016 static int 1017 ena_refill_rx_bufs(struct ena_ring *rx_ring, uint32_t num) 1018 { 1019 struct ena_adapter *adapter = rx_ring->adapter; 1020 uint16_t next_to_use; 1021 uint32_t i; 1022 int rc; 1023 1024 ena_trace(ENA_DBG | ENA_RXPTH | ENA_RSC, "refill qid: %d", 1025 rx_ring->qid); 1026 1027 next_to_use = rx_ring->next_to_use; 1028 1029 for (i = 0; i < num; i++) { 1030 ena_trace(ENA_DBG | ENA_RXPTH | ENA_RSC, 1031 "RX buffer - next to use: %d", next_to_use); 1032 1033 struct ena_rx_buffer *rx_info = 1034 &rx_ring->rx_buffer_info[next_to_use]; 1035 1036 rc = ena_alloc_rx_mbuf(adapter, rx_ring, rx_info); 1037 if (rc < 0) { 1038 device_printf(adapter->pdev, 1039 "failed to alloc buffer for rx queue\n"); 1040 break; 1041 } 1042 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq, 1043 &rx_info->ena_buf, next_to_use); 1044 if (unlikely(rc)) { 1045 device_printf(adapter->pdev, 1046 "failed to add buffer for rx queue %d\n", 1047 rx_ring->qid); 1048 break; 1049 } 1050 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use, 1051 rx_ring->ring_size); 1052 } 1053 1054 if (i < num) { 1055 counter_u64_add(rx_ring->rx_stats.refil_partial, 1); 1056 device_printf(adapter->pdev, 1057 "refilled rx queue %d with %d pages only\n", 1058 rx_ring->qid, i); 1059 } 1060 1061 if (i != 0) { 1062 wmb(); 1063 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq); 1064 } 1065 rx_ring->next_to_use = next_to_use; 1066 return (i); 1067 } 1068 1069 static void 1070 ena_free_rx_bufs(struct ena_adapter *adapter, unsigned int qid) 1071 { 1072 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 1073 unsigned int i; 1074 1075 for (i = 0; i < rx_ring->ring_size; i++) { 1076 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i]; 1077 1078 if (rx_info->mbuf) 1079 ena_free_rx_mbuf(adapter, rx_ring, rx_info); 1080 } 1081 1082 return; 1083 } 1084 1085 /** 1086 * ena_refill_all_rx_bufs - allocate all queues Rx buffers 1087 * @adapter: network interface device structure 1088 * 1089 */ 1090 static void 1091 ena_refill_all_rx_bufs(struct ena_adapter *adapter) 1092 { 1093 struct ena_ring *rx_ring; 1094 int i, rc, bufs_num; 1095 1096 for (i = 0; i < adapter->num_queues; i++) { 1097 rx_ring = &adapter->rx_ring[i]; 1098 bufs_num = rx_ring->ring_size - 1; 1099 rc = ena_refill_rx_bufs(rx_ring, bufs_num); 1100 1101 if (unlikely(rc != bufs_num)) 1102 device_printf(adapter->pdev, 1103 "refilling Queue %d failed. allocated %d buffers" 1104 " from: %d\n", i, rc, bufs_num); 1105 } 1106 } 1107 1108 static void 1109 ena_free_all_rx_bufs(struct ena_adapter *adapter) 1110 { 1111 int i; 1112 1113 for (i = 0; i < adapter->num_queues; i++) 1114 ena_free_rx_bufs(adapter, i); 1115 return; 1116 } 1117 1118 /** 1119 * ena_free_tx_bufs - Free Tx Buffers per Queue 1120 * @adapter: network interface device structure 1121 * @qid: queue index 1122 **/ 1123 static void 1124 ena_free_tx_bufs(struct ena_adapter *adapter, unsigned int qid) 1125 { 1126 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 1127 1128 ENA_RING_MTX_LOCK(tx_ring); 1129 for (int i = 0; i < tx_ring->ring_size; i++) { 1130 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i]; 1131 1132 if (tx_info->mbuf == NULL) 1133 continue; 1134 1135 ena_trace(ENA_DBG | ENA_TXPTH | ENA_RSC, 1136 "free uncompleted Tx mbufs qid[%d] idx: 0x%x", qid, i); 1137 1138 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map); 1139 m_free(tx_info->mbuf); 1140 tx_info->mbuf = NULL; 1141 } 1142 ENA_RING_MTX_UNLOCK(tx_ring); 1143 1144 return; 1145 } 1146 1147 static void 1148 ena_free_all_tx_bufs(struct ena_adapter *adapter) 1149 { 1150 1151 for (int i = 0; i < adapter->num_queues; i++) 1152 ena_free_tx_bufs(adapter, i); 1153 1154 return; 1155 } 1156 1157 static void 1158 ena_destroy_all_tx_queues(struct ena_adapter *adapter) 1159 { 1160 uint16_t ena_qid; 1161 int i; 1162 1163 for (i = 0; i < adapter->num_queues; i++) { 1164 ena_qid = ENA_IO_TXQ_IDX(i); 1165 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1166 } 1167 } 1168 1169 static void 1170 ena_destroy_all_rx_queues(struct ena_adapter *adapter) 1171 { 1172 uint16_t ena_qid; 1173 int i; 1174 1175 for (i = 0; i < adapter->num_queues; i++) { 1176 ena_qid = ENA_IO_RXQ_IDX(i); 1177 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1178 } 1179 } 1180 1181 static void 1182 ena_destroy_all_io_queues(struct ena_adapter *adapter) 1183 { 1184 ena_destroy_all_tx_queues(adapter); 1185 ena_destroy_all_rx_queues(adapter); 1186 } 1187 1188 static int 1189 validate_tx_req_id(struct ena_ring *tx_ring, uint16_t req_id) 1190 { 1191 struct ena_tx_buffer *tx_info = NULL; 1192 1193 if (likely(req_id < tx_ring->ring_size)) { 1194 tx_info = &tx_ring->tx_buffer_info[req_id]; 1195 if (tx_info->mbuf) 1196 return 0; 1197 } 1198 1199 counter_u64_add(tx_ring->tx_stats.bad_req_id, 1); 1200 1201 return (EFAULT); 1202 } 1203 1204 static int 1205 ena_create_io_queues(struct ena_adapter *adapter) 1206 { 1207 struct ena_com_dev *ena_dev = adapter->ena_dev; 1208 struct ena_com_create_io_ctx ctx; 1209 struct ena_ring *ring; 1210 uint16_t ena_qid; 1211 uint32_t msix_vector; 1212 int rc, i; 1213 1214 /* Create TX queues */ 1215 for (i = 0; i < adapter->num_queues; i++) { 1216 msix_vector = ENA_IO_IRQ_IDX(i); 1217 ena_qid = ENA_IO_TXQ_IDX(i); 1218 ctx.mem_queue_type = ena_dev->tx_mem_queue_type; 1219 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX; 1220 ctx.queue_size = adapter->tx_ring_size; 1221 ctx.msix_vector = msix_vector; 1222 ctx.qid = ena_qid; 1223 rc = ena_com_create_io_queue(ena_dev, &ctx); 1224 if (rc) { 1225 device_printf(adapter->pdev, 1226 "Failed to create io TX queue #%d rc: %d\n", i, rc); 1227 goto err_tx; 1228 } 1229 ring = &adapter->tx_ring[i]; 1230 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 1231 &ring->ena_com_io_sq, 1232 &ring->ena_com_io_cq); 1233 if (rc) { 1234 device_printf(adapter->pdev, 1235 "Failed to get TX queue handlers. TX queue num" 1236 " %d rc: %d\n", i, rc); 1237 ena_com_destroy_io_queue(ena_dev, ena_qid); 1238 goto err_tx; 1239 } 1240 } 1241 1242 /* Create RX queues */ 1243 for (i = 0; i < adapter->num_queues; i++) { 1244 msix_vector = ENA_IO_IRQ_IDX(i); 1245 ena_qid = ENA_IO_RXQ_IDX(i); 1246 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 1247 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX; 1248 ctx.queue_size = adapter->rx_ring_size; 1249 ctx.msix_vector = msix_vector; 1250 ctx.qid = ena_qid; 1251 rc = ena_com_create_io_queue(ena_dev, &ctx); 1252 if (rc) { 1253 device_printf(adapter->pdev, 1254 "Failed to create io RX queue[%d] rc: %d\n", i, rc); 1255 goto err_rx; 1256 } 1257 1258 ring = &adapter->rx_ring[i]; 1259 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 1260 &ring->ena_com_io_sq, 1261 &ring->ena_com_io_cq); 1262 if (rc) { 1263 device_printf(adapter->pdev, 1264 "Failed to get RX queue handlers. RX queue num" 1265 " %d rc: %d\n", i, rc); 1266 ena_com_destroy_io_queue(ena_dev, ena_qid); 1267 goto err_rx; 1268 } 1269 } 1270 1271 return (0); 1272 1273 err_rx: 1274 while (i--) 1275 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i)); 1276 i = adapter->num_queues; 1277 err_tx: 1278 while (i--) 1279 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i)); 1280 1281 return (ENXIO); 1282 } 1283 1284 /** 1285 * ena_tx_cleanup - clear sent packets and corresponding descriptors 1286 * @tx_ring: ring for which we want to clean packets 1287 * 1288 * Once packets are sent, we ask the device in a loop for no longer used 1289 * descriptors. We find the related mbuf chain in a map (index in an array) 1290 * and free it, then update ring state. 1291 * This is performed in "endless" loop, updating ring pointers every 1292 * TX_COMMIT. The first check of free descriptor is performed before the actual 1293 * loop, then repeated at the loop end. 1294 **/ 1295 static int 1296 ena_tx_cleanup(struct ena_ring *tx_ring) 1297 { 1298 struct ena_adapter *adapter; 1299 struct ena_com_io_cq* io_cq; 1300 uint16_t next_to_clean; 1301 uint16_t req_id; 1302 uint16_t ena_qid; 1303 unsigned int total_done = 0; 1304 int rc; 1305 int commit = TX_COMMIT; 1306 int budget = TX_BUDGET; 1307 int work_done; 1308 1309 adapter = tx_ring->que->adapter; 1310 ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id); 1311 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 1312 next_to_clean = tx_ring->next_to_clean; 1313 1314 do { 1315 struct ena_tx_buffer *tx_info; 1316 struct mbuf *mbuf; 1317 1318 rc = ena_com_tx_comp_req_id_get(io_cq, &req_id); 1319 if (rc != 0) 1320 break; 1321 1322 rc = validate_tx_req_id(tx_ring, req_id); 1323 if (rc) 1324 break; 1325 1326 tx_info = &tx_ring->tx_buffer_info[req_id]; 1327 1328 mbuf = tx_info->mbuf; 1329 1330 tx_info->mbuf = NULL; 1331 bintime_clear(&tx_info->timestamp); 1332 1333 if (tx_info->num_of_bufs != 0) { 1334 /* Map is no longer required */ 1335 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map); 1336 } 1337 1338 m_freem(mbuf); 1339 1340 total_done += tx_info->tx_descs; 1341 1342 tx_ring->free_tx_ids[next_to_clean] = req_id; 1343 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1344 tx_ring->ring_size); 1345 1346 if (--commit == 0) { 1347 commit = TX_COMMIT; 1348 /* update ring state every TX_COMMIT descriptor */ 1349 tx_ring->next_to_clean = next_to_clean; 1350 ena_com_comp_ack(&adapter->ena_dev->io_sq_queues[ena_qid], total_done); 1351 ena_com_update_dev_comp_head(io_cq); 1352 total_done = 0; 1353 } 1354 } while (--budget); 1355 1356 work_done = TX_BUDGET - budget; 1357 1358 /* If there is still something to commit update ring state */ 1359 if (commit != TX_COMMIT) { 1360 tx_ring->next_to_clean = next_to_clean; 1361 ena_com_comp_ack(&adapter->ena_dev->io_sq_queues[ena_qid], total_done); 1362 ena_com_update_dev_comp_head(io_cq); 1363 } 1364 1365 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 1366 1367 return (work_done); 1368 } 1369 1370 static void 1371 ena_rx_hash_mbuf(struct ena_ring *rx_ring, struct ena_com_rx_ctx *ena_rx_ctx, 1372 struct mbuf *mbuf) 1373 { 1374 struct ena_adapter *adapter = rx_ring->adapter; 1375 1376 if (adapter->rss_support) { 1377 mbuf->m_pkthdr.flowid = ena_rx_ctx->hash; 1378 1379 if (ena_rx_ctx->frag && 1380 ena_rx_ctx->l3_proto != ENA_ETH_IO_L4_PROTO_UNKNOWN) { 1381 M_HASHTYPE_SET(mbuf, M_HASHTYPE_OPAQUE_HASH); 1382 return; 1383 } 1384 1385 switch (ena_rx_ctx->l3_proto) { 1386 case ENA_ETH_IO_L3_PROTO_IPV4: 1387 switch (ena_rx_ctx->l4_proto) { 1388 case ENA_ETH_IO_L4_PROTO_TCP: 1389 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_TCP_IPV4); 1390 break; 1391 case ENA_ETH_IO_L4_PROTO_UDP: 1392 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_UDP_IPV4); 1393 break; 1394 default: 1395 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_IPV4); 1396 } 1397 break; 1398 case ENA_ETH_IO_L3_PROTO_IPV6: 1399 switch (ena_rx_ctx->l4_proto) { 1400 case ENA_ETH_IO_L4_PROTO_TCP: 1401 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_TCP_IPV6); 1402 break; 1403 case ENA_ETH_IO_L4_PROTO_UDP: 1404 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_UDP_IPV6); 1405 break; 1406 default: 1407 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_IPV6); 1408 } 1409 break; 1410 case ENA_ETH_IO_L3_PROTO_UNKNOWN: 1411 M_HASHTYPE_SET(mbuf, M_HASHTYPE_NONE); 1412 break; 1413 default: 1414 M_HASHTYPE_SET(mbuf, M_HASHTYPE_OPAQUE_HASH); 1415 } 1416 } else { 1417 mbuf->m_pkthdr.flowid = rx_ring->qid; 1418 M_HASHTYPE_SET(mbuf, M_HASHTYPE_NONE); 1419 } 1420 } 1421 1422 /** 1423 * ena_rx_mbuf - assemble mbuf from descriptors 1424 * @rx_ring: ring for which we want to clean packets 1425 * @ena_bufs: buffer info 1426 * @ena_rx_ctx: metadata for this packet(s) 1427 * @next_to_clean: ring pointer 1428 * 1429 **/ 1430 static struct mbuf* 1431 ena_rx_mbuf(struct ena_ring *rx_ring, struct ena_com_rx_buf_info *ena_bufs, 1432 struct ena_com_rx_ctx *ena_rx_ctx, uint16_t *next_to_clean) 1433 { 1434 struct mbuf *mbuf; 1435 struct ena_rx_buffer *rx_info; 1436 struct ena_adapter *adapter; 1437 unsigned int len, buf = 0; 1438 unsigned int descs = ena_rx_ctx->descs; 1439 1440 adapter = rx_ring->adapter; 1441 rx_info = &rx_ring->rx_buffer_info[*next_to_clean]; 1442 1443 ENA_ASSERT(rx_info->mbuf, "Invalid alloc frag buffer\n"); 1444 1445 len = ena_bufs[0].len; 1446 ena_trace(ENA_DBG | ENA_RXPTH, "rx_info %p, mbuf %p, paddr %jx", 1447 rx_info, rx_info->mbuf, (uintmax_t)rx_info->ena_buf.paddr); 1448 1449 mbuf = rx_info->mbuf; 1450 mbuf->m_flags |= M_PKTHDR; 1451 mbuf->m_pkthdr.len = len; 1452 mbuf->m_len = len; 1453 mbuf->m_pkthdr.rcvif = rx_ring->que->adapter->ifp; 1454 1455 /* Fill mbuf with hash key and it's interpretation for optimization */ 1456 ena_rx_hash_mbuf(rx_ring, ena_rx_ctx, mbuf); 1457 1458 ena_trace(ENA_DBG | ENA_RXPTH, "rx mbuf 0x%p, flags=0x%x, len: %d", 1459 mbuf, mbuf->m_flags, mbuf->m_pkthdr.len); 1460 1461 /* DMA address is not needed anymore, unmap it */ 1462 bus_dmamap_unload(rx_ring->adapter->rx_buf_tag, rx_info->map); 1463 1464 rx_info->mbuf = NULL; 1465 *next_to_clean = ENA_RX_RING_IDX_NEXT(*next_to_clean, 1466 rx_ring->ring_size); 1467 1468 /* 1469 * While we have more than 1 descriptors for one rcvd packet, append 1470 * other mbufs to the main one 1471 */ 1472 while (--descs) { 1473 rx_info = &rx_ring->rx_buffer_info[*next_to_clean]; 1474 len = ena_bufs[++buf].len; 1475 1476 if (!m_append(mbuf, len, rx_info->mbuf->m_data)) { 1477 counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1); 1478 ena_trace(ENA_WARNING, "Failed to append Rx mbuf %p", 1479 mbuf); 1480 } 1481 /* Free already appended mbuf, it won't be useful anymore */ 1482 bus_dmamap_unload(rx_ring->adapter->rx_buf_tag, rx_info->map); 1483 m_freem(rx_info->mbuf); 1484 rx_info->mbuf = NULL; 1485 1486 *next_to_clean = ENA_RX_RING_IDX_NEXT(*next_to_clean, 1487 rx_ring->ring_size); 1488 } 1489 1490 return (mbuf); 1491 } 1492 1493 /** 1494 * ena_rx_checksum - indicate in mbuf if hw indicated a good cksum 1495 **/ 1496 static inline void 1497 ena_rx_checksum(struct ena_ring *rx_ring, struct ena_com_rx_ctx *ena_rx_ctx, 1498 struct mbuf *mbuf) 1499 { 1500 1501 /* if IP and error */ 1502 if ((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) && 1503 (ena_rx_ctx->l3_csum_err)) { 1504 /* ipv4 checksum error */ 1505 mbuf->m_pkthdr.csum_flags = 0; 1506 counter_u64_add(rx_ring->rx_stats.bad_csum, 1); 1507 return; 1508 } 1509 1510 /* if TCP/UDP */ 1511 if ((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1512 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)) { 1513 if (ena_rx_ctx->l4_csum_err) { 1514 /* TCP/UDP checksum error */ 1515 mbuf->m_pkthdr.csum_flags = 0; 1516 counter_u64_add(rx_ring->rx_stats.bad_csum, 1); 1517 } else { 1518 mbuf->m_pkthdr.csum_flags = CSUM_IP_CHECKED; 1519 mbuf->m_pkthdr.csum_flags |= CSUM_IP_VALID; 1520 } 1521 } 1522 1523 return; 1524 } 1525 1526 /** 1527 * ena_rx_cleanup - handle rx irq 1528 * @arg: ring for which irq is being handled 1529 **/ 1530 static int 1531 ena_rx_cleanup(struct ena_ring *rx_ring) 1532 { 1533 struct ena_adapter *adapter; 1534 struct mbuf *mbuf; 1535 struct ena_com_rx_ctx ena_rx_ctx; 1536 struct ena_com_io_cq* io_cq; 1537 struct ena_com_io_sq* io_sq; 1538 /* struct ena_eth_io_intr_reg intr_reg; */ 1539 if_t ifp; 1540 uint16_t ena_qid; 1541 uint16_t next_to_clean; 1542 uint32_t refill_required; 1543 uint32_t refill_threshold; 1544 uint32_t do_if_input = 0; 1545 unsigned int qid; 1546 int rc; 1547 int budget = RX_BUDGET; 1548 1549 adapter = rx_ring->que->adapter; 1550 ifp = adapter->ifp; 1551 qid = rx_ring->que->id; 1552 ena_qid = ENA_IO_RXQ_IDX(qid); 1553 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 1554 io_sq = &adapter->ena_dev->io_sq_queues[ena_qid]; 1555 next_to_clean = rx_ring->next_to_clean; 1556 1557 do { 1558 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs; 1559 ena_rx_ctx.max_bufs = adapter->max_rx_sgl_size; 1560 ena_rx_ctx.descs = 0; 1561 rc = ena_com_rx_pkt(io_cq, io_sq, &ena_rx_ctx); 1562 1563 if (unlikely(rc)) 1564 goto error; 1565 1566 if (unlikely(ena_rx_ctx.descs == 0)) 1567 break; 1568 1569 /* Receive mbuf from the ring */ 1570 mbuf = ena_rx_mbuf(rx_ring, rx_ring->ena_bufs, 1571 &ena_rx_ctx, &next_to_clean); 1572 1573 /* Exit if we failed to retrieve a buffer */ 1574 if (unlikely(!mbuf)) { 1575 next_to_clean = ENA_RX_RING_IDX_ADD(next_to_clean, 1576 ena_rx_ctx.descs, rx_ring->ring_size); 1577 break; 1578 } 1579 ena_trace(ENA_DBG | ENA_RXPTH, "Rx: %d bytes", 1580 mbuf->m_pkthdr.len); 1581 1582 if ((ifp->if_capenable & IFCAP_RXCSUM) || 1583 (ifp->if_capenable & IFCAP_RXCSUM_IPV6)) { 1584 ena_rx_checksum(rx_ring, &ena_rx_ctx, mbuf); 1585 } 1586 1587 counter_u64_add(rx_ring->rx_stats.bytes, mbuf->m_pkthdr.len); 1588 /* 1589 * LRO is only for IP/TCP packets and TCP checksum of the packet 1590 * should be computed by hardware. 1591 */ 1592 do_if_input = 1; 1593 if ((ifp->if_capenable & IFCAP_LRO) && 1594 (mbuf->m_pkthdr.csum_flags & CSUM_IP_VALID) && 1595 ena_rx_ctx.l4_proto == ENA_ETH_IO_L4_PROTO_TCP) { 1596 /* 1597 * Send to the stack if: 1598 * - LRO not enabled, or 1599 * - no LRO resources, or 1600 * - lro enqueue fails 1601 */ 1602 if (rx_ring->lro.lro_cnt != 0 && 1603 tcp_lro_rx(&rx_ring->lro, mbuf, 0) == 0) 1604 do_if_input = 0; 1605 } 1606 if (do_if_input) { 1607 ena_trace(ENA_DBG | ENA_RXPTH, "calling if_input() with mbuf %p", 1608 mbuf); 1609 (*ifp->if_input)(ifp, mbuf); 1610 } 1611 1612 counter_u64_add(rx_ring->rx_stats.cnt, 1); 1613 } while (--budget); 1614 1615 rx_ring->next_to_clean = next_to_clean; 1616 1617 refill_required = ena_com_sq_empty_space(io_sq); 1618 refill_threshold = rx_ring->ring_size / ENA_RX_REFILL_THRESH_DEVIDER; 1619 1620 if (refill_required > refill_threshold) { 1621 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq); 1622 ena_refill_rx_bufs(rx_ring, refill_required); 1623 } 1624 1625 tcp_lro_flush_all(&rx_ring->lro); 1626 1627 return (RX_BUDGET - budget); 1628 1629 error: 1630 counter_u64_add(rx_ring->rx_stats.bad_desc_num, 1); 1631 return (RX_BUDGET - budget); 1632 } 1633 1634 /********************************************************************* 1635 * 1636 * MSIX & Interrupt Service routine 1637 * 1638 **********************************************************************/ 1639 1640 /** 1641 * ena_handle_msix - MSIX Interrupt Handler for admin/async queue 1642 * @arg: interrupt number 1643 **/ 1644 static void 1645 ena_intr_msix_mgmnt(void *arg) 1646 { 1647 struct ena_adapter *adapter = (struct ena_adapter *)arg; 1648 1649 ena_com_admin_q_comp_intr_handler(adapter->ena_dev); 1650 if (likely(adapter->running)) 1651 ena_com_aenq_intr_handler(adapter->ena_dev, arg); 1652 } 1653 1654 /** 1655 * ena_handle_msix - MSIX Interrupt Handler for Tx/Rx 1656 * @arg: interrupt number 1657 **/ 1658 static void 1659 ena_handle_msix(void *arg) 1660 { 1661 struct ena_que *que = arg; 1662 struct ena_adapter *adapter = que->adapter; 1663 if_t ifp = adapter->ifp; 1664 struct ena_ring *tx_ring; 1665 struct ena_ring *rx_ring; 1666 struct ena_com_io_cq* io_cq; 1667 struct ena_eth_io_intr_reg intr_reg; 1668 int qid, ena_qid; 1669 int txc, rxc, i; 1670 1671 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1672 return; 1673 1674 ena_trace(ENA_DBG, "MSI-X TX/RX routine"); 1675 1676 tx_ring = que->tx_ring; 1677 rx_ring = que->rx_ring; 1678 qid = que->id; 1679 ena_qid = ENA_IO_TXQ_IDX(qid); 1680 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 1681 1682 for (i = 0; i < CLEAN_BUDGET; ++i) { 1683 rxc = ena_rx_cleanup(rx_ring); 1684 1685 /* Protection from calling ena_tx_cleanup from ena_start_xmit */ 1686 ENA_RING_MTX_LOCK(tx_ring); 1687 txc = ena_tx_cleanup(tx_ring); 1688 ENA_RING_MTX_UNLOCK(tx_ring); 1689 1690 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1691 return; 1692 1693 if (txc != TX_BUDGET && rxc != RX_BUDGET) 1694 break; 1695 } 1696 1697 /* Signal that work is done and unmask interrupt */ 1698 ena_com_update_intr_reg(&intr_reg, 1699 RX_IRQ_INTERVAL, 1700 TX_IRQ_INTERVAL, 1701 true); 1702 ena_com_unmask_intr(io_cq, &intr_reg); 1703 } 1704 1705 static int 1706 ena_enable_msix(struct ena_adapter *adapter) 1707 { 1708 device_t dev = adapter->pdev; 1709 int i, msix_vecs, rc = 0; 1710 1711 /* Reserved the max msix vectors we might need */ 1712 msix_vecs = ENA_MAX_MSIX_VEC(adapter->num_queues); 1713 1714 adapter->msix_entries = ENA_MEM_ALLOC(adapter->ena_dev->dmadev, 1715 msix_vecs * sizeof(struct msix_entry)); 1716 if (!adapter->msix_entries) { 1717 device_printf(dev, 1718 "Failed to allocate msix_entries, vectors %d\n", msix_vecs); 1719 rc = ENOMEM; 1720 goto error; 1721 } 1722 device_printf(dev, "Allocated msix_entries, vectors (cnt: %d)\n", 1723 msix_vecs); 1724 1725 for (i = 0; i < msix_vecs; i++) { 1726 adapter->msix_entries[i].entry = i; 1727 /* Vectors must start from 1 */ 1728 adapter->msix_entries[i].vector = i + 1; 1729 } 1730 1731 rc = pci_alloc_msix(dev, &msix_vecs); 1732 if (rc != 0) { 1733 device_printf(dev, 1734 "Failed to enable MSIX, vectors %d rc %d\n", msix_vecs, rc); 1735 ENA_MEM_FREE(adapter->ena_dev->dmadev, adapter->msix_entries); 1736 adapter->msix_entries = NULL; 1737 rc = ENOSPC; 1738 goto error; 1739 } 1740 1741 adapter->msix_vecs = msix_vecs; 1742 adapter->msix_enabled = true; 1743 1744 error: 1745 return (rc); 1746 } 1747 1748 static void 1749 ena_setup_mgmnt_intr(struct ena_adapter *adapter) 1750 { 1751 1752 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, 1753 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s", 1754 device_get_nameunit(adapter->pdev)); 1755 /* 1756 * Handler is NULL on purpose, it will be set 1757 * when mgmnt interrupt is acquired 1758 */ 1759 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = NULL; 1760 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter; 1761 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector = 1762 adapter->msix_entries[ENA_MGMNT_IRQ_IDX].vector; 1763 1764 return; 1765 } 1766 1767 static void 1768 ena_setup_io_intr(struct ena_adapter *adapter) 1769 { 1770 static int last_bind_cpu = -1; 1771 int irq_idx; 1772 ena_trace(ENA_DBG, "enter"); 1773 1774 for (int i = 0; i < adapter->num_queues; i++) { 1775 irq_idx = ENA_IO_IRQ_IDX(i); 1776 1777 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, 1778 "%s-TxRx-%d", device_get_nameunit(adapter->pdev), i); 1779 adapter->irq_tbl[irq_idx].handler = ena_handle_msix; 1780 adapter->irq_tbl[irq_idx].data = &adapter->que[i]; 1781 adapter->irq_tbl[irq_idx].vector = 1782 adapter->msix_entries[irq_idx].vector; 1783 ena_trace(ENA_INFO | ENA_IOQ, "ena_setup_io_intr vector: %d\n", 1784 adapter->msix_entries[irq_idx].vector); 1785 #ifdef RSS 1786 adapter->que[i].cpu = adapter->irq_tbl[irq_idx].cpu = 1787 rss_getcpu(i % rss_getnumbuckets()); 1788 #else 1789 /* 1790 * We still want to bind rings to the corresponding cpu 1791 * using something similar to the RSS round-robin technique. 1792 */ 1793 if (last_bind_cpu < 0) 1794 last_bind_cpu = CPU_FIRST(); 1795 adapter->que[i].cpu = adapter->irq_tbl[irq_idx].cpu = 1796 last_bind_cpu; 1797 last_bind_cpu = CPU_NEXT(last_bind_cpu); 1798 #endif 1799 } 1800 1801 return; 1802 } 1803 1804 static int 1805 ena_request_mgmnt_irq(struct ena_adapter *adapter) 1806 { 1807 struct ena_irq *irq; 1808 unsigned long flags; 1809 int rc, rcc; 1810 1811 flags = RF_ACTIVE | RF_SHAREABLE; 1812 1813 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 1814 irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ, 1815 &irq->vector, flags); 1816 1817 if (irq->res == NULL) { 1818 device_printf(adapter->pdev, "could not allocate " 1819 "irq vector: %d\n", irq->vector); 1820 rc = ENXIO; 1821 goto exit_res; 1822 } 1823 1824 if ((rc = bus_activate_resource(adapter->pdev, SYS_RES_IRQ, irq->vector, 1825 irq->res)) != 0) { 1826 device_printf(adapter->pdev, "could not activate " 1827 "irq vector: %d\n", irq->vector); 1828 goto exit_intr; 1829 } 1830 1831 if ((rc = bus_setup_intr(adapter->pdev, irq->res, 1832 INTR_TYPE_NET | INTR_MPSAFE, NULL, 1833 ena_intr_msix_mgmnt, irq->data, &irq->cookie)) != 0) { 1834 device_printf(adapter->pdev, "failed to register " 1835 "interrupt handler for irq %ju: %d\n", 1836 rman_get_start(irq->res), rc); 1837 goto exit_intr; 1838 } 1839 irq->requested = true; 1840 1841 return (rc); 1842 1843 exit_intr: 1844 device_printf(adapter->pdev, "exit_intr: releasing resource" 1845 " for irq %d\n", irq->vector); 1846 rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 1847 irq->vector, irq->res); 1848 if (rcc) 1849 device_printf(adapter->pdev, "dev has no parent while " 1850 "releasing res for irq: %d\n", irq->vector); 1851 irq->res = NULL; 1852 1853 exit_res: 1854 return (rc); 1855 } 1856 1857 static int 1858 ena_request_io_irq(struct ena_adapter *adapter) 1859 { 1860 struct ena_irq *irq; 1861 unsigned long flags = 0; 1862 int rc = 0, i, rcc; 1863 1864 if (!adapter->msix_enabled) { 1865 device_printf(adapter->pdev, "failed to request irq\n"); 1866 return (EINVAL); 1867 } else { 1868 flags = RF_ACTIVE | RF_SHAREABLE; 1869 } 1870 1871 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) { 1872 irq = &adapter->irq_tbl[i]; 1873 1874 if (irq->requested) 1875 continue; 1876 1877 irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ, 1878 &irq->vector, flags); 1879 if (irq->res == NULL) { 1880 device_printf(adapter->pdev, "could not allocate " 1881 "irq vector: %d\n", irq->vector); 1882 goto err; 1883 } 1884 1885 if ((rc = bus_setup_intr(adapter->pdev, irq->res, 1886 INTR_TYPE_NET | INTR_MPSAFE, NULL, irq->handler, 1887 irq->data, &irq->cookie)) != 0) { 1888 device_printf(adapter->pdev, "failed to register " 1889 "interrupt handler for irq %ju: %d\n", 1890 rman_get_start(irq->res), rc); 1891 goto err; 1892 } 1893 irq->requested = true; 1894 1895 #ifdef RSS 1896 device_printf(adapter->pdev, "queue %d - RSS bucket %d\n", 1897 i - ENA_IO_IRQ_FIRST_IDX, irq->cpu); 1898 #else 1899 device_printf(adapter->pdev, "queue %d - cpu %d\n", 1900 i - ENA_IO_IRQ_FIRST_IDX, irq->cpu); 1901 #endif 1902 } 1903 1904 return (rc); 1905 1906 err: 1907 1908 for (; i >= ENA_IO_IRQ_FIRST_IDX; i--) { 1909 irq = &adapter->irq_tbl[i]; 1910 rcc = 0; 1911 1912 /* Once we entered err: section and irq->requested is true we 1913 free both intr and resources */ 1914 if (irq->requested == true) 1915 rcc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie); 1916 if (rcc) 1917 device_printf(adapter->pdev, "could not release" 1918 " irq: %d, error: %d\n", irq->vector, rcc); 1919 1920 /* If we entred err: section without irq->requested set we know 1921 it was bus_alloc_resource_any() that needs cleanup, provided 1922 res is not NULL. In case res is NULL no work in needed in 1923 this iteration */ 1924 rcc = 0; 1925 if (irq->res != NULL) { 1926 rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 1927 irq->vector, irq->res); 1928 } 1929 if (rcc) 1930 device_printf(adapter->pdev, "dev has no parent while " 1931 "releasing res for irq: %d\n", irq->vector); 1932 irq->requested = false; 1933 irq->res = NULL; 1934 } 1935 1936 return (rc); 1937 } 1938 1939 static void 1940 ena_free_mgmnt_irq(struct ena_adapter *adapter) 1941 { 1942 struct ena_irq *irq; 1943 int rc; 1944 1945 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 1946 if (irq->requested) { 1947 ena_trace(ENA_INFO | ENA_ADMQ, "tear down irq: %d\n", 1948 irq->vector); 1949 rc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie); 1950 if (rc) 1951 device_printf(adapter->pdev, "failed to tear " 1952 "down irq: %d\n", irq->vector); 1953 irq->requested = 0; 1954 } 1955 1956 if (irq->res != NULL) { 1957 ena_trace(ENA_INFO | ENA_ADMQ, "release resource irq: %d\n", 1958 irq->vector); 1959 rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 1960 irq->vector, irq->res); 1961 irq->res = NULL; 1962 if (rc) 1963 device_printf(adapter->pdev, "dev has no parent while " 1964 "releasing res for irq: %d\n", irq->vector); 1965 } 1966 1967 return; 1968 } 1969 1970 static void 1971 ena_free_io_irq(struct ena_adapter *adapter) 1972 { 1973 struct ena_irq *irq; 1974 int rc; 1975 1976 for (int i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) { 1977 irq = &adapter->irq_tbl[i]; 1978 if (irq->requested) { 1979 ena_trace(ENA_INFO | ENA_IOQ, "tear down irq: %d\n", 1980 irq->vector); 1981 rc = bus_teardown_intr(adapter->pdev, irq->res, 1982 irq->cookie); 1983 if (rc) { 1984 device_printf(adapter->pdev, "failed to tear " 1985 "down irq: %d\n", irq->vector); 1986 } 1987 irq->requested = 0; 1988 } 1989 1990 if (irq->res != NULL) { 1991 ena_trace(ENA_INFO | ENA_IOQ, "release resource irq: %d\n", 1992 irq->vector); 1993 rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 1994 irq->vector, irq->res); 1995 irq->res = NULL; 1996 if (rc) { 1997 device_printf(adapter->pdev, "dev has no parent" 1998 " while releasing res for irq: %d\n", 1999 irq->vector); 2000 } 2001 } 2002 } 2003 2004 return; 2005 } 2006 2007 static void 2008 ena_free_irqs(struct ena_adapter* adapter) 2009 { 2010 2011 ena_free_io_irq(adapter); 2012 ena_free_mgmnt_irq(adapter); 2013 ena_disable_msix(adapter); 2014 } 2015 2016 static void 2017 ena_disable_msix(struct ena_adapter *adapter) 2018 { 2019 2020 pci_release_msi(adapter->pdev); 2021 2022 adapter->msix_vecs = 0; 2023 ENA_MEM_FREE(adapter->ena_dev->dmadev, adapter->msix_entries); 2024 adapter->msix_entries = NULL; 2025 } 2026 2027 static void 2028 ena_unmask_all_io_irqs(struct ena_adapter *adapter) 2029 { 2030 struct ena_com_io_cq* io_cq; 2031 struct ena_eth_io_intr_reg intr_reg; 2032 uint16_t ena_qid; 2033 int i; 2034 2035 /* Unmask interrupts for all queues */ 2036 for (i = 0; i < adapter->num_queues; i++) { 2037 ena_qid = ENA_IO_TXQ_IDX(i); 2038 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 2039 ena_com_update_intr_reg(&intr_reg, 0, 0, true); 2040 ena_com_unmask_intr(io_cq, &intr_reg); 2041 } 2042 } 2043 2044 /* Configure the Rx forwarding */ 2045 static int ena_rss_configure(struct ena_adapter *adapter) 2046 { 2047 struct ena_com_dev *ena_dev = adapter->ena_dev; 2048 int rc; 2049 2050 /* Set indirect table */ 2051 rc = ena_com_indirect_table_set(ena_dev); 2052 if (unlikely(rc && rc != EPERM)) 2053 return rc; 2054 2055 /* Configure hash function (if supported) */ 2056 rc = ena_com_set_hash_function(ena_dev); 2057 if (unlikely(rc && (rc != EPERM))) 2058 return rc; 2059 2060 /* Configure hash inputs (if supported) */ 2061 rc = ena_com_set_hash_ctrl(ena_dev); 2062 if (unlikely(rc && (rc != EPERM))) 2063 return rc; 2064 2065 return 0; 2066 } 2067 2068 static void 2069 ena_update_hw_stats(void *arg, int pending) 2070 { 2071 struct ena_adapter *adapter = arg; 2072 int rc; 2073 2074 for (;;) { 2075 if (!adapter->up) 2076 return; 2077 2078 rc = ena_update_stats_counters(adapter); 2079 if (rc) 2080 ena_trace(ENA_WARNING, 2081 "Error updating stats counters, rc = %d", rc); 2082 2083 pause("ena update hw stats", hz); 2084 } 2085 } 2086 2087 static int 2088 ena_up_complete(struct ena_adapter *adapter) 2089 { 2090 int rc; 2091 2092 if (adapter->rss_support) { 2093 rc = ena_rss_configure(adapter); 2094 if (rc) 2095 return (rc); 2096 } 2097 2098 ena_change_mtu(adapter->ifp, adapter->ifp->if_mtu); 2099 ena_refill_all_rx_bufs(adapter); 2100 2101 return (0); 2102 } 2103 2104 static int 2105 ena_up(struct ena_adapter *adapter) 2106 { 2107 int rc = 0; 2108 2109 if (!device_is_attached(adapter->pdev)) { 2110 device_printf(adapter->pdev, "device is not attached!\n"); 2111 return (ENXIO); 2112 } 2113 2114 if (!adapter->running) { 2115 device_printf(adapter->pdev, "device is not running!\n"); 2116 return (ENXIO); 2117 } 2118 2119 if (!adapter->up) { 2120 device_printf(adapter->pdev, "device is going UP\n"); 2121 2122 /* setup interrupts for IO queues */ 2123 ena_setup_io_intr(adapter); 2124 rc = ena_request_io_irq(adapter); 2125 if (rc) { 2126 ena_trace(ENA_ALERT, "err_req_irq"); 2127 goto err_req_irq; 2128 } 2129 2130 /* allocate transmit descriptors */ 2131 rc = ena_setup_all_tx_resources(adapter); 2132 if (rc) { 2133 ena_trace(ENA_ALERT, "err_setup_tx"); 2134 goto err_setup_tx; 2135 } 2136 2137 /* allocate receive descriptors */ 2138 rc = ena_setup_all_rx_resources(adapter); 2139 if (rc) { 2140 ena_trace(ENA_ALERT, "err_setup_rx"); 2141 goto err_setup_rx; 2142 } 2143 2144 /* create IO queues for Rx & Tx */ 2145 rc = ena_create_io_queues(adapter); 2146 if (rc) { 2147 ena_trace(ENA_ALERT, 2148 "create IO queues failed"); 2149 goto err_io_que; 2150 } 2151 2152 if (adapter->link_status) 2153 if_link_state_change(adapter->ifp, LINK_STATE_UP); 2154 2155 rc = ena_up_complete(adapter); 2156 if (rc) 2157 goto err_up_complete; 2158 2159 counter_u64_add(adapter->dev_stats.interface_up, 1); 2160 2161 ena_update_hwassist(adapter); 2162 2163 if_setdrvflagbits(adapter->ifp, IFF_DRV_RUNNING, 2164 IFF_DRV_OACTIVE); 2165 2166 callout_reset_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 2167 ena_timer_service, (void *)adapter, 0); 2168 2169 taskqueue_enqueue(adapter->stats_tq, &adapter->stats_task); 2170 2171 adapter->up = true; 2172 2173 ena_unmask_all_io_irqs(adapter); 2174 } 2175 2176 return (0); 2177 2178 err_up_complete: 2179 ena_destroy_all_io_queues(adapter); 2180 err_io_que: 2181 ena_free_all_rx_resources(adapter); 2182 err_setup_rx: 2183 ena_free_all_tx_resources(adapter); 2184 err_setup_tx: 2185 ena_free_io_irq(adapter); 2186 err_req_irq: 2187 return (rc); 2188 } 2189 2190 int 2191 ena_update_stats_counters(struct ena_adapter *adapter) 2192 { 2193 struct ena_admin_basic_stats ena_stats; 2194 struct ena_hw_stats *stats = &adapter->hw_stats; 2195 int rc = 0; 2196 2197 if (!adapter->up) 2198 return (rc); 2199 2200 rc = ena_com_get_dev_basic_stats(adapter->ena_dev, &ena_stats); 2201 if (rc) 2202 return (rc); 2203 2204 stats->tx_bytes = ((uint64_t)ena_stats.tx_bytes_high << 32) | 2205 ena_stats.tx_bytes_low; 2206 stats->rx_bytes = ((uint64_t)ena_stats.rx_bytes_high << 32) | 2207 ena_stats.rx_bytes_low; 2208 2209 stats->rx_packets = ((uint64_t)ena_stats.rx_pkts_high << 32) | 2210 ena_stats.rx_pkts_low; 2211 stats->tx_packets = ((uint64_t)ena_stats.tx_pkts_high << 32) | 2212 ena_stats.tx_pkts_low; 2213 2214 stats->rx_drops = ((uint64_t)ena_stats.rx_drops_high << 32) | 2215 ena_stats.rx_drops_low; 2216 2217 return (0); 2218 } 2219 2220 static uint64_t 2221 ena_get_counter(if_t ifp, ift_counter cnt) 2222 { 2223 struct ena_adapter *adapter; 2224 struct ena_hw_stats *stats; 2225 2226 adapter = if_getsoftc(ifp); 2227 stats = &adapter->hw_stats; 2228 2229 switch (cnt) { 2230 case IFCOUNTER_IPACKETS: 2231 return (stats->rx_packets); 2232 case IFCOUNTER_OPACKETS: 2233 return (stats->tx_packets); 2234 case IFCOUNTER_IBYTES: 2235 return (stats->rx_bytes); 2236 case IFCOUNTER_OBYTES: 2237 return (stats->tx_bytes); 2238 case IFCOUNTER_IQDROPS: 2239 return (stats->rx_drops); 2240 default: 2241 return (if_get_counter_default(ifp, cnt)); 2242 } 2243 } 2244 2245 static int 2246 ena_media_change(if_t ifp) 2247 { 2248 /* Media Change is not supported by firmware */ 2249 return (0); 2250 } 2251 2252 static void 2253 ena_media_status(if_t ifp, struct ifmediareq *ifmr) 2254 { 2255 struct ena_adapter *adapter = if_getsoftc(ifp); 2256 ena_trace(ENA_DBG, "enter"); 2257 2258 ENA_DEV_LOCK; 2259 2260 ifmr->ifm_status = IFM_AVALID; 2261 ifmr->ifm_active = IFM_ETHER; 2262 2263 if (!adapter->link_status) { 2264 ENA_DEV_UNLOCK; 2265 ena_trace(ENA_WARNING, "link_status = false"); 2266 return; 2267 } 2268 2269 ifmr->ifm_status |= IFM_ACTIVE; 2270 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 2271 2272 ENA_DEV_UNLOCK; 2273 2274 return; 2275 } 2276 2277 static void 2278 ena_init(void *arg) 2279 { 2280 struct ena_adapter *adapter = (struct ena_adapter *)arg; 2281 2282 if (adapter->up == false) { 2283 sx_xlock(&adapter->ioctl_sx); 2284 ena_up(adapter); 2285 sx_unlock(&adapter->ioctl_sx); 2286 } 2287 2288 return; 2289 } 2290 2291 static int 2292 ena_ioctl(if_t ifp, u_long command, caddr_t data) 2293 { 2294 struct ena_adapter *adapter; 2295 struct ifreq *ifr; 2296 int rc; 2297 2298 adapter = ifp->if_softc; 2299 ifr = (struct ifreq *)data; 2300 2301 /* 2302 * Acquiring lock to prevent from running up and down routines parallel. 2303 */ 2304 rc = 0; 2305 switch (command) { 2306 case SIOCSIFMTU: 2307 sx_xlock(&adapter->ioctl_sx); 2308 ena_down(adapter); 2309 2310 ena_change_mtu(ifp, ifr->ifr_mtu); 2311 2312 rc = ena_up(adapter); 2313 sx_unlock(&adapter->ioctl_sx); 2314 break; 2315 2316 case SIOCSIFFLAGS: 2317 if (ifp->if_flags & IFF_UP) { 2318 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2319 if (ifp->if_flags & (IFF_PROMISC | 2320 IFF_ALLMULTI)) { 2321 device_printf(adapter->pdev, 2322 "ioctl promisc/allmulti\n"); 2323 } 2324 } else { 2325 sx_xlock(&adapter->ioctl_sx); 2326 rc = ena_up(adapter); 2327 sx_unlock(&adapter->ioctl_sx); 2328 } 2329 } else { 2330 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 2331 sx_xlock(&adapter->ioctl_sx); 2332 ena_down(adapter); 2333 sx_unlock(&adapter->ioctl_sx); 2334 } 2335 } 2336 break; 2337 2338 case SIOCADDMULTI: 2339 case SIOCDELMULTI: 2340 break; 2341 2342 case SIOCSIFMEDIA: 2343 case SIOCGIFMEDIA: 2344 rc = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 2345 break; 2346 2347 case SIOCSIFCAP: 2348 { 2349 int reinit = 0; 2350 2351 if (ifr->ifr_reqcap != ifp->if_capenable) { 2352 ifp->if_capenable = ifr->ifr_reqcap; 2353 reinit = 1; 2354 } 2355 2356 if (reinit && (ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2357 sx_xlock(&adapter->ioctl_sx); 2358 ena_down(adapter); 2359 rc = ena_up(adapter); 2360 sx_unlock(&adapter->ioctl_sx); 2361 } 2362 } 2363 2364 break; 2365 default: 2366 rc = ether_ioctl(ifp, command, data); 2367 break; 2368 } 2369 2370 return (rc); 2371 } 2372 2373 static int 2374 ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *feat) 2375 { 2376 int caps = 0; 2377 2378 if (feat->offload.tx & 2379 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK | 2380 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK | 2381 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK)) 2382 caps |= IFCAP_TXCSUM; 2383 2384 if (feat->offload.tx & 2385 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_MASK | 2386 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)) 2387 caps |= IFCAP_TXCSUM_IPV6; 2388 2389 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) 2390 caps |= IFCAP_TSO4; 2391 2392 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) 2393 caps |= IFCAP_TSO6; 2394 2395 if (feat->offload.rx_supported & 2396 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK | 2397 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L3_CSUM_IPV4_MASK)) 2398 caps |= IFCAP_RXCSUM; 2399 2400 if (feat->offload.rx_supported & 2401 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) 2402 caps |= IFCAP_RXCSUM_IPV6; 2403 2404 caps |= IFCAP_LRO | IFCAP_JUMBO_MTU; 2405 2406 return (caps); 2407 } 2408 2409 static void 2410 ena_update_host_info(struct ena_admin_host_info *host_info, if_t ifp) 2411 { 2412 2413 host_info->supported_network_features[0] = 2414 (uint32_t)if_getcapabilities(ifp); 2415 } 2416 2417 static void 2418 ena_update_hwassist(struct ena_adapter *adapter) 2419 { 2420 if_t ifp = adapter->ifp; 2421 uint32_t feat = adapter->tx_offload_cap; 2422 int cap = if_getcapenable(ifp); 2423 int flags = 0; 2424 2425 if_clearhwassist(ifp); 2426 2427 if (cap & IFCAP_TXCSUM) { 2428 if (feat & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK) 2429 flags |= CSUM_IP; 2430 if (feat & 2431 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK | 2432 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)) 2433 flags |= CSUM_IP_UDP | CSUM_IP_TCP; 2434 } 2435 2436 if (cap & IFCAP_TXCSUM_IPV6) 2437 flags |= CSUM_IP6_UDP | CSUM_IP6_TCP; 2438 2439 if (cap & IFCAP_TSO4) 2440 flags |= CSUM_IP_TSO; 2441 2442 if (cap & IFCAP_TSO6) 2443 flags |= CSUM_IP6_TSO; 2444 2445 if_sethwassistbits(ifp, flags, 0); 2446 } 2447 2448 static int 2449 ena_setup_ifnet(device_t pdev, struct ena_adapter *adapter, 2450 struct ena_com_dev_get_features_ctx *feat) 2451 { 2452 if_t ifp; 2453 int caps = 0; 2454 2455 ena_trace(ENA_DBG, "enter"); 2456 2457 ifp = adapter->ifp = if_gethandle(IFT_ETHER); 2458 if (ifp == 0) { 2459 device_printf(pdev, "can not allocate ifnet structure\n"); 2460 return (ENXIO); 2461 } 2462 if_initname(ifp, device_get_name(pdev), device_get_unit(pdev)); 2463 if_setdev(ifp, pdev); 2464 if_setsoftc(ifp, adapter); 2465 2466 if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST); 2467 if_setinitfn(ifp, ena_init); 2468 if_settransmitfn(ifp, ena_mq_start); 2469 if_setqflushfn(ifp, ena_qflush); 2470 if_setioctlfn(ifp, ena_ioctl); 2471 if_setgetcounterfn(ifp, ena_get_counter); 2472 2473 if_setsendqlen(ifp, adapter->tx_ring_size); 2474 if_setsendqready(ifp); 2475 if_setmtu(ifp, ETHERMTU); 2476 if_setbaudrate(ifp, 0); 2477 /* Zeroize capabilities... */ 2478 if_setcapabilities(ifp, 0); 2479 if_setcapenable(ifp, 0); 2480 /* check hardware support */ 2481 caps = ena_get_dev_offloads(feat); 2482 /* ... and set them */ 2483 if_setcapabilitiesbit(ifp, caps, 0); 2484 2485 /* TSO parameters */ 2486 ifp->if_hw_tsomax = ENA_TSO_MAXSIZE; 2487 ifp->if_hw_tsomaxsegcount = ENA_TSO_NSEGS; 2488 ifp->if_hw_tsomaxsegsize = MCLBYTES; 2489 2490 if_setifheaderlen(ifp, sizeof(struct ether_vlan_header)); 2491 if_setcapenable(ifp, if_getcapabilities(ifp)); 2492 2493 /* 2494 * Specify the media types supported by this adapter and register 2495 * callbacks to update media and link information 2496 */ 2497 ifmedia_init(&adapter->media, IFM_IMASK, 2498 ena_media_change, ena_media_status); 2499 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 2500 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 2501 2502 ether_ifattach(ifp, adapter->mac_addr); 2503 2504 return (0); 2505 } 2506 2507 static void 2508 ena_down(struct ena_adapter *adapter) 2509 { 2510 2511 if (adapter->up) { 2512 device_printf(adapter->pdev, "device is going DOWN\n"); 2513 2514 callout_drain(&adapter->timer_service); 2515 2516 adapter->up = false; 2517 if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE, 2518 IFF_DRV_RUNNING); 2519 2520 /* Drain task responsible for updating hw stats */ 2521 while (taskqueue_cancel(adapter->stats_tq, &adapter->stats_task, NULL)) 2522 taskqueue_drain(adapter->stats_tq, &adapter->stats_task); 2523 2524 ena_free_io_irq(adapter); 2525 2526 ena_destroy_all_io_queues(adapter); 2527 2528 ena_free_all_tx_bufs(adapter); 2529 ena_free_all_rx_bufs(adapter); 2530 ena_free_all_tx_resources(adapter); 2531 ena_free_all_rx_resources(adapter); 2532 2533 counter_u64_add(adapter->dev_stats.interface_down, 1); 2534 } 2535 2536 return; 2537 } 2538 2539 static void 2540 ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct mbuf *mbuf) 2541 { 2542 struct ena_com_tx_meta *ena_meta; 2543 struct ether_vlan_header *eh; 2544 u32 mss; 2545 bool offload; 2546 uint16_t etype; 2547 int ehdrlen; 2548 struct ip *ip; 2549 int iphlen; 2550 struct tcphdr *th; 2551 2552 offload = false; 2553 ena_meta = &ena_tx_ctx->ena_meta; 2554 mss = mbuf->m_pkthdr.tso_segsz; 2555 2556 if (mss != 0) 2557 offload = true; 2558 2559 if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) != 0) 2560 offload = true; 2561 2562 if ((mbuf->m_pkthdr.csum_flags & CSUM_OFFLOAD) != 0) 2563 offload = true; 2564 2565 if (offload == false) { 2566 ena_tx_ctx->meta_valid = 0; 2567 return; 2568 } 2569 2570 /* Determine where frame payload starts. */ 2571 eh = mtod(mbuf, struct ether_vlan_header *); 2572 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) { 2573 etype = ntohs(eh->evl_proto); 2574 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN; 2575 } else { 2576 etype = ntohs(eh->evl_encap_proto); 2577 ehdrlen = ETHER_HDR_LEN; 2578 } 2579 2580 ip = (struct ip *)(mbuf->m_data + ehdrlen); 2581 iphlen = ip->ip_hl << 2; 2582 th = (struct tcphdr *)((caddr_t)ip + iphlen); 2583 2584 if ((mbuf->m_pkthdr.csum_flags & CSUM_IP) != 0) { 2585 ena_tx_ctx->l3_csum_enable = 1; 2586 } 2587 if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) != 0) { 2588 ena_tx_ctx->tso_enable = 1; 2589 ena_meta->l4_hdr_len = (th->th_off); 2590 } 2591 2592 switch (etype) { 2593 case ETHERTYPE_IP: 2594 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4; 2595 if (ip->ip_off == 0) 2596 ena_tx_ctx->df = 1; 2597 break; 2598 case ETHERTYPE_IPV6: 2599 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6; 2600 2601 default: 2602 break; 2603 } 2604 2605 if (ip->ip_p == IPPROTO_TCP) { 2606 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP; 2607 if (mbuf->m_pkthdr.csum_flags & (CSUM_IP_TCP | CSUM_IP6_TCP)) 2608 ena_tx_ctx->l4_csum_enable = 1; 2609 else 2610 ena_tx_ctx->l4_csum_enable = 0; 2611 } else if (ip->ip_p == IPPROTO_UDP) { 2612 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP; 2613 if (mbuf->m_pkthdr.csum_flags & (CSUM_IP_UDP | CSUM_IP6_UDP)) 2614 ena_tx_ctx->l4_csum_enable = 1; 2615 else 2616 ena_tx_ctx->l4_csum_enable = 0; 2617 } else { 2618 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UNKNOWN; 2619 ena_tx_ctx->l4_csum_enable = 0; 2620 } 2621 2622 ena_meta->mss = mss; 2623 ena_meta->l3_hdr_len = iphlen; 2624 ena_meta->l3_hdr_offset = ehdrlen; 2625 ena_tx_ctx->meta_valid = 1; 2626 } 2627 2628 static int 2629 ena_check_and_defragment_mbuf(struct ena_ring *tx_ring, struct mbuf **mbuf) 2630 { 2631 struct ena_adapter *adapter; 2632 struct mbuf *defrag_mbuf; 2633 int num_frags; 2634 2635 adapter = tx_ring->adapter; 2636 num_frags = ena_mbuf_count(*mbuf); 2637 2638 /* One segment must be reserved for configuration descriptor. */ 2639 if (num_frags < adapter->max_tx_sgl_size) 2640 return (0); 2641 counter_u64_add(tx_ring->tx_stats.defragment, 1); 2642 2643 defrag_mbuf = m_defrag(*mbuf, M_NOWAIT); 2644 if (defrag_mbuf == NULL) { 2645 counter_u64_add(tx_ring->tx_stats.defragment_err, 1); 2646 return (ENOMEM); 2647 } 2648 2649 /* If mbuf was defragmented succesfully, original mbuf is released. */ 2650 *mbuf = defrag_mbuf; 2651 2652 return (0); 2653 } 2654 2655 static int 2656 ena_xmit_mbuf(struct ena_ring *tx_ring, struct mbuf **mbuf) 2657 { 2658 struct ena_adapter *adapter; 2659 struct ena_tx_buffer *tx_info; 2660 struct ena_com_tx_ctx ena_tx_ctx; 2661 struct ena_com_dev *ena_dev; 2662 struct ena_com_buf *ena_buf; 2663 struct ena_com_io_sq* io_sq; 2664 bus_dma_segment_t segs[ENA_BUS_DMA_SEGS]; 2665 void *push_hdr; 2666 uint16_t next_to_use; 2667 uint16_t req_id; 2668 uint16_t push_len; 2669 uint16_t ena_qid; 2670 uint32_t len, nsegs, header_len; 2671 int i, rc; 2672 int nb_hw_desc; 2673 2674 ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id); 2675 adapter = tx_ring->que->adapter; 2676 ena_dev = adapter->ena_dev; 2677 io_sq = &adapter->ena_dev->io_sq_queues[ena_qid]; 2678 2679 ENA_ASSERT(*mbuf, "mbuf is NULL\n"); 2680 2681 rc = ena_check_and_defragment_mbuf(tx_ring, mbuf); 2682 if (rc) { 2683 ena_trace(ENA_WARNING, 2684 "Failed to defragment mbuf! err: %d", rc); 2685 return (rc); 2686 } 2687 2688 next_to_use = tx_ring->next_to_use; 2689 req_id = tx_ring->free_tx_ids[next_to_use]; 2690 tx_info = &tx_ring->tx_buffer_info[req_id]; 2691 2692 tx_info->mbuf = *mbuf; 2693 tx_info->num_of_bufs = 0; 2694 2695 ena_buf = tx_info->bufs; 2696 len = (*mbuf)->m_len; 2697 2698 ena_trace(ENA_DBG | ENA_TXPTH, "Tx: %d bytes", (*mbuf)->m_pkthdr.len); 2699 2700 push_len = 0; 2701 header_len = min_t(uint32_t, len, tx_ring->tx_max_header_size); 2702 push_hdr = NULL; 2703 2704 rc = bus_dmamap_load_mbuf_sg(adapter->tx_buf_tag, tx_info->map, 2705 *mbuf, segs, &nsegs, BUS_DMA_NOWAIT); 2706 2707 if (rc || (nsegs == 0)) { 2708 ena_trace(ENA_WARNING, 2709 "dmamap load failed! err: %d nsegs: %d", rc, nsegs); 2710 counter_u64_add(tx_ring->tx_stats.dma_mapping_err, 1); 2711 tx_info->mbuf = NULL; 2712 if (rc == ENOMEM) 2713 return (ENA_COM_NO_MEM); 2714 else 2715 return (ENA_COM_INVAL); 2716 } 2717 2718 for (i = 0; i < nsegs; i++) { 2719 ena_buf->len = segs[i].ds_len; 2720 ena_buf->paddr = segs[i].ds_addr; 2721 ena_buf++; 2722 } 2723 tx_info->num_of_bufs = nsegs; 2724 2725 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx)); 2726 ena_tx_ctx.ena_bufs = tx_info->bufs; 2727 ena_tx_ctx.push_header = push_hdr; 2728 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 2729 ena_tx_ctx.req_id = req_id; 2730 ena_tx_ctx.header_len = header_len; 2731 2732 /* Set flags and meta data */ 2733 ena_tx_csum(&ena_tx_ctx, *mbuf); 2734 /* Prepare the packet's descriptors and send them to device */ 2735 rc = ena_com_prepare_tx(io_sq, &ena_tx_ctx, &nb_hw_desc); 2736 if (rc != 0) { 2737 ena_trace(ENA_WARNING, "failed to prepare tx bufs\n"); 2738 counter_enter(); 2739 counter_u64_add_protected(tx_ring->tx_stats.queue_stop, 1); 2740 counter_u64_add_protected(tx_ring->tx_stats.prepare_ctx_err, 1); 2741 counter_exit(); 2742 goto dma_error; 2743 } 2744 2745 counter_enter(); 2746 counter_u64_add_protected(tx_ring->tx_stats.cnt, 1); 2747 counter_u64_add_protected(tx_ring->tx_stats.bytes, (*mbuf)->m_pkthdr.len); 2748 counter_exit(); 2749 2750 tx_info->tx_descs = nb_hw_desc; 2751 getbinuptime(&tx_info->timestamp); 2752 tx_info->print_once = true; 2753 2754 tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use, 2755 tx_ring->ring_size); 2756 2757 bus_dmamap_sync(adapter->tx_buf_tag, tx_info->map, BUS_DMASYNC_PREWRITE); 2758 2759 return (0); 2760 2761 dma_error: 2762 tx_info->mbuf = NULL; 2763 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map); 2764 2765 return (rc); 2766 } 2767 2768 static void 2769 ena_start_xmit(struct ena_ring *tx_ring) 2770 { 2771 struct mbuf *mbuf; 2772 struct ena_adapter *adapter = tx_ring->adapter; 2773 struct ena_com_io_sq* io_sq; 2774 int ena_qid; 2775 int acum_pkts = 0; 2776 int ret = 0; 2777 2778 if ((adapter->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 2779 return; 2780 2781 if (!adapter->link_status) 2782 return; 2783 2784 ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id); 2785 io_sq = &adapter->ena_dev->io_sq_queues[ena_qid]; 2786 2787 while ((mbuf = drbr_peek(adapter->ifp, tx_ring->br)) != NULL) { 2788 ena_trace(ENA_DBG | ENA_TXPTH, "\ndequeued mbuf %p with flags %#x and" 2789 " header csum flags %#jx", 2790 mbuf, mbuf->m_flags, mbuf->m_pkthdr.csum_flags); 2791 2792 if (ena_com_sq_empty_space(io_sq) < ENA_TX_CLEANUP_TRESHOLD) 2793 ena_tx_cleanup(tx_ring); 2794 2795 if ((ret = ena_xmit_mbuf(tx_ring, &mbuf)) != 0) { 2796 if (ret == ENA_COM_NO_MEM) { 2797 drbr_putback(adapter->ifp, tx_ring->br, mbuf); 2798 } else if (ret == ENA_COM_NO_SPACE) { 2799 drbr_putback(adapter->ifp, tx_ring->br, mbuf); 2800 } else { 2801 m_freem(mbuf); 2802 drbr_advance(adapter->ifp, tx_ring->br); 2803 } 2804 2805 break; 2806 } 2807 2808 drbr_advance(adapter->ifp, tx_ring->br); 2809 2810 if ((adapter->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 2811 return; 2812 2813 acum_pkts++; 2814 2815 BPF_MTAP(adapter->ifp, mbuf); 2816 2817 if (acum_pkts == DB_THRESHOLD) { 2818 acum_pkts = 0; 2819 wmb(); 2820 /* Trigger the dma engine */ 2821 ena_com_write_sq_doorbell(io_sq); 2822 counter_u64_add(tx_ring->tx_stats.doorbells, 1); 2823 } 2824 2825 } 2826 2827 if (acum_pkts) { 2828 wmb(); 2829 /* Trigger the dma engine */ 2830 ena_com_write_sq_doorbell(io_sq); 2831 counter_u64_add(tx_ring->tx_stats.doorbells, 1); 2832 } 2833 2834 if (ena_com_sq_empty_space(io_sq) < ENA_TX_CLEANUP_TRESHOLD) 2835 ena_tx_cleanup(tx_ring); 2836 } 2837 2838 static void 2839 ena_deferred_mq_start(void *arg, int pending) 2840 { 2841 struct ena_ring *tx_ring = (struct ena_ring *)arg; 2842 struct ifnet *ifp = tx_ring->adapter->ifp; 2843 2844 while (drbr_empty(ifp, tx_ring->br) == FALSE && 2845 (ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) { 2846 ENA_RING_MTX_LOCK(tx_ring); 2847 ena_start_xmit(tx_ring); 2848 ENA_RING_MTX_UNLOCK(tx_ring); 2849 } 2850 } 2851 2852 static int 2853 ena_mq_start(if_t ifp, struct mbuf *m) 2854 { 2855 struct ena_adapter *adapter = ifp->if_softc; 2856 struct ena_ring *tx_ring; 2857 int ret, is_drbr_empty; 2858 uint32_t i; 2859 2860 if ((adapter->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 2861 return (ENODEV); 2862 2863 /* Which queue to use */ 2864 /* 2865 * If everything is setup correctly, it should be the 2866 * same bucket that the current CPU we're on is. 2867 * It should improve performance. 2868 */ 2869 if (M_HASHTYPE_GET(m) != M_HASHTYPE_NONE) { 2870 #ifdef RSS 2871 if (rss_hash2bucket(m->m_pkthdr.flowid, 2872 M_HASHTYPE_GET(m), &i) == 0) { 2873 i = i % adapter->num_queues; 2874 2875 } else 2876 #endif 2877 { 2878 i = m->m_pkthdr.flowid % adapter->num_queues; 2879 } 2880 } else { 2881 i = curcpu % adapter->num_queues; 2882 } 2883 tx_ring = &adapter->tx_ring[i]; 2884 2885 /* Check if drbr is empty before putting packet */ 2886 is_drbr_empty = drbr_empty(ifp, tx_ring->br); 2887 ret = drbr_enqueue(ifp, tx_ring->br, m); 2888 if (ret) { 2889 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 2890 return (ret); 2891 } 2892 2893 if (is_drbr_empty && ENA_RING_MTX_TRYLOCK(tx_ring)) { 2894 ena_start_xmit(tx_ring); 2895 ENA_RING_MTX_UNLOCK(tx_ring); 2896 } else { 2897 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 2898 } 2899 2900 return (0); 2901 } 2902 2903 static void 2904 ena_qflush(if_t ifp) 2905 { 2906 struct ena_adapter *adapter = ifp->if_softc; 2907 struct ena_ring *tx_ring = adapter->tx_ring; 2908 int i; 2909 2910 for(i = 0; i < adapter->num_queues; ++i, ++tx_ring) 2911 if (drbr_empty(ifp, tx_ring->br) == FALSE) { 2912 ENA_RING_MTX_LOCK(tx_ring); 2913 drbr_flush(ifp, tx_ring->br); 2914 ENA_RING_MTX_UNLOCK(tx_ring); 2915 } 2916 2917 if_qflush(ifp); 2918 2919 return; 2920 } 2921 2922 static int ena_calc_io_queue_num(struct ena_adapter *adapter, 2923 struct ena_com_dev_get_features_ctx *get_feat_ctx) 2924 { 2925 int io_sq_num, io_cq_num, io_queue_num; 2926 2927 io_sq_num = get_feat_ctx->max_queues.max_sq_num; 2928 io_cq_num = get_feat_ctx->max_queues.max_sq_num; 2929 2930 io_queue_num = min_t(int, mp_ncpus, ENA_MAX_NUM_IO_QUEUES); 2931 io_queue_num = min_t(int, io_queue_num, io_sq_num); 2932 io_queue_num = min_t(int, io_queue_num, io_cq_num); 2933 /* 1 IRQ for for mgmnt and 1 IRQ for each TX/RX pair */ 2934 io_queue_num = min_t(int, io_queue_num, 2935 pci_msix_count(adapter->pdev) - 1); 2936 #ifdef RSS 2937 io_queue_num = min_t(int, io_queue_num, rss_getnumbuckets()); 2938 #endif 2939 2940 return io_queue_num; 2941 } 2942 2943 static int ena_calc_queue_size(struct ena_adapter *adapter, 2944 uint16_t *max_tx_sgl_size, uint16_t *max_rx_sgl_size, 2945 struct ena_com_dev_get_features_ctx *feat) 2946 { 2947 uint32_t queue_size = ENA_DEFAULT_RING_SIZE; 2948 uint32_t v; 2949 uint32_t q; 2950 2951 queue_size = min_t(uint32_t, queue_size, 2952 feat->max_queues.max_cq_depth); 2953 queue_size = min_t(uint32_t, queue_size, 2954 feat->max_queues.max_sq_depth); 2955 2956 /* round down to the nearest power of 2 */ 2957 v = queue_size; 2958 while (v != 0) { 2959 if (powerof2(queue_size)) 2960 break; 2961 v /= 2; 2962 q = rounddown2(queue_size, v); 2963 if (q != 0) { 2964 queue_size = q; 2965 break; 2966 } 2967 } 2968 2969 if (unlikely(!queue_size)) { 2970 device_printf(adapter->pdev, "Invalid queue size\n"); 2971 return ENA_COM_FAULT; 2972 } 2973 2974 *max_tx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS, 2975 feat->max_queues.max_packet_tx_descs); 2976 *max_rx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS, 2977 feat->max_queues.max_packet_rx_descs); 2978 2979 return queue_size; 2980 } 2981 2982 static int ena_rss_init_default(struct ena_adapter *adapter) 2983 { 2984 struct ena_com_dev *ena_dev = adapter->ena_dev; 2985 device_t dev = adapter->pdev; 2986 int qid, rc, i; 2987 2988 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE); 2989 if (unlikely(rc)) { 2990 device_printf(dev, "Cannot init RSS\n"); 2991 goto err_rss_init; 2992 } 2993 2994 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { 2995 #ifdef RSS 2996 qid = rss_get_indirection_to_bucket(i); 2997 qid = qid % adapter->num_queues; 2998 #else 2999 qid = i % adapter->num_queues; 3000 #endif 3001 rc = ena_com_indirect_table_fill_entry(ena_dev, i, 3002 ENA_IO_RXQ_IDX(qid)); 3003 if (unlikely(rc && (rc != EPERM))) { 3004 device_printf(dev, "Cannot fill indirect table\n"); 3005 goto err_fill_indir; 3006 } 3007 } 3008 3009 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL, 3010 ENA_HASH_KEY_SIZE, 0xFFFFFFFF); 3011 if (unlikely(rc && (rc != EPERM))) { 3012 device_printf(dev, "Cannot fill hash function\n"); 3013 goto err_fill_indir; 3014 } 3015 3016 rc = ena_com_set_default_hash_ctrl(ena_dev); 3017 if (unlikely(rc && (rc != EPERM))) { 3018 device_printf(dev, "Cannot fill hash control\n"); 3019 goto err_fill_indir; 3020 } 3021 3022 return (0); 3023 3024 err_fill_indir: 3025 ena_com_rss_destroy(ena_dev); 3026 err_rss_init: 3027 return (rc); 3028 } 3029 3030 static void 3031 ena_rss_init_default_deferred(void *arg) 3032 { 3033 struct ena_adapter *adapter; 3034 devclass_t dc; 3035 int max; 3036 int rc; 3037 3038 dc = devclass_find("ena"); 3039 if (dc == NULL) { 3040 ena_trace(ENA_DBG, "No devclass ena\n"); 3041 return; 3042 } 3043 3044 max = devclass_get_maxunit(dc); 3045 while (max-- >= 0) { 3046 adapter = devclass_get_softc(dc, max); 3047 if (adapter != NULL) { 3048 rc = ena_rss_init_default(adapter); 3049 adapter->rss_support = true; 3050 if (rc) { 3051 device_printf(adapter->pdev, 3052 "WARNING: RSS was not properly initialized," 3053 " it will affect bandwith\n"); 3054 adapter->rss_support = false; 3055 } 3056 } 3057 } 3058 } 3059 SYSINIT(ena_rss_init, SI_SUB_KICK_SCHEDULER, SI_ORDER_SECOND, ena_rss_init_default_deferred, NULL); 3060 3061 static void ena_config_host_info(struct ena_com_dev *ena_dev) 3062 { 3063 struct ena_admin_host_info *host_info; 3064 int rc; 3065 3066 /* Allocate only the host info */ 3067 rc = ena_com_allocate_host_info(ena_dev); 3068 if (rc) { 3069 ena_trace(ENA_ALERT, "Cannot allocate host info\n"); 3070 return; 3071 } 3072 3073 host_info = ena_dev->host_attr.host_info; 3074 3075 host_info->os_type = ENA_ADMIN_OS_FREEBSD; 3076 host_info->kernel_ver = osreldate; 3077 3078 sprintf(host_info->kernel_ver_str, "%d", osreldate); 3079 host_info->os_dist = 0; 3080 strncpy(host_info->os_dist_str, osrelease, 3081 sizeof(host_info->os_dist_str) - 1); 3082 3083 host_info->driver_version = 3084 (DRV_MODULE_VER_MAJOR) | 3085 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) | 3086 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT); 3087 3088 rc = ena_com_set_host_attributes(ena_dev); 3089 if (rc) { 3090 if (rc == EPERM) 3091 ena_trace(ENA_WARNING, "Cannot set host attributes\n"); 3092 else 3093 ena_trace(ENA_ALERT, "Cannot set host attributes\n"); 3094 3095 goto err; 3096 } 3097 3098 return; 3099 3100 err: 3101 ena_com_delete_host_info(ena_dev); 3102 } 3103 3104 static int 3105 ena_device_init(struct ena_adapter *adapter, device_t pdev, 3106 struct ena_com_dev_get_features_ctx *get_feat_ctx, int *wd_active) 3107 { 3108 struct ena_com_dev* ena_dev = adapter->ena_dev; 3109 bool readless_supported; 3110 uint32_t aenq_groups; 3111 int dma_width; 3112 int rc; 3113 3114 rc = ena_com_mmio_reg_read_request_init(ena_dev); 3115 if (rc) { 3116 device_printf(pdev, "failed to init mmio read less\n"); 3117 return rc; 3118 } 3119 3120 /* 3121 * The PCIe configuration space revision id indicate if mmio reg 3122 * read is disabled 3123 */ 3124 readless_supported = !(pci_get_revid(pdev) & ENA_MMIO_DISABLE_REG_READ); 3125 ena_com_set_mmio_read_mode(ena_dev, readless_supported); 3126 3127 rc = ena_com_dev_reset(ena_dev); 3128 if (rc) { 3129 device_printf(pdev, "Can not reset device\n"); 3130 goto err_mmio_read_less; 3131 } 3132 3133 rc = ena_com_validate_version(ena_dev); 3134 if (rc) { 3135 device_printf(pdev, "device version is too low\n"); 3136 goto err_mmio_read_less; 3137 } 3138 3139 dma_width = ena_com_get_dma_width(ena_dev); 3140 if (dma_width < 0) { 3141 device_printf(pdev, "Invalid dma width value %d", dma_width); 3142 rc = dma_width; 3143 goto err_mmio_read_less; 3144 } 3145 adapter->dma_width = dma_width; 3146 3147 /* ENA admin level init */ 3148 rc = ena_com_admin_init(ena_dev, &aenq_handlers, true); 3149 if (rc) { 3150 device_printf(pdev, 3151 "Can not initialize ena admin queue with device\n"); 3152 goto err_mmio_read_less; 3153 } 3154 3155 /* 3156 * To enable the msix interrupts the driver needs to know the number 3157 * of queues. So the driver uses polling mode to retrieve this 3158 * information 3159 */ 3160 ena_com_set_admin_polling_mode(ena_dev, true); 3161 3162 ena_config_host_info(ena_dev); 3163 3164 /* Get Device Attributes */ 3165 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx); 3166 if (rc) { 3167 device_printf(pdev, 3168 "Cannot get attribute for ena device rc: %d\n", rc); 3169 goto err_admin_init; 3170 } 3171 3172 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | 3173 BIT(ENA_ADMIN_FATAL_ERROR) | 3174 BIT(ENA_ADMIN_WARNING) | 3175 BIT(ENA_ADMIN_NOTIFICATION) | 3176 BIT(ENA_ADMIN_KEEP_ALIVE); 3177 3178 aenq_groups &= get_feat_ctx->aenq.supported_groups; 3179 rc = ena_com_set_aenq_config(ena_dev, aenq_groups); 3180 if (rc) { 3181 device_printf(pdev, "Cannot configure aenq groups rc: %d\n", rc); 3182 goto err_admin_init; 3183 } 3184 3185 *wd_active = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)); 3186 3187 return 0; 3188 3189 err_admin_init: 3190 ena_com_delete_host_info(ena_dev); 3191 ena_com_admin_destroy(ena_dev); 3192 err_mmio_read_less: 3193 ena_com_mmio_reg_read_request_destroy(ena_dev); 3194 3195 return rc; 3196 } 3197 3198 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter, 3199 int io_vectors) 3200 { 3201 struct ena_com_dev *ena_dev = adapter->ena_dev; 3202 int rc; 3203 3204 rc = ena_enable_msix(adapter); 3205 if (rc) { 3206 device_printf(adapter->pdev, "Error with MSI-X enablement\n"); 3207 return rc; 3208 } 3209 3210 ena_setup_mgmnt_intr(adapter); 3211 3212 rc = ena_request_mgmnt_irq(adapter); 3213 if (rc) { 3214 device_printf(adapter->pdev, "Cannot setup mgmnt queue intr\n"); 3215 goto err_disable_msix; 3216 } 3217 3218 ena_com_set_admin_polling_mode(ena_dev, false); 3219 3220 ena_com_admin_aenq_enable(ena_dev); 3221 3222 return 0; 3223 3224 err_disable_msix: 3225 ena_disable_msix(adapter); 3226 3227 return rc; 3228 } 3229 3230 /* Function called on ENA_ADMIN_KEEP_ALIVE event */ 3231 static void ena_keep_alive_wd(void *adapter_data, 3232 struct ena_admin_aenq_entry *aenq_e) 3233 { 3234 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3235 sbintime_t stime; 3236 3237 stime = getsbinuptime(); 3238 atomic_store_rel_64(&adapter->keep_alive_timestamp, stime); 3239 } 3240 3241 /* Check for keep alive expiration */ 3242 static void check_for_missing_keep_alive(struct ena_adapter *adapter) 3243 { 3244 sbintime_t timestamp, time; 3245 3246 if (adapter->wd_active == 0) 3247 return; 3248 3249 if (adapter->keep_alive_timeout == 0) 3250 return; 3251 3252 timestamp = atomic_load_acq_64(&adapter->keep_alive_timestamp); 3253 time = getsbinuptime() - timestamp; 3254 if (unlikely(time > adapter->keep_alive_timeout)) { 3255 device_printf(adapter->pdev, 3256 "Keep alive watchdog timeout.\n"); 3257 counter_u64_add(adapter->dev_stats.wd_expired, 1); 3258 adapter->trigger_reset = true; 3259 } 3260 } 3261 3262 /* Check if admin queue is enabled */ 3263 static void check_for_admin_com_state(struct ena_adapter *adapter) 3264 { 3265 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) { 3266 device_printf(adapter->pdev, 3267 "ENA admin queue is not in running state!\n"); 3268 counter_u64_add(adapter->dev_stats.admin_q_pause, 1); 3269 adapter->trigger_reset = true; 3270 } 3271 } 3272 3273 /* 3274 * Check for TX which were not completed on time. 3275 * Timeout is defined by "missing_tx_timeout". 3276 * Reset will be performed if number of incompleted 3277 * transactions exceeds "missing_tx_threshold". 3278 */ 3279 static void check_for_missing_tx_completions(struct ena_adapter *adapter) 3280 { 3281 struct ena_ring *tx_ring; 3282 struct ena_tx_buffer *tx_info; 3283 struct bintime curtime, time; 3284 int i, j, budget, missed_tx; 3285 3286 /* Make sure the driver doesn't turn the device in other process */ 3287 rmb(); 3288 3289 if (!adapter->up) 3290 return; 3291 3292 if (adapter->trigger_reset) 3293 return; 3294 3295 if (adapter->missing_tx_timeout == 0) 3296 return; 3297 3298 budget = adapter->missing_tx_max_queues; 3299 getbinuptime(&curtime); 3300 3301 for (i = adapter->next_monitored_tx_qid; i < adapter->num_queues; i++) { 3302 tx_ring = &adapter->tx_ring[i]; 3303 3304 missed_tx = 0; 3305 3306 for (j = 0; j < tx_ring->ring_size; j++) { 3307 tx_info = &tx_ring->tx_buffer_info[j]; 3308 3309 if (!bintime_isset(&tx_info->timestamp)) 3310 continue; 3311 3312 time = curtime; 3313 bintime_sub(&time, &tx_info->timestamp); 3314 3315 /* Check again if packet is still waiting */ 3316 if (bintime_isset(&tx_info->timestamp) && unlikely( 3317 bttosbt(time) > adapter->missing_tx_timeout)) { 3318 if (tx_info->print_once) 3319 device_printf(adapter->pdev, 3320 "Found a Tx that wasn't completed " 3321 "on time, qid %d, index %d.\n", 3322 tx_ring->qid, j); 3323 3324 tx_info->print_once = false; 3325 missed_tx++; 3326 3327 if (unlikely(missed_tx > 3328 adapter->missing_tx_threshold)) { 3329 device_printf(adapter->pdev, 3330 "The number of lost tx completion " 3331 "is above the threshold (%d > %d). " 3332 "Reset the device\n", missed_tx, 3333 adapter->missing_tx_threshold); 3334 adapter->trigger_reset = true; 3335 return; 3336 } 3337 } 3338 } 3339 3340 budget--; 3341 if (!budget) { 3342 i++; 3343 break; 3344 } 3345 } 3346 3347 adapter->next_monitored_tx_qid = i % adapter->num_queues; 3348 } 3349 3350 3351 static void 3352 ena_timer_service(void *data) 3353 { 3354 struct ena_adapter *adapter = (struct ena_adapter *)data; 3355 struct ena_admin_host_info *host_info = 3356 adapter->ena_dev->host_attr.host_info; 3357 3358 check_for_missing_keep_alive(adapter); 3359 3360 check_for_admin_com_state(adapter); 3361 3362 check_for_missing_tx_completions(adapter); 3363 3364 if (host_info) 3365 ena_update_host_info(host_info, adapter->ifp); 3366 3367 if (unlikely(adapter->trigger_reset)) { 3368 device_printf(adapter->pdev, "Trigger reset is on\n"); 3369 taskqueue_enqueue(adapter->reset_tq, &adapter->reset_task); 3370 return; 3371 } 3372 3373 /* 3374 * Schedule another timeout one second from now. 3375 */ 3376 callout_schedule_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 0); 3377 } 3378 3379 static void 3380 ena_reset_task(void *arg, int pending) 3381 { 3382 struct ena_com_dev_get_features_ctx get_feat_ctx; 3383 struct ena_adapter *adapter = (struct ena_adapter *)arg; 3384 struct ena_com_dev *ena_dev = adapter->ena_dev; 3385 bool dev_up; 3386 int rc; 3387 3388 if (unlikely(!adapter->trigger_reset)) { 3389 device_printf(adapter->pdev, 3390 "device reset scheduled but trigger_reset is off\n"); 3391 return; 3392 } 3393 3394 sx_xlock(&adapter->ioctl_sx); 3395 3396 callout_drain(&adapter->timer_service); 3397 3398 dev_up = adapter->up; 3399 3400 ena_com_set_admin_running_state(ena_dev, false); 3401 ena_free_mgmnt_irq(adapter); 3402 ena_down(adapter); 3403 ena_com_dev_reset(ena_dev); 3404 ena_disable_msix(adapter); 3405 ena_com_abort_admin_commands(ena_dev); 3406 ena_com_wait_for_abort_completion(ena_dev); 3407 ena_com_admin_destroy(ena_dev); 3408 ena_com_mmio_reg_read_request_destroy(ena_dev); 3409 3410 adapter->trigger_reset = false; 3411 3412 /* Finished destroy part. Restart the device */ 3413 rc = ena_device_init(adapter, adapter->pdev, &get_feat_ctx, 3414 &adapter->wd_active); 3415 if (rc) { 3416 device_printf(adapter->pdev, 3417 "ENA device init failed! (err: %d)\n", rc); 3418 goto err_dev_free; 3419 } 3420 3421 rc = ena_enable_msix_and_set_admin_interrupts(adapter, 3422 adapter->num_queues); 3423 if (rc) { 3424 device_printf(adapter->pdev, "Enable MSI-X failed\n"); 3425 goto err_com_free; 3426 } 3427 3428 /* If the interface was up before the reset bring it up */ 3429 if (dev_up) { 3430 rc = ena_up(adapter); 3431 if (rc) { 3432 device_printf(adapter->pdev, 3433 "Failed to create I/O queues\n"); 3434 goto err_msix_free; 3435 } 3436 } 3437 3438 callout_reset_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 3439 ena_timer_service, (void *)adapter, 0); 3440 3441 sx_unlock(&adapter->ioctl_sx); 3442 3443 return; 3444 3445 err_msix_free: 3446 ena_com_dev_reset(ena_dev); 3447 ena_free_mgmnt_irq(adapter); 3448 ena_disable_msix(adapter); 3449 err_com_free: 3450 ena_com_admin_destroy(ena_dev); 3451 err_dev_free: 3452 device_printf(adapter->pdev, "ENA reset failed!\n"); 3453 adapter->running = false; 3454 sx_unlock(&adapter->ioctl_sx); 3455 } 3456 3457 /** 3458 * ena_attach - Device Initialization Routine 3459 * @pdev: device information struct 3460 * 3461 * Returns 0 on success, otherwise on failure. 3462 * 3463 * ena_attach initializes an adapter identified by a device structure. 3464 * The OS initialization, configuring of the adapter private structure, 3465 * and a hardware reset occur. 3466 **/ 3467 static int 3468 ena_attach(device_t pdev) 3469 { 3470 struct ena_com_dev_get_features_ctx get_feat_ctx; 3471 static int version_printed; 3472 struct ena_adapter *adapter; 3473 struct ena_com_dev *ena_dev = NULL; 3474 uint16_t tx_sgl_size = 0; 3475 uint16_t rx_sgl_size = 0; 3476 int io_queue_num; 3477 int queue_size; 3478 int rc; 3479 struct sysctl_ctx_list *ctx; 3480 struct sysctl_oid_list *children; 3481 3482 adapter = device_get_softc(pdev); 3483 adapter->pdev = pdev; 3484 ctx = device_get_sysctl_ctx(pdev); 3485 children = SYSCTL_CHILDREN(device_get_sysctl_tree(pdev)); 3486 3487 mtx_init(&adapter->global_mtx, "ENA global mtx", NULL, MTX_DEF); 3488 sx_init(&adapter->ioctl_sx, "ENA ioctl sx"); 3489 3490 /* Sysctl calls for Watchdog service */ 3491 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "wd_active", 3492 CTLFLAG_RWTUN, &adapter->wd_active, 0, 3493 "Watchdog is active"); 3494 3495 SYSCTL_ADD_QUAD(ctx, children, OID_AUTO, "keep_alive_timeout", 3496 CTLFLAG_RWTUN, &adapter->keep_alive_timeout, 3497 "Timeout for Keep Alive messages"); 3498 3499 SYSCTL_ADD_QUAD(ctx, children, OID_AUTO, "missing_tx_timeout", 3500 CTLFLAG_RWTUN, &adapter->missing_tx_timeout, 3501 "Timeout for TX completion"); 3502 3503 SYSCTL_ADD_U32(ctx, children, OID_AUTO, "missing_tx_max_queues", 3504 CTLFLAG_RWTUN, &adapter->missing_tx_max_queues, 0, 3505 "Number of TX queues to check per run"); 3506 3507 SYSCTL_ADD_U32(ctx, children, OID_AUTO, "missing_tx_threshold", 3508 CTLFLAG_RWTUN, &adapter->missing_tx_threshold, 0, 3509 "Max number of timeouted packets"); 3510 3511 /* Set up the timer service */ 3512 callout_init_mtx(&adapter->timer_service, &adapter->global_mtx, 0); 3513 adapter->keep_alive_timeout = DEFAULT_KEEP_ALIVE_TO; 3514 adapter->missing_tx_timeout = DEFAULT_TX_CMP_TO; 3515 adapter->missing_tx_max_queues = DEFAULT_TX_MONITORED_QUEUES; 3516 adapter->missing_tx_threshold = DEFAULT_TX_CMP_THRESHOLD; 3517 3518 if (version_printed++ == 0) 3519 device_printf(pdev, "%s\n", ena_version); 3520 3521 rc = ena_allocate_pci_resources(adapter); 3522 if (rc) { 3523 device_printf(pdev, "PCI resource allocation failed!\n"); 3524 ena_free_pci_resources(adapter); 3525 goto err_pci_res; 3526 } 3527 3528 /* Allocate memory for ena_dev structure */ 3529 ena_dev = ENA_MEM_ALLOC(pdev, sizeof(struct ena_com_dev)); 3530 if (!ena_dev) { 3531 device_printf(pdev, "allocating ena_dev failed\n"); 3532 rc = ENOMEM; 3533 goto err_select_region; 3534 } 3535 3536 adapter->ena_dev = ena_dev; 3537 ena_dev->dmadev = pdev; 3538 ena_dev->bus = malloc(sizeof(struct ena_bus), M_DEVBUF, 3539 M_WAITOK | M_ZERO); 3540 3541 /* Store register resources */ 3542 ((struct ena_bus*)(ena_dev->bus))->reg_bar_t = 3543 rman_get_bustag(adapter->registers); 3544 ((struct ena_bus*)(ena_dev->bus))->reg_bar_h = 3545 rman_get_bushandle(adapter->registers); 3546 3547 if (((struct ena_bus*)(ena_dev->bus))->reg_bar_h == 0) { 3548 device_printf(pdev, "failed to pmap registers bar\n"); 3549 rc = ENXIO; 3550 goto err_dev_free; 3551 } 3552 3553 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3554 3555 /* Device initialization */ 3556 rc = ena_device_init(adapter, pdev, &get_feat_ctx, &adapter->wd_active); 3557 if (rc) { 3558 device_printf(pdev, "ENA device init failed! (err: %d)\n", rc); 3559 rc = ENXIO; 3560 goto err_bus_free; 3561 } 3562 3563 adapter->keep_alive_timestamp = getsbinuptime(); 3564 3565 adapter->tx_offload_cap = get_feat_ctx.offload.tx; 3566 3567 /* Set for sure that interface is not up */ 3568 adapter->up = false; 3569 3570 memcpy(adapter->mac_addr, get_feat_ctx.dev_attr.mac_addr, 3571 ETHER_ADDR_LEN); 3572 3573 adapter->small_copy_len = 3574 ENA_DEFAULT_SMALL_PACKET_LEN; 3575 3576 /* calculate IO queue number to create */ 3577 io_queue_num = ena_calc_io_queue_num(adapter, &get_feat_ctx); 3578 3579 ENA_ASSERT(io_queue_num > 0, "Invalid queue number: %d\n", 3580 io_queue_num); 3581 adapter->num_queues = io_queue_num; 3582 3583 /* calculatre ring sizes */ 3584 queue_size = ena_calc_queue_size(adapter,&tx_sgl_size, 3585 &rx_sgl_size, &get_feat_ctx); 3586 if ((queue_size <= 0) || (io_queue_num <= 0)) { 3587 rc = ENA_COM_FAULT; 3588 goto err_com_free; 3589 } 3590 3591 adapter->tx_ring_size = queue_size; 3592 adapter->rx_ring_size = queue_size; 3593 3594 adapter->max_tx_sgl_size = tx_sgl_size; 3595 adapter->max_rx_sgl_size = rx_sgl_size; 3596 3597 /* set up dma tags for rx and tx buffers */ 3598 rc = ena_setup_tx_dma_tag(adapter); 3599 if (rc) 3600 goto dma_tx_err; 3601 3602 rc = ena_setup_rx_dma_tag(adapter); 3603 if (rc) 3604 goto dma_rx_err; 3605 3606 /* initialize rings basic information */ 3607 device_printf(pdev, "initalize %d io queues\n", io_queue_num); 3608 rc = ena_init_io_rings(adapter); 3609 if (rc) { 3610 device_printf(pdev,"Error with initialization of IO rings\n"); 3611 goto err_io_init; 3612 } 3613 3614 /* setup network interface */ 3615 rc = ena_setup_ifnet(pdev, adapter, &get_feat_ctx); 3616 if (rc) { 3617 device_printf(pdev,"Error with network interface setup\n"); 3618 goto err_com_free; 3619 } 3620 3621 rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num); 3622 if (rc) { 3623 device_printf(pdev, 3624 "Failed to enable and set the admin interrupts\n"); 3625 goto err_ifp_free; 3626 } 3627 3628 /* Initialize reset task queue */ 3629 TASK_INIT(&adapter->reset_task, 0, ena_reset_task, adapter); 3630 adapter->reset_tq = taskqueue_create("ena_reset_enqueue", 3631 M_WAITOK | M_ZERO, taskqueue_thread_enqueue, &adapter->reset_tq); 3632 if (adapter->reset_tq == NULL) { 3633 device_printf(adapter->pdev, 3634 "Unable to create reset task queue\n"); 3635 goto err_reset_tq; 3636 } 3637 taskqueue_start_threads(&adapter->reset_tq, 1, PI_NET, 3638 "%s rstq", device_get_nameunit(adapter->pdev)); 3639 3640 /* Initialize task queue responsible for updating hw stats */ 3641 TASK_INIT(&adapter->stats_task, 0, ena_update_hw_stats, adapter); 3642 adapter->stats_tq = taskqueue_create_fast("ena_stats_update", 3643 M_WAITOK | M_ZERO, taskqueue_thread_enqueue, &adapter->stats_tq); 3644 if (adapter->stats_tq == NULL) { 3645 device_printf(adapter->pdev, 3646 "Unable to create taskqueue for updating hw stats\n"); 3647 goto err_stats_tq; 3648 } 3649 taskqueue_start_threads(&adapter->stats_tq, 1, PI_REALTIME, 3650 "%s stats tq", device_get_nameunit(adapter->pdev)); 3651 3652 /* Initialize statistics */ 3653 ena_alloc_counters((counter_u64_t *)&adapter->dev_stats, 3654 sizeof(struct ena_stats_dev)); 3655 ena_update_stats_counters(adapter); 3656 ena_sysctl_add_nodes(adapter); 3657 3658 /* Tell the stack that the interface is not active */ 3659 if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE, IFF_DRV_RUNNING); 3660 3661 adapter->running = true; 3662 return (0); 3663 3664 err_stats_tq: 3665 taskqueue_free(adapter->reset_tq); 3666 err_reset_tq: 3667 ena_free_mgmnt_irq(adapter); 3668 ena_disable_msix(adapter); 3669 err_ifp_free: 3670 if_detach(adapter->ifp); 3671 if_free(adapter->ifp); 3672 err_com_free: 3673 ena_free_all_io_rings_resources(adapter); 3674 err_io_init: 3675 ena_free_rx_dma_tag(adapter); 3676 dma_rx_err: 3677 ena_free_tx_dma_tag(adapter); 3678 dma_tx_err: 3679 ena_com_admin_destroy(ena_dev); 3680 ena_com_delete_host_info(ena_dev); 3681 err_bus_free: 3682 free(ena_dev->bus, M_DEVBUF); 3683 err_dev_free: 3684 free(ena_dev, M_DEVBUF); 3685 err_select_region: 3686 ena_free_pci_resources(adapter); 3687 err_pci_res: 3688 return (rc); 3689 } 3690 3691 /** 3692 * ena_detach - Device Removal Routine 3693 * @pdev: device information struct 3694 * 3695 * ena_detach is called by the device subsystem to alert the driver 3696 * that it should release a PCI device. 3697 **/ 3698 static int 3699 ena_detach(device_t pdev) 3700 { 3701 struct ena_adapter *adapter = device_get_softc(pdev); 3702 struct ena_com_dev *ena_dev = adapter->ena_dev; 3703 int rc; 3704 3705 /* Make sure VLANS are not using driver */ 3706 if (adapter->ifp->if_vlantrunk != NULL) { 3707 device_printf(adapter->pdev ,"VLAN is in use, detach first\n"); 3708 return (EBUSY); 3709 } 3710 3711 /* Free reset task and callout */ 3712 callout_drain(&adapter->timer_service); 3713 while (taskqueue_cancel(adapter->reset_tq, &adapter->reset_task, NULL)) 3714 taskqueue_drain(adapter->reset_tq, &adapter->reset_task); 3715 taskqueue_free(adapter->reset_tq); 3716 3717 sx_xlock(&adapter->ioctl_sx); 3718 ena_down(adapter); 3719 sx_unlock(&adapter->ioctl_sx); 3720 3721 taskqueue_free(adapter->stats_tq); 3722 3723 if (adapter->ifp != NULL) { 3724 ether_ifdetach(adapter->ifp); 3725 if_free(adapter->ifp); 3726 } 3727 3728 ena_free_all_io_rings_resources(adapter); 3729 3730 ena_free_counters((counter_u64_t *)&adapter->dev_stats, 3731 sizeof(struct ena_stats_dev)); 3732 3733 if (adapter->rss_support) 3734 ena_com_rss_destroy(ena_dev); 3735 3736 rc = ena_free_rx_dma_tag(adapter); 3737 if (rc) 3738 device_printf(adapter->pdev, 3739 "Unmapped RX DMA tag associations\n"); 3740 3741 rc = ena_free_tx_dma_tag(adapter); 3742 if (rc) 3743 device_printf(adapter->pdev, 3744 "Unmapped TX DMA tag associations\n"); 3745 3746 /* Reset the device only if the device is running. */ 3747 if (adapter->running) 3748 ena_com_dev_reset(ena_dev); 3749 3750 ena_com_delete_host_info(ena_dev); 3751 3752 ena_com_admin_destroy(ena_dev); 3753 3754 ena_free_irqs(adapter); 3755 3756 ena_com_mmio_reg_read_request_destroy(ena_dev); 3757 3758 ena_free_pci_resources(adapter); 3759 3760 mtx_destroy(&adapter->global_mtx); 3761 sx_destroy(&adapter->ioctl_sx); 3762 3763 if (ena_dev->bus != NULL) 3764 free(ena_dev->bus, M_DEVBUF); 3765 3766 if (ena_dev != NULL) 3767 free(ena_dev, M_DEVBUF); 3768 3769 return (bus_generic_detach(pdev)); 3770 } 3771 3772 /****************************************************************************** 3773 ******************************** AENQ Handlers ******************************* 3774 *****************************************************************************/ 3775 /** 3776 * ena_update_on_link_change: 3777 * Notify the network interface about the change in link status 3778 **/ 3779 static void 3780 ena_update_on_link_change(void *adapter_data, 3781 struct ena_admin_aenq_entry *aenq_e) 3782 { 3783 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3784 struct ena_admin_aenq_link_change_desc *aenq_desc; 3785 int status; 3786 if_t ifp; 3787 3788 aenq_desc = (struct ena_admin_aenq_link_change_desc *)aenq_e; 3789 ifp = adapter->ifp; 3790 status = aenq_desc->flags & 3791 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK; 3792 3793 if (status != 0) { 3794 device_printf(adapter->pdev, "link is UP\n"); 3795 if_link_state_change(ifp, LINK_STATE_UP); 3796 } else if (status == 0) { 3797 device_printf(adapter->pdev, "link is DOWN\n"); 3798 if_link_state_change(ifp, LINK_STATE_DOWN); 3799 } else { 3800 device_printf(adapter->pdev, "invalid value recvd\n"); 3801 BUG(); 3802 } 3803 3804 adapter->link_status = status; 3805 3806 return; 3807 } 3808 3809 /** 3810 * This handler will called for unknown event group or unimplemented handlers 3811 **/ 3812 static void 3813 unimplemented_aenq_handler(void *data, 3814 struct ena_admin_aenq_entry *aenq_e) 3815 { 3816 return; 3817 } 3818 3819 static struct ena_aenq_handlers aenq_handlers = { 3820 .handlers = { 3821 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, 3822 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd, 3823 }, 3824 .unimplemented_handler = unimplemented_aenq_handler 3825 }; 3826 3827 /********************************************************************* 3828 * FreeBSD Device Interface Entry Points 3829 *********************************************************************/ 3830 3831 static device_method_t ena_methods[] = { 3832 /* Device interface */ 3833 DEVMETHOD(device_probe, ena_probe), 3834 DEVMETHOD(device_attach, ena_attach), 3835 DEVMETHOD(device_detach, ena_detach), 3836 DEVMETHOD_END 3837 }; 3838 3839 static driver_t ena_driver = { 3840 "ena", ena_methods, sizeof(struct ena_adapter), 3841 }; 3842 3843 devclass_t ena_devclass; 3844 DRIVER_MODULE(ena, pci, ena_driver, ena_devclass, 0, 0); 3845 MODULE_DEPEND(ena, pci, 1, 1, 1); 3846 MODULE_DEPEND(ena, ether, 1, 1, 1); 3847 3848 /*********************************************************************/ 3849