1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) 2015-2017 Amazon.com, Inc. or its affiliates. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 #include <sys/endian.h> 37 #include <sys/kernel.h> 38 #include <sys/kthread.h> 39 #include <sys/malloc.h> 40 #include <sys/mbuf.h> 41 #include <sys/module.h> 42 #include <sys/rman.h> 43 #include <sys/smp.h> 44 #include <sys/socket.h> 45 #include <sys/sockio.h> 46 #include <sys/sysctl.h> 47 #include <sys/taskqueue.h> 48 #include <sys/time.h> 49 #include <sys/eventhandler.h> 50 51 #include <machine/bus.h> 52 #include <machine/resource.h> 53 #include <machine/in_cksum.h> 54 55 #include <net/bpf.h> 56 #include <net/ethernet.h> 57 #include <net/if.h> 58 #include <net/if_var.h> 59 #include <net/if_arp.h> 60 #include <net/if_dl.h> 61 #include <net/if_media.h> 62 #include <net/rss_config.h> 63 #include <net/if_types.h> 64 #include <net/if_vlan_var.h> 65 66 #include <netinet/in_rss.h> 67 #include <netinet/in_systm.h> 68 #include <netinet/in.h> 69 #include <netinet/if_ether.h> 70 #include <netinet/ip.h> 71 #include <netinet/ip6.h> 72 #include <netinet/tcp.h> 73 #include <netinet/udp.h> 74 75 #include <dev/pci/pcivar.h> 76 #include <dev/pci/pcireg.h> 77 78 #include "ena.h" 79 #include "ena_sysctl.h" 80 81 /********************************************************* 82 * Function prototypes 83 *********************************************************/ 84 static int ena_probe(device_t); 85 static void ena_intr_msix_mgmnt(void *); 86 static int ena_allocate_pci_resources(struct ena_adapter*); 87 static void ena_free_pci_resources(struct ena_adapter *); 88 static int ena_change_mtu(if_t, int); 89 static inline void ena_alloc_counters(counter_u64_t *, int); 90 static inline void ena_free_counters(counter_u64_t *, int); 91 static inline void ena_reset_counters(counter_u64_t *, int); 92 static void ena_init_io_rings_common(struct ena_adapter *, 93 struct ena_ring *, uint16_t); 94 static void ena_init_io_rings(struct ena_adapter *); 95 static void ena_free_io_ring_resources(struct ena_adapter *, unsigned int); 96 static void ena_free_all_io_rings_resources(struct ena_adapter *); 97 static int ena_setup_tx_dma_tag(struct ena_adapter *); 98 static int ena_free_tx_dma_tag(struct ena_adapter *); 99 static int ena_setup_rx_dma_tag(struct ena_adapter *); 100 static int ena_free_rx_dma_tag(struct ena_adapter *); 101 static int ena_setup_tx_resources(struct ena_adapter *, int); 102 static void ena_free_tx_resources(struct ena_adapter *, int); 103 static int ena_setup_all_tx_resources(struct ena_adapter *); 104 static void ena_free_all_tx_resources(struct ena_adapter *); 105 static inline int validate_rx_req_id(struct ena_ring *, uint16_t); 106 static int ena_setup_rx_resources(struct ena_adapter *, unsigned int); 107 static void ena_free_rx_resources(struct ena_adapter *, unsigned int); 108 static int ena_setup_all_rx_resources(struct ena_adapter *); 109 static void ena_free_all_rx_resources(struct ena_adapter *); 110 static inline int ena_alloc_rx_mbuf(struct ena_adapter *, struct ena_ring *, 111 struct ena_rx_buffer *); 112 static void ena_free_rx_mbuf(struct ena_adapter *, struct ena_ring *, 113 struct ena_rx_buffer *); 114 static int ena_refill_rx_bufs(struct ena_ring *, uint32_t); 115 static void ena_free_rx_bufs(struct ena_adapter *, unsigned int); 116 static void ena_refill_all_rx_bufs(struct ena_adapter *); 117 static void ena_free_all_rx_bufs(struct ena_adapter *); 118 static void ena_free_tx_bufs(struct ena_adapter *, unsigned int); 119 static void ena_free_all_tx_bufs(struct ena_adapter *); 120 static void ena_destroy_all_tx_queues(struct ena_adapter *); 121 static void ena_destroy_all_rx_queues(struct ena_adapter *); 122 static void ena_destroy_all_io_queues(struct ena_adapter *); 123 static int ena_create_io_queues(struct ena_adapter *); 124 static int ena_tx_cleanup(struct ena_ring *); 125 static void ena_deferred_rx_cleanup(void *, int); 126 static int ena_rx_cleanup(struct ena_ring *); 127 static inline int validate_tx_req_id(struct ena_ring *, uint16_t); 128 static void ena_rx_hash_mbuf(struct ena_ring *, struct ena_com_rx_ctx *, 129 struct mbuf *); 130 static struct mbuf* ena_rx_mbuf(struct ena_ring *, struct ena_com_rx_buf_info *, 131 struct ena_com_rx_ctx *, uint16_t *); 132 static inline void ena_rx_checksum(struct ena_ring *, struct ena_com_rx_ctx *, 133 struct mbuf *); 134 static void ena_handle_msix(void *); 135 static int ena_enable_msix(struct ena_adapter *); 136 static void ena_setup_mgmnt_intr(struct ena_adapter *); 137 static void ena_setup_io_intr(struct ena_adapter *); 138 static int ena_request_mgmnt_irq(struct ena_adapter *); 139 static int ena_request_io_irq(struct ena_adapter *); 140 static void ena_free_mgmnt_irq(struct ena_adapter *); 141 static void ena_free_io_irq(struct ena_adapter *); 142 static void ena_free_irqs(struct ena_adapter*); 143 static void ena_disable_msix(struct ena_adapter *); 144 static void ena_unmask_all_io_irqs(struct ena_adapter *); 145 static int ena_rss_configure(struct ena_adapter *); 146 static int ena_up_complete(struct ena_adapter *); 147 static int ena_up(struct ena_adapter *); 148 static void ena_down(struct ena_adapter *); 149 static uint64_t ena_get_counter(if_t, ift_counter); 150 static int ena_media_change(if_t); 151 static void ena_media_status(if_t, struct ifmediareq *); 152 static void ena_init(void *); 153 static int ena_ioctl(if_t, u_long, caddr_t); 154 static int ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *); 155 static void ena_update_host_info(struct ena_admin_host_info *, if_t); 156 static void ena_update_hwassist(struct ena_adapter *); 157 static int ena_setup_ifnet(device_t, struct ena_adapter *, 158 struct ena_com_dev_get_features_ctx *); 159 static void ena_tx_csum(struct ena_com_tx_ctx *, struct mbuf *); 160 static int ena_check_and_collapse_mbuf(struct ena_ring *tx_ring, 161 struct mbuf **mbuf); 162 static int ena_xmit_mbuf(struct ena_ring *, struct mbuf **); 163 static void ena_start_xmit(struct ena_ring *); 164 static int ena_mq_start(if_t, struct mbuf *); 165 static void ena_deferred_mq_start(void *, int); 166 static void ena_qflush(if_t); 167 static int ena_calc_io_queue_num(struct ena_adapter *, 168 struct ena_com_dev_get_features_ctx *); 169 static int ena_calc_queue_size(struct ena_adapter *, uint16_t *, 170 uint16_t *, struct ena_com_dev_get_features_ctx *); 171 static int ena_rss_init_default(struct ena_adapter *); 172 static void ena_rss_init_default_deferred(void *); 173 static void ena_config_host_info(struct ena_com_dev *); 174 static int ena_attach(device_t); 175 static int ena_detach(device_t); 176 static int ena_device_init(struct ena_adapter *, device_t, 177 struct ena_com_dev_get_features_ctx *, int *); 178 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *, 179 int); 180 static void ena_update_on_link_change(void *, struct ena_admin_aenq_entry *); 181 static void unimplemented_aenq_handler(void *, 182 struct ena_admin_aenq_entry *); 183 static void ena_timer_service(void *); 184 185 static char ena_version[] = DEVICE_NAME DRV_MODULE_NAME " v" DRV_MODULE_VERSION; 186 187 static SYSCTL_NODE(_hw, OID_AUTO, ena, CTLFLAG_RD, 0, "ENA driver parameters"); 188 189 /* 190 * Tuneable number of buffers in the buf-ring (drbr) 191 */ 192 static int ena_buf_ring_size = 4096; 193 SYSCTL_INT(_hw_ena, OID_AUTO, buf_ring_size, CTLFLAG_RWTUN, 194 &ena_buf_ring_size, 0, "Size of the bufring"); 195 196 197 static ena_vendor_info_t ena_vendor_info_array[] = { 198 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_PF, 0}, 199 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_LLQ_PF, 0}, 200 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_VF, 0}, 201 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_LLQ_VF, 0}, 202 /* Last entry */ 203 { 0, 0, 0 } 204 }; 205 206 /* 207 * Contains pointers to event handlers, e.g. link state chage. 208 */ 209 static struct ena_aenq_handlers aenq_handlers; 210 211 void 212 ena_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nseg, int error) 213 { 214 if (error) 215 return; 216 *(bus_addr_t *) arg = segs[0].ds_addr; 217 return; 218 } 219 220 int 221 ena_dma_alloc(device_t dmadev, bus_size_t size, 222 ena_mem_handle_t *dma , int mapflags) 223 { 224 struct ena_adapter* adapter = device_get_softc(dmadev); 225 uint32_t maxsize = ((size - 1)/PAGE_SIZE + 1) * PAGE_SIZE; 226 uint64_t dma_space_addr = ENA_DMA_BIT_MASK(adapter->dma_width); 227 int error; 228 229 if (dma_space_addr == 0) 230 dma_space_addr = BUS_SPACE_MAXADDR; 231 error = bus_dma_tag_create(bus_get_dma_tag(dmadev), /* parent */ 232 8, 0, /* alignment, bounds */ 233 dma_space_addr, /* lowaddr of exclusion window */ 234 BUS_SPACE_MAXADDR,/* highaddr of exclusion window */ 235 NULL, NULL, /* filter, filterarg */ 236 maxsize, /* maxsize */ 237 1, /* nsegments */ 238 maxsize, /* maxsegsize */ 239 BUS_DMA_ALLOCNOW, /* flags */ 240 NULL, /* lockfunc */ 241 NULL, /* lockarg */ 242 &dma->tag); 243 if (error) { 244 device_printf(dmadev, 245 "%s: bus_dma_tag_create failed: %d\n", 246 __func__, error); 247 goto fail_tag; 248 } 249 250 error = bus_dmamem_alloc(dma->tag, (void**) &dma->vaddr, 251 BUS_DMA_COHERENT | BUS_DMA_ZERO, &dma->map); 252 if (error) { 253 device_printf(dmadev, 254 "%s: bus_dmamem_alloc(%ju) failed: %d\n", 255 __func__, (uintmax_t)size, error); 256 goto fail_map_create; 257 } 258 259 dma->paddr = 0; 260 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, 261 size, ena_dmamap_callback, &dma->paddr, mapflags); 262 if (error || dma->paddr == 0) { 263 device_printf(dmadev, 264 "%s: bus_dmamap_load failed: %d\n", 265 __func__, error); 266 goto fail_map_load; 267 } 268 269 return (0); 270 271 fail_map_load: 272 bus_dmamem_free(dma->tag, dma->vaddr, dma->map); 273 fail_map_create: 274 bus_dma_tag_destroy(dma->tag); 275 fail_tag: 276 dma->tag = NULL; 277 278 return (error); 279 } 280 281 static int 282 ena_allocate_pci_resources(struct ena_adapter* adapter) 283 { 284 device_t pdev = adapter->pdev; 285 int rid; 286 287 rid = PCIR_BAR(ENA_REG_BAR); 288 adapter->memory = NULL; 289 adapter->registers = bus_alloc_resource_any(pdev, SYS_RES_MEMORY, 290 &rid, RF_ACTIVE); 291 if (adapter->registers == NULL) { 292 device_printf(pdev, "Unable to allocate bus resource: " 293 "registers\n"); 294 return (ENXIO); 295 } 296 297 return (0); 298 } 299 300 static void 301 ena_free_pci_resources(struct ena_adapter *adapter) 302 { 303 device_t pdev = adapter->pdev; 304 305 if (adapter->memory != NULL) { 306 bus_release_resource(pdev, SYS_RES_MEMORY, 307 PCIR_BAR(ENA_MEM_BAR), adapter->memory); 308 } 309 310 if (adapter->registers != NULL) { 311 bus_release_resource(pdev, SYS_RES_MEMORY, 312 PCIR_BAR(ENA_REG_BAR), adapter->registers); 313 } 314 315 return; 316 } 317 318 static int 319 ena_probe(device_t dev) 320 { 321 ena_vendor_info_t *ent; 322 char adapter_name[60]; 323 uint16_t pci_vendor_id = 0; 324 uint16_t pci_device_id = 0; 325 326 pci_vendor_id = pci_get_vendor(dev); 327 pci_device_id = pci_get_device(dev); 328 329 ent = ena_vendor_info_array; 330 while (ent->vendor_id != 0) { 331 if ((pci_vendor_id == ent->vendor_id) && 332 (pci_device_id == ent->device_id)) { 333 ena_trace(ENA_DBG, "vendor=%x device=%x ", 334 pci_vendor_id, pci_device_id); 335 336 sprintf(adapter_name, DEVICE_DESC); 337 device_set_desc_copy(dev, adapter_name); 338 return (BUS_PROBE_DEFAULT); 339 } 340 341 ent++; 342 343 } 344 345 return (ENXIO); 346 } 347 348 static int 349 ena_change_mtu(if_t ifp, int new_mtu) 350 { 351 struct ena_adapter *adapter = if_getsoftc(ifp); 352 struct ena_com_dev_get_features_ctx get_feat_ctx; 353 int rc, old_mtu, max_frame; 354 355 rc = ena_com_get_dev_attr_feat(adapter->ena_dev, &get_feat_ctx); 356 if (rc) { 357 device_printf(adapter->pdev, 358 "Cannot get attribute for ena device\n"); 359 return (ENXIO); 360 } 361 362 /* Save old MTU in case of fail */ 363 old_mtu = if_getmtu(ifp); 364 365 /* Change MTU and calculate max frame */ 366 if_setmtu(ifp, new_mtu); 367 max_frame = ETHER_MAX_FRAME(ifp, ETHERTYPE_VLAN, 1); 368 369 if ((new_mtu < ENA_MIN_FRAME_LEN) || 370 (new_mtu > get_feat_ctx.dev_attr.max_mtu) || 371 (max_frame > ENA_MAX_FRAME_LEN)) { 372 device_printf(adapter->pdev, "Invalid MTU setting. " 373 "new_mtu: %d\n", new_mtu); 374 goto error; 375 } 376 377 rc = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu); 378 if (rc != 0) 379 goto error; 380 381 return (0); 382 error: 383 if_setmtu(ifp, old_mtu); 384 return (EINVAL); 385 } 386 387 static inline void 388 ena_alloc_counters(counter_u64_t *begin, int size) 389 { 390 counter_u64_t *end = (counter_u64_t *)((char *)begin + size); 391 392 for (; begin < end; ++begin) 393 *begin = counter_u64_alloc(M_WAITOK); 394 } 395 396 static inline void 397 ena_free_counters(counter_u64_t *begin, int size) 398 { 399 counter_u64_t *end = (counter_u64_t *)((char *)begin + size); 400 401 for (; begin < end; ++begin) 402 counter_u64_free(*begin); 403 } 404 405 static inline void 406 ena_reset_counters(counter_u64_t *begin, int size) 407 { 408 counter_u64_t *end = (counter_u64_t *)((char *)begin + size); 409 410 for (; begin < end; ++begin) 411 counter_u64_zero(*begin); 412 } 413 414 static void 415 ena_init_io_rings_common(struct ena_adapter *adapter, struct ena_ring *ring, 416 uint16_t qid) 417 { 418 419 ring->qid = qid; 420 ring->adapter = adapter; 421 ring->ena_dev = adapter->ena_dev; 422 } 423 424 static void 425 ena_init_io_rings(struct ena_adapter *adapter) 426 { 427 struct ena_com_dev *ena_dev; 428 struct ena_ring *txr, *rxr; 429 struct ena_que *que; 430 int i; 431 432 ena_dev = adapter->ena_dev; 433 434 for (i = 0; i < adapter->num_queues; i++) { 435 txr = &adapter->tx_ring[i]; 436 rxr = &adapter->rx_ring[i]; 437 438 /* TX/RX common ring state */ 439 ena_init_io_rings_common(adapter, txr, i); 440 ena_init_io_rings_common(adapter, rxr, i); 441 442 /* TX specific ring state */ 443 txr->ring_size = adapter->tx_ring_size; 444 txr->tx_max_header_size = ena_dev->tx_max_header_size; 445 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 446 txr->smoothed_interval = 447 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev); 448 449 /* Allocate a buf ring */ 450 txr->br = buf_ring_alloc(ena_buf_ring_size, M_DEVBUF, 451 M_WAITOK, &txr->ring_mtx); 452 453 /* Alloc TX statistics. */ 454 ena_alloc_counters((counter_u64_t *)&txr->tx_stats, 455 sizeof(txr->tx_stats)); 456 457 /* RX specific ring state */ 458 rxr->ring_size = adapter->rx_ring_size; 459 rxr->rx_small_copy_len = adapter->small_copy_len; 460 rxr->smoothed_interval = 461 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev); 462 463 /* Alloc RX statistics. */ 464 ena_alloc_counters((counter_u64_t *)&rxr->rx_stats, 465 sizeof(rxr->rx_stats)); 466 467 /* Initialize locks */ 468 snprintf(txr->mtx_name, nitems(txr->mtx_name), "%s:tx(%d)", 469 device_get_nameunit(adapter->pdev), i); 470 snprintf(rxr->mtx_name, nitems(rxr->mtx_name), "%s:rx(%d)", 471 device_get_nameunit(adapter->pdev), i); 472 473 mtx_init(&txr->ring_mtx, txr->mtx_name, NULL, MTX_DEF); 474 mtx_init(&rxr->ring_mtx, rxr->mtx_name, NULL, MTX_DEF); 475 476 que = &adapter->que[i]; 477 que->adapter = adapter; 478 que->id = i; 479 que->tx_ring = txr; 480 que->rx_ring = rxr; 481 482 txr->que = que; 483 rxr->que = que; 484 485 rxr->empty_rx_queue = 0; 486 } 487 } 488 489 static void 490 ena_free_io_ring_resources(struct ena_adapter *adapter, unsigned int qid) 491 { 492 struct ena_ring *txr = &adapter->tx_ring[qid]; 493 struct ena_ring *rxr = &adapter->rx_ring[qid]; 494 495 ena_free_counters((counter_u64_t *)&txr->tx_stats, 496 sizeof(txr->tx_stats)); 497 ena_free_counters((counter_u64_t *)&rxr->rx_stats, 498 sizeof(rxr->rx_stats)); 499 500 ENA_RING_MTX_LOCK(txr); 501 drbr_free(txr->br, M_DEVBUF); 502 ENA_RING_MTX_UNLOCK(txr); 503 504 mtx_destroy(&txr->ring_mtx); 505 mtx_destroy(&rxr->ring_mtx); 506 } 507 508 static void 509 ena_free_all_io_rings_resources(struct ena_adapter *adapter) 510 { 511 int i; 512 513 for (i = 0; i < adapter->num_queues; i++) 514 ena_free_io_ring_resources(adapter, i); 515 516 } 517 518 static int 519 ena_setup_tx_dma_tag(struct ena_adapter *adapter) 520 { 521 int ret; 522 523 /* Create DMA tag for Tx buffers */ 524 ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev), 525 1, 0, /* alignment, bounds */ 526 ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window */ 527 BUS_SPACE_MAXADDR, /* highaddr of excl window */ 528 NULL, NULL, /* filter, filterarg */ 529 ENA_TSO_MAXSIZE, /* maxsize */ 530 adapter->max_tx_sgl_size - 1, /* nsegments */ 531 ENA_TSO_MAXSIZE, /* maxsegsize */ 532 0, /* flags */ 533 NULL, /* lockfunc */ 534 NULL, /* lockfuncarg */ 535 &adapter->tx_buf_tag); 536 537 if (ret != 0) 538 device_printf(adapter->pdev, "Unable to create Tx DMA tag\n"); 539 540 return (ret); 541 } 542 543 static int 544 ena_free_tx_dma_tag(struct ena_adapter *adapter) 545 { 546 int ret; 547 548 ret = bus_dma_tag_destroy(adapter->tx_buf_tag); 549 550 if (ret == 0) 551 adapter->tx_buf_tag = NULL; 552 553 return (ret); 554 } 555 556 static int 557 ena_setup_rx_dma_tag(struct ena_adapter *adapter) 558 { 559 int ret; 560 561 /* Create DMA tag for Rx buffers*/ 562 ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev), /* parent */ 563 1, 0, /* alignment, bounds */ 564 ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window */ 565 BUS_SPACE_MAXADDR, /* highaddr of excl window */ 566 NULL, NULL, /* filter, filterarg */ 567 MJUM16BYTES, /* maxsize */ 568 1, /* nsegments */ 569 MJUM16BYTES, /* maxsegsize */ 570 0, /* flags */ 571 NULL, /* lockfunc */ 572 NULL, /* lockarg */ 573 &adapter->rx_buf_tag); 574 575 if (ret != 0) 576 device_printf(adapter->pdev, "Unable to create Rx DMA tag\n"); 577 578 return (ret); 579 } 580 581 static int 582 ena_free_rx_dma_tag(struct ena_adapter *adapter) 583 { 584 int ret; 585 586 ret = bus_dma_tag_destroy(adapter->rx_buf_tag); 587 588 if (ret == 0) 589 adapter->rx_buf_tag = NULL; 590 591 return (ret); 592 } 593 594 595 /** 596 * ena_setup_tx_resources - allocate Tx resources (Descriptors) 597 * @adapter: network interface device structure 598 * @qid: queue index 599 * 600 * Returns 0 on success, otherwise on failure. 601 **/ 602 static int 603 ena_setup_tx_resources(struct ena_adapter *adapter, int qid) 604 { 605 struct ena_que *que = &adapter->que[qid]; 606 struct ena_ring *tx_ring = que->tx_ring; 607 int size, i, err; 608 #ifdef RSS 609 cpuset_t cpu_mask; 610 #endif 611 612 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size; 613 614 tx_ring->tx_buffer_info = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); 615 if (tx_ring->tx_buffer_info == NULL) 616 return (ENOMEM); 617 618 size = sizeof(uint16_t) * tx_ring->ring_size; 619 tx_ring->free_tx_ids = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); 620 if (tx_ring->free_tx_ids == NULL) 621 goto err_buf_info_free; 622 623 /* Req id stack for TX OOO completions */ 624 for (i = 0; i < tx_ring->ring_size; i++) 625 tx_ring->free_tx_ids[i] = i; 626 627 /* Reset TX statistics. */ 628 ena_reset_counters((counter_u64_t *)&tx_ring->tx_stats, 629 sizeof(tx_ring->tx_stats)); 630 631 tx_ring->next_to_use = 0; 632 tx_ring->next_to_clean = 0; 633 634 /* Make sure that drbr is empty */ 635 ENA_RING_MTX_LOCK(tx_ring); 636 drbr_flush(adapter->ifp, tx_ring->br); 637 ENA_RING_MTX_UNLOCK(tx_ring); 638 639 /* ... and create the buffer DMA maps */ 640 for (i = 0; i < tx_ring->ring_size; i++) { 641 err = bus_dmamap_create(adapter->tx_buf_tag, 0, 642 &tx_ring->tx_buffer_info[i].map); 643 if (err != 0) { 644 device_printf(adapter->pdev, 645 "Unable to create Tx DMA map for buffer %d\n", i); 646 goto err_buf_info_unmap; 647 } 648 } 649 650 /* Allocate taskqueues */ 651 TASK_INIT(&tx_ring->enqueue_task, 0, ena_deferred_mq_start, tx_ring); 652 tx_ring->enqueue_tq = taskqueue_create_fast("ena_tx_enque", M_NOWAIT, 653 taskqueue_thread_enqueue, &tx_ring->enqueue_tq); 654 if (tx_ring->enqueue_tq == NULL) { 655 device_printf(adapter->pdev, 656 "Unable to create taskqueue for enqueue task\n"); 657 i = tx_ring->ring_size; 658 goto err_buf_info_unmap; 659 } 660 661 /* RSS set cpu for thread */ 662 #ifdef RSS 663 CPU_SETOF(que->cpu, &cpu_mask); 664 taskqueue_start_threads_cpuset(&tx_ring->enqueue_tq, 1, PI_NET, 665 &cpu_mask, "%s tx_ring enq (bucket %d)", 666 device_get_nameunit(adapter->pdev), que->cpu); 667 #else /* RSS */ 668 taskqueue_start_threads(&tx_ring->enqueue_tq, 1, PI_NET, 669 "%s txeq %d", device_get_nameunit(adapter->pdev), que->cpu); 670 #endif /* RSS */ 671 672 return (0); 673 674 err_buf_info_unmap: 675 while (i--) { 676 bus_dmamap_destroy(adapter->tx_buf_tag, 677 tx_ring->tx_buffer_info[i].map); 678 } 679 free(tx_ring->free_tx_ids, M_DEVBUF); 680 tx_ring->free_tx_ids = NULL; 681 err_buf_info_free: 682 free(tx_ring->tx_buffer_info, M_DEVBUF); 683 tx_ring->tx_buffer_info = NULL; 684 685 return (ENOMEM); 686 } 687 688 /** 689 * ena_free_tx_resources - Free Tx Resources per Queue 690 * @adapter: network interface device structure 691 * @qid: queue index 692 * 693 * Free all transmit software resources 694 **/ 695 static void 696 ena_free_tx_resources(struct ena_adapter *adapter, int qid) 697 { 698 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 699 700 while (taskqueue_cancel(tx_ring->enqueue_tq, &tx_ring->enqueue_task, 701 NULL)) 702 taskqueue_drain(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 703 704 taskqueue_free(tx_ring->enqueue_tq); 705 706 ENA_RING_MTX_LOCK(tx_ring); 707 /* Flush buffer ring, */ 708 drbr_flush(adapter->ifp, tx_ring->br); 709 710 /* Free buffer DMA maps, */ 711 for (int i = 0; i < tx_ring->ring_size; i++) { 712 m_freem(tx_ring->tx_buffer_info[i].mbuf); 713 tx_ring->tx_buffer_info[i].mbuf = NULL; 714 bus_dmamap_unload(adapter->tx_buf_tag, 715 tx_ring->tx_buffer_info[i].map); 716 bus_dmamap_destroy(adapter->tx_buf_tag, 717 tx_ring->tx_buffer_info[i].map); 718 } 719 ENA_RING_MTX_UNLOCK(tx_ring); 720 721 /* And free allocated memory. */ 722 free(tx_ring->tx_buffer_info, M_DEVBUF); 723 tx_ring->tx_buffer_info = NULL; 724 725 free(tx_ring->free_tx_ids, M_DEVBUF); 726 tx_ring->free_tx_ids = NULL; 727 } 728 729 /** 730 * ena_setup_all_tx_resources - allocate all queues Tx resources 731 * @adapter: network interface device structure 732 * 733 * Returns 0 on success, otherwise on failure. 734 **/ 735 static int 736 ena_setup_all_tx_resources(struct ena_adapter *adapter) 737 { 738 int i, rc; 739 740 for (i = 0; i < adapter->num_queues; i++) { 741 rc = ena_setup_tx_resources(adapter, i); 742 if (rc) { 743 device_printf(adapter->pdev, 744 "Allocation for Tx Queue %u failed\n", i); 745 goto err_setup_tx; 746 } 747 } 748 749 return (0); 750 751 err_setup_tx: 752 /* Rewind the index freeing the rings as we go */ 753 while (i--) 754 ena_free_tx_resources(adapter, i); 755 return (rc); 756 } 757 758 /** 759 * ena_free_all_tx_resources - Free Tx Resources for All Queues 760 * @adapter: network interface device structure 761 * 762 * Free all transmit software resources 763 **/ 764 static void 765 ena_free_all_tx_resources(struct ena_adapter *adapter) 766 { 767 int i; 768 769 for (i = 0; i < adapter->num_queues; i++) 770 ena_free_tx_resources(adapter, i); 771 772 return; 773 } 774 775 static inline int 776 validate_rx_req_id(struct ena_ring *rx_ring, uint16_t req_id) 777 { 778 if (likely(req_id < rx_ring->ring_size)) 779 return (0); 780 781 device_printf(rx_ring->adapter->pdev, "Invalid rx req_id: %hu\n", 782 req_id); 783 counter_u64_add(rx_ring->rx_stats.bad_req_id, 1); 784 785 /* Trigger device reset */ 786 rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID; 787 rx_ring->adapter->trigger_reset = true; 788 789 return (EFAULT); 790 } 791 792 /** 793 * ena_setup_rx_resources - allocate Rx resources (Descriptors) 794 * @adapter: network interface device structure 795 * @qid: queue index 796 * 797 * Returns 0 on success, otherwise on failure. 798 **/ 799 static int 800 ena_setup_rx_resources(struct ena_adapter *adapter, unsigned int qid) 801 { 802 struct ena_que *que = &adapter->que[qid]; 803 struct ena_ring *rx_ring = que->rx_ring; 804 int size, err, i; 805 #ifdef RSS 806 cpuset_t cpu_mask; 807 #endif 808 809 size = sizeof(struct ena_rx_buffer) * rx_ring->ring_size; 810 811 /* 812 * Alloc extra element so in rx path 813 * we can always prefetch rx_info + 1 814 */ 815 size += sizeof(struct ena_rx_buffer); 816 817 rx_ring->rx_buffer_info = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO); 818 819 size = sizeof(uint16_t) * rx_ring->ring_size; 820 rx_ring->free_rx_ids = malloc(size, M_DEVBUF, M_WAITOK); 821 822 for (i = 0; i < rx_ring->ring_size; i++) 823 rx_ring->free_rx_ids[i] = i; 824 825 /* Reset RX statistics. */ 826 ena_reset_counters((counter_u64_t *)&rx_ring->rx_stats, 827 sizeof(rx_ring->rx_stats)); 828 829 rx_ring->next_to_clean = 0; 830 rx_ring->next_to_use = 0; 831 832 /* ... and create the buffer DMA maps */ 833 for (i = 0; i < rx_ring->ring_size; i++) { 834 err = bus_dmamap_create(adapter->rx_buf_tag, 0, 835 &(rx_ring->rx_buffer_info[i].map)); 836 if (err != 0) { 837 device_printf(adapter->pdev, 838 "Unable to create Rx DMA map for buffer %d\n", i); 839 goto err_buf_info_unmap; 840 } 841 } 842 843 /* Create LRO for the ring */ 844 if (adapter->ifp->if_capenable & IFCAP_LRO) { 845 int err = tcp_lro_init(&rx_ring->lro); 846 if (err) { 847 device_printf(adapter->pdev, 848 "LRO[%d] Initialization failed!\n", qid); 849 } else { 850 ena_trace(ENA_INFO, 851 "RX Soft LRO[%d] Initialized\n", qid); 852 rx_ring->lro.ifp = adapter->ifp; 853 } 854 } 855 856 /* Allocate taskqueues */ 857 TASK_INIT(&rx_ring->cmpl_task, 0, ena_deferred_rx_cleanup, rx_ring); 858 rx_ring->cmpl_tq = taskqueue_create_fast("ena RX completion", M_WAITOK, 859 taskqueue_thread_enqueue, &rx_ring->cmpl_tq); 860 861 /* RSS set cpu for thread */ 862 #ifdef RSS 863 CPU_SETOF(que->cpu, &cpu_mask); 864 taskqueue_start_threads_cpuset(&rx_ring->cmpl_tq, 1, PI_NET, &cpu_mask, 865 "%s rx_ring cmpl (bucket %d)", 866 device_get_nameunit(adapter->pdev), que->cpu); 867 #else 868 taskqueue_start_threads(&rx_ring->cmpl_tq, 1, PI_NET, 869 "%s rx_ring cmpl %d", device_get_nameunit(adapter->pdev), que->cpu); 870 #endif 871 872 return (0); 873 874 err_buf_info_unmap: 875 while (i--) { 876 bus_dmamap_destroy(adapter->rx_buf_tag, 877 rx_ring->rx_buffer_info[i].map); 878 } 879 880 free(rx_ring->free_rx_ids, M_DEVBUF); 881 rx_ring->free_rx_ids = NULL; 882 free(rx_ring->rx_buffer_info, M_DEVBUF); 883 rx_ring->rx_buffer_info = NULL; 884 ena_trace(ENA_ALERT, "RX resource allocation fail"); 885 return (ENOMEM); 886 } 887 888 /** 889 * ena_free_rx_resources - Free Rx Resources 890 * @adapter: network interface device structure 891 * @qid: queue index 892 * 893 * Free all receive software resources 894 **/ 895 static void 896 ena_free_rx_resources(struct ena_adapter *adapter, unsigned int qid) 897 { 898 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 899 900 ena_trace(ENA_INFO, "%s qid %d\n", __func__, qid); 901 902 while (taskqueue_cancel(rx_ring->cmpl_tq, &rx_ring->cmpl_task, NULL) != 0) 903 taskqueue_drain(rx_ring->cmpl_tq, &rx_ring->cmpl_task); 904 905 taskqueue_free(rx_ring->cmpl_tq); 906 907 /* Free buffer DMA maps, */ 908 for (int i = 0; i < rx_ring->ring_size; i++) { 909 m_freem(rx_ring->rx_buffer_info[i].mbuf); 910 rx_ring->rx_buffer_info[i].mbuf = NULL; 911 bus_dmamap_unload(adapter->rx_buf_tag, 912 rx_ring->rx_buffer_info[i].map); 913 bus_dmamap_destroy(adapter->rx_buf_tag, 914 rx_ring->rx_buffer_info[i].map); 915 } 916 917 /* free LRO resources, */ 918 tcp_lro_free(&rx_ring->lro); 919 920 /* free allocated memory */ 921 free(rx_ring->rx_buffer_info, M_DEVBUF); 922 rx_ring->rx_buffer_info = NULL; 923 924 free(rx_ring->free_rx_ids, M_DEVBUF); 925 rx_ring->free_rx_ids = NULL; 926 927 return; 928 } 929 930 /** 931 * ena_setup_all_rx_resources - allocate all queues Rx resources 932 * @adapter: network interface device structure 933 * 934 * Returns 0 on success, otherwise on failure. 935 **/ 936 static int 937 ena_setup_all_rx_resources(struct ena_adapter *adapter) 938 { 939 int i, rc = 0; 940 941 for (i = 0; i < adapter->num_queues; i++) { 942 rc = ena_setup_rx_resources(adapter, i); 943 if (rc) { 944 device_printf(adapter->pdev, 945 "Allocation for Rx Queue %u failed\n", i); 946 goto err_setup_rx; 947 } 948 } 949 return (0); 950 951 err_setup_rx: 952 /* rewind the index freeing the rings as we go */ 953 while (i--) 954 ena_free_rx_resources(adapter, i); 955 return (rc); 956 } 957 958 /** 959 * ena_free_all_rx_resources - Free Rx resources for all queues 960 * @adapter: network interface device structure 961 * 962 * Free all receive software resources 963 **/ 964 static void 965 ena_free_all_rx_resources(struct ena_adapter *adapter) 966 { 967 int i; 968 969 for (i = 0; i < adapter->num_queues; i++) 970 ena_free_rx_resources(adapter, i); 971 972 return; 973 } 974 975 static inline int 976 ena_alloc_rx_mbuf(struct ena_adapter *adapter, 977 struct ena_ring *rx_ring, struct ena_rx_buffer *rx_info) 978 { 979 struct ena_com_buf *ena_buf; 980 bus_dma_segment_t segs[1]; 981 int nsegs, error; 982 983 /* if previous allocated frag is not used */ 984 if (rx_info->mbuf != NULL) 985 return (0); 986 987 /* Get mbuf using UMA allocator */ 988 rx_info->mbuf = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUM16BYTES); 989 990 if (rx_info->mbuf == NULL) { 991 counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1); 992 return (ENOMEM); 993 } 994 /* Set mbuf length*/ 995 rx_info->mbuf->m_pkthdr.len = rx_info->mbuf->m_len = MJUM16BYTES; 996 997 /* Map packets for DMA */ 998 ena_trace(ENA_DBG | ENA_RSC | ENA_RXPTH, 999 "Using tag %p for buffers' DMA mapping, mbuf %p len: %d", 1000 adapter->rx_buf_tag,rx_info->mbuf, rx_info->mbuf->m_len); 1001 error = bus_dmamap_load_mbuf_sg(adapter->rx_buf_tag, rx_info->map, 1002 rx_info->mbuf, segs, &nsegs, BUS_DMA_NOWAIT); 1003 if (error || (nsegs != 1)) { 1004 device_printf(adapter->pdev, "failed to map mbuf, error: %d, " 1005 "nsegs: %d\n", error, nsegs); 1006 counter_u64_add(rx_ring->rx_stats.dma_mapping_err, 1); 1007 goto exit; 1008 1009 } 1010 1011 bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map, BUS_DMASYNC_PREREAD); 1012 1013 ena_buf = &rx_info->ena_buf; 1014 ena_buf->paddr = segs[0].ds_addr; 1015 ena_buf->len = MJUM16BYTES; 1016 1017 ena_trace(ENA_DBG | ENA_RSC | ENA_RXPTH, 1018 "ALLOC RX BUF: mbuf %p, rx_info %p, len %d, paddr %#jx\n", 1019 rx_info->mbuf, rx_info,ena_buf->len, (uintmax_t)ena_buf->paddr); 1020 1021 return (0); 1022 1023 exit: 1024 m_freem(rx_info->mbuf); 1025 rx_info->mbuf = NULL; 1026 return (EFAULT); 1027 } 1028 1029 static void 1030 ena_free_rx_mbuf(struct ena_adapter *adapter, struct ena_ring *rx_ring, 1031 struct ena_rx_buffer *rx_info) 1032 { 1033 1034 if (rx_info->mbuf == NULL) 1035 return; 1036 1037 bus_dmamap_unload(adapter->rx_buf_tag, rx_info->map); 1038 m_freem(rx_info->mbuf); 1039 rx_info->mbuf = NULL; 1040 1041 return; 1042 } 1043 1044 1045 /** 1046 * ena_refill_rx_bufs - Refills ring with descriptors 1047 * @rx_ring: the ring which we want to feed with free descriptors 1048 * @num: number of descriptors to refill 1049 * Refills the ring with newly allocated DMA-mapped mbufs for receiving 1050 **/ 1051 static int 1052 ena_refill_rx_bufs(struct ena_ring *rx_ring, uint32_t num) 1053 { 1054 struct ena_adapter *adapter = rx_ring->adapter; 1055 uint16_t next_to_use, req_id; 1056 uint32_t i; 1057 int rc; 1058 1059 ena_trace(ENA_DBG | ENA_RXPTH | ENA_RSC, "refill qid: %d", 1060 rx_ring->qid); 1061 1062 next_to_use = rx_ring->next_to_use; 1063 1064 for (i = 0; i < num; i++) { 1065 struct ena_rx_buffer *rx_info; 1066 1067 ena_trace(ENA_DBG | ENA_RXPTH | ENA_RSC, 1068 "RX buffer - next to use: %d", next_to_use); 1069 1070 req_id = rx_ring->free_rx_ids[next_to_use]; 1071 rc = validate_rx_req_id(rx_ring, req_id); 1072 if (unlikely(rc)) 1073 break; 1074 1075 rx_info = &rx_ring->rx_buffer_info[req_id]; 1076 1077 rc = ena_alloc_rx_mbuf(adapter, rx_ring, rx_info); 1078 if (rc != 0) { 1079 device_printf(adapter->pdev, 1080 "failed to alloc buffer for rx queue\n"); 1081 break; 1082 } 1083 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq, 1084 &rx_info->ena_buf, req_id); 1085 if (unlikely(rc)) { 1086 device_printf(adapter->pdev, 1087 "failed to add buffer for rx queue %d\n", 1088 rx_ring->qid); 1089 break; 1090 } 1091 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use, 1092 rx_ring->ring_size); 1093 } 1094 1095 if (i < num) { 1096 counter_u64_add(rx_ring->rx_stats.refil_partial, 1); 1097 device_printf(adapter->pdev, 1098 "refilled rx queue %d with %d pages only\n", 1099 rx_ring->qid, i); 1100 } 1101 1102 if (i != 0) { 1103 wmb(); 1104 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq); 1105 } 1106 rx_ring->next_to_use = next_to_use; 1107 return (i); 1108 } 1109 1110 static void 1111 ena_free_rx_bufs(struct ena_adapter *adapter, unsigned int qid) 1112 { 1113 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 1114 unsigned int i; 1115 1116 for (i = 0; i < rx_ring->ring_size; i++) { 1117 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i]; 1118 1119 if (rx_info->mbuf) 1120 ena_free_rx_mbuf(adapter, rx_ring, rx_info); 1121 } 1122 1123 return; 1124 } 1125 1126 /** 1127 * ena_refill_all_rx_bufs - allocate all queues Rx buffers 1128 * @adapter: network interface device structure 1129 * 1130 */ 1131 static void 1132 ena_refill_all_rx_bufs(struct ena_adapter *adapter) 1133 { 1134 struct ena_ring *rx_ring; 1135 int i, rc, bufs_num; 1136 1137 for (i = 0; i < adapter->num_queues; i++) { 1138 rx_ring = &adapter->rx_ring[i]; 1139 bufs_num = rx_ring->ring_size - 1; 1140 rc = ena_refill_rx_bufs(rx_ring, bufs_num); 1141 1142 if (unlikely(rc != bufs_num)) 1143 device_printf(adapter->pdev, 1144 "refilling Queue %d failed. allocated %d buffers" 1145 " from: %d\n", i, rc, bufs_num); 1146 } 1147 } 1148 1149 static void 1150 ena_free_all_rx_bufs(struct ena_adapter *adapter) 1151 { 1152 int i; 1153 1154 for (i = 0; i < adapter->num_queues; i++) 1155 ena_free_rx_bufs(adapter, i); 1156 return; 1157 } 1158 1159 /** 1160 * ena_free_tx_bufs - Free Tx Buffers per Queue 1161 * @adapter: network interface device structure 1162 * @qid: queue index 1163 **/ 1164 static void 1165 ena_free_tx_bufs(struct ena_adapter *adapter, unsigned int qid) 1166 { 1167 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 1168 1169 ENA_RING_MTX_LOCK(tx_ring); 1170 for (int i = 0; i < tx_ring->ring_size; i++) { 1171 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i]; 1172 1173 if (tx_info->mbuf == NULL) 1174 continue; 1175 1176 ena_trace(ENA_DBG | ENA_TXPTH | ENA_RSC, 1177 "free uncompleted Tx mbufs qid[%d] idx: 0x%x", qid, i); 1178 1179 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map); 1180 m_free(tx_info->mbuf); 1181 tx_info->mbuf = NULL; 1182 } 1183 ENA_RING_MTX_UNLOCK(tx_ring); 1184 1185 return; 1186 } 1187 1188 static void 1189 ena_free_all_tx_bufs(struct ena_adapter *adapter) 1190 { 1191 1192 for (int i = 0; i < adapter->num_queues; i++) 1193 ena_free_tx_bufs(adapter, i); 1194 1195 return; 1196 } 1197 1198 static void 1199 ena_destroy_all_tx_queues(struct ena_adapter *adapter) 1200 { 1201 uint16_t ena_qid; 1202 int i; 1203 1204 for (i = 0; i < adapter->num_queues; i++) { 1205 ena_qid = ENA_IO_TXQ_IDX(i); 1206 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1207 } 1208 } 1209 1210 static void 1211 ena_destroy_all_rx_queues(struct ena_adapter *adapter) 1212 { 1213 uint16_t ena_qid; 1214 int i; 1215 1216 for (i = 0; i < adapter->num_queues; i++) { 1217 ena_qid = ENA_IO_RXQ_IDX(i); 1218 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1219 } 1220 } 1221 1222 static void 1223 ena_destroy_all_io_queues(struct ena_adapter *adapter) 1224 { 1225 ena_destroy_all_tx_queues(adapter); 1226 ena_destroy_all_rx_queues(adapter); 1227 } 1228 1229 static inline int 1230 validate_tx_req_id(struct ena_ring *tx_ring, uint16_t req_id) 1231 { 1232 struct ena_tx_buffer *tx_info = NULL; 1233 1234 if (likely(req_id < tx_ring->ring_size)) { 1235 tx_info = &tx_ring->tx_buffer_info[req_id]; 1236 if (tx_info->mbuf) 1237 return 0; 1238 } 1239 1240 counter_u64_add(tx_ring->tx_stats.bad_req_id, 1); 1241 1242 return (EFAULT); 1243 } 1244 1245 static int 1246 ena_create_io_queues(struct ena_adapter *adapter) 1247 { 1248 struct ena_com_dev *ena_dev = adapter->ena_dev; 1249 struct ena_com_create_io_ctx ctx; 1250 struct ena_ring *ring; 1251 uint16_t ena_qid; 1252 uint32_t msix_vector; 1253 int rc, i; 1254 1255 /* Create TX queues */ 1256 for (i = 0; i < adapter->num_queues; i++) { 1257 msix_vector = ENA_IO_IRQ_IDX(i); 1258 ena_qid = ENA_IO_TXQ_IDX(i); 1259 ctx.mem_queue_type = ena_dev->tx_mem_queue_type; 1260 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX; 1261 ctx.queue_size = adapter->tx_ring_size; 1262 ctx.msix_vector = msix_vector; 1263 ctx.qid = ena_qid; 1264 rc = ena_com_create_io_queue(ena_dev, &ctx); 1265 if (rc) { 1266 device_printf(adapter->pdev, 1267 "Failed to create io TX queue #%d rc: %d\n", i, rc); 1268 goto err_tx; 1269 } 1270 ring = &adapter->tx_ring[i]; 1271 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 1272 &ring->ena_com_io_sq, 1273 &ring->ena_com_io_cq); 1274 if (rc) { 1275 device_printf(adapter->pdev, 1276 "Failed to get TX queue handlers. TX queue num" 1277 " %d rc: %d\n", i, rc); 1278 ena_com_destroy_io_queue(ena_dev, ena_qid); 1279 goto err_tx; 1280 } 1281 } 1282 1283 /* Create RX queues */ 1284 for (i = 0; i < adapter->num_queues; i++) { 1285 msix_vector = ENA_IO_IRQ_IDX(i); 1286 ena_qid = ENA_IO_RXQ_IDX(i); 1287 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 1288 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX; 1289 ctx.queue_size = adapter->rx_ring_size; 1290 ctx.msix_vector = msix_vector; 1291 ctx.qid = ena_qid; 1292 rc = ena_com_create_io_queue(ena_dev, &ctx); 1293 if (rc) { 1294 device_printf(adapter->pdev, 1295 "Failed to create io RX queue[%d] rc: %d\n", i, rc); 1296 goto err_rx; 1297 } 1298 1299 ring = &adapter->rx_ring[i]; 1300 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 1301 &ring->ena_com_io_sq, 1302 &ring->ena_com_io_cq); 1303 if (rc) { 1304 device_printf(adapter->pdev, 1305 "Failed to get RX queue handlers. RX queue num" 1306 " %d rc: %d\n", i, rc); 1307 ena_com_destroy_io_queue(ena_dev, ena_qid); 1308 goto err_rx; 1309 } 1310 } 1311 1312 return (0); 1313 1314 err_rx: 1315 while (i--) 1316 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i)); 1317 i = adapter->num_queues; 1318 err_tx: 1319 while (i--) 1320 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i)); 1321 1322 return (ENXIO); 1323 } 1324 1325 /** 1326 * ena_tx_cleanup - clear sent packets and corresponding descriptors 1327 * @tx_ring: ring for which we want to clean packets 1328 * 1329 * Once packets are sent, we ask the device in a loop for no longer used 1330 * descriptors. We find the related mbuf chain in a map (index in an array) 1331 * and free it, then update ring state. 1332 * This is performed in "endless" loop, updating ring pointers every 1333 * TX_COMMIT. The first check of free descriptor is performed before the actual 1334 * loop, then repeated at the loop end. 1335 **/ 1336 static int 1337 ena_tx_cleanup(struct ena_ring *tx_ring) 1338 { 1339 struct ena_adapter *adapter; 1340 struct ena_com_io_cq* io_cq; 1341 uint16_t next_to_clean; 1342 uint16_t req_id; 1343 uint16_t ena_qid; 1344 unsigned int total_done = 0; 1345 int rc; 1346 int commit = TX_COMMIT; 1347 int budget = TX_BUDGET; 1348 int work_done; 1349 1350 adapter = tx_ring->que->adapter; 1351 ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id); 1352 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 1353 next_to_clean = tx_ring->next_to_clean; 1354 1355 do { 1356 struct ena_tx_buffer *tx_info; 1357 struct mbuf *mbuf; 1358 1359 rc = ena_com_tx_comp_req_id_get(io_cq, &req_id); 1360 if (rc != 0) 1361 break; 1362 1363 rc = validate_tx_req_id(tx_ring, req_id); 1364 if (rc) 1365 break; 1366 1367 tx_info = &tx_ring->tx_buffer_info[req_id]; 1368 1369 mbuf = tx_info->mbuf; 1370 1371 tx_info->mbuf = NULL; 1372 bintime_clear(&tx_info->timestamp); 1373 1374 if (tx_info->num_of_bufs != 0) { 1375 /* Map is no longer required */ 1376 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map); 1377 } 1378 1379 m_freem(mbuf); 1380 1381 total_done += tx_info->tx_descs; 1382 1383 tx_ring->free_tx_ids[next_to_clean] = req_id; 1384 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1385 tx_ring->ring_size); 1386 1387 if (--commit == 0) { 1388 commit = TX_COMMIT; 1389 /* update ring state every TX_COMMIT descriptor */ 1390 tx_ring->next_to_clean = next_to_clean; 1391 ena_com_comp_ack(&adapter->ena_dev->io_sq_queues[ena_qid], total_done); 1392 ena_com_update_dev_comp_head(io_cq); 1393 total_done = 0; 1394 } 1395 } while (--budget); 1396 1397 work_done = TX_BUDGET - budget; 1398 1399 /* If there is still something to commit update ring state */ 1400 if (commit != TX_COMMIT) { 1401 tx_ring->next_to_clean = next_to_clean; 1402 ena_com_comp_ack(&adapter->ena_dev->io_sq_queues[ena_qid], total_done); 1403 ena_com_update_dev_comp_head(io_cq); 1404 } 1405 1406 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 1407 1408 return (work_done); 1409 } 1410 1411 static void 1412 ena_rx_hash_mbuf(struct ena_ring *rx_ring, struct ena_com_rx_ctx *ena_rx_ctx, 1413 struct mbuf *mbuf) 1414 { 1415 struct ena_adapter *adapter = rx_ring->adapter; 1416 1417 if (adapter->rss_support) { 1418 mbuf->m_pkthdr.flowid = ena_rx_ctx->hash; 1419 1420 if (ena_rx_ctx->frag && 1421 ena_rx_ctx->l3_proto != ENA_ETH_IO_L4_PROTO_UNKNOWN) { 1422 M_HASHTYPE_SET(mbuf, M_HASHTYPE_OPAQUE_HASH); 1423 return; 1424 } 1425 1426 switch (ena_rx_ctx->l3_proto) { 1427 case ENA_ETH_IO_L3_PROTO_IPV4: 1428 switch (ena_rx_ctx->l4_proto) { 1429 case ENA_ETH_IO_L4_PROTO_TCP: 1430 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_TCP_IPV4); 1431 break; 1432 case ENA_ETH_IO_L4_PROTO_UDP: 1433 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_UDP_IPV4); 1434 break; 1435 default: 1436 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_IPV4); 1437 } 1438 break; 1439 case ENA_ETH_IO_L3_PROTO_IPV6: 1440 switch (ena_rx_ctx->l4_proto) { 1441 case ENA_ETH_IO_L4_PROTO_TCP: 1442 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_TCP_IPV6); 1443 break; 1444 case ENA_ETH_IO_L4_PROTO_UDP: 1445 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_UDP_IPV6); 1446 break; 1447 default: 1448 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_IPV6); 1449 } 1450 break; 1451 case ENA_ETH_IO_L3_PROTO_UNKNOWN: 1452 M_HASHTYPE_SET(mbuf, M_HASHTYPE_NONE); 1453 break; 1454 default: 1455 M_HASHTYPE_SET(mbuf, M_HASHTYPE_OPAQUE_HASH); 1456 } 1457 } else { 1458 mbuf->m_pkthdr.flowid = rx_ring->qid; 1459 M_HASHTYPE_SET(mbuf, M_HASHTYPE_NONE); 1460 } 1461 } 1462 1463 /** 1464 * ena_rx_mbuf - assemble mbuf from descriptors 1465 * @rx_ring: ring for which we want to clean packets 1466 * @ena_bufs: buffer info 1467 * @ena_rx_ctx: metadata for this packet(s) 1468 * @next_to_clean: ring pointer, will be updated only upon success 1469 * 1470 **/ 1471 static struct mbuf* 1472 ena_rx_mbuf(struct ena_ring *rx_ring, struct ena_com_rx_buf_info *ena_bufs, 1473 struct ena_com_rx_ctx *ena_rx_ctx, uint16_t *next_to_clean) 1474 { 1475 struct mbuf *mbuf; 1476 struct ena_rx_buffer *rx_info; 1477 struct ena_adapter *adapter; 1478 unsigned int descs = ena_rx_ctx->descs; 1479 uint16_t ntc, len, req_id, buf = 0; 1480 1481 ntc = *next_to_clean; 1482 adapter = rx_ring->adapter; 1483 rx_info = &rx_ring->rx_buffer_info[ntc]; 1484 1485 if (unlikely(rx_info->mbuf == NULL)) { 1486 device_printf(adapter->pdev, "NULL mbuf in rx_info"); 1487 return (NULL); 1488 } 1489 1490 len = ena_bufs[buf].len; 1491 req_id = ena_bufs[buf].req_id; 1492 rx_info = &rx_ring->rx_buffer_info[req_id]; 1493 1494 ena_trace(ENA_DBG | ENA_RXPTH, "rx_info %p, mbuf %p, paddr %jx", 1495 rx_info, rx_info->mbuf, (uintmax_t)rx_info->ena_buf.paddr); 1496 1497 mbuf = rx_info->mbuf; 1498 mbuf->m_flags |= M_PKTHDR; 1499 mbuf->m_pkthdr.len = len; 1500 mbuf->m_len = len; 1501 mbuf->m_pkthdr.rcvif = rx_ring->que->adapter->ifp; 1502 1503 /* Fill mbuf with hash key and it's interpretation for optimization */ 1504 ena_rx_hash_mbuf(rx_ring, ena_rx_ctx, mbuf); 1505 1506 ena_trace(ENA_DBG | ENA_RXPTH, "rx mbuf 0x%p, flags=0x%x, len: %d", 1507 mbuf, mbuf->m_flags, mbuf->m_pkthdr.len); 1508 1509 /* DMA address is not needed anymore, unmap it */ 1510 bus_dmamap_unload(rx_ring->adapter->rx_buf_tag, rx_info->map); 1511 1512 rx_info->mbuf = NULL; 1513 rx_ring->free_rx_ids[ntc] = req_id; 1514 ntc = ENA_RX_RING_IDX_NEXT(ntc, rx_ring->ring_size); 1515 1516 /* 1517 * While we have more than 1 descriptors for one rcvd packet, append 1518 * other mbufs to the main one 1519 */ 1520 while (--descs) { 1521 ++buf; 1522 len = ena_bufs[buf].len; 1523 req_id = ena_bufs[buf].req_id; 1524 rx_info = &rx_ring->rx_buffer_info[req_id]; 1525 1526 if (unlikely(rx_info->mbuf == NULL)) { 1527 device_printf(adapter->pdev, "NULL mbuf in rx_info"); 1528 /* 1529 * If one of the required mbufs was not allocated yet, 1530 * we can break there. 1531 * All earlier used descriptors will be reallocated 1532 * later and not used mbufs can be reused. 1533 * The next_to_clean pointer will not be updated in case 1534 * of an error, so caller should advance it manually 1535 * in error handling routine to keep it up to date 1536 * with hw ring. 1537 */ 1538 m_freem(mbuf); 1539 return (NULL); 1540 } 1541 1542 if (m_append(mbuf, len, rx_info->mbuf->m_data) == 0) { 1543 counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1); 1544 ena_trace(ENA_WARNING, "Failed to append Rx mbuf %p", 1545 mbuf); 1546 } 1547 /* Free already appended mbuf, it won't be useful anymore */ 1548 bus_dmamap_unload(rx_ring->adapter->rx_buf_tag, rx_info->map); 1549 m_freem(rx_info->mbuf); 1550 rx_info->mbuf = NULL; 1551 1552 rx_ring->free_rx_ids[ntc] = req_id; 1553 ntc = ENA_RX_RING_IDX_NEXT(ntc, rx_ring->ring_size); 1554 } 1555 1556 *next_to_clean = ntc; 1557 1558 return (mbuf); 1559 } 1560 1561 /** 1562 * ena_rx_checksum - indicate in mbuf if hw indicated a good cksum 1563 **/ 1564 static inline void 1565 ena_rx_checksum(struct ena_ring *rx_ring, struct ena_com_rx_ctx *ena_rx_ctx, 1566 struct mbuf *mbuf) 1567 { 1568 1569 /* if IP and error */ 1570 if ((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) && 1571 (ena_rx_ctx->l3_csum_err)) { 1572 /* ipv4 checksum error */ 1573 mbuf->m_pkthdr.csum_flags = 0; 1574 counter_u64_add(rx_ring->rx_stats.bad_csum, 1); 1575 return; 1576 } 1577 1578 /* if TCP/UDP */ 1579 if ((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1580 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)) { 1581 if (ena_rx_ctx->l4_csum_err) { 1582 /* TCP/UDP checksum error */ 1583 mbuf->m_pkthdr.csum_flags = 0; 1584 counter_u64_add(rx_ring->rx_stats.bad_csum, 1); 1585 } else { 1586 mbuf->m_pkthdr.csum_flags = CSUM_IP_CHECKED; 1587 mbuf->m_pkthdr.csum_flags |= CSUM_IP_VALID; 1588 } 1589 } 1590 1591 return; 1592 } 1593 1594 static void 1595 ena_deferred_rx_cleanup(void *arg, int pending) 1596 { 1597 struct ena_ring *rx_ring = arg; 1598 int budget = CLEAN_BUDGET; 1599 1600 ENA_RING_MTX_LOCK(rx_ring); 1601 /* 1602 * If deferred task was executed, perform cleanup of all awaiting 1603 * descs (or until given budget is depleted to avoid infinite loop). 1604 */ 1605 while (budget--) { 1606 if (ena_rx_cleanup(rx_ring) == 0) 1607 break; 1608 } 1609 ENA_RING_MTX_UNLOCK(rx_ring); 1610 } 1611 1612 /** 1613 * ena_rx_cleanup - handle rx irq 1614 * @arg: ring for which irq is being handled 1615 **/ 1616 static int 1617 ena_rx_cleanup(struct ena_ring *rx_ring) 1618 { 1619 struct ena_adapter *adapter; 1620 struct mbuf *mbuf; 1621 struct ena_com_rx_ctx ena_rx_ctx; 1622 struct ena_com_io_cq* io_cq; 1623 struct ena_com_io_sq* io_sq; 1624 /* struct ena_eth_io_intr_reg intr_reg; */ 1625 if_t ifp; 1626 uint16_t ena_qid; 1627 uint16_t next_to_clean; 1628 uint32_t refill_required; 1629 uint32_t refill_threshold; 1630 uint32_t do_if_input = 0; 1631 unsigned int qid; 1632 int rc, i; 1633 int budget = RX_BUDGET; 1634 1635 adapter = rx_ring->que->adapter; 1636 ifp = adapter->ifp; 1637 qid = rx_ring->que->id; 1638 ena_qid = ENA_IO_RXQ_IDX(qid); 1639 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 1640 io_sq = &adapter->ena_dev->io_sq_queues[ena_qid]; 1641 next_to_clean = rx_ring->next_to_clean; 1642 1643 do { 1644 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs; 1645 ena_rx_ctx.max_bufs = adapter->max_rx_sgl_size; 1646 ena_rx_ctx.descs = 0; 1647 rc = ena_com_rx_pkt(io_cq, io_sq, &ena_rx_ctx); 1648 1649 if (unlikely(rc)) 1650 goto error; 1651 1652 if (unlikely(ena_rx_ctx.descs == 0)) 1653 break; 1654 1655 /* Receive mbuf from the ring */ 1656 mbuf = ena_rx_mbuf(rx_ring, rx_ring->ena_bufs, 1657 &ena_rx_ctx, &next_to_clean); 1658 1659 /* Exit if we failed to retrieve a buffer */ 1660 if (unlikely(!mbuf)) { 1661 for (i = 0; i < ena_rx_ctx.descs; ++i) { 1662 rx_ring->free_rx_ids[next_to_clean] = 1663 rx_ring->ena_bufs[i].req_id; 1664 next_to_clean = 1665 ENA_RX_RING_IDX_NEXT(next_to_clean, 1666 rx_ring->ring_size); 1667 1668 } 1669 break; 1670 } 1671 ena_trace(ENA_DBG | ENA_RXPTH, "Rx: %d bytes", 1672 mbuf->m_pkthdr.len); 1673 1674 if ((ifp->if_capenable & IFCAP_RXCSUM) || 1675 (ifp->if_capenable & IFCAP_RXCSUM_IPV6)) { 1676 ena_rx_checksum(rx_ring, &ena_rx_ctx, mbuf); 1677 } 1678 1679 counter_enter(); 1680 counter_u64_add_protected(rx_ring->rx_stats.bytes, 1681 mbuf->m_pkthdr.len); 1682 counter_u64_add_protected(adapter->hw_stats.rx_bytes, 1683 mbuf->m_pkthdr.len); 1684 counter_exit(); 1685 /* 1686 * LRO is only for IP/TCP packets and TCP checksum of the packet 1687 * should be computed by hardware. 1688 */ 1689 do_if_input = 1; 1690 if ((ifp->if_capenable & IFCAP_LRO) && 1691 (mbuf->m_pkthdr.csum_flags & CSUM_IP_VALID) && 1692 ena_rx_ctx.l4_proto == ENA_ETH_IO_L4_PROTO_TCP) { 1693 /* 1694 * Send to the stack if: 1695 * - LRO not enabled, or 1696 * - no LRO resources, or 1697 * - lro enqueue fails 1698 */ 1699 if (rx_ring->lro.lro_cnt != 0 && 1700 tcp_lro_rx(&rx_ring->lro, mbuf, 0) == 0) 1701 do_if_input = 0; 1702 } 1703 if (do_if_input) { 1704 ena_trace(ENA_DBG | ENA_RXPTH, "calling if_input() with mbuf %p", 1705 mbuf); 1706 (*ifp->if_input)(ifp, mbuf); 1707 } 1708 1709 counter_enter(); 1710 counter_u64_add_protected(rx_ring->rx_stats.cnt, 1); 1711 counter_u64_add_protected(adapter->hw_stats.rx_packets, 1); 1712 counter_exit(); 1713 } while (--budget); 1714 1715 rx_ring->next_to_clean = next_to_clean; 1716 1717 refill_required = ena_com_free_desc(io_sq); 1718 refill_threshold = rx_ring->ring_size / ENA_RX_REFILL_THRESH_DEVIDER; 1719 1720 if (refill_required > refill_threshold) { 1721 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq); 1722 ena_refill_rx_bufs(rx_ring, refill_required); 1723 } 1724 1725 tcp_lro_flush_all(&rx_ring->lro); 1726 1727 return (RX_BUDGET - budget); 1728 1729 error: 1730 counter_u64_add(rx_ring->rx_stats.bad_desc_num, 1); 1731 return (RX_BUDGET - budget); 1732 } 1733 1734 /********************************************************************* 1735 * 1736 * MSIX & Interrupt Service routine 1737 * 1738 **********************************************************************/ 1739 1740 /** 1741 * ena_handle_msix - MSIX Interrupt Handler for admin/async queue 1742 * @arg: interrupt number 1743 **/ 1744 static void 1745 ena_intr_msix_mgmnt(void *arg) 1746 { 1747 struct ena_adapter *adapter = (struct ena_adapter *)arg; 1748 1749 ena_com_admin_q_comp_intr_handler(adapter->ena_dev); 1750 if (likely(adapter->running)) 1751 ena_com_aenq_intr_handler(adapter->ena_dev, arg); 1752 } 1753 1754 /** 1755 * ena_handle_msix - MSIX Interrupt Handler for Tx/Rx 1756 * @arg: interrupt number 1757 **/ 1758 static void 1759 ena_handle_msix(void *arg) 1760 { 1761 struct ena_que *que = arg; 1762 struct ena_adapter *adapter = que->adapter; 1763 if_t ifp = adapter->ifp; 1764 struct ena_ring *tx_ring; 1765 struct ena_ring *rx_ring; 1766 struct ena_com_io_cq* io_cq; 1767 struct ena_eth_io_intr_reg intr_reg; 1768 int qid, ena_qid; 1769 int txc, rxc, i; 1770 1771 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1772 return; 1773 1774 ena_trace(ENA_DBG, "MSI-X TX/RX routine"); 1775 1776 tx_ring = que->tx_ring; 1777 rx_ring = que->rx_ring; 1778 qid = que->id; 1779 ena_qid = ENA_IO_TXQ_IDX(qid); 1780 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 1781 1782 for (i = 0; i < CLEAN_BUDGET; ++i) { 1783 /* 1784 * If lock cannot be acquired, then deferred cleanup task was 1785 * being executed and rx ring is being cleaned up in 1786 * another thread. 1787 */ 1788 if (ENA_RING_MTX_TRYLOCK(rx_ring)) { 1789 rxc = ena_rx_cleanup(rx_ring); 1790 ENA_RING_MTX_UNLOCK(rx_ring); 1791 } else { 1792 rxc = 0; 1793 } 1794 1795 /* Protection from calling ena_tx_cleanup from ena_start_xmit */ 1796 ENA_RING_MTX_LOCK(tx_ring); 1797 txc = ena_tx_cleanup(tx_ring); 1798 ENA_RING_MTX_UNLOCK(tx_ring); 1799 1800 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1801 return; 1802 1803 if (txc != TX_BUDGET && rxc != RX_BUDGET) 1804 break; 1805 } 1806 1807 /* Signal that work is done and unmask interrupt */ 1808 ena_com_update_intr_reg(&intr_reg, 1809 RX_IRQ_INTERVAL, 1810 TX_IRQ_INTERVAL, 1811 true); 1812 ena_com_unmask_intr(io_cq, &intr_reg); 1813 } 1814 1815 static int 1816 ena_enable_msix(struct ena_adapter *adapter) 1817 { 1818 device_t dev = adapter->pdev; 1819 int i, msix_vecs, rc = 0; 1820 1821 /* Reserved the max msix vectors we might need */ 1822 msix_vecs = ENA_MAX_MSIX_VEC(adapter->num_queues); 1823 1824 adapter->msix_entries = malloc(msix_vecs * sizeof(struct msix_entry), 1825 M_DEVBUF, M_WAITOK | M_ZERO); 1826 1827 device_printf(dev, "Allocated msix_entries, vectors (cnt: %d)\n", 1828 msix_vecs); 1829 1830 for (i = 0; i < msix_vecs; i++) { 1831 adapter->msix_entries[i].entry = i; 1832 /* Vectors must start from 1 */ 1833 adapter->msix_entries[i].vector = i + 1; 1834 } 1835 1836 rc = pci_alloc_msix(dev, &msix_vecs); 1837 if (rc != 0) { 1838 device_printf(dev, 1839 "Failed to enable MSIX, vectors %d rc %d\n", msix_vecs, rc); 1840 1841 rc = ENOSPC; 1842 goto err_msix_free; 1843 } 1844 1845 adapter->msix_vecs = msix_vecs; 1846 adapter->msix_enabled = true; 1847 1848 return (0); 1849 1850 err_msix_free: 1851 free(adapter->msix_entries, M_DEVBUF); 1852 adapter->msix_entries = NULL; 1853 1854 return (rc); 1855 } 1856 1857 static void 1858 ena_setup_mgmnt_intr(struct ena_adapter *adapter) 1859 { 1860 1861 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, 1862 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s", 1863 device_get_nameunit(adapter->pdev)); 1864 /* 1865 * Handler is NULL on purpose, it will be set 1866 * when mgmnt interrupt is acquired 1867 */ 1868 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = NULL; 1869 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter; 1870 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector = 1871 adapter->msix_entries[ENA_MGMNT_IRQ_IDX].vector; 1872 1873 return; 1874 } 1875 1876 static void 1877 ena_setup_io_intr(struct ena_adapter *adapter) 1878 { 1879 static int last_bind_cpu = -1; 1880 int irq_idx; 1881 ena_trace(ENA_DBG, "enter"); 1882 1883 for (int i = 0; i < adapter->num_queues; i++) { 1884 irq_idx = ENA_IO_IRQ_IDX(i); 1885 1886 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, 1887 "%s-TxRx-%d", device_get_nameunit(adapter->pdev), i); 1888 adapter->irq_tbl[irq_idx].handler = ena_handle_msix; 1889 adapter->irq_tbl[irq_idx].data = &adapter->que[i]; 1890 adapter->irq_tbl[irq_idx].vector = 1891 adapter->msix_entries[irq_idx].vector; 1892 ena_trace(ENA_INFO | ENA_IOQ, "ena_setup_io_intr vector: %d\n", 1893 adapter->msix_entries[irq_idx].vector); 1894 #ifdef RSS 1895 adapter->que[i].cpu = adapter->irq_tbl[irq_idx].cpu = 1896 rss_getcpu(i % rss_getnumbuckets()); 1897 #else 1898 /* 1899 * We still want to bind rings to the corresponding cpu 1900 * using something similar to the RSS round-robin technique. 1901 */ 1902 if (last_bind_cpu < 0) 1903 last_bind_cpu = CPU_FIRST(); 1904 adapter->que[i].cpu = adapter->irq_tbl[irq_idx].cpu = 1905 last_bind_cpu; 1906 last_bind_cpu = CPU_NEXT(last_bind_cpu); 1907 #endif 1908 } 1909 1910 return; 1911 } 1912 1913 static int 1914 ena_request_mgmnt_irq(struct ena_adapter *adapter) 1915 { 1916 struct ena_irq *irq; 1917 unsigned long flags; 1918 int rc, rcc; 1919 1920 flags = RF_ACTIVE | RF_SHAREABLE; 1921 1922 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 1923 irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ, 1924 &irq->vector, flags); 1925 1926 if (irq->res == NULL) { 1927 device_printf(adapter->pdev, "could not allocate " 1928 "irq vector: %d\n", irq->vector); 1929 return (ENXIO); 1930 } 1931 1932 if ((rc = bus_activate_resource(adapter->pdev, SYS_RES_IRQ, irq->vector, 1933 irq->res)) != 0) { 1934 device_printf(adapter->pdev, "could not activate " 1935 "irq vector: %d\n", irq->vector); 1936 goto err_res_free; 1937 } 1938 1939 if ((rc = bus_setup_intr(adapter->pdev, irq->res, 1940 INTR_TYPE_NET | INTR_MPSAFE, NULL, 1941 ena_intr_msix_mgmnt, irq->data, &irq->cookie)) != 0) { 1942 device_printf(adapter->pdev, "failed to register " 1943 "interrupt handler for irq %ju: %d\n", 1944 rman_get_start(irq->res), rc); 1945 goto err_res_free; 1946 } 1947 irq->requested = true; 1948 1949 return (rc); 1950 1951 err_res_free: 1952 device_printf(adapter->pdev, "releasing resource for irq %d\n", 1953 irq->vector); 1954 rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 1955 irq->vector, irq->res); 1956 if (rcc) 1957 device_printf(adapter->pdev, "dev has no parent while " 1958 "releasing res for irq: %d\n", irq->vector); 1959 irq->res = NULL; 1960 1961 return (rc); 1962 } 1963 1964 static int 1965 ena_request_io_irq(struct ena_adapter *adapter) 1966 { 1967 struct ena_irq *irq; 1968 unsigned long flags = 0; 1969 int rc = 0, i, rcc; 1970 1971 if (!adapter->msix_enabled) { 1972 device_printf(adapter->pdev, "failed to request irq\n"); 1973 return (EINVAL); 1974 } else { 1975 flags = RF_ACTIVE | RF_SHAREABLE; 1976 } 1977 1978 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) { 1979 irq = &adapter->irq_tbl[i]; 1980 1981 if (irq->requested) 1982 continue; 1983 1984 irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ, 1985 &irq->vector, flags); 1986 if (irq->res == NULL) { 1987 device_printf(adapter->pdev, "could not allocate " 1988 "irq vector: %d\n", irq->vector); 1989 goto err; 1990 } 1991 1992 if ((rc = bus_setup_intr(adapter->pdev, irq->res, 1993 INTR_TYPE_NET | INTR_MPSAFE, NULL, irq->handler, 1994 irq->data, &irq->cookie)) != 0) { 1995 device_printf(adapter->pdev, "failed to register " 1996 "interrupt handler for irq %ju: %d\n", 1997 rman_get_start(irq->res), rc); 1998 goto err; 1999 } 2000 irq->requested = true; 2001 2002 #ifdef RSS 2003 device_printf(adapter->pdev, "queue %d - RSS bucket %d\n", 2004 i - ENA_IO_IRQ_FIRST_IDX, irq->cpu); 2005 #else 2006 device_printf(adapter->pdev, "queue %d - cpu %d\n", 2007 i - ENA_IO_IRQ_FIRST_IDX, irq->cpu); 2008 #endif 2009 } 2010 2011 return (rc); 2012 2013 err: 2014 2015 for (; i >= ENA_IO_IRQ_FIRST_IDX; i--) { 2016 irq = &adapter->irq_tbl[i]; 2017 rcc = 0; 2018 2019 /* Once we entered err: section and irq->requested is true we 2020 free both intr and resources */ 2021 if (irq->requested == true) 2022 rcc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie); 2023 if (rcc) 2024 device_printf(adapter->pdev, "could not release" 2025 " irq: %d, error: %d\n", irq->vector, rcc); 2026 2027 /* If we entred err: section without irq->requested set we know 2028 it was bus_alloc_resource_any() that needs cleanup, provided 2029 res is not NULL. In case res is NULL no work in needed in 2030 this iteration */ 2031 rcc = 0; 2032 if (irq->res != NULL) { 2033 rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 2034 irq->vector, irq->res); 2035 } 2036 if (rcc) 2037 device_printf(adapter->pdev, "dev has no parent while " 2038 "releasing res for irq: %d\n", irq->vector); 2039 irq->requested = false; 2040 irq->res = NULL; 2041 } 2042 2043 return (rc); 2044 } 2045 2046 static void 2047 ena_free_mgmnt_irq(struct ena_adapter *adapter) 2048 { 2049 struct ena_irq *irq; 2050 int rc; 2051 2052 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2053 if (irq->requested) { 2054 ena_trace(ENA_INFO | ENA_ADMQ, "tear down irq: %d\n", 2055 irq->vector); 2056 rc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie); 2057 if (rc) 2058 device_printf(adapter->pdev, "failed to tear " 2059 "down irq: %d\n", irq->vector); 2060 irq->requested = 0; 2061 } 2062 2063 if (irq->res != NULL) { 2064 ena_trace(ENA_INFO | ENA_ADMQ, "release resource irq: %d\n", 2065 irq->vector); 2066 rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 2067 irq->vector, irq->res); 2068 irq->res = NULL; 2069 if (rc) 2070 device_printf(adapter->pdev, "dev has no parent while " 2071 "releasing res for irq: %d\n", irq->vector); 2072 } 2073 2074 return; 2075 } 2076 2077 static void 2078 ena_free_io_irq(struct ena_adapter *adapter) 2079 { 2080 struct ena_irq *irq; 2081 int rc; 2082 2083 for (int i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) { 2084 irq = &adapter->irq_tbl[i]; 2085 if (irq->requested) { 2086 ena_trace(ENA_INFO | ENA_IOQ, "tear down irq: %d\n", 2087 irq->vector); 2088 rc = bus_teardown_intr(adapter->pdev, irq->res, 2089 irq->cookie); 2090 if (rc) { 2091 device_printf(adapter->pdev, "failed to tear " 2092 "down irq: %d\n", irq->vector); 2093 } 2094 irq->requested = 0; 2095 } 2096 2097 if (irq->res != NULL) { 2098 ena_trace(ENA_INFO | ENA_IOQ, "release resource irq: %d\n", 2099 irq->vector); 2100 rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 2101 irq->vector, irq->res); 2102 irq->res = NULL; 2103 if (rc) { 2104 device_printf(adapter->pdev, "dev has no parent" 2105 " while releasing res for irq: %d\n", 2106 irq->vector); 2107 } 2108 } 2109 } 2110 2111 return; 2112 } 2113 2114 static void 2115 ena_free_irqs(struct ena_adapter* adapter) 2116 { 2117 2118 ena_free_io_irq(adapter); 2119 ena_free_mgmnt_irq(adapter); 2120 ena_disable_msix(adapter); 2121 } 2122 2123 static void 2124 ena_disable_msix(struct ena_adapter *adapter) 2125 { 2126 2127 pci_release_msi(adapter->pdev); 2128 2129 adapter->msix_vecs = 0; 2130 free(adapter->msix_entries, M_DEVBUF); 2131 adapter->msix_entries = NULL; 2132 } 2133 2134 static void 2135 ena_unmask_all_io_irqs(struct ena_adapter *adapter) 2136 { 2137 struct ena_com_io_cq* io_cq; 2138 struct ena_eth_io_intr_reg intr_reg; 2139 uint16_t ena_qid; 2140 int i; 2141 2142 /* Unmask interrupts for all queues */ 2143 for (i = 0; i < adapter->num_queues; i++) { 2144 ena_qid = ENA_IO_TXQ_IDX(i); 2145 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 2146 ena_com_update_intr_reg(&intr_reg, 0, 0, true); 2147 ena_com_unmask_intr(io_cq, &intr_reg); 2148 } 2149 } 2150 2151 /* Configure the Rx forwarding */ 2152 static int ena_rss_configure(struct ena_adapter *adapter) 2153 { 2154 struct ena_com_dev *ena_dev = adapter->ena_dev; 2155 int rc; 2156 2157 /* Set indirect table */ 2158 rc = ena_com_indirect_table_set(ena_dev); 2159 if (unlikely(rc && rc != EOPNOTSUPP)) 2160 return rc; 2161 2162 /* Configure hash function (if supported) */ 2163 rc = ena_com_set_hash_function(ena_dev); 2164 if (unlikely(rc && (rc != EOPNOTSUPP))) 2165 return rc; 2166 2167 /* Configure hash inputs (if supported) */ 2168 rc = ena_com_set_hash_ctrl(ena_dev); 2169 if (unlikely(rc && (rc != EOPNOTSUPP))) 2170 return rc; 2171 2172 return 0; 2173 } 2174 2175 static int 2176 ena_up_complete(struct ena_adapter *adapter) 2177 { 2178 int rc; 2179 2180 if (adapter->rss_support) { 2181 rc = ena_rss_configure(adapter); 2182 if (rc) 2183 return (rc); 2184 } 2185 2186 rc = ena_change_mtu(adapter->ifp, adapter->ifp->if_mtu); 2187 if (rc != 0) 2188 return (rc); 2189 2190 ena_refill_all_rx_bufs(adapter); 2191 ena_reset_counters((counter_u64_t *)&adapter->hw_stats, 2192 sizeof(adapter->hw_stats)); 2193 2194 return (0); 2195 } 2196 2197 static int 2198 ena_up(struct ena_adapter *adapter) 2199 { 2200 int rc = 0; 2201 2202 if (!device_is_attached(adapter->pdev)) { 2203 device_printf(adapter->pdev, "device is not attached!\n"); 2204 return (ENXIO); 2205 } 2206 2207 if (!adapter->running) { 2208 device_printf(adapter->pdev, "device is not running!\n"); 2209 return (ENXIO); 2210 } 2211 2212 if (!adapter->up) { 2213 device_printf(adapter->pdev, "device is going UP\n"); 2214 2215 /* setup interrupts for IO queues */ 2216 ena_setup_io_intr(adapter); 2217 rc = ena_request_io_irq(adapter); 2218 if (rc) { 2219 ena_trace(ENA_ALERT, "err_req_irq"); 2220 goto err_req_irq; 2221 } 2222 2223 /* allocate transmit descriptors */ 2224 rc = ena_setup_all_tx_resources(adapter); 2225 if (rc) { 2226 ena_trace(ENA_ALERT, "err_setup_tx"); 2227 goto err_setup_tx; 2228 } 2229 2230 /* allocate receive descriptors */ 2231 rc = ena_setup_all_rx_resources(adapter); 2232 if (rc) { 2233 ena_trace(ENA_ALERT, "err_setup_rx"); 2234 goto err_setup_rx; 2235 } 2236 2237 /* create IO queues for Rx & Tx */ 2238 rc = ena_create_io_queues(adapter); 2239 if (rc) { 2240 ena_trace(ENA_ALERT, 2241 "create IO queues failed"); 2242 goto err_io_que; 2243 } 2244 2245 if (adapter->link_status) 2246 if_link_state_change(adapter->ifp, LINK_STATE_UP); 2247 2248 rc = ena_up_complete(adapter); 2249 if (rc) 2250 goto err_up_complete; 2251 2252 counter_u64_add(adapter->dev_stats.interface_up, 1); 2253 2254 ena_update_hwassist(adapter); 2255 2256 if_setdrvflagbits(adapter->ifp, IFF_DRV_RUNNING, 2257 IFF_DRV_OACTIVE); 2258 2259 callout_reset_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 2260 ena_timer_service, (void *)adapter, 0); 2261 2262 adapter->up = true; 2263 2264 ena_unmask_all_io_irqs(adapter); 2265 } 2266 2267 return (0); 2268 2269 err_up_complete: 2270 ena_destroy_all_io_queues(adapter); 2271 err_io_que: 2272 ena_free_all_rx_resources(adapter); 2273 err_setup_rx: 2274 ena_free_all_tx_resources(adapter); 2275 err_setup_tx: 2276 ena_free_io_irq(adapter); 2277 err_req_irq: 2278 return (rc); 2279 } 2280 2281 static uint64_t 2282 ena_get_counter(if_t ifp, ift_counter cnt) 2283 { 2284 struct ena_adapter *adapter; 2285 struct ena_hw_stats *stats; 2286 2287 adapter = if_getsoftc(ifp); 2288 stats = &adapter->hw_stats; 2289 2290 switch (cnt) { 2291 case IFCOUNTER_IPACKETS: 2292 return (counter_u64_fetch(stats->rx_packets)); 2293 case IFCOUNTER_OPACKETS: 2294 return (counter_u64_fetch(stats->tx_packets)); 2295 case IFCOUNTER_IBYTES: 2296 return (counter_u64_fetch(stats->rx_bytes)); 2297 case IFCOUNTER_OBYTES: 2298 return (counter_u64_fetch(stats->tx_bytes)); 2299 case IFCOUNTER_IQDROPS: 2300 return (counter_u64_fetch(stats->rx_drops)); 2301 default: 2302 return (if_get_counter_default(ifp, cnt)); 2303 } 2304 } 2305 2306 static int 2307 ena_media_change(if_t ifp) 2308 { 2309 /* Media Change is not supported by firmware */ 2310 return (0); 2311 } 2312 2313 static void 2314 ena_media_status(if_t ifp, struct ifmediareq *ifmr) 2315 { 2316 struct ena_adapter *adapter = if_getsoftc(ifp); 2317 ena_trace(ENA_DBG, "enter"); 2318 2319 ENA_DEV_LOCK; 2320 2321 ifmr->ifm_status = IFM_AVALID; 2322 ifmr->ifm_active = IFM_ETHER; 2323 2324 if (!adapter->link_status) { 2325 ENA_DEV_UNLOCK; 2326 ena_trace(ENA_WARNING, "link_status = false"); 2327 return; 2328 } 2329 2330 ifmr->ifm_status |= IFM_ACTIVE; 2331 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 2332 2333 ENA_DEV_UNLOCK; 2334 2335 return; 2336 } 2337 2338 static void 2339 ena_init(void *arg) 2340 { 2341 struct ena_adapter *adapter = (struct ena_adapter *)arg; 2342 2343 if (adapter->up == false) { 2344 sx_xlock(&adapter->ioctl_sx); 2345 ena_up(adapter); 2346 sx_unlock(&adapter->ioctl_sx); 2347 } 2348 2349 return; 2350 } 2351 2352 static int 2353 ena_ioctl(if_t ifp, u_long command, caddr_t data) 2354 { 2355 struct ena_adapter *adapter; 2356 struct ifreq *ifr; 2357 int rc; 2358 2359 adapter = ifp->if_softc; 2360 ifr = (struct ifreq *)data; 2361 2362 /* 2363 * Acquiring lock to prevent from running up and down routines parallel. 2364 */ 2365 rc = 0; 2366 switch (command) { 2367 case SIOCSIFMTU: 2368 sx_xlock(&adapter->ioctl_sx); 2369 ena_down(adapter); 2370 2371 ena_change_mtu(ifp, ifr->ifr_mtu); 2372 2373 rc = ena_up(adapter); 2374 sx_unlock(&adapter->ioctl_sx); 2375 break; 2376 2377 case SIOCSIFFLAGS: 2378 if (ifp->if_flags & IFF_UP) { 2379 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2380 if (ifp->if_flags & (IFF_PROMISC | 2381 IFF_ALLMULTI)) { 2382 device_printf(adapter->pdev, 2383 "ioctl promisc/allmulti\n"); 2384 } 2385 } else { 2386 sx_xlock(&adapter->ioctl_sx); 2387 rc = ena_up(adapter); 2388 sx_unlock(&adapter->ioctl_sx); 2389 } 2390 } else { 2391 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 2392 sx_xlock(&adapter->ioctl_sx); 2393 ena_down(adapter); 2394 sx_unlock(&adapter->ioctl_sx); 2395 } 2396 } 2397 break; 2398 2399 case SIOCADDMULTI: 2400 case SIOCDELMULTI: 2401 break; 2402 2403 case SIOCSIFMEDIA: 2404 case SIOCGIFMEDIA: 2405 rc = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 2406 break; 2407 2408 case SIOCSIFCAP: 2409 { 2410 int reinit = 0; 2411 2412 if (ifr->ifr_reqcap != ifp->if_capenable) { 2413 ifp->if_capenable = ifr->ifr_reqcap; 2414 reinit = 1; 2415 } 2416 2417 if (reinit && (ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2418 sx_xlock(&adapter->ioctl_sx); 2419 ena_down(adapter); 2420 rc = ena_up(adapter); 2421 sx_unlock(&adapter->ioctl_sx); 2422 } 2423 } 2424 2425 break; 2426 default: 2427 rc = ether_ioctl(ifp, command, data); 2428 break; 2429 } 2430 2431 return (rc); 2432 } 2433 2434 static int 2435 ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *feat) 2436 { 2437 int caps = 0; 2438 2439 if (feat->offload.tx & 2440 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK | 2441 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK | 2442 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK)) 2443 caps |= IFCAP_TXCSUM; 2444 2445 if (feat->offload.tx & 2446 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_MASK | 2447 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)) 2448 caps |= IFCAP_TXCSUM_IPV6; 2449 2450 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) 2451 caps |= IFCAP_TSO4; 2452 2453 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) 2454 caps |= IFCAP_TSO6; 2455 2456 if (feat->offload.rx_supported & 2457 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK | 2458 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L3_CSUM_IPV4_MASK)) 2459 caps |= IFCAP_RXCSUM; 2460 2461 if (feat->offload.rx_supported & 2462 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) 2463 caps |= IFCAP_RXCSUM_IPV6; 2464 2465 caps |= IFCAP_LRO | IFCAP_JUMBO_MTU; 2466 2467 return (caps); 2468 } 2469 2470 static void 2471 ena_update_host_info(struct ena_admin_host_info *host_info, if_t ifp) 2472 { 2473 2474 host_info->supported_network_features[0] = 2475 (uint32_t)if_getcapabilities(ifp); 2476 } 2477 2478 static void 2479 ena_update_hwassist(struct ena_adapter *adapter) 2480 { 2481 if_t ifp = adapter->ifp; 2482 uint32_t feat = adapter->tx_offload_cap; 2483 int cap = if_getcapenable(ifp); 2484 int flags = 0; 2485 2486 if_clearhwassist(ifp); 2487 2488 if (cap & IFCAP_TXCSUM) { 2489 if (feat & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK) 2490 flags |= CSUM_IP; 2491 if (feat & 2492 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK | 2493 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)) 2494 flags |= CSUM_IP_UDP | CSUM_IP_TCP; 2495 } 2496 2497 if (cap & IFCAP_TXCSUM_IPV6) 2498 flags |= CSUM_IP6_UDP | CSUM_IP6_TCP; 2499 2500 if (cap & IFCAP_TSO4) 2501 flags |= CSUM_IP_TSO; 2502 2503 if (cap & IFCAP_TSO6) 2504 flags |= CSUM_IP6_TSO; 2505 2506 if_sethwassistbits(ifp, flags, 0); 2507 } 2508 2509 static int 2510 ena_setup_ifnet(device_t pdev, struct ena_adapter *adapter, 2511 struct ena_com_dev_get_features_ctx *feat) 2512 { 2513 if_t ifp; 2514 int caps = 0; 2515 2516 ena_trace(ENA_DBG, "enter"); 2517 2518 ifp = adapter->ifp = if_gethandle(IFT_ETHER); 2519 if (ifp == 0) { 2520 device_printf(pdev, "can not allocate ifnet structure\n"); 2521 return (ENXIO); 2522 } 2523 if_initname(ifp, device_get_name(pdev), device_get_unit(pdev)); 2524 if_setdev(ifp, pdev); 2525 if_setsoftc(ifp, adapter); 2526 2527 if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST); 2528 if_setinitfn(ifp, ena_init); 2529 if_settransmitfn(ifp, ena_mq_start); 2530 if_setqflushfn(ifp, ena_qflush); 2531 if_setioctlfn(ifp, ena_ioctl); 2532 if_setgetcounterfn(ifp, ena_get_counter); 2533 2534 if_setsendqlen(ifp, adapter->tx_ring_size); 2535 if_setsendqready(ifp); 2536 if_setmtu(ifp, ETHERMTU); 2537 if_setbaudrate(ifp, 0); 2538 /* Zeroize capabilities... */ 2539 if_setcapabilities(ifp, 0); 2540 if_setcapenable(ifp, 0); 2541 /* check hardware support */ 2542 caps = ena_get_dev_offloads(feat); 2543 /* ... and set them */ 2544 if_setcapabilitiesbit(ifp, caps, 0); 2545 2546 /* TSO parameters */ 2547 ifp->if_hw_tsomax = ENA_TSO_MAXSIZE - 2548 (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN); 2549 ifp->if_hw_tsomaxsegcount = adapter->max_tx_sgl_size - 1; 2550 ifp->if_hw_tsomaxsegsize = ENA_TSO_MAXSIZE; 2551 2552 if_setifheaderlen(ifp, sizeof(struct ether_vlan_header)); 2553 if_setcapenable(ifp, if_getcapabilities(ifp)); 2554 2555 /* 2556 * Specify the media types supported by this adapter and register 2557 * callbacks to update media and link information 2558 */ 2559 ifmedia_init(&adapter->media, IFM_IMASK, 2560 ena_media_change, ena_media_status); 2561 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 2562 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 2563 2564 ether_ifattach(ifp, adapter->mac_addr); 2565 2566 return (0); 2567 } 2568 2569 static void 2570 ena_down(struct ena_adapter *adapter) 2571 { 2572 int rc; 2573 2574 if (adapter->up) { 2575 device_printf(adapter->pdev, "device is going DOWN\n"); 2576 2577 callout_drain(&adapter->timer_service); 2578 2579 adapter->up = false; 2580 if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE, 2581 IFF_DRV_RUNNING); 2582 2583 ena_free_io_irq(adapter); 2584 2585 if (adapter->trigger_reset) { 2586 rc = ena_com_dev_reset(adapter->ena_dev, 2587 adapter->reset_reason); 2588 if (rc) 2589 device_printf(adapter->pdev, 2590 "Device reset failed\n"); 2591 } 2592 2593 ena_destroy_all_io_queues(adapter); 2594 2595 ena_free_all_tx_bufs(adapter); 2596 ena_free_all_rx_bufs(adapter); 2597 ena_free_all_tx_resources(adapter); 2598 ena_free_all_rx_resources(adapter); 2599 2600 counter_u64_add(adapter->dev_stats.interface_down, 1); 2601 } 2602 2603 return; 2604 } 2605 2606 static void 2607 ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct mbuf *mbuf) 2608 { 2609 struct ena_com_tx_meta *ena_meta; 2610 struct ether_vlan_header *eh; 2611 u32 mss; 2612 bool offload; 2613 uint16_t etype; 2614 int ehdrlen; 2615 struct ip *ip; 2616 int iphlen; 2617 struct tcphdr *th; 2618 2619 offload = false; 2620 ena_meta = &ena_tx_ctx->ena_meta; 2621 mss = mbuf->m_pkthdr.tso_segsz; 2622 2623 if (mss != 0) 2624 offload = true; 2625 2626 if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) != 0) 2627 offload = true; 2628 2629 if ((mbuf->m_pkthdr.csum_flags & CSUM_OFFLOAD) != 0) 2630 offload = true; 2631 2632 if (offload == false) { 2633 ena_tx_ctx->meta_valid = 0; 2634 return; 2635 } 2636 2637 /* Determine where frame payload starts. */ 2638 eh = mtod(mbuf, struct ether_vlan_header *); 2639 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) { 2640 etype = ntohs(eh->evl_proto); 2641 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN; 2642 } else { 2643 etype = ntohs(eh->evl_encap_proto); 2644 ehdrlen = ETHER_HDR_LEN; 2645 } 2646 2647 ip = (struct ip *)(mbuf->m_data + ehdrlen); 2648 iphlen = ip->ip_hl << 2; 2649 th = (struct tcphdr *)((caddr_t)ip + iphlen); 2650 2651 if ((mbuf->m_pkthdr.csum_flags & CSUM_IP) != 0) { 2652 ena_tx_ctx->l3_csum_enable = 1; 2653 } 2654 if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) != 0) { 2655 ena_tx_ctx->tso_enable = 1; 2656 ena_meta->l4_hdr_len = (th->th_off); 2657 } 2658 2659 switch (etype) { 2660 case ETHERTYPE_IP: 2661 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4; 2662 if (ip->ip_off == 0) 2663 ena_tx_ctx->df = 1; 2664 break; 2665 case ETHERTYPE_IPV6: 2666 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6; 2667 2668 default: 2669 break; 2670 } 2671 2672 if (ip->ip_p == IPPROTO_TCP) { 2673 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP; 2674 if (mbuf->m_pkthdr.csum_flags & (CSUM_IP_TCP | CSUM_IP6_TCP)) 2675 ena_tx_ctx->l4_csum_enable = 1; 2676 else 2677 ena_tx_ctx->l4_csum_enable = 0; 2678 } else if (ip->ip_p == IPPROTO_UDP) { 2679 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP; 2680 if (mbuf->m_pkthdr.csum_flags & (CSUM_IP_UDP | CSUM_IP6_UDP)) 2681 ena_tx_ctx->l4_csum_enable = 1; 2682 else 2683 ena_tx_ctx->l4_csum_enable = 0; 2684 } else { 2685 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UNKNOWN; 2686 ena_tx_ctx->l4_csum_enable = 0; 2687 } 2688 2689 ena_meta->mss = mss; 2690 ena_meta->l3_hdr_len = iphlen; 2691 ena_meta->l3_hdr_offset = ehdrlen; 2692 ena_tx_ctx->meta_valid = 1; 2693 } 2694 2695 static int 2696 ena_check_and_collapse_mbuf(struct ena_ring *tx_ring, struct mbuf **mbuf) 2697 { 2698 struct ena_adapter *adapter; 2699 struct mbuf *collapsed_mbuf; 2700 int num_frags; 2701 2702 adapter = tx_ring->adapter; 2703 num_frags = ena_mbuf_count(*mbuf); 2704 2705 /* One segment must be reserved for configuration descriptor. */ 2706 if (num_frags < adapter->max_tx_sgl_size) 2707 return (0); 2708 counter_u64_add(tx_ring->tx_stats.collapse, 1); 2709 2710 collapsed_mbuf = m_collapse(*mbuf, M_NOWAIT, 2711 adapter->max_tx_sgl_size - 1); 2712 if (collapsed_mbuf == NULL) { 2713 counter_u64_add(tx_ring->tx_stats.collapse_err, 1); 2714 return (ENOMEM); 2715 } 2716 2717 /* If mbuf was collapsed succesfully, original mbuf is released. */ 2718 *mbuf = collapsed_mbuf; 2719 2720 return (0); 2721 } 2722 2723 static int 2724 ena_xmit_mbuf(struct ena_ring *tx_ring, struct mbuf **mbuf) 2725 { 2726 struct ena_adapter *adapter; 2727 struct ena_tx_buffer *tx_info; 2728 struct ena_com_tx_ctx ena_tx_ctx; 2729 struct ena_com_dev *ena_dev; 2730 struct ena_com_buf *ena_buf; 2731 struct ena_com_io_sq* io_sq; 2732 bus_dma_segment_t segs[ENA_BUS_DMA_SEGS]; 2733 void *push_hdr; 2734 uint16_t next_to_use; 2735 uint16_t req_id; 2736 uint16_t push_len; 2737 uint16_t ena_qid; 2738 uint32_t len, nsegs, header_len; 2739 int i, rc; 2740 int nb_hw_desc; 2741 2742 ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id); 2743 adapter = tx_ring->que->adapter; 2744 ena_dev = adapter->ena_dev; 2745 io_sq = &adapter->ena_dev->io_sq_queues[ena_qid]; 2746 2747 ENA_ASSERT(*mbuf, "mbuf is NULL\n"); 2748 2749 rc = ena_check_and_collapse_mbuf(tx_ring, mbuf); 2750 if (rc) { 2751 ena_trace(ENA_WARNING, 2752 "Failed to collapse mbuf! err: %d", rc); 2753 return (rc); 2754 } 2755 2756 next_to_use = tx_ring->next_to_use; 2757 req_id = tx_ring->free_tx_ids[next_to_use]; 2758 tx_info = &tx_ring->tx_buffer_info[req_id]; 2759 2760 tx_info->mbuf = *mbuf; 2761 tx_info->num_of_bufs = 0; 2762 2763 ena_buf = tx_info->bufs; 2764 len = (*mbuf)->m_len; 2765 2766 ena_trace(ENA_DBG | ENA_TXPTH, "Tx: %d bytes", (*mbuf)->m_pkthdr.len); 2767 2768 push_len = 0; 2769 header_len = min_t(uint32_t, len, tx_ring->tx_max_header_size); 2770 push_hdr = NULL; 2771 2772 rc = bus_dmamap_load_mbuf_sg(adapter->tx_buf_tag, tx_info->map, 2773 *mbuf, segs, &nsegs, BUS_DMA_NOWAIT); 2774 2775 if (rc || (nsegs == 0)) { 2776 ena_trace(ENA_WARNING, 2777 "dmamap load failed! err: %d nsegs: %d", rc, nsegs); 2778 counter_u64_add(tx_ring->tx_stats.dma_mapping_err, 1); 2779 tx_info->mbuf = NULL; 2780 if (rc == ENOMEM) 2781 return (ENA_COM_NO_MEM); 2782 else 2783 return (ENA_COM_INVAL); 2784 } 2785 2786 for (i = 0; i < nsegs; i++) { 2787 ena_buf->len = segs[i].ds_len; 2788 ena_buf->paddr = segs[i].ds_addr; 2789 ena_buf++; 2790 } 2791 tx_info->num_of_bufs = nsegs; 2792 2793 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx)); 2794 ena_tx_ctx.ena_bufs = tx_info->bufs; 2795 ena_tx_ctx.push_header = push_hdr; 2796 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 2797 ena_tx_ctx.req_id = req_id; 2798 ena_tx_ctx.header_len = header_len; 2799 2800 /* Set flags and meta data */ 2801 ena_tx_csum(&ena_tx_ctx, *mbuf); 2802 /* Prepare the packet's descriptors and send them to device */ 2803 rc = ena_com_prepare_tx(io_sq, &ena_tx_ctx, &nb_hw_desc); 2804 if (rc != 0) { 2805 ena_trace(ENA_WARNING, "failed to prepare tx bufs\n"); 2806 counter_enter(); 2807 counter_u64_add_protected(tx_ring->tx_stats.queue_stop, 1); 2808 counter_u64_add_protected(tx_ring->tx_stats.prepare_ctx_err, 1); 2809 counter_exit(); 2810 goto dma_error; 2811 } 2812 2813 counter_enter(); 2814 counter_u64_add_protected(tx_ring->tx_stats.cnt, 1); 2815 counter_u64_add_protected(tx_ring->tx_stats.bytes, (*mbuf)->m_pkthdr.len); 2816 2817 counter_u64_add_protected(adapter->hw_stats.tx_packets, 1); 2818 counter_u64_add_protected(adapter->hw_stats.tx_bytes, 2819 (*mbuf)->m_pkthdr.len); 2820 counter_exit(); 2821 2822 tx_info->tx_descs = nb_hw_desc; 2823 getbinuptime(&tx_info->timestamp); 2824 tx_info->print_once = true; 2825 2826 tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use, 2827 tx_ring->ring_size); 2828 2829 bus_dmamap_sync(adapter->tx_buf_tag, tx_info->map, BUS_DMASYNC_PREWRITE); 2830 2831 return (0); 2832 2833 dma_error: 2834 tx_info->mbuf = NULL; 2835 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map); 2836 2837 return (rc); 2838 } 2839 2840 static void 2841 ena_start_xmit(struct ena_ring *tx_ring) 2842 { 2843 struct mbuf *mbuf; 2844 struct ena_adapter *adapter = tx_ring->adapter; 2845 struct ena_com_io_sq* io_sq; 2846 int ena_qid; 2847 int acum_pkts = 0; 2848 int ret = 0; 2849 2850 if ((adapter->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 2851 return; 2852 2853 if (!adapter->link_status) 2854 return; 2855 2856 ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id); 2857 io_sq = &adapter->ena_dev->io_sq_queues[ena_qid]; 2858 2859 while ((mbuf = drbr_peek(adapter->ifp, tx_ring->br)) != NULL) { 2860 ena_trace(ENA_DBG | ENA_TXPTH, "\ndequeued mbuf %p with flags %#x and" 2861 " header csum flags %#jx", 2862 mbuf, mbuf->m_flags, mbuf->m_pkthdr.csum_flags); 2863 2864 if (!ena_com_sq_have_enough_space(io_sq, 2865 ENA_TX_CLEANUP_THRESHOLD)) 2866 ena_tx_cleanup(tx_ring); 2867 2868 if ((ret = ena_xmit_mbuf(tx_ring, &mbuf)) != 0) { 2869 if (ret == ENA_COM_NO_MEM) { 2870 drbr_putback(adapter->ifp, tx_ring->br, mbuf); 2871 } else if (ret == ENA_COM_NO_SPACE) { 2872 drbr_putback(adapter->ifp, tx_ring->br, mbuf); 2873 } else { 2874 m_freem(mbuf); 2875 drbr_advance(adapter->ifp, tx_ring->br); 2876 } 2877 2878 break; 2879 } 2880 2881 drbr_advance(adapter->ifp, tx_ring->br); 2882 2883 if ((adapter->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 2884 return; 2885 2886 acum_pkts++; 2887 2888 BPF_MTAP(adapter->ifp, mbuf); 2889 2890 if (acum_pkts == DB_THRESHOLD) { 2891 acum_pkts = 0; 2892 wmb(); 2893 /* Trigger the dma engine */ 2894 ena_com_write_sq_doorbell(io_sq); 2895 counter_u64_add(tx_ring->tx_stats.doorbells, 1); 2896 } 2897 2898 } 2899 2900 if (acum_pkts) { 2901 wmb(); 2902 /* Trigger the dma engine */ 2903 ena_com_write_sq_doorbell(io_sq); 2904 counter_u64_add(tx_ring->tx_stats.doorbells, 1); 2905 } 2906 2907 if (!ena_com_sq_have_enough_space(io_sq, 2908 ENA_TX_CLEANUP_THRESHOLD)) 2909 ena_tx_cleanup(tx_ring); 2910 } 2911 2912 static void 2913 ena_deferred_mq_start(void *arg, int pending) 2914 { 2915 struct ena_ring *tx_ring = (struct ena_ring *)arg; 2916 struct ifnet *ifp = tx_ring->adapter->ifp; 2917 2918 while (drbr_empty(ifp, tx_ring->br) == FALSE && 2919 (ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) { 2920 ENA_RING_MTX_LOCK(tx_ring); 2921 ena_start_xmit(tx_ring); 2922 ENA_RING_MTX_UNLOCK(tx_ring); 2923 } 2924 } 2925 2926 static int 2927 ena_mq_start(if_t ifp, struct mbuf *m) 2928 { 2929 struct ena_adapter *adapter = ifp->if_softc; 2930 struct ena_ring *tx_ring; 2931 int ret, is_drbr_empty; 2932 uint32_t i; 2933 2934 if ((adapter->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 2935 return (ENODEV); 2936 2937 /* Which queue to use */ 2938 /* 2939 * If everything is setup correctly, it should be the 2940 * same bucket that the current CPU we're on is. 2941 * It should improve performance. 2942 */ 2943 if (M_HASHTYPE_GET(m) != M_HASHTYPE_NONE) { 2944 #ifdef RSS 2945 if (rss_hash2bucket(m->m_pkthdr.flowid, 2946 M_HASHTYPE_GET(m), &i) == 0) { 2947 i = i % adapter->num_queues; 2948 2949 } else 2950 #endif 2951 { 2952 i = m->m_pkthdr.flowid % adapter->num_queues; 2953 } 2954 } else { 2955 i = curcpu % adapter->num_queues; 2956 } 2957 tx_ring = &adapter->tx_ring[i]; 2958 2959 /* Check if drbr is empty before putting packet */ 2960 is_drbr_empty = drbr_empty(ifp, tx_ring->br); 2961 ret = drbr_enqueue(ifp, tx_ring->br, m); 2962 if (ret) { 2963 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 2964 return (ret); 2965 } 2966 2967 if (is_drbr_empty && ENA_RING_MTX_TRYLOCK(tx_ring)) { 2968 ena_start_xmit(tx_ring); 2969 ENA_RING_MTX_UNLOCK(tx_ring); 2970 } else { 2971 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 2972 } 2973 2974 return (0); 2975 } 2976 2977 static void 2978 ena_qflush(if_t ifp) 2979 { 2980 struct ena_adapter *adapter = ifp->if_softc; 2981 struct ena_ring *tx_ring = adapter->tx_ring; 2982 int i; 2983 2984 for(i = 0; i < adapter->num_queues; ++i, ++tx_ring) 2985 if (drbr_empty(ifp, tx_ring->br) == FALSE) { 2986 ENA_RING_MTX_LOCK(tx_ring); 2987 drbr_flush(ifp, tx_ring->br); 2988 ENA_RING_MTX_UNLOCK(tx_ring); 2989 } 2990 2991 if_qflush(ifp); 2992 2993 return; 2994 } 2995 2996 static int ena_calc_io_queue_num(struct ena_adapter *adapter, 2997 struct ena_com_dev_get_features_ctx *get_feat_ctx) 2998 { 2999 int io_sq_num, io_cq_num, io_queue_num; 3000 3001 io_sq_num = get_feat_ctx->max_queues.max_sq_num; 3002 io_cq_num = get_feat_ctx->max_queues.max_sq_num; 3003 3004 io_queue_num = min_t(int, mp_ncpus, ENA_MAX_NUM_IO_QUEUES); 3005 io_queue_num = min_t(int, io_queue_num, io_sq_num); 3006 io_queue_num = min_t(int, io_queue_num, io_cq_num); 3007 /* 1 IRQ for for mgmnt and 1 IRQ for each TX/RX pair */ 3008 io_queue_num = min_t(int, io_queue_num, 3009 pci_msix_count(adapter->pdev) - 1); 3010 #ifdef RSS 3011 io_queue_num = min_t(int, io_queue_num, rss_getnumbuckets()); 3012 #endif 3013 3014 return io_queue_num; 3015 } 3016 3017 static int ena_calc_queue_size(struct ena_adapter *adapter, 3018 uint16_t *max_tx_sgl_size, uint16_t *max_rx_sgl_size, 3019 struct ena_com_dev_get_features_ctx *feat) 3020 { 3021 uint32_t queue_size = ENA_DEFAULT_RING_SIZE; 3022 uint32_t v; 3023 uint32_t q; 3024 3025 queue_size = min_t(uint32_t, queue_size, 3026 feat->max_queues.max_cq_depth); 3027 queue_size = min_t(uint32_t, queue_size, 3028 feat->max_queues.max_sq_depth); 3029 3030 /* round down to the nearest power of 2 */ 3031 v = queue_size; 3032 while (v != 0) { 3033 if (powerof2(queue_size)) 3034 break; 3035 v /= 2; 3036 q = rounddown2(queue_size, v); 3037 if (q != 0) { 3038 queue_size = q; 3039 break; 3040 } 3041 } 3042 3043 if (unlikely(!queue_size)) { 3044 device_printf(adapter->pdev, "Invalid queue size\n"); 3045 return ENA_COM_FAULT; 3046 } 3047 3048 *max_tx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS, 3049 feat->max_queues.max_packet_tx_descs); 3050 *max_rx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS, 3051 feat->max_queues.max_packet_rx_descs); 3052 3053 return queue_size; 3054 } 3055 3056 static int ena_rss_init_default(struct ena_adapter *adapter) 3057 { 3058 struct ena_com_dev *ena_dev = adapter->ena_dev; 3059 device_t dev = adapter->pdev; 3060 int qid, rc, i; 3061 3062 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE); 3063 if (unlikely(rc)) { 3064 device_printf(dev, "Cannot init RSS\n"); 3065 return (rc); 3066 } 3067 3068 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { 3069 #ifdef RSS 3070 qid = rss_get_indirection_to_bucket(i); 3071 qid = qid % adapter->num_queues; 3072 #else 3073 qid = i % adapter->num_queues; 3074 #endif 3075 rc = ena_com_indirect_table_fill_entry(ena_dev, i, 3076 ENA_IO_RXQ_IDX(qid)); 3077 if (unlikely(rc && (rc != EOPNOTSUPP))) { 3078 device_printf(dev, "Cannot fill indirect table\n"); 3079 goto err_rss_destroy; 3080 } 3081 } 3082 3083 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL, 3084 ENA_HASH_KEY_SIZE, 0xFFFFFFFF); 3085 if (unlikely(rc && (rc != EOPNOTSUPP))) { 3086 device_printf(dev, "Cannot fill hash function\n"); 3087 goto err_rss_destroy; 3088 } 3089 3090 rc = ena_com_set_default_hash_ctrl(ena_dev); 3091 if (unlikely(rc && (rc != EOPNOTSUPP))) { 3092 device_printf(dev, "Cannot fill hash control\n"); 3093 goto err_rss_destroy; 3094 } 3095 3096 return (0); 3097 3098 err_rss_destroy: 3099 ena_com_rss_destroy(ena_dev); 3100 return (rc); 3101 } 3102 3103 static void 3104 ena_rss_init_default_deferred(void *arg) 3105 { 3106 struct ena_adapter *adapter; 3107 devclass_t dc; 3108 int max; 3109 int rc; 3110 3111 dc = devclass_find("ena"); 3112 if (dc == NULL) { 3113 ena_trace(ENA_DBG, "No devclass ena\n"); 3114 return; 3115 } 3116 3117 max = devclass_get_maxunit(dc); 3118 while (max-- >= 0) { 3119 adapter = devclass_get_softc(dc, max); 3120 if (adapter != NULL) { 3121 rc = ena_rss_init_default(adapter); 3122 adapter->rss_support = true; 3123 if (rc) { 3124 device_printf(adapter->pdev, 3125 "WARNING: RSS was not properly initialized," 3126 " it will affect bandwith\n"); 3127 adapter->rss_support = false; 3128 } 3129 } 3130 } 3131 } 3132 SYSINIT(ena_rss_init, SI_SUB_KICK_SCHEDULER, SI_ORDER_SECOND, ena_rss_init_default_deferred, NULL); 3133 3134 static void ena_config_host_info(struct ena_com_dev *ena_dev) 3135 { 3136 struct ena_admin_host_info *host_info; 3137 int rc; 3138 3139 /* Allocate only the host info */ 3140 rc = ena_com_allocate_host_info(ena_dev); 3141 if (rc) { 3142 ena_trace(ENA_ALERT, "Cannot allocate host info\n"); 3143 return; 3144 } 3145 3146 host_info = ena_dev->host_attr.host_info; 3147 3148 host_info->os_type = ENA_ADMIN_OS_FREEBSD; 3149 host_info->kernel_ver = osreldate; 3150 3151 sprintf(host_info->kernel_ver_str, "%d", osreldate); 3152 host_info->os_dist = 0; 3153 strncpy(host_info->os_dist_str, osrelease, 3154 sizeof(host_info->os_dist_str) - 1); 3155 3156 host_info->driver_version = 3157 (DRV_MODULE_VER_MAJOR) | 3158 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) | 3159 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT); 3160 3161 rc = ena_com_set_host_attributes(ena_dev); 3162 if (rc) { 3163 if (rc == EOPNOTSUPP) 3164 ena_trace(ENA_WARNING, "Cannot set host attributes\n"); 3165 else 3166 ena_trace(ENA_ALERT, "Cannot set host attributes\n"); 3167 3168 goto err; 3169 } 3170 3171 return; 3172 3173 err: 3174 ena_com_delete_host_info(ena_dev); 3175 } 3176 3177 static int 3178 ena_device_init(struct ena_adapter *adapter, device_t pdev, 3179 struct ena_com_dev_get_features_ctx *get_feat_ctx, int *wd_active) 3180 { 3181 struct ena_com_dev* ena_dev = adapter->ena_dev; 3182 bool readless_supported; 3183 uint32_t aenq_groups; 3184 int dma_width; 3185 int rc; 3186 3187 rc = ena_com_mmio_reg_read_request_init(ena_dev); 3188 if (rc) { 3189 device_printf(pdev, "failed to init mmio read less\n"); 3190 return rc; 3191 } 3192 3193 /* 3194 * The PCIe configuration space revision id indicate if mmio reg 3195 * read is disabled 3196 */ 3197 readless_supported = !(pci_get_revid(pdev) & ENA_MMIO_DISABLE_REG_READ); 3198 ena_com_set_mmio_read_mode(ena_dev, readless_supported); 3199 3200 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL); 3201 if (rc) { 3202 device_printf(pdev, "Can not reset device\n"); 3203 goto err_mmio_read_less; 3204 } 3205 3206 rc = ena_com_validate_version(ena_dev); 3207 if (rc) { 3208 device_printf(pdev, "device version is too low\n"); 3209 goto err_mmio_read_less; 3210 } 3211 3212 dma_width = ena_com_get_dma_width(ena_dev); 3213 if (dma_width < 0) { 3214 device_printf(pdev, "Invalid dma width value %d", dma_width); 3215 rc = dma_width; 3216 goto err_mmio_read_less; 3217 } 3218 adapter->dma_width = dma_width; 3219 3220 /* ENA admin level init */ 3221 rc = ena_com_admin_init(ena_dev, &aenq_handlers, true); 3222 if (rc) { 3223 device_printf(pdev, 3224 "Can not initialize ena admin queue with device\n"); 3225 goto err_mmio_read_less; 3226 } 3227 3228 /* 3229 * To enable the msix interrupts the driver needs to know the number 3230 * of queues. So the driver uses polling mode to retrieve this 3231 * information 3232 */ 3233 ena_com_set_admin_polling_mode(ena_dev, true); 3234 3235 ena_config_host_info(ena_dev); 3236 3237 /* Get Device Attributes */ 3238 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx); 3239 if (rc) { 3240 device_printf(pdev, 3241 "Cannot get attribute for ena device rc: %d\n", rc); 3242 goto err_admin_init; 3243 } 3244 3245 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | 3246 BIT(ENA_ADMIN_FATAL_ERROR) | 3247 BIT(ENA_ADMIN_WARNING) | 3248 BIT(ENA_ADMIN_NOTIFICATION) | 3249 BIT(ENA_ADMIN_KEEP_ALIVE); 3250 3251 aenq_groups &= get_feat_ctx->aenq.supported_groups; 3252 rc = ena_com_set_aenq_config(ena_dev, aenq_groups); 3253 if (rc) { 3254 device_printf(pdev, "Cannot configure aenq groups rc: %d\n", rc); 3255 goto err_admin_init; 3256 } 3257 3258 *wd_active = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)); 3259 3260 return 0; 3261 3262 err_admin_init: 3263 ena_com_delete_host_info(ena_dev); 3264 ena_com_admin_destroy(ena_dev); 3265 err_mmio_read_less: 3266 ena_com_mmio_reg_read_request_destroy(ena_dev); 3267 3268 return rc; 3269 } 3270 3271 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter, 3272 int io_vectors) 3273 { 3274 struct ena_com_dev *ena_dev = adapter->ena_dev; 3275 int rc; 3276 3277 rc = ena_enable_msix(adapter); 3278 if (rc) { 3279 device_printf(adapter->pdev, "Error with MSI-X enablement\n"); 3280 return rc; 3281 } 3282 3283 ena_setup_mgmnt_intr(adapter); 3284 3285 rc = ena_request_mgmnt_irq(adapter); 3286 if (rc) { 3287 device_printf(adapter->pdev, "Cannot setup mgmnt queue intr\n"); 3288 goto err_disable_msix; 3289 } 3290 3291 ena_com_set_admin_polling_mode(ena_dev, false); 3292 3293 ena_com_admin_aenq_enable(ena_dev); 3294 3295 return 0; 3296 3297 err_disable_msix: 3298 ena_disable_msix(adapter); 3299 3300 return rc; 3301 } 3302 3303 /* Function called on ENA_ADMIN_KEEP_ALIVE event */ 3304 static void ena_keep_alive_wd(void *adapter_data, 3305 struct ena_admin_aenq_entry *aenq_e) 3306 { 3307 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3308 struct ena_admin_aenq_keep_alive_desc *desc; 3309 sbintime_t stime; 3310 uint64_t rx_drops; 3311 3312 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e; 3313 3314 rx_drops = ((uint64_t)desc->rx_drops_high << 32) | desc->rx_drops_low; 3315 counter_u64_zero(adapter->hw_stats.rx_drops); 3316 counter_u64_add(adapter->hw_stats.rx_drops, rx_drops); 3317 3318 stime = getsbinuptime(); 3319 atomic_store_rel_64(&adapter->keep_alive_timestamp, stime); 3320 } 3321 3322 /* Check for keep alive expiration */ 3323 static void check_for_missing_keep_alive(struct ena_adapter *adapter) 3324 { 3325 sbintime_t timestamp, time; 3326 3327 if (adapter->wd_active == 0) 3328 return; 3329 3330 if (adapter->keep_alive_timeout == 0) 3331 return; 3332 3333 timestamp = atomic_load_acq_64(&adapter->keep_alive_timestamp); 3334 time = getsbinuptime() - timestamp; 3335 if (unlikely(time > adapter->keep_alive_timeout)) { 3336 device_printf(adapter->pdev, 3337 "Keep alive watchdog timeout.\n"); 3338 counter_u64_add(adapter->dev_stats.wd_expired, 1); 3339 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO; 3340 adapter->trigger_reset = true; 3341 } 3342 } 3343 3344 /* Check if admin queue is enabled */ 3345 static void check_for_admin_com_state(struct ena_adapter *adapter) 3346 { 3347 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) { 3348 device_printf(adapter->pdev, 3349 "ENA admin queue is not in running state!\n"); 3350 counter_u64_add(adapter->dev_stats.admin_q_pause, 1); 3351 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO; 3352 adapter->trigger_reset = true; 3353 } 3354 } 3355 3356 static int 3357 check_missing_comp_in_queue(struct ena_adapter *adapter, 3358 struct ena_ring *tx_ring) 3359 { 3360 struct bintime curtime, time; 3361 struct ena_tx_buffer *tx_buf; 3362 uint32_t missed_tx = 0; 3363 int i; 3364 3365 getbinuptime(&curtime); 3366 3367 for (i = 0; i < tx_ring->ring_size; i++) { 3368 tx_buf = &tx_ring->tx_buffer_info[i]; 3369 3370 if (!bintime_isset(&tx_buf->timestamp)) 3371 continue; 3372 3373 time = curtime; 3374 bintime_sub(&time, &tx_buf->timestamp); 3375 3376 /* Check again if packet is still waiting */ 3377 if (unlikely(bttosbt(time) > adapter->missing_tx_timeout)) { 3378 3379 if (!tx_buf->print_once) 3380 ena_trace(ENA_WARNING, "Found a Tx that wasn't " 3381 "completed on time, qid %d, index %d.\n", 3382 tx_ring->qid, i); 3383 3384 tx_buf->print_once = true; 3385 missed_tx++; 3386 3387 if (unlikely(missed_tx > 3388 adapter->missing_tx_threshold)) { 3389 device_printf(adapter->pdev, 3390 "The number of lost tx completion " 3391 "is above the threshold (%d > %d). " 3392 "Reset the device\n", 3393 missed_tx, 3394 adapter->missing_tx_threshold); 3395 adapter->reset_reason = 3396 ENA_REGS_RESET_MISS_TX_CMPL; 3397 adapter->trigger_reset = true; 3398 return (EIO); 3399 } 3400 } 3401 } 3402 3403 return (0); 3404 } 3405 3406 /* 3407 * Check for TX which were not completed on time. 3408 * Timeout is defined by "missing_tx_timeout". 3409 * Reset will be performed if number of incompleted 3410 * transactions exceeds "missing_tx_threshold". 3411 */ 3412 static void check_for_missing_tx_completions(struct ena_adapter *adapter) 3413 { 3414 struct ena_ring *tx_ring; 3415 int i, budget, rc; 3416 3417 /* Make sure the driver doesn't turn the device in other process */ 3418 rmb(); 3419 3420 if (!adapter->up) 3421 return; 3422 3423 if (adapter->trigger_reset) 3424 return; 3425 3426 if (adapter->missing_tx_timeout == 0) 3427 return; 3428 3429 budget = adapter->missing_tx_max_queues; 3430 3431 for (i = adapter->next_monitored_tx_qid; i < adapter->num_queues; i++) { 3432 tx_ring = &adapter->tx_ring[i]; 3433 3434 rc = check_missing_comp_in_queue(adapter, tx_ring); 3435 if (unlikely(rc)) 3436 return; 3437 3438 budget--; 3439 if (budget == 0) { 3440 i++; 3441 break; 3442 } 3443 } 3444 3445 adapter->next_monitored_tx_qid = i % adapter->num_queues; 3446 } 3447 3448 /* trigger deferred rx cleanup after 2 consecutive detections */ 3449 #define EMPTY_RX_REFILL 2 3450 /* For the rare case where the device runs out of Rx descriptors and the 3451 * msix handler failed to refill new Rx descriptors (due to a lack of memory 3452 * for example). 3453 * This case will lead to a deadlock: 3454 * The device won't send interrupts since all the new Rx packets will be dropped 3455 * The msix handler won't allocate new Rx descriptors so the device won't be 3456 * able to send new packets. 3457 * 3458 * When such a situation is detected - execute rx cleanup task in another thread 3459 */ 3460 static void 3461 check_for_empty_rx_ring(struct ena_adapter *adapter) 3462 { 3463 struct ena_ring *rx_ring; 3464 int i, refill_required; 3465 3466 if (!adapter->up) 3467 return; 3468 3469 if (adapter->trigger_reset) 3470 return; 3471 3472 for (i = 0; i < adapter->num_queues; i++) { 3473 rx_ring = &adapter->rx_ring[i]; 3474 3475 refill_required = ena_com_free_desc(rx_ring->ena_com_io_sq); 3476 if (unlikely(refill_required == (rx_ring->ring_size - 1))) { 3477 rx_ring->empty_rx_queue++; 3478 3479 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) { 3480 counter_u64_add(rx_ring->rx_stats.empty_rx_ring, 3481 1); 3482 3483 device_printf(adapter->pdev, 3484 "trigger refill for ring %d\n", i); 3485 3486 taskqueue_enqueue(rx_ring->cmpl_tq, 3487 &rx_ring->cmpl_task); 3488 rx_ring->empty_rx_queue = 0; 3489 } 3490 } else { 3491 rx_ring->empty_rx_queue = 0; 3492 } 3493 } 3494 } 3495 3496 static void 3497 ena_timer_service(void *data) 3498 { 3499 struct ena_adapter *adapter = (struct ena_adapter *)data; 3500 struct ena_admin_host_info *host_info = 3501 adapter->ena_dev->host_attr.host_info; 3502 3503 check_for_missing_keep_alive(adapter); 3504 3505 check_for_admin_com_state(adapter); 3506 3507 check_for_missing_tx_completions(adapter); 3508 3509 check_for_empty_rx_ring(adapter); 3510 3511 if (host_info) 3512 ena_update_host_info(host_info, adapter->ifp); 3513 3514 if (unlikely(adapter->trigger_reset)) { 3515 device_printf(adapter->pdev, "Trigger reset is on\n"); 3516 taskqueue_enqueue(adapter->reset_tq, &adapter->reset_task); 3517 return; 3518 } 3519 3520 /* 3521 * Schedule another timeout one second from now. 3522 */ 3523 callout_schedule_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 0); 3524 } 3525 3526 static void 3527 ena_reset_task(void *arg, int pending) 3528 { 3529 struct ena_com_dev_get_features_ctx get_feat_ctx; 3530 struct ena_adapter *adapter = (struct ena_adapter *)arg; 3531 struct ena_com_dev *ena_dev = adapter->ena_dev; 3532 bool dev_up; 3533 int rc; 3534 3535 if (unlikely(!adapter->trigger_reset)) { 3536 device_printf(adapter->pdev, 3537 "device reset scheduled but trigger_reset is off\n"); 3538 return; 3539 } 3540 3541 sx_xlock(&adapter->ioctl_sx); 3542 3543 callout_drain(&adapter->timer_service); 3544 3545 dev_up = adapter->up; 3546 3547 ena_com_set_admin_running_state(ena_dev, false); 3548 ena_down(adapter); 3549 ena_free_mgmnt_irq(adapter); 3550 ena_disable_msix(adapter); 3551 ena_com_abort_admin_commands(ena_dev); 3552 ena_com_wait_for_abort_completion(ena_dev); 3553 ena_com_admin_destroy(ena_dev); 3554 ena_com_mmio_reg_read_request_destroy(ena_dev); 3555 3556 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3557 adapter->trigger_reset = false; 3558 3559 /* Finished destroy part. Restart the device */ 3560 rc = ena_device_init(adapter, adapter->pdev, &get_feat_ctx, 3561 &adapter->wd_active); 3562 if (rc) { 3563 device_printf(adapter->pdev, 3564 "ENA device init failed! (err: %d)\n", rc); 3565 goto err_dev_free; 3566 } 3567 3568 rc = ena_enable_msix_and_set_admin_interrupts(adapter, 3569 adapter->num_queues); 3570 if (rc) { 3571 device_printf(adapter->pdev, "Enable MSI-X failed\n"); 3572 goto err_com_free; 3573 } 3574 3575 /* If the interface was up before the reset bring it up */ 3576 if (dev_up) { 3577 rc = ena_up(adapter); 3578 if (rc) { 3579 device_printf(adapter->pdev, 3580 "Failed to create I/O queues\n"); 3581 goto err_msix_free; 3582 } 3583 } 3584 3585 callout_reset_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 3586 ena_timer_service, (void *)adapter, 0); 3587 3588 sx_unlock(&adapter->ioctl_sx); 3589 3590 return; 3591 3592 err_msix_free: 3593 ena_free_mgmnt_irq(adapter); 3594 ena_disable_msix(adapter); 3595 err_com_free: 3596 ena_com_admin_destroy(ena_dev); 3597 err_dev_free: 3598 device_printf(adapter->pdev, "ENA reset failed!\n"); 3599 adapter->running = false; 3600 sx_unlock(&adapter->ioctl_sx); 3601 } 3602 3603 /** 3604 * ena_attach - Device Initialization Routine 3605 * @pdev: device information struct 3606 * 3607 * Returns 0 on success, otherwise on failure. 3608 * 3609 * ena_attach initializes an adapter identified by a device structure. 3610 * The OS initialization, configuring of the adapter private structure, 3611 * and a hardware reset occur. 3612 **/ 3613 static int 3614 ena_attach(device_t pdev) 3615 { 3616 struct ena_com_dev_get_features_ctx get_feat_ctx; 3617 static int version_printed; 3618 struct ena_adapter *adapter; 3619 struct ena_com_dev *ena_dev = NULL; 3620 uint16_t tx_sgl_size = 0; 3621 uint16_t rx_sgl_size = 0; 3622 int io_queue_num; 3623 int queue_size; 3624 int rc; 3625 struct sysctl_ctx_list *ctx; 3626 struct sysctl_oid_list *children; 3627 3628 adapter = device_get_softc(pdev); 3629 adapter->pdev = pdev; 3630 ctx = device_get_sysctl_ctx(pdev); 3631 children = SYSCTL_CHILDREN(device_get_sysctl_tree(pdev)); 3632 3633 mtx_init(&adapter->global_mtx, "ENA global mtx", NULL, MTX_DEF); 3634 sx_init(&adapter->ioctl_sx, "ENA ioctl sx"); 3635 3636 /* Sysctl calls for Watchdog service */ 3637 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "wd_active", 3638 CTLFLAG_RWTUN, &adapter->wd_active, 0, 3639 "Watchdog is active"); 3640 3641 SYSCTL_ADD_QUAD(ctx, children, OID_AUTO, "keep_alive_timeout", 3642 CTLFLAG_RWTUN, &adapter->keep_alive_timeout, 3643 "Timeout for Keep Alive messages"); 3644 3645 SYSCTL_ADD_QUAD(ctx, children, OID_AUTO, "missing_tx_timeout", 3646 CTLFLAG_RWTUN, &adapter->missing_tx_timeout, 3647 "Timeout for TX completion"); 3648 3649 SYSCTL_ADD_U32(ctx, children, OID_AUTO, "missing_tx_max_queues", 3650 CTLFLAG_RWTUN, &adapter->missing_tx_max_queues, 0, 3651 "Number of TX queues to check per run"); 3652 3653 SYSCTL_ADD_U32(ctx, children, OID_AUTO, "missing_tx_threshold", 3654 CTLFLAG_RWTUN, &adapter->missing_tx_threshold, 0, 3655 "Max number of timeouted packets"); 3656 3657 /* Set up the timer service */ 3658 callout_init_mtx(&adapter->timer_service, &adapter->global_mtx, 0); 3659 adapter->keep_alive_timeout = DEFAULT_KEEP_ALIVE_TO; 3660 adapter->missing_tx_timeout = DEFAULT_TX_CMP_TO; 3661 adapter->missing_tx_max_queues = DEFAULT_TX_MONITORED_QUEUES; 3662 adapter->missing_tx_threshold = DEFAULT_TX_CMP_THRESHOLD; 3663 3664 if (version_printed++ == 0) 3665 device_printf(pdev, "%s\n", ena_version); 3666 3667 rc = ena_allocate_pci_resources(adapter); 3668 if (rc) { 3669 device_printf(pdev, "PCI resource allocation failed!\n"); 3670 ena_free_pci_resources(adapter); 3671 return (rc); 3672 } 3673 3674 /* Allocate memory for ena_dev structure */ 3675 ena_dev = malloc(sizeof(struct ena_com_dev), M_DEVBUF, 3676 M_WAITOK | M_ZERO); 3677 3678 adapter->ena_dev = ena_dev; 3679 ena_dev->dmadev = pdev; 3680 ena_dev->bus = malloc(sizeof(struct ena_bus), M_DEVBUF, 3681 M_WAITOK | M_ZERO); 3682 3683 /* Store register resources */ 3684 ((struct ena_bus*)(ena_dev->bus))->reg_bar_t = 3685 rman_get_bustag(adapter->registers); 3686 ((struct ena_bus*)(ena_dev->bus))->reg_bar_h = 3687 rman_get_bushandle(adapter->registers); 3688 3689 if (((struct ena_bus*)(ena_dev->bus))->reg_bar_h == 0) { 3690 device_printf(pdev, "failed to pmap registers bar\n"); 3691 rc = ENXIO; 3692 goto err_bus_free; 3693 } 3694 3695 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3696 3697 /* Device initialization */ 3698 rc = ena_device_init(adapter, pdev, &get_feat_ctx, &adapter->wd_active); 3699 if (rc) { 3700 device_printf(pdev, "ENA device init failed! (err: %d)\n", rc); 3701 rc = ENXIO; 3702 goto err_bus_free; 3703 } 3704 3705 adapter->keep_alive_timestamp = getsbinuptime(); 3706 3707 adapter->tx_offload_cap = get_feat_ctx.offload.tx; 3708 3709 /* Set for sure that interface is not up */ 3710 adapter->up = false; 3711 3712 memcpy(adapter->mac_addr, get_feat_ctx.dev_attr.mac_addr, 3713 ETHER_ADDR_LEN); 3714 3715 adapter->small_copy_len = 3716 ENA_DEFAULT_SMALL_PACKET_LEN; 3717 3718 /* calculate IO queue number to create */ 3719 io_queue_num = ena_calc_io_queue_num(adapter, &get_feat_ctx); 3720 3721 ENA_ASSERT(io_queue_num > 0, "Invalid queue number: %d\n", 3722 io_queue_num); 3723 adapter->num_queues = io_queue_num; 3724 3725 /* calculatre ring sizes */ 3726 queue_size = ena_calc_queue_size(adapter,&tx_sgl_size, 3727 &rx_sgl_size, &get_feat_ctx); 3728 if ((queue_size <= 0) || (io_queue_num <= 0)) { 3729 rc = ENA_COM_FAULT; 3730 goto err_com_free; 3731 } 3732 3733 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3734 3735 adapter->tx_ring_size = queue_size; 3736 adapter->rx_ring_size = queue_size; 3737 3738 adapter->max_tx_sgl_size = tx_sgl_size; 3739 adapter->max_rx_sgl_size = rx_sgl_size; 3740 3741 /* set up dma tags for rx and tx buffers */ 3742 rc = ena_setup_tx_dma_tag(adapter); 3743 if (rc) 3744 goto err_com_free; 3745 3746 rc = ena_setup_rx_dma_tag(adapter); 3747 if (rc) 3748 goto err_tx_tag_free; 3749 3750 /* initialize rings basic information */ 3751 device_printf(pdev, "initalize %d io queues\n", io_queue_num); 3752 ena_init_io_rings(adapter); 3753 3754 /* setup network interface */ 3755 rc = ena_setup_ifnet(pdev, adapter, &get_feat_ctx); 3756 if (rc) { 3757 device_printf(pdev,"Error with network interface setup\n"); 3758 goto err_io_free; 3759 } 3760 3761 rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num); 3762 if (rc) { 3763 device_printf(pdev, 3764 "Failed to enable and set the admin interrupts\n"); 3765 goto err_ifp_free; 3766 } 3767 3768 /* Initialize reset task queue */ 3769 TASK_INIT(&adapter->reset_task, 0, ena_reset_task, adapter); 3770 adapter->reset_tq = taskqueue_create("ena_reset_enqueue", 3771 M_WAITOK | M_ZERO, taskqueue_thread_enqueue, &adapter->reset_tq); 3772 taskqueue_start_threads(&adapter->reset_tq, 1, PI_NET, 3773 "%s rstq", device_get_nameunit(adapter->pdev)); 3774 3775 /* Initialize statistics */ 3776 ena_alloc_counters((counter_u64_t *)&adapter->dev_stats, 3777 sizeof(struct ena_stats_dev)); 3778 ena_alloc_counters((counter_u64_t *)&adapter->hw_stats, 3779 sizeof(struct ena_hw_stats)); 3780 ena_sysctl_add_nodes(adapter); 3781 3782 /* Tell the stack that the interface is not active */ 3783 if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE, IFF_DRV_RUNNING); 3784 3785 adapter->running = true; 3786 return (0); 3787 3788 err_ifp_free: 3789 if_detach(adapter->ifp); 3790 if_free(adapter->ifp); 3791 err_io_free: 3792 ena_free_all_io_rings_resources(adapter); 3793 ena_free_rx_dma_tag(adapter); 3794 err_tx_tag_free: 3795 ena_free_tx_dma_tag(adapter); 3796 err_com_free: 3797 ena_com_admin_destroy(ena_dev); 3798 ena_com_delete_host_info(ena_dev); 3799 ena_com_mmio_reg_read_request_destroy(ena_dev); 3800 err_bus_free: 3801 free(ena_dev->bus, M_DEVBUF); 3802 free(ena_dev, M_DEVBUF); 3803 ena_free_pci_resources(adapter); 3804 3805 return (rc); 3806 } 3807 3808 /** 3809 * ena_detach - Device Removal Routine 3810 * @pdev: device information struct 3811 * 3812 * ena_detach is called by the device subsystem to alert the driver 3813 * that it should release a PCI device. 3814 **/ 3815 static int 3816 ena_detach(device_t pdev) 3817 { 3818 struct ena_adapter *adapter = device_get_softc(pdev); 3819 struct ena_com_dev *ena_dev = adapter->ena_dev; 3820 int rc; 3821 3822 /* Make sure VLANS are not using driver */ 3823 if (adapter->ifp->if_vlantrunk != NULL) { 3824 device_printf(adapter->pdev ,"VLAN is in use, detach first\n"); 3825 return (EBUSY); 3826 } 3827 3828 /* Free reset task and callout */ 3829 callout_drain(&adapter->timer_service); 3830 while (taskqueue_cancel(adapter->reset_tq, &adapter->reset_task, NULL)) 3831 taskqueue_drain(adapter->reset_tq, &adapter->reset_task); 3832 taskqueue_free(adapter->reset_tq); 3833 3834 sx_xlock(&adapter->ioctl_sx); 3835 ena_down(adapter); 3836 sx_unlock(&adapter->ioctl_sx); 3837 3838 if (adapter->ifp != NULL) { 3839 ether_ifdetach(adapter->ifp); 3840 if_free(adapter->ifp); 3841 } 3842 3843 ena_free_all_io_rings_resources(adapter); 3844 3845 ena_free_counters((counter_u64_t *)&adapter->hw_stats, 3846 sizeof(struct ena_hw_stats)); 3847 ena_free_counters((counter_u64_t *)&adapter->dev_stats, 3848 sizeof(struct ena_stats_dev)); 3849 3850 if (adapter->rss_support) 3851 ena_com_rss_destroy(ena_dev); 3852 3853 rc = ena_free_rx_dma_tag(adapter); 3854 if (rc) 3855 device_printf(adapter->pdev, 3856 "Unmapped RX DMA tag associations\n"); 3857 3858 rc = ena_free_tx_dma_tag(adapter); 3859 if (rc) 3860 device_printf(adapter->pdev, 3861 "Unmapped TX DMA tag associations\n"); 3862 3863 /* Reset the device only if the device is running. */ 3864 if (adapter->running) 3865 ena_com_dev_reset(ena_dev, adapter->reset_reason); 3866 3867 ena_com_delete_host_info(ena_dev); 3868 3869 ena_free_irqs(adapter); 3870 3871 ena_com_abort_admin_commands(ena_dev); 3872 3873 ena_com_wait_for_abort_completion(ena_dev); 3874 3875 ena_com_admin_destroy(ena_dev); 3876 3877 ena_com_mmio_reg_read_request_destroy(ena_dev); 3878 3879 ena_free_pci_resources(adapter); 3880 3881 mtx_destroy(&adapter->global_mtx); 3882 sx_destroy(&adapter->ioctl_sx); 3883 3884 if (ena_dev->bus != NULL) 3885 free(ena_dev->bus, M_DEVBUF); 3886 3887 if (ena_dev != NULL) 3888 free(ena_dev, M_DEVBUF); 3889 3890 return (bus_generic_detach(pdev)); 3891 } 3892 3893 /****************************************************************************** 3894 ******************************** AENQ Handlers ******************************* 3895 *****************************************************************************/ 3896 /** 3897 * ena_update_on_link_change: 3898 * Notify the network interface about the change in link status 3899 **/ 3900 static void 3901 ena_update_on_link_change(void *adapter_data, 3902 struct ena_admin_aenq_entry *aenq_e) 3903 { 3904 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3905 struct ena_admin_aenq_link_change_desc *aenq_desc; 3906 int status; 3907 if_t ifp; 3908 3909 aenq_desc = (struct ena_admin_aenq_link_change_desc *)aenq_e; 3910 ifp = adapter->ifp; 3911 status = aenq_desc->flags & 3912 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK; 3913 3914 if (status != 0) { 3915 device_printf(adapter->pdev, "link is UP\n"); 3916 if_link_state_change(ifp, LINK_STATE_UP); 3917 } else if (status == 0) { 3918 device_printf(adapter->pdev, "link is DOWN\n"); 3919 if_link_state_change(ifp, LINK_STATE_DOWN); 3920 } else { 3921 device_printf(adapter->pdev, "invalid value recvd\n"); 3922 BUG(); 3923 } 3924 3925 adapter->link_status = status; 3926 3927 return; 3928 } 3929 3930 /** 3931 * This handler will called for unknown event group or unimplemented handlers 3932 **/ 3933 static void 3934 unimplemented_aenq_handler(void *data, 3935 struct ena_admin_aenq_entry *aenq_e) 3936 { 3937 return; 3938 } 3939 3940 static struct ena_aenq_handlers aenq_handlers = { 3941 .handlers = { 3942 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, 3943 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd, 3944 }, 3945 .unimplemented_handler = unimplemented_aenq_handler 3946 }; 3947 3948 /********************************************************************* 3949 * FreeBSD Device Interface Entry Points 3950 *********************************************************************/ 3951 3952 static device_method_t ena_methods[] = { 3953 /* Device interface */ 3954 DEVMETHOD(device_probe, ena_probe), 3955 DEVMETHOD(device_attach, ena_attach), 3956 DEVMETHOD(device_detach, ena_detach), 3957 DEVMETHOD_END 3958 }; 3959 3960 static driver_t ena_driver = { 3961 "ena", ena_methods, sizeof(struct ena_adapter), 3962 }; 3963 3964 devclass_t ena_devclass; 3965 DRIVER_MODULE(ena, pci, ena_driver, ena_devclass, 0, 0); 3966 MODULE_DEPEND(ena, pci, 1, 1, 1); 3967 MODULE_DEPEND(ena, ether, 1, 1, 1); 3968 3969 /*********************************************************************/ 3970