1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2015-2021 Amazon.com, Inc. or its affiliates. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include "opt_rss.h" 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/bus.h> 38 #include <sys/endian.h> 39 #include <sys/kernel.h> 40 #include <sys/kthread.h> 41 #include <sys/malloc.h> 42 #include <sys/mbuf.h> 43 #include <sys/module.h> 44 #include <sys/rman.h> 45 #include <sys/smp.h> 46 #include <sys/socket.h> 47 #include <sys/sockio.h> 48 #include <sys/sysctl.h> 49 #include <sys/taskqueue.h> 50 #include <sys/time.h> 51 #include <sys/eventhandler.h> 52 53 #include <machine/bus.h> 54 #include <machine/resource.h> 55 #include <machine/in_cksum.h> 56 57 #include <net/bpf.h> 58 #include <net/ethernet.h> 59 #include <net/if.h> 60 #include <net/if_var.h> 61 #include <net/if_arp.h> 62 #include <net/if_dl.h> 63 #include <net/if_media.h> 64 #include <net/if_types.h> 65 #include <net/if_vlan_var.h> 66 #ifdef RSS 67 #include <net/rss_config.h> 68 #endif 69 70 #include <netinet/in_systm.h> 71 #include <netinet/in.h> 72 #include <netinet/if_ether.h> 73 #include <netinet/ip.h> 74 #include <netinet/ip6.h> 75 #include <netinet/tcp.h> 76 #include <netinet/udp.h> 77 78 #include <dev/pci/pcivar.h> 79 #include <dev/pci/pcireg.h> 80 81 #include <vm/vm.h> 82 #include <vm/pmap.h> 83 84 #include "ena_datapath.h" 85 #include "ena.h" 86 #include "ena_sysctl.h" 87 88 #ifdef DEV_NETMAP 89 #include "ena_netmap.h" 90 #endif /* DEV_NETMAP */ 91 92 /********************************************************* 93 * Function prototypes 94 *********************************************************/ 95 static int ena_probe(device_t); 96 static void ena_intr_msix_mgmnt(void *); 97 static void ena_free_pci_resources(struct ena_adapter *); 98 static int ena_change_mtu(if_t, int); 99 static inline void ena_alloc_counters(counter_u64_t *, int); 100 static inline void ena_free_counters(counter_u64_t *, int); 101 static inline void ena_reset_counters(counter_u64_t *, int); 102 static void ena_init_io_rings_common(struct ena_adapter *, 103 struct ena_ring *, uint16_t); 104 static void ena_init_io_rings_basic(struct ena_adapter *); 105 static void ena_init_io_rings_advanced(struct ena_adapter *); 106 static void ena_init_io_rings(struct ena_adapter *); 107 static void ena_free_io_ring_resources(struct ena_adapter *, unsigned int); 108 static void ena_free_all_io_rings_resources(struct ena_adapter *); 109 static int ena_setup_tx_dma_tag(struct ena_adapter *); 110 static int ena_free_tx_dma_tag(struct ena_adapter *); 111 static int ena_setup_rx_dma_tag(struct ena_adapter *); 112 static int ena_free_rx_dma_tag(struct ena_adapter *); 113 static void ena_release_all_tx_dmamap(struct ena_ring *); 114 static int ena_setup_tx_resources(struct ena_adapter *, int); 115 static void ena_free_tx_resources(struct ena_adapter *, int); 116 static int ena_setup_all_tx_resources(struct ena_adapter *); 117 static void ena_free_all_tx_resources(struct ena_adapter *); 118 static int ena_setup_rx_resources(struct ena_adapter *, unsigned int); 119 static void ena_free_rx_resources(struct ena_adapter *, unsigned int); 120 static int ena_setup_all_rx_resources(struct ena_adapter *); 121 static void ena_free_all_rx_resources(struct ena_adapter *); 122 static inline int ena_alloc_rx_mbuf(struct ena_adapter *, struct ena_ring *, 123 struct ena_rx_buffer *); 124 static void ena_free_rx_mbuf(struct ena_adapter *, struct ena_ring *, 125 struct ena_rx_buffer *); 126 static void ena_free_rx_bufs(struct ena_adapter *, unsigned int); 127 static void ena_refill_all_rx_bufs(struct ena_adapter *); 128 static void ena_free_all_rx_bufs(struct ena_adapter *); 129 static void ena_free_tx_bufs(struct ena_adapter *, unsigned int); 130 static void ena_free_all_tx_bufs(struct ena_adapter *); 131 static void ena_destroy_all_tx_queues(struct ena_adapter *); 132 static void ena_destroy_all_rx_queues(struct ena_adapter *); 133 static void ena_destroy_all_io_queues(struct ena_adapter *); 134 static int ena_create_io_queues(struct ena_adapter *); 135 static int ena_handle_msix(void *); 136 static int ena_enable_msix(struct ena_adapter *); 137 static void ena_setup_mgmnt_intr(struct ena_adapter *); 138 static int ena_setup_io_intr(struct ena_adapter *); 139 static int ena_request_mgmnt_irq(struct ena_adapter *); 140 static int ena_request_io_irq(struct ena_adapter *); 141 static void ena_free_mgmnt_irq(struct ena_adapter *); 142 static void ena_free_io_irq(struct ena_adapter *); 143 static void ena_free_irqs(struct ena_adapter*); 144 static void ena_disable_msix(struct ena_adapter *); 145 static void ena_unmask_all_io_irqs(struct ena_adapter *); 146 static int ena_rss_configure(struct ena_adapter *); 147 static int ena_up_complete(struct ena_adapter *); 148 static uint64_t ena_get_counter(if_t, ift_counter); 149 static int ena_media_change(if_t); 150 static void ena_media_status(if_t, struct ifmediareq *); 151 static void ena_init(void *); 152 static int ena_ioctl(if_t, u_long, caddr_t); 153 static int ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *); 154 static void ena_update_host_info(struct ena_admin_host_info *, if_t); 155 static void ena_update_hwassist(struct ena_adapter *); 156 static int ena_setup_ifnet(device_t, struct ena_adapter *, 157 struct ena_com_dev_get_features_ctx *); 158 static int ena_enable_wc(device_t, struct resource *); 159 static int ena_set_queues_placement_policy(device_t, struct ena_com_dev *, 160 struct ena_admin_feature_llq_desc *, struct ena_llq_configurations *); 161 static uint32_t ena_calc_max_io_queue_num(device_t, struct ena_com_dev *, 162 struct ena_com_dev_get_features_ctx *); 163 static int ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *); 164 static int ena_rss_init_default(struct ena_adapter *); 165 static void ena_rss_init_default_deferred(void *); 166 static void ena_config_host_info(struct ena_com_dev *, device_t); 167 static int ena_attach(device_t); 168 static int ena_detach(device_t); 169 static int ena_device_init(struct ena_adapter *, device_t, 170 struct ena_com_dev_get_features_ctx *, int *); 171 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *); 172 static void ena_update_on_link_change(void *, struct ena_admin_aenq_entry *); 173 static void unimplemented_aenq_handler(void *, 174 struct ena_admin_aenq_entry *); 175 static int ena_copy_eni_metrics(struct ena_adapter *); 176 static void ena_timer_service(void *); 177 178 static char ena_version[] = DEVICE_NAME DRV_MODULE_NAME " v" DRV_MODULE_VERSION; 179 180 static ena_vendor_info_t ena_vendor_info_array[] = { 181 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_PF, 0}, 182 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_PF_RSERV0, 0}, 183 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_VF, 0}, 184 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_VF_RSERV0, 0}, 185 /* Last entry */ 186 { 0, 0, 0 } 187 }; 188 189 /* 190 * Contains pointers to event handlers, e.g. link state chage. 191 */ 192 static struct ena_aenq_handlers aenq_handlers; 193 194 void 195 ena_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nseg, int error) 196 { 197 if (error != 0) 198 return; 199 *(bus_addr_t *) arg = segs[0].ds_addr; 200 } 201 202 int 203 ena_dma_alloc(device_t dmadev, bus_size_t size, 204 ena_mem_handle_t *dma, int mapflags, bus_size_t alignment) 205 { 206 struct ena_adapter* adapter = device_get_softc(dmadev); 207 device_t pdev = adapter->pdev; 208 uint32_t maxsize; 209 uint64_t dma_space_addr; 210 int error; 211 212 maxsize = ((size - 1) / PAGE_SIZE + 1) * PAGE_SIZE; 213 214 dma_space_addr = ENA_DMA_BIT_MASK(adapter->dma_width); 215 if (unlikely(dma_space_addr == 0)) 216 dma_space_addr = BUS_SPACE_MAXADDR; 217 218 error = bus_dma_tag_create(bus_get_dma_tag(dmadev), /* parent */ 219 alignment, 0, /* alignment, bounds */ 220 dma_space_addr, /* lowaddr of exclusion window */ 221 BUS_SPACE_MAXADDR,/* highaddr of exclusion window */ 222 NULL, NULL, /* filter, filterarg */ 223 maxsize, /* maxsize */ 224 1, /* nsegments */ 225 maxsize, /* maxsegsize */ 226 BUS_DMA_ALLOCNOW, /* flags */ 227 NULL, /* lockfunc */ 228 NULL, /* lockarg */ 229 &dma->tag); 230 if (unlikely(error != 0)) { 231 ena_log(pdev, ERR, "bus_dma_tag_create failed: %d\n", error); 232 goto fail_tag; 233 } 234 235 error = bus_dmamem_alloc(dma->tag, (void**) &dma->vaddr, 236 BUS_DMA_COHERENT | BUS_DMA_ZERO, &dma->map); 237 if (unlikely(error != 0)) { 238 ena_log(pdev, ERR, "bus_dmamem_alloc(%ju) failed: %d\n", 239 (uintmax_t)size, error); 240 goto fail_map_create; 241 } 242 243 dma->paddr = 0; 244 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, 245 size, ena_dmamap_callback, &dma->paddr, mapflags); 246 if (unlikely((error != 0) || (dma->paddr == 0))) { 247 ena_log(pdev, ERR, "bus_dmamap_load failed: %d\n", error); 248 goto fail_map_load; 249 } 250 251 bus_dmamap_sync(dma->tag, dma->map, 252 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 253 254 return (0); 255 256 fail_map_load: 257 bus_dmamem_free(dma->tag, dma->vaddr, dma->map); 258 fail_map_create: 259 bus_dma_tag_destroy(dma->tag); 260 fail_tag: 261 dma->tag = NULL; 262 dma->vaddr = NULL; 263 dma->paddr = 0; 264 265 return (error); 266 } 267 268 /* 269 * This function should generate unique key for the whole driver. 270 * If the key was already genereated in the previous call (for example 271 * for another adapter), then it should be returned instead. 272 */ 273 void 274 ena_rss_key_fill(void *key, size_t size) 275 { 276 static bool key_generated; 277 static uint8_t default_key[ENA_HASH_KEY_SIZE]; 278 279 KASSERT(size <= ENA_HASH_KEY_SIZE, ("Requested more bytes than ENA RSS key can hold")); 280 281 if (!key_generated) { 282 arc4random_buf(default_key, ENA_HASH_KEY_SIZE); 283 key_generated = true; 284 } 285 286 memcpy(key, default_key, size); 287 } 288 289 static void 290 ena_free_pci_resources(struct ena_adapter *adapter) 291 { 292 device_t pdev = adapter->pdev; 293 294 if (adapter->memory != NULL) { 295 bus_release_resource(pdev, SYS_RES_MEMORY, 296 PCIR_BAR(ENA_MEM_BAR), adapter->memory); 297 } 298 299 if (adapter->registers != NULL) { 300 bus_release_resource(pdev, SYS_RES_MEMORY, 301 PCIR_BAR(ENA_REG_BAR), adapter->registers); 302 } 303 304 if (adapter->msix != NULL) { 305 bus_release_resource(pdev, SYS_RES_MEMORY, 306 adapter->msix_rid, adapter->msix); 307 } 308 } 309 310 static int 311 ena_probe(device_t dev) 312 { 313 ena_vendor_info_t *ent; 314 char adapter_name[60]; 315 uint16_t pci_vendor_id = 0; 316 uint16_t pci_device_id = 0; 317 318 pci_vendor_id = pci_get_vendor(dev); 319 pci_device_id = pci_get_device(dev); 320 321 ent = ena_vendor_info_array; 322 while (ent->vendor_id != 0) { 323 if ((pci_vendor_id == ent->vendor_id) && 324 (pci_device_id == ent->device_id)) { 325 ena_log_raw(DBG, "vendor=%x device=%x\n", 326 pci_vendor_id, pci_device_id); 327 328 sprintf(adapter_name, DEVICE_DESC); 329 device_set_desc_copy(dev, adapter_name); 330 return (BUS_PROBE_DEFAULT); 331 } 332 333 ent++; 334 335 } 336 337 return (ENXIO); 338 } 339 340 static int 341 ena_change_mtu(if_t ifp, int new_mtu) 342 { 343 struct ena_adapter *adapter = if_getsoftc(ifp); 344 device_t pdev = adapter->pdev; 345 int rc; 346 347 if ((new_mtu > adapter->max_mtu) || (new_mtu < ENA_MIN_MTU)) { 348 ena_log(pdev, ERR, "Invalid MTU setting. " 349 "new_mtu: %d max mtu: %d min mtu: %d\n", 350 new_mtu, adapter->max_mtu, ENA_MIN_MTU); 351 return (EINVAL); 352 } 353 354 rc = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu); 355 if (likely(rc == 0)) { 356 ena_log(pdev, DBG, "set MTU to %d\n", new_mtu); 357 if_setmtu(ifp, new_mtu); 358 } else { 359 ena_log(pdev, ERR, "Failed to set MTU to %d\n", new_mtu); 360 } 361 362 return (rc); 363 } 364 365 static inline void 366 ena_alloc_counters(counter_u64_t *begin, int size) 367 { 368 counter_u64_t *end = (counter_u64_t *)((char *)begin + size); 369 370 for (; begin < end; ++begin) 371 *begin = counter_u64_alloc(M_WAITOK); 372 } 373 374 static inline void 375 ena_free_counters(counter_u64_t *begin, int size) 376 { 377 counter_u64_t *end = (counter_u64_t *)((char *)begin + size); 378 379 for (; begin < end; ++begin) 380 counter_u64_free(*begin); 381 } 382 383 static inline void 384 ena_reset_counters(counter_u64_t *begin, int size) 385 { 386 counter_u64_t *end = (counter_u64_t *)((char *)begin + size); 387 388 for (; begin < end; ++begin) 389 counter_u64_zero(*begin); 390 } 391 392 static void 393 ena_init_io_rings_common(struct ena_adapter *adapter, struct ena_ring *ring, 394 uint16_t qid) 395 { 396 397 ring->qid = qid; 398 ring->adapter = adapter; 399 ring->ena_dev = adapter->ena_dev; 400 ring->first_interrupt = false; 401 ring->no_interrupt_event_cnt = 0; 402 } 403 404 static void 405 ena_init_io_rings_basic(struct ena_adapter *adapter) 406 { 407 struct ena_com_dev *ena_dev; 408 struct ena_ring *txr, *rxr; 409 struct ena_que *que; 410 int i; 411 412 ena_dev = adapter->ena_dev; 413 414 for (i = 0; i < adapter->num_io_queues; i++) { 415 txr = &adapter->tx_ring[i]; 416 rxr = &adapter->rx_ring[i]; 417 418 /* TX/RX common ring state */ 419 ena_init_io_rings_common(adapter, txr, i); 420 ena_init_io_rings_common(adapter, rxr, i); 421 422 /* TX specific ring state */ 423 txr->tx_max_header_size = ena_dev->tx_max_header_size; 424 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 425 426 que = &adapter->que[i]; 427 que->adapter = adapter; 428 que->id = i; 429 que->tx_ring = txr; 430 que->rx_ring = rxr; 431 432 txr->que = que; 433 rxr->que = que; 434 435 rxr->empty_rx_queue = 0; 436 rxr->rx_mbuf_sz = ena_mbuf_sz; 437 } 438 } 439 440 static void 441 ena_init_io_rings_advanced(struct ena_adapter *adapter) 442 { 443 struct ena_ring *txr, *rxr; 444 int i; 445 446 for (i = 0; i < adapter->num_io_queues; i++) { 447 txr = &adapter->tx_ring[i]; 448 rxr = &adapter->rx_ring[i]; 449 450 /* Allocate a buf ring */ 451 txr->buf_ring_size = adapter->buf_ring_size; 452 txr->br = buf_ring_alloc(txr->buf_ring_size, M_DEVBUF, 453 M_WAITOK, &txr->ring_mtx); 454 455 /* Allocate Tx statistics. */ 456 ena_alloc_counters((counter_u64_t *)&txr->tx_stats, 457 sizeof(txr->tx_stats)); 458 459 /* Allocate Rx statistics. */ 460 ena_alloc_counters((counter_u64_t *)&rxr->rx_stats, 461 sizeof(rxr->rx_stats)); 462 463 /* Initialize locks */ 464 snprintf(txr->mtx_name, nitems(txr->mtx_name), "%s:tx(%d)", 465 device_get_nameunit(adapter->pdev), i); 466 snprintf(rxr->mtx_name, nitems(rxr->mtx_name), "%s:rx(%d)", 467 device_get_nameunit(adapter->pdev), i); 468 469 mtx_init(&txr->ring_mtx, txr->mtx_name, NULL, MTX_DEF); 470 } 471 } 472 473 static void 474 ena_init_io_rings(struct ena_adapter *adapter) 475 { 476 /* 477 * IO rings initialization can be divided into the 2 steps: 478 * 1. Initialize variables and fields with initial values and copy 479 * them from adapter/ena_dev (basic) 480 * 2. Allocate mutex, counters and buf_ring (advanced) 481 */ 482 ena_init_io_rings_basic(adapter); 483 ena_init_io_rings_advanced(adapter); 484 } 485 486 static void 487 ena_free_io_ring_resources(struct ena_adapter *adapter, unsigned int qid) 488 { 489 struct ena_ring *txr = &adapter->tx_ring[qid]; 490 struct ena_ring *rxr = &adapter->rx_ring[qid]; 491 492 ena_free_counters((counter_u64_t *)&txr->tx_stats, 493 sizeof(txr->tx_stats)); 494 ena_free_counters((counter_u64_t *)&rxr->rx_stats, 495 sizeof(rxr->rx_stats)); 496 497 ENA_RING_MTX_LOCK(txr); 498 drbr_free(txr->br, M_DEVBUF); 499 ENA_RING_MTX_UNLOCK(txr); 500 501 mtx_destroy(&txr->ring_mtx); 502 } 503 504 static void 505 ena_free_all_io_rings_resources(struct ena_adapter *adapter) 506 { 507 int i; 508 509 for (i = 0; i < adapter->num_io_queues; i++) 510 ena_free_io_ring_resources(adapter, i); 511 512 } 513 514 static int 515 ena_setup_tx_dma_tag(struct ena_adapter *adapter) 516 { 517 int ret; 518 519 /* Create DMA tag for Tx buffers */ 520 ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev), 521 1, 0, /* alignment, bounds */ 522 ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window */ 523 BUS_SPACE_MAXADDR, /* highaddr of excl window */ 524 NULL, NULL, /* filter, filterarg */ 525 ENA_TSO_MAXSIZE, /* maxsize */ 526 adapter->max_tx_sgl_size - 1, /* nsegments */ 527 ENA_TSO_MAXSIZE, /* maxsegsize */ 528 0, /* flags */ 529 NULL, /* lockfunc */ 530 NULL, /* lockfuncarg */ 531 &adapter->tx_buf_tag); 532 533 return (ret); 534 } 535 536 static int 537 ena_free_tx_dma_tag(struct ena_adapter *adapter) 538 { 539 int ret; 540 541 ret = bus_dma_tag_destroy(adapter->tx_buf_tag); 542 543 if (likely(ret == 0)) 544 adapter->tx_buf_tag = NULL; 545 546 return (ret); 547 } 548 549 static int 550 ena_setup_rx_dma_tag(struct ena_adapter *adapter) 551 { 552 int ret; 553 554 /* Create DMA tag for Rx buffers*/ 555 ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev), /* parent */ 556 1, 0, /* alignment, bounds */ 557 ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window */ 558 BUS_SPACE_MAXADDR, /* highaddr of excl window */ 559 NULL, NULL, /* filter, filterarg */ 560 ena_mbuf_sz, /* maxsize */ 561 adapter->max_rx_sgl_size, /* nsegments */ 562 ena_mbuf_sz, /* maxsegsize */ 563 0, /* flags */ 564 NULL, /* lockfunc */ 565 NULL, /* lockarg */ 566 &adapter->rx_buf_tag); 567 568 return (ret); 569 } 570 571 static int 572 ena_free_rx_dma_tag(struct ena_adapter *adapter) 573 { 574 int ret; 575 576 ret = bus_dma_tag_destroy(adapter->rx_buf_tag); 577 578 if (likely(ret == 0)) 579 adapter->rx_buf_tag = NULL; 580 581 return (ret); 582 } 583 584 static void 585 ena_release_all_tx_dmamap(struct ena_ring *tx_ring) 586 { 587 struct ena_adapter *adapter = tx_ring->adapter; 588 struct ena_tx_buffer *tx_info; 589 bus_dma_tag_t tx_tag = adapter->tx_buf_tag;; 590 int i; 591 #ifdef DEV_NETMAP 592 struct ena_netmap_tx_info *nm_info; 593 int j; 594 #endif /* DEV_NETMAP */ 595 596 for (i = 0; i < tx_ring->ring_size; ++i) { 597 tx_info = &tx_ring->tx_buffer_info[i]; 598 #ifdef DEV_NETMAP 599 if (adapter->ifp->if_capenable & IFCAP_NETMAP) { 600 nm_info = &tx_info->nm_info; 601 for (j = 0; j < ENA_PKT_MAX_BUFS; ++j) { 602 if (nm_info->map_seg[j] != NULL) { 603 bus_dmamap_destroy(tx_tag, 604 nm_info->map_seg[j]); 605 nm_info->map_seg[j] = NULL; 606 } 607 } 608 } 609 #endif /* DEV_NETMAP */ 610 if (tx_info->dmamap != NULL) { 611 bus_dmamap_destroy(tx_tag, tx_info->dmamap); 612 tx_info->dmamap = NULL; 613 } 614 } 615 } 616 617 /** 618 * ena_setup_tx_resources - allocate Tx resources (Descriptors) 619 * @adapter: network interface device structure 620 * @qid: queue index 621 * 622 * Returns 0 on success, otherwise on failure. 623 **/ 624 static int 625 ena_setup_tx_resources(struct ena_adapter *adapter, int qid) 626 { 627 device_t pdev = adapter->pdev; 628 struct ena_que *que = &adapter->que[qid]; 629 struct ena_ring *tx_ring = que->tx_ring; 630 int size, i, err; 631 #ifdef DEV_NETMAP 632 bus_dmamap_t *map; 633 int j; 634 635 ena_netmap_reset_tx_ring(adapter, qid); 636 #endif /* DEV_NETMAP */ 637 638 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size; 639 640 tx_ring->tx_buffer_info = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); 641 if (unlikely(tx_ring->tx_buffer_info == NULL)) 642 return (ENOMEM); 643 644 size = sizeof(uint16_t) * tx_ring->ring_size; 645 tx_ring->free_tx_ids = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); 646 if (unlikely(tx_ring->free_tx_ids == NULL)) 647 goto err_buf_info_free; 648 649 size = tx_ring->tx_max_header_size; 650 tx_ring->push_buf_intermediate_buf = malloc(size, M_DEVBUF, 651 M_NOWAIT | M_ZERO); 652 if (unlikely(tx_ring->push_buf_intermediate_buf == NULL)) 653 goto err_tx_ids_free; 654 655 /* Req id stack for TX OOO completions */ 656 for (i = 0; i < tx_ring->ring_size; i++) 657 tx_ring->free_tx_ids[i] = i; 658 659 /* Reset TX statistics. */ 660 ena_reset_counters((counter_u64_t *)&tx_ring->tx_stats, 661 sizeof(tx_ring->tx_stats)); 662 663 tx_ring->next_to_use = 0; 664 tx_ring->next_to_clean = 0; 665 tx_ring->acum_pkts = 0; 666 667 /* Make sure that drbr is empty */ 668 ENA_RING_MTX_LOCK(tx_ring); 669 drbr_flush(adapter->ifp, tx_ring->br); 670 ENA_RING_MTX_UNLOCK(tx_ring); 671 672 /* ... and create the buffer DMA maps */ 673 for (i = 0; i < tx_ring->ring_size; i++) { 674 err = bus_dmamap_create(adapter->tx_buf_tag, 0, 675 &tx_ring->tx_buffer_info[i].dmamap); 676 if (unlikely(err != 0)) { 677 ena_log(pdev, ERR, 678 "Unable to create Tx DMA map for buffer %d\n", 679 i); 680 goto err_map_release; 681 } 682 683 #ifdef DEV_NETMAP 684 if (adapter->ifp->if_capenable & IFCAP_NETMAP) { 685 map = tx_ring->tx_buffer_info[i].nm_info.map_seg; 686 for (j = 0; j < ENA_PKT_MAX_BUFS; j++) { 687 err = bus_dmamap_create(adapter->tx_buf_tag, 0, 688 &map[j]); 689 if (unlikely(err != 0)) { 690 ena_log(pdev, ERR, 691 "Unable to create " 692 "Tx DMA for buffer %d %d\n", i, j); 693 goto err_map_release; 694 } 695 } 696 } 697 #endif /* DEV_NETMAP */ 698 } 699 700 /* Allocate taskqueues */ 701 TASK_INIT(&tx_ring->enqueue_task, 0, ena_deferred_mq_start, tx_ring); 702 tx_ring->enqueue_tq = taskqueue_create_fast("ena_tx_enque", M_NOWAIT, 703 taskqueue_thread_enqueue, &tx_ring->enqueue_tq); 704 if (unlikely(tx_ring->enqueue_tq == NULL)) { 705 ena_log(pdev, ERR, 706 "Unable to create taskqueue for enqueue task\n"); 707 i = tx_ring->ring_size; 708 goto err_map_release; 709 } 710 711 tx_ring->running = true; 712 713 taskqueue_start_threads(&tx_ring->enqueue_tq, 1, PI_NET, 714 "%s txeq %d", device_get_nameunit(adapter->pdev), que->cpu); 715 716 return (0); 717 718 err_map_release: 719 ena_release_all_tx_dmamap(tx_ring); 720 err_tx_ids_free: 721 free(tx_ring->free_tx_ids, M_DEVBUF); 722 tx_ring->free_tx_ids = NULL; 723 err_buf_info_free: 724 free(tx_ring->tx_buffer_info, M_DEVBUF); 725 tx_ring->tx_buffer_info = NULL; 726 727 return (ENOMEM); 728 } 729 730 /** 731 * ena_free_tx_resources - Free Tx Resources per Queue 732 * @adapter: network interface device structure 733 * @qid: queue index 734 * 735 * Free all transmit software resources 736 **/ 737 static void 738 ena_free_tx_resources(struct ena_adapter *adapter, int qid) 739 { 740 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 741 #ifdef DEV_NETMAP 742 struct ena_netmap_tx_info *nm_info; 743 int j; 744 #endif /* DEV_NETMAP */ 745 746 while (taskqueue_cancel(tx_ring->enqueue_tq, &tx_ring->enqueue_task, 747 NULL)) 748 taskqueue_drain(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 749 750 taskqueue_free(tx_ring->enqueue_tq); 751 752 ENA_RING_MTX_LOCK(tx_ring); 753 /* Flush buffer ring, */ 754 drbr_flush(adapter->ifp, tx_ring->br); 755 756 /* Free buffer DMA maps, */ 757 for (int i = 0; i < tx_ring->ring_size; i++) { 758 bus_dmamap_sync(adapter->tx_buf_tag, 759 tx_ring->tx_buffer_info[i].dmamap, BUS_DMASYNC_POSTWRITE); 760 bus_dmamap_unload(adapter->tx_buf_tag, 761 tx_ring->tx_buffer_info[i].dmamap); 762 bus_dmamap_destroy(adapter->tx_buf_tag, 763 tx_ring->tx_buffer_info[i].dmamap); 764 765 #ifdef DEV_NETMAP 766 if (adapter->ifp->if_capenable & IFCAP_NETMAP) { 767 nm_info = &tx_ring->tx_buffer_info[i].nm_info; 768 for (j = 0; j < ENA_PKT_MAX_BUFS; j++) { 769 if (nm_info->socket_buf_idx[j] != 0) { 770 bus_dmamap_sync(adapter->tx_buf_tag, 771 nm_info->map_seg[j], 772 BUS_DMASYNC_POSTWRITE); 773 ena_netmap_unload(adapter, 774 nm_info->map_seg[j]); 775 } 776 bus_dmamap_destroy(adapter->tx_buf_tag, 777 nm_info->map_seg[j]); 778 nm_info->socket_buf_idx[j] = 0; 779 } 780 } 781 #endif /* DEV_NETMAP */ 782 783 m_freem(tx_ring->tx_buffer_info[i].mbuf); 784 tx_ring->tx_buffer_info[i].mbuf = NULL; 785 } 786 ENA_RING_MTX_UNLOCK(tx_ring); 787 788 /* And free allocated memory. */ 789 free(tx_ring->tx_buffer_info, M_DEVBUF); 790 tx_ring->tx_buffer_info = NULL; 791 792 free(tx_ring->free_tx_ids, M_DEVBUF); 793 tx_ring->free_tx_ids = NULL; 794 795 free(tx_ring->push_buf_intermediate_buf, M_DEVBUF); 796 tx_ring->push_buf_intermediate_buf = NULL; 797 } 798 799 /** 800 * ena_setup_all_tx_resources - allocate all queues Tx resources 801 * @adapter: network interface device structure 802 * 803 * Returns 0 on success, otherwise on failure. 804 **/ 805 static int 806 ena_setup_all_tx_resources(struct ena_adapter *adapter) 807 { 808 int i, rc; 809 810 for (i = 0; i < adapter->num_io_queues; i++) { 811 rc = ena_setup_tx_resources(adapter, i); 812 if (rc != 0) { 813 ena_log(adapter->pdev, ERR, 814 "Allocation for Tx Queue %u failed\n", i); 815 goto err_setup_tx; 816 } 817 } 818 819 return (0); 820 821 err_setup_tx: 822 /* Rewind the index freeing the rings as we go */ 823 while (i--) 824 ena_free_tx_resources(adapter, i); 825 return (rc); 826 } 827 828 /** 829 * ena_free_all_tx_resources - Free Tx Resources for All Queues 830 * @adapter: network interface device structure 831 * 832 * Free all transmit software resources 833 **/ 834 static void 835 ena_free_all_tx_resources(struct ena_adapter *adapter) 836 { 837 int i; 838 839 for (i = 0; i < adapter->num_io_queues; i++) 840 ena_free_tx_resources(adapter, i); 841 } 842 843 /** 844 * ena_setup_rx_resources - allocate Rx resources (Descriptors) 845 * @adapter: network interface device structure 846 * @qid: queue index 847 * 848 * Returns 0 on success, otherwise on failure. 849 **/ 850 static int 851 ena_setup_rx_resources(struct ena_adapter *adapter, unsigned int qid) 852 { 853 device_t pdev = adapter->pdev; 854 struct ena_que *que = &adapter->que[qid]; 855 struct ena_ring *rx_ring = que->rx_ring; 856 int size, err, i; 857 858 size = sizeof(struct ena_rx_buffer) * rx_ring->ring_size; 859 860 #ifdef DEV_NETMAP 861 ena_netmap_reset_rx_ring(adapter, qid); 862 rx_ring->initialized = false; 863 #endif /* DEV_NETMAP */ 864 865 /* 866 * Alloc extra element so in rx path 867 * we can always prefetch rx_info + 1 868 */ 869 size += sizeof(struct ena_rx_buffer); 870 871 rx_ring->rx_buffer_info = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO); 872 873 size = sizeof(uint16_t) * rx_ring->ring_size; 874 rx_ring->free_rx_ids = malloc(size, M_DEVBUF, M_WAITOK); 875 876 for (i = 0; i < rx_ring->ring_size; i++) 877 rx_ring->free_rx_ids[i] = i; 878 879 /* Reset RX statistics. */ 880 ena_reset_counters((counter_u64_t *)&rx_ring->rx_stats, 881 sizeof(rx_ring->rx_stats)); 882 883 rx_ring->next_to_clean = 0; 884 rx_ring->next_to_use = 0; 885 886 /* ... and create the buffer DMA maps */ 887 for (i = 0; i < rx_ring->ring_size; i++) { 888 err = bus_dmamap_create(adapter->rx_buf_tag, 0, 889 &(rx_ring->rx_buffer_info[i].map)); 890 if (err != 0) { 891 ena_log(pdev, ERR, 892 "Unable to create Rx DMA map for buffer %d\n", i); 893 goto err_buf_info_unmap; 894 } 895 } 896 897 /* Create LRO for the ring */ 898 if ((adapter->ifp->if_capenable & IFCAP_LRO) != 0) { 899 int err = tcp_lro_init(&rx_ring->lro); 900 if (err != 0) { 901 ena_log(pdev, ERR, "LRO[%d] Initialization failed!\n", 902 qid); 903 } else { 904 ena_log(pdev, DBG, "RX Soft LRO[%d] Initialized\n", 905 qid); 906 rx_ring->lro.ifp = adapter->ifp; 907 } 908 } 909 910 return (0); 911 912 err_buf_info_unmap: 913 while (i--) { 914 bus_dmamap_destroy(adapter->rx_buf_tag, 915 rx_ring->rx_buffer_info[i].map); 916 } 917 918 free(rx_ring->free_rx_ids, M_DEVBUF); 919 rx_ring->free_rx_ids = NULL; 920 free(rx_ring->rx_buffer_info, M_DEVBUF); 921 rx_ring->rx_buffer_info = NULL; 922 return (ENOMEM); 923 } 924 925 /** 926 * ena_free_rx_resources - Free Rx Resources 927 * @adapter: network interface device structure 928 * @qid: queue index 929 * 930 * Free all receive software resources 931 **/ 932 static void 933 ena_free_rx_resources(struct ena_adapter *adapter, unsigned int qid) 934 { 935 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 936 937 /* Free buffer DMA maps, */ 938 for (int i = 0; i < rx_ring->ring_size; i++) { 939 bus_dmamap_sync(adapter->rx_buf_tag, 940 rx_ring->rx_buffer_info[i].map, BUS_DMASYNC_POSTREAD); 941 m_freem(rx_ring->rx_buffer_info[i].mbuf); 942 rx_ring->rx_buffer_info[i].mbuf = NULL; 943 bus_dmamap_unload(adapter->rx_buf_tag, 944 rx_ring->rx_buffer_info[i].map); 945 bus_dmamap_destroy(adapter->rx_buf_tag, 946 rx_ring->rx_buffer_info[i].map); 947 } 948 949 /* free LRO resources, */ 950 tcp_lro_free(&rx_ring->lro); 951 952 /* free allocated memory */ 953 free(rx_ring->rx_buffer_info, M_DEVBUF); 954 rx_ring->rx_buffer_info = NULL; 955 956 free(rx_ring->free_rx_ids, M_DEVBUF); 957 rx_ring->free_rx_ids = NULL; 958 } 959 960 /** 961 * ena_setup_all_rx_resources - allocate all queues Rx resources 962 * @adapter: network interface device structure 963 * 964 * Returns 0 on success, otherwise on failure. 965 **/ 966 static int 967 ena_setup_all_rx_resources(struct ena_adapter *adapter) 968 { 969 int i, rc = 0; 970 971 for (i = 0; i < adapter->num_io_queues; i++) { 972 rc = ena_setup_rx_resources(adapter, i); 973 if (rc != 0) { 974 ena_log(adapter->pdev, ERR, 975 "Allocation for Rx Queue %u failed\n", i); 976 goto err_setup_rx; 977 } 978 } 979 return (0); 980 981 err_setup_rx: 982 /* rewind the index freeing the rings as we go */ 983 while (i--) 984 ena_free_rx_resources(adapter, i); 985 return (rc); 986 } 987 988 /** 989 * ena_free_all_rx_resources - Free Rx resources for all queues 990 * @adapter: network interface device structure 991 * 992 * Free all receive software resources 993 **/ 994 static void 995 ena_free_all_rx_resources(struct ena_adapter *adapter) 996 { 997 int i; 998 999 for (i = 0; i < adapter->num_io_queues; i++) 1000 ena_free_rx_resources(adapter, i); 1001 } 1002 1003 static inline int 1004 ena_alloc_rx_mbuf(struct ena_adapter *adapter, 1005 struct ena_ring *rx_ring, struct ena_rx_buffer *rx_info) 1006 { 1007 device_t pdev = adapter->pdev; 1008 struct ena_com_buf *ena_buf; 1009 bus_dma_segment_t segs[1]; 1010 int nsegs, error; 1011 int mlen; 1012 1013 /* if previous allocated frag is not used */ 1014 if (unlikely(rx_info->mbuf != NULL)) 1015 return (0); 1016 1017 /* Get mbuf using UMA allocator */ 1018 rx_info->mbuf = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, 1019 rx_ring->rx_mbuf_sz); 1020 1021 if (unlikely(rx_info->mbuf == NULL)) { 1022 counter_u64_add(rx_ring->rx_stats.mjum_alloc_fail, 1); 1023 rx_info->mbuf = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1024 if (unlikely(rx_info->mbuf == NULL)) { 1025 counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1); 1026 return (ENOMEM); 1027 } 1028 mlen = MCLBYTES; 1029 } else { 1030 mlen = rx_ring->rx_mbuf_sz; 1031 } 1032 /* Set mbuf length*/ 1033 rx_info->mbuf->m_pkthdr.len = rx_info->mbuf->m_len = mlen; 1034 1035 /* Map packets for DMA */ 1036 ena_log(pdev, DBG, "Using tag %p for buffers' DMA mapping, mbuf %p len: %d\n", 1037 adapter->rx_buf_tag,rx_info->mbuf, rx_info->mbuf->m_len); 1038 error = bus_dmamap_load_mbuf_sg(adapter->rx_buf_tag, rx_info->map, 1039 rx_info->mbuf, segs, &nsegs, BUS_DMA_NOWAIT); 1040 if (unlikely((error != 0) || (nsegs != 1))) { 1041 ena_log(pdev, WARN, 1042 "failed to map mbuf, error: %d, nsegs: %d\n", error, nsegs); 1043 counter_u64_add(rx_ring->rx_stats.dma_mapping_err, 1); 1044 goto exit; 1045 1046 } 1047 1048 bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map, BUS_DMASYNC_PREREAD); 1049 1050 ena_buf = &rx_info->ena_buf; 1051 ena_buf->paddr = segs[0].ds_addr; 1052 ena_buf->len = mlen; 1053 1054 ena_log(pdev, DBG, "ALLOC RX BUF: mbuf %p, rx_info %p, len %d, paddr %#jx\n", 1055 rx_info->mbuf, rx_info,ena_buf->len, (uintmax_t)ena_buf->paddr); 1056 1057 return (0); 1058 1059 exit: 1060 m_freem(rx_info->mbuf); 1061 rx_info->mbuf = NULL; 1062 return (EFAULT); 1063 } 1064 1065 static void 1066 ena_free_rx_mbuf(struct ena_adapter *adapter, struct ena_ring *rx_ring, 1067 struct ena_rx_buffer *rx_info) 1068 { 1069 1070 if (rx_info->mbuf == NULL) { 1071 ena_log(adapter->pdev, WARN, 1072 "Trying to free unallocated buffer\n"); 1073 return; 1074 } 1075 1076 bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map, 1077 BUS_DMASYNC_POSTREAD); 1078 bus_dmamap_unload(adapter->rx_buf_tag, rx_info->map); 1079 m_freem(rx_info->mbuf); 1080 rx_info->mbuf = NULL; 1081 } 1082 1083 /** 1084 * ena_refill_rx_bufs - Refills ring with descriptors 1085 * @rx_ring: the ring which we want to feed with free descriptors 1086 * @num: number of descriptors to refill 1087 * Refills the ring with newly allocated DMA-mapped mbufs for receiving 1088 **/ 1089 int 1090 ena_refill_rx_bufs(struct ena_ring *rx_ring, uint32_t num) 1091 { 1092 struct ena_adapter *adapter = rx_ring->adapter; 1093 device_t pdev = adapter->pdev; 1094 uint16_t next_to_use, req_id; 1095 uint32_t i; 1096 int rc; 1097 1098 ena_log_io(adapter->pdev, DBG, "refill qid: %d\n", rx_ring->qid); 1099 1100 next_to_use = rx_ring->next_to_use; 1101 1102 for (i = 0; i < num; i++) { 1103 struct ena_rx_buffer *rx_info; 1104 1105 ena_log_io(pdev, DBG, "RX buffer - next to use: %d\n", 1106 next_to_use); 1107 1108 req_id = rx_ring->free_rx_ids[next_to_use]; 1109 rx_info = &rx_ring->rx_buffer_info[req_id]; 1110 #ifdef DEV_NETMAP 1111 if (ena_rx_ring_in_netmap(adapter, rx_ring->qid)) 1112 rc = ena_netmap_alloc_rx_slot(adapter, rx_ring, rx_info); 1113 else 1114 #endif /* DEV_NETMAP */ 1115 rc = ena_alloc_rx_mbuf(adapter, rx_ring, rx_info); 1116 if (unlikely(rc != 0)) { 1117 ena_log_io(pdev, WARN, 1118 "failed to alloc buffer for rx queue %d\n", 1119 rx_ring->qid); 1120 break; 1121 } 1122 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq, 1123 &rx_info->ena_buf, req_id); 1124 if (unlikely(rc != 0)) { 1125 ena_log_io(pdev, WARN, 1126 "failed to add buffer for rx queue %d\n", 1127 rx_ring->qid); 1128 break; 1129 } 1130 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use, 1131 rx_ring->ring_size); 1132 } 1133 1134 if (unlikely(i < num)) { 1135 counter_u64_add(rx_ring->rx_stats.refil_partial, 1); 1136 ena_log_io(pdev, WARN, 1137 "refilled rx qid %d with only %d mbufs (from %d)\n", 1138 rx_ring->qid, i, num); 1139 } 1140 1141 if (likely(i != 0)) 1142 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq); 1143 1144 rx_ring->next_to_use = next_to_use; 1145 return (i); 1146 } 1147 1148 int 1149 ena_update_buf_ring_size(struct ena_adapter *adapter, 1150 uint32_t new_buf_ring_size) 1151 { 1152 uint32_t old_buf_ring_size; 1153 int rc = 0; 1154 bool dev_was_up; 1155 1156 ENA_LOCK_LOCK(adapter); 1157 1158 old_buf_ring_size = adapter->buf_ring_size; 1159 adapter->buf_ring_size = new_buf_ring_size; 1160 1161 dev_was_up = ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter); 1162 ena_down(adapter); 1163 1164 /* Reconfigure buf ring for all Tx rings. */ 1165 ena_free_all_io_rings_resources(adapter); 1166 ena_init_io_rings_advanced(adapter); 1167 if (dev_was_up) { 1168 /* 1169 * If ena_up() fails, it's not because of recent buf_ring size 1170 * changes. Because of that, we just want to revert old drbr 1171 * value and trigger the reset because something else had to 1172 * go wrong. 1173 */ 1174 rc = ena_up(adapter); 1175 if (unlikely(rc != 0)) { 1176 ena_log(adapter->pdev, ERR, 1177 "Failed to configure device after setting new drbr size: %u. Reverting old value: %u and triggering the reset\n", 1178 new_buf_ring_size, old_buf_ring_size); 1179 1180 /* Revert old size and trigger the reset */ 1181 adapter->buf_ring_size = old_buf_ring_size; 1182 ena_free_all_io_rings_resources(adapter); 1183 ena_init_io_rings_advanced(adapter); 1184 1185 ENA_FLAG_SET_ATOMIC(ENA_FLAG_DEV_UP_BEFORE_RESET, 1186 adapter); 1187 ena_trigger_reset(adapter, ENA_REGS_RESET_OS_TRIGGER); 1188 1189 } 1190 } 1191 1192 ENA_LOCK_UNLOCK(adapter); 1193 1194 return (rc); 1195 } 1196 1197 int 1198 ena_update_queue_size(struct ena_adapter *adapter, uint32_t new_tx_size, 1199 uint32_t new_rx_size) 1200 { 1201 uint32_t old_tx_size, old_rx_size; 1202 int rc = 0; 1203 bool dev_was_up; 1204 1205 ENA_LOCK_LOCK(adapter); 1206 1207 old_tx_size = adapter->requested_tx_ring_size; 1208 old_rx_size = adapter->requested_rx_ring_size; 1209 adapter->requested_tx_ring_size = new_tx_size; 1210 adapter->requested_rx_ring_size = new_rx_size; 1211 1212 dev_was_up = ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter); 1213 ena_down(adapter); 1214 1215 /* Configure queues with new size. */ 1216 ena_init_io_rings_basic(adapter); 1217 if (dev_was_up) { 1218 rc = ena_up(adapter); 1219 if (unlikely(rc != 0)) { 1220 ena_log(adapter->pdev, ERR, 1221 "Failed to configure device with the new sizes - Tx: %u Rx: %u. Reverting old values - Tx: %u Rx: %u\n", 1222 new_tx_size, new_rx_size, old_tx_size, old_rx_size); 1223 1224 /* Revert old size. */ 1225 adapter->requested_tx_ring_size = old_tx_size; 1226 adapter->requested_rx_ring_size = old_rx_size; 1227 ena_init_io_rings_basic(adapter); 1228 1229 /* And try again. */ 1230 rc = ena_up(adapter); 1231 if (unlikely(rc != 0)) { 1232 ena_log(adapter->pdev, ERR, 1233 "Failed to revert old queue sizes. Triggering device reset.\n"); 1234 /* 1235 * If we've failed again, something had to go 1236 * wrong. After reset, the device should try to 1237 * go up 1238 */ 1239 ENA_FLAG_SET_ATOMIC( 1240 ENA_FLAG_DEV_UP_BEFORE_RESET, adapter); 1241 ena_trigger_reset(adapter, 1242 ENA_REGS_RESET_OS_TRIGGER); 1243 } 1244 } 1245 } 1246 1247 ENA_LOCK_UNLOCK(adapter); 1248 1249 return (rc); 1250 } 1251 1252 static void 1253 ena_update_io_rings(struct ena_adapter *adapter, uint32_t num) 1254 { 1255 ena_free_all_io_rings_resources(adapter); 1256 /* Force indirection table to be reinitialized */ 1257 ena_com_rss_destroy(adapter->ena_dev); 1258 1259 adapter->num_io_queues = num; 1260 ena_init_io_rings(adapter); 1261 } 1262 1263 /* Caller should sanitize new_num */ 1264 int 1265 ena_update_io_queue_nb(struct ena_adapter *adapter, uint32_t new_num) 1266 { 1267 uint32_t old_num; 1268 int rc = 0; 1269 bool dev_was_up; 1270 1271 ENA_LOCK_LOCK(adapter); 1272 1273 dev_was_up = ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter); 1274 old_num = adapter->num_io_queues; 1275 ena_down(adapter); 1276 1277 ena_update_io_rings(adapter, new_num); 1278 1279 if (dev_was_up) { 1280 rc = ena_up(adapter); 1281 if (unlikely(rc != 0)) { 1282 ena_log(adapter->pdev, ERR, 1283 "Failed to configure device with %u IO queues. " 1284 "Reverting to previous value: %u\n", 1285 new_num, old_num); 1286 1287 ena_update_io_rings(adapter, old_num); 1288 1289 rc = ena_up(adapter); 1290 if (unlikely(rc != 0)) { 1291 ena_log(adapter->pdev, ERR, 1292 "Failed to revert to previous setup IO " 1293 "queues. Triggering device reset.\n"); 1294 ENA_FLAG_SET_ATOMIC( 1295 ENA_FLAG_DEV_UP_BEFORE_RESET, adapter); 1296 ena_trigger_reset(adapter, 1297 ENA_REGS_RESET_OS_TRIGGER); 1298 } 1299 } 1300 } 1301 1302 ENA_LOCK_UNLOCK(adapter); 1303 1304 return (rc); 1305 } 1306 1307 static void 1308 ena_free_rx_bufs(struct ena_adapter *adapter, unsigned int qid) 1309 { 1310 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 1311 unsigned int i; 1312 1313 for (i = 0; i < rx_ring->ring_size; i++) { 1314 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i]; 1315 1316 if (rx_info->mbuf != NULL) 1317 ena_free_rx_mbuf(adapter, rx_ring, rx_info); 1318 #ifdef DEV_NETMAP 1319 if (((if_getflags(adapter->ifp) & IFF_DYING) == 0) && 1320 (adapter->ifp->if_capenable & IFCAP_NETMAP)) { 1321 if (rx_info->netmap_buf_idx != 0) 1322 ena_netmap_free_rx_slot(adapter, rx_ring, 1323 rx_info); 1324 } 1325 #endif /* DEV_NETMAP */ 1326 } 1327 } 1328 1329 /** 1330 * ena_refill_all_rx_bufs - allocate all queues Rx buffers 1331 * @adapter: network interface device structure 1332 * 1333 */ 1334 static void 1335 ena_refill_all_rx_bufs(struct ena_adapter *adapter) 1336 { 1337 struct ena_ring *rx_ring; 1338 int i, rc, bufs_num; 1339 1340 for (i = 0; i < adapter->num_io_queues; i++) { 1341 rx_ring = &adapter->rx_ring[i]; 1342 bufs_num = rx_ring->ring_size - 1; 1343 rc = ena_refill_rx_bufs(rx_ring, bufs_num); 1344 if (unlikely(rc != bufs_num)) 1345 ena_log_io(adapter->pdev, WARN, 1346 "refilling Queue %d failed. " 1347 "Allocated %d buffers from: %d\n", i, rc, bufs_num); 1348 #ifdef DEV_NETMAP 1349 rx_ring->initialized = true; 1350 #endif /* DEV_NETMAP */ 1351 } 1352 } 1353 1354 static void 1355 ena_free_all_rx_bufs(struct ena_adapter *adapter) 1356 { 1357 int i; 1358 1359 for (i = 0; i < adapter->num_io_queues; i++) 1360 ena_free_rx_bufs(adapter, i); 1361 } 1362 1363 /** 1364 * ena_free_tx_bufs - Free Tx Buffers per Queue 1365 * @adapter: network interface device structure 1366 * @qid: queue index 1367 **/ 1368 static void 1369 ena_free_tx_bufs(struct ena_adapter *adapter, unsigned int qid) 1370 { 1371 bool print_once = true; 1372 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 1373 1374 ENA_RING_MTX_LOCK(tx_ring); 1375 for (int i = 0; i < tx_ring->ring_size; i++) { 1376 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i]; 1377 1378 if (tx_info->mbuf == NULL) 1379 continue; 1380 1381 if (print_once) { 1382 ena_log(adapter->pdev, WARN, 1383 "free uncompleted tx mbuf qid %d idx 0x%x\n", 1384 qid, i); 1385 print_once = false; 1386 } else { 1387 ena_log(adapter->pdev, DBG, 1388 "free uncompleted tx mbuf qid %d idx 0x%x\n", 1389 qid, i); 1390 } 1391 1392 bus_dmamap_sync(adapter->tx_buf_tag, tx_info->dmamap, 1393 BUS_DMASYNC_POSTWRITE); 1394 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->dmamap); 1395 1396 m_free(tx_info->mbuf); 1397 tx_info->mbuf = NULL; 1398 } 1399 ENA_RING_MTX_UNLOCK(tx_ring); 1400 } 1401 1402 static void 1403 ena_free_all_tx_bufs(struct ena_adapter *adapter) 1404 { 1405 1406 for (int i = 0; i < adapter->num_io_queues; i++) 1407 ena_free_tx_bufs(adapter, i); 1408 } 1409 1410 static void 1411 ena_destroy_all_tx_queues(struct ena_adapter *adapter) 1412 { 1413 uint16_t ena_qid; 1414 int i; 1415 1416 for (i = 0; i < adapter->num_io_queues; i++) { 1417 ena_qid = ENA_IO_TXQ_IDX(i); 1418 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1419 } 1420 } 1421 1422 static void 1423 ena_destroy_all_rx_queues(struct ena_adapter *adapter) 1424 { 1425 uint16_t ena_qid; 1426 int i; 1427 1428 for (i = 0; i < adapter->num_io_queues; i++) { 1429 ena_qid = ENA_IO_RXQ_IDX(i); 1430 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1431 } 1432 } 1433 1434 static void 1435 ena_destroy_all_io_queues(struct ena_adapter *adapter) 1436 { 1437 struct ena_que *queue; 1438 int i; 1439 1440 for (i = 0; i < adapter->num_io_queues; i++) { 1441 queue = &adapter->que[i]; 1442 while (taskqueue_cancel(queue->cleanup_tq, 1443 &queue->cleanup_task, NULL)) 1444 taskqueue_drain(queue->cleanup_tq, 1445 &queue->cleanup_task); 1446 taskqueue_free(queue->cleanup_tq); 1447 } 1448 1449 ena_destroy_all_tx_queues(adapter); 1450 ena_destroy_all_rx_queues(adapter); 1451 } 1452 1453 static int 1454 ena_create_io_queues(struct ena_adapter *adapter) 1455 { 1456 struct ena_com_dev *ena_dev = adapter->ena_dev; 1457 struct ena_com_create_io_ctx ctx; 1458 struct ena_ring *ring; 1459 struct ena_que *queue; 1460 uint16_t ena_qid; 1461 uint32_t msix_vector; 1462 int rc, i; 1463 1464 /* Create TX queues */ 1465 for (i = 0; i < adapter->num_io_queues; i++) { 1466 msix_vector = ENA_IO_IRQ_IDX(i); 1467 ena_qid = ENA_IO_TXQ_IDX(i); 1468 ctx.mem_queue_type = ena_dev->tx_mem_queue_type; 1469 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX; 1470 ctx.queue_size = adapter->requested_tx_ring_size; 1471 ctx.msix_vector = msix_vector; 1472 ctx.qid = ena_qid; 1473 rc = ena_com_create_io_queue(ena_dev, &ctx); 1474 if (rc != 0) { 1475 ena_log(adapter->pdev, ERR, 1476 "Failed to create io TX queue #%d rc: %d\n", i, rc); 1477 goto err_tx; 1478 } 1479 ring = &adapter->tx_ring[i]; 1480 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 1481 &ring->ena_com_io_sq, 1482 &ring->ena_com_io_cq); 1483 if (rc != 0) { 1484 ena_log(adapter->pdev, ERR, 1485 "Failed to get TX queue handlers. TX queue num" 1486 " %d rc: %d\n", i, rc); 1487 ena_com_destroy_io_queue(ena_dev, ena_qid); 1488 goto err_tx; 1489 } 1490 } 1491 1492 /* Create RX queues */ 1493 for (i = 0; i < adapter->num_io_queues; i++) { 1494 msix_vector = ENA_IO_IRQ_IDX(i); 1495 ena_qid = ENA_IO_RXQ_IDX(i); 1496 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 1497 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX; 1498 ctx.queue_size = adapter->requested_rx_ring_size; 1499 ctx.msix_vector = msix_vector; 1500 ctx.qid = ena_qid; 1501 rc = ena_com_create_io_queue(ena_dev, &ctx); 1502 if (unlikely(rc != 0)) { 1503 ena_log(adapter->pdev, ERR, 1504 "Failed to create io RX queue[%d] rc: %d\n", i, rc); 1505 goto err_rx; 1506 } 1507 1508 ring = &adapter->rx_ring[i]; 1509 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 1510 &ring->ena_com_io_sq, 1511 &ring->ena_com_io_cq); 1512 if (unlikely(rc != 0)) { 1513 ena_log(adapter->pdev, ERR, 1514 "Failed to get RX queue handlers. RX queue num" 1515 " %d rc: %d\n", i, rc); 1516 ena_com_destroy_io_queue(ena_dev, ena_qid); 1517 goto err_rx; 1518 } 1519 } 1520 1521 for (i = 0; i < adapter->num_io_queues; i++) { 1522 queue = &adapter->que[i]; 1523 1524 NET_TASK_INIT(&queue->cleanup_task, 0, ena_cleanup, queue); 1525 queue->cleanup_tq = taskqueue_create_fast("ena cleanup", 1526 M_WAITOK, taskqueue_thread_enqueue, &queue->cleanup_tq); 1527 1528 taskqueue_start_threads(&queue->cleanup_tq, 1, PI_NET, 1529 "%s queue %d cleanup", 1530 device_get_nameunit(adapter->pdev), i); 1531 } 1532 1533 return (0); 1534 1535 err_rx: 1536 while (i--) 1537 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i)); 1538 i = adapter->num_io_queues; 1539 err_tx: 1540 while (i--) 1541 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i)); 1542 1543 return (ENXIO); 1544 } 1545 1546 /********************************************************************* 1547 * 1548 * MSIX & Interrupt Service routine 1549 * 1550 **********************************************************************/ 1551 1552 /** 1553 * ena_handle_msix - MSIX Interrupt Handler for admin/async queue 1554 * @arg: interrupt number 1555 **/ 1556 static void 1557 ena_intr_msix_mgmnt(void *arg) 1558 { 1559 struct ena_adapter *adapter = (struct ena_adapter *)arg; 1560 1561 ena_com_admin_q_comp_intr_handler(adapter->ena_dev); 1562 if (likely(ENA_FLAG_ISSET(ENA_FLAG_DEVICE_RUNNING, adapter))) 1563 ena_com_aenq_intr_handler(adapter->ena_dev, arg); 1564 } 1565 1566 /** 1567 * ena_handle_msix - MSIX Interrupt Handler for Tx/Rx 1568 * @arg: queue 1569 **/ 1570 static int 1571 ena_handle_msix(void *arg) 1572 { 1573 struct ena_que *queue = arg; 1574 struct ena_adapter *adapter = queue->adapter; 1575 if_t ifp = adapter->ifp; 1576 1577 if (unlikely((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0)) 1578 return (FILTER_STRAY); 1579 1580 taskqueue_enqueue(queue->cleanup_tq, &queue->cleanup_task); 1581 1582 return (FILTER_HANDLED); 1583 } 1584 1585 static int 1586 ena_enable_msix(struct ena_adapter *adapter) 1587 { 1588 device_t dev = adapter->pdev; 1589 int msix_vecs, msix_req; 1590 int i, rc = 0; 1591 1592 if (ENA_FLAG_ISSET(ENA_FLAG_MSIX_ENABLED, adapter)) { 1593 ena_log(dev, ERR, "Error, MSI-X is already enabled\n"); 1594 return (EINVAL); 1595 } 1596 1597 /* Reserved the max msix vectors we might need */ 1598 msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues); 1599 1600 adapter->msix_entries = malloc(msix_vecs * sizeof(struct msix_entry), 1601 M_DEVBUF, M_WAITOK | M_ZERO); 1602 1603 ena_log(dev, DBG, "trying to enable MSI-X, vectors: %d\n", 1604 msix_vecs); 1605 1606 for (i = 0; i < msix_vecs; i++) { 1607 adapter->msix_entries[i].entry = i; 1608 /* Vectors must start from 1 */ 1609 adapter->msix_entries[i].vector = i + 1; 1610 } 1611 1612 msix_req = msix_vecs; 1613 rc = pci_alloc_msix(dev, &msix_vecs); 1614 if (unlikely(rc != 0)) { 1615 ena_log(dev, ERR, 1616 "Failed to enable MSIX, vectors %d rc %d\n", msix_vecs, rc); 1617 1618 rc = ENOSPC; 1619 goto err_msix_free; 1620 } 1621 1622 if (msix_vecs != msix_req) { 1623 if (msix_vecs == ENA_ADMIN_MSIX_VEC) { 1624 ena_log(dev, ERR, 1625 "Not enough number of MSI-x allocated: %d\n", 1626 msix_vecs); 1627 pci_release_msi(dev); 1628 rc = ENOSPC; 1629 goto err_msix_free; 1630 } 1631 ena_log(dev, ERR, "Enable only %d MSI-x (out of %d), reduce " 1632 "the number of queues\n", msix_vecs, msix_req); 1633 } 1634 1635 adapter->msix_vecs = msix_vecs; 1636 ENA_FLAG_SET_ATOMIC(ENA_FLAG_MSIX_ENABLED, adapter); 1637 1638 return (0); 1639 1640 err_msix_free: 1641 free(adapter->msix_entries, M_DEVBUF); 1642 adapter->msix_entries = NULL; 1643 1644 return (rc); 1645 } 1646 1647 static void 1648 ena_setup_mgmnt_intr(struct ena_adapter *adapter) 1649 { 1650 1651 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, 1652 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s", 1653 device_get_nameunit(adapter->pdev)); 1654 /* 1655 * Handler is NULL on purpose, it will be set 1656 * when mgmnt interrupt is acquired 1657 */ 1658 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = NULL; 1659 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter; 1660 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector = 1661 adapter->msix_entries[ENA_MGMNT_IRQ_IDX].vector; 1662 } 1663 1664 static int 1665 ena_setup_io_intr(struct ena_adapter *adapter) 1666 { 1667 static int last_bind_cpu = -1; 1668 int irq_idx; 1669 1670 if (adapter->msix_entries == NULL) 1671 return (EINVAL); 1672 1673 for (int i = 0; i < adapter->num_io_queues; i++) { 1674 irq_idx = ENA_IO_IRQ_IDX(i); 1675 1676 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, 1677 "%s-TxRx-%d", device_get_nameunit(adapter->pdev), i); 1678 adapter->irq_tbl[irq_idx].handler = ena_handle_msix; 1679 adapter->irq_tbl[irq_idx].data = &adapter->que[i]; 1680 adapter->irq_tbl[irq_idx].vector = 1681 adapter->msix_entries[irq_idx].vector; 1682 ena_log(adapter->pdev, DBG, "ena_setup_io_intr vector: %d\n", 1683 adapter->msix_entries[irq_idx].vector); 1684 1685 /* 1686 * We want to bind rings to the corresponding cpu 1687 * using something similar to the RSS round-robin technique. 1688 */ 1689 if (unlikely(last_bind_cpu < 0)) 1690 last_bind_cpu = CPU_FIRST(); 1691 adapter->que[i].cpu = adapter->irq_tbl[irq_idx].cpu = 1692 last_bind_cpu; 1693 last_bind_cpu = CPU_NEXT(last_bind_cpu); 1694 } 1695 1696 return (0); 1697 } 1698 1699 static int 1700 ena_request_mgmnt_irq(struct ena_adapter *adapter) 1701 { 1702 device_t pdev = adapter->pdev; 1703 struct ena_irq *irq; 1704 unsigned long flags; 1705 int rc, rcc; 1706 1707 flags = RF_ACTIVE | RF_SHAREABLE; 1708 1709 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 1710 irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ, 1711 &irq->vector, flags); 1712 1713 if (unlikely(irq->res == NULL)) { 1714 ena_log(pdev, ERR, "could not allocate irq vector: %d\n", 1715 irq->vector); 1716 return (ENXIO); 1717 } 1718 1719 rc = bus_setup_intr(adapter->pdev, irq->res, 1720 INTR_TYPE_NET | INTR_MPSAFE, NULL, ena_intr_msix_mgmnt, 1721 irq->data, &irq->cookie); 1722 if (unlikely(rc != 0)) { 1723 ena_log(pdev, ERR, "failed to register " 1724 "interrupt handler for irq %ju: %d\n", 1725 rman_get_start(irq->res), rc); 1726 goto err_res_free; 1727 } 1728 irq->requested = true; 1729 1730 return (rc); 1731 1732 err_res_free: 1733 ena_log(pdev, INFO, "releasing resource for irq %d\n", irq->vector); 1734 rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 1735 irq->vector, irq->res); 1736 if (unlikely(rcc != 0)) 1737 ena_log(pdev, ERR, "dev has no parent while " 1738 "releasing res for irq: %d\n", irq->vector); 1739 irq->res = NULL; 1740 1741 return (rc); 1742 } 1743 1744 static int 1745 ena_request_io_irq(struct ena_adapter *adapter) 1746 { 1747 device_t pdev = adapter->pdev; 1748 struct ena_irq *irq; 1749 unsigned long flags = 0; 1750 int rc = 0, i, rcc; 1751 1752 if (unlikely(!ENA_FLAG_ISSET(ENA_FLAG_MSIX_ENABLED, adapter))) { 1753 ena_log(pdev, ERR, 1754 "failed to request I/O IRQ: MSI-X is not enabled\n"); 1755 return (EINVAL); 1756 } else { 1757 flags = RF_ACTIVE | RF_SHAREABLE; 1758 } 1759 1760 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) { 1761 irq = &adapter->irq_tbl[i]; 1762 1763 if (unlikely(irq->requested)) 1764 continue; 1765 1766 irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ, 1767 &irq->vector, flags); 1768 if (unlikely(irq->res == NULL)) { 1769 rc = ENOMEM; 1770 ena_log(pdev, ERR, "could not allocate irq vector: %d\n", 1771 irq->vector); 1772 goto err; 1773 } 1774 1775 rc = bus_setup_intr(adapter->pdev, irq->res, 1776 INTR_TYPE_NET | INTR_MPSAFE, irq->handler, NULL, 1777 irq->data, &irq->cookie); 1778 if (unlikely(rc != 0)) { 1779 ena_log(pdev, ERR, "failed to register " 1780 "interrupt handler for irq %ju: %d\n", 1781 rman_get_start(irq->res), rc); 1782 goto err; 1783 } 1784 irq->requested = true; 1785 } 1786 1787 return (rc); 1788 1789 err: 1790 1791 for (; i >= ENA_IO_IRQ_FIRST_IDX; i--) { 1792 irq = &adapter->irq_tbl[i]; 1793 rcc = 0; 1794 1795 /* Once we entered err: section and irq->requested is true we 1796 free both intr and resources */ 1797 if (irq->requested) 1798 rcc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie); 1799 if (unlikely(rcc != 0)) 1800 ena_log(pdev, ERR, "could not release irq: %d, error: %d\n", 1801 irq->vector, rcc); 1802 1803 /* If we entred err: section without irq->requested set we know 1804 it was bus_alloc_resource_any() that needs cleanup, provided 1805 res is not NULL. In case res is NULL no work in needed in 1806 this iteration */ 1807 rcc = 0; 1808 if (irq->res != NULL) { 1809 rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 1810 irq->vector, irq->res); 1811 } 1812 if (unlikely(rcc != 0)) 1813 ena_log(pdev, ERR, "dev has no parent while " 1814 "releasing res for irq: %d\n", irq->vector); 1815 irq->requested = false; 1816 irq->res = NULL; 1817 } 1818 1819 return (rc); 1820 } 1821 1822 static void 1823 ena_free_mgmnt_irq(struct ena_adapter *adapter) 1824 { 1825 device_t pdev = adapter->pdev; 1826 struct ena_irq *irq; 1827 int rc; 1828 1829 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 1830 if (irq->requested) { 1831 ena_log(pdev, DBG, "tear down irq: %d\n", irq->vector); 1832 rc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie); 1833 if (unlikely(rc != 0)) 1834 ena_log(pdev, ERR, "failed to tear down irq: %d\n", 1835 irq->vector); 1836 irq->requested = 0; 1837 } 1838 1839 if (irq->res != NULL) { 1840 ena_log(pdev, DBG, "release resource irq: %d\n", irq->vector); 1841 rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 1842 irq->vector, irq->res); 1843 irq->res = NULL; 1844 if (unlikely(rc != 0)) 1845 ena_log(pdev, ERR, "dev has no parent while " 1846 "releasing res for irq: %d\n", irq->vector); 1847 } 1848 } 1849 1850 static void 1851 ena_free_io_irq(struct ena_adapter *adapter) 1852 { 1853 device_t pdev = adapter->pdev; 1854 struct ena_irq *irq; 1855 int rc; 1856 1857 for (int i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) { 1858 irq = &adapter->irq_tbl[i]; 1859 if (irq->requested) { 1860 ena_log(pdev, DBG, "tear down irq: %d\n", irq->vector); 1861 rc = bus_teardown_intr(adapter->pdev, irq->res, 1862 irq->cookie); 1863 if (unlikely(rc != 0)) { 1864 ena_log(pdev, ERR, "failed to tear down irq: %d\n", 1865 irq->vector); 1866 } 1867 irq->requested = 0; 1868 } 1869 1870 if (irq->res != NULL) { 1871 ena_log(pdev, DBG, "release resource irq: %d\n", 1872 irq->vector); 1873 rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 1874 irq->vector, irq->res); 1875 irq->res = NULL; 1876 if (unlikely(rc != 0)) { 1877 ena_log(pdev, ERR, "dev has no parent" 1878 " while releasing res for irq: %d\n", 1879 irq->vector); 1880 } 1881 } 1882 } 1883 } 1884 1885 static void 1886 ena_free_irqs(struct ena_adapter* adapter) 1887 { 1888 1889 ena_free_io_irq(adapter); 1890 ena_free_mgmnt_irq(adapter); 1891 ena_disable_msix(adapter); 1892 } 1893 1894 static void 1895 ena_disable_msix(struct ena_adapter *adapter) 1896 { 1897 1898 if (ENA_FLAG_ISSET(ENA_FLAG_MSIX_ENABLED, adapter)) { 1899 ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_MSIX_ENABLED, adapter); 1900 pci_release_msi(adapter->pdev); 1901 } 1902 1903 adapter->msix_vecs = 0; 1904 free(adapter->msix_entries, M_DEVBUF); 1905 adapter->msix_entries = NULL; 1906 } 1907 1908 static void 1909 ena_unmask_all_io_irqs(struct ena_adapter *adapter) 1910 { 1911 struct ena_com_io_cq* io_cq; 1912 struct ena_eth_io_intr_reg intr_reg; 1913 uint16_t ena_qid; 1914 int i; 1915 1916 /* Unmask interrupts for all queues */ 1917 for (i = 0; i < adapter->num_io_queues; i++) { 1918 ena_qid = ENA_IO_TXQ_IDX(i); 1919 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 1920 ena_com_update_intr_reg(&intr_reg, 0, 0, true); 1921 ena_com_unmask_intr(io_cq, &intr_reg); 1922 } 1923 } 1924 1925 /* Configure the Rx forwarding */ 1926 static int 1927 ena_rss_configure(struct ena_adapter *adapter) 1928 { 1929 struct ena_com_dev *ena_dev = adapter->ena_dev; 1930 int rc; 1931 1932 /* In case the RSS table was destroyed */ 1933 if (!ena_dev->rss.tbl_log_size) { 1934 rc = ena_rss_init_default(adapter); 1935 if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) { 1936 ena_log(adapter->pdev, ERR, 1937 "WARNING: RSS was not properly re-initialized," 1938 " it will affect bandwidth\n"); 1939 ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_RSS_ACTIVE, adapter); 1940 return (rc); 1941 } 1942 } 1943 1944 /* Set indirect table */ 1945 rc = ena_com_indirect_table_set(ena_dev); 1946 if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) 1947 return (rc); 1948 1949 /* Configure hash function (if supported) */ 1950 rc = ena_com_set_hash_function(ena_dev); 1951 if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) 1952 return (rc); 1953 1954 /* Configure hash inputs (if supported) */ 1955 rc = ena_com_set_hash_ctrl(ena_dev); 1956 if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) 1957 return (rc); 1958 1959 return (0); 1960 } 1961 1962 static int 1963 ena_up_complete(struct ena_adapter *adapter) 1964 { 1965 int rc; 1966 1967 if (likely(ENA_FLAG_ISSET(ENA_FLAG_RSS_ACTIVE, adapter))) { 1968 rc = ena_rss_configure(adapter); 1969 if (rc != 0) { 1970 ena_log(adapter->pdev, ERR, 1971 "Failed to configure RSS\n"); 1972 return (rc); 1973 } 1974 } 1975 1976 rc = ena_change_mtu(adapter->ifp, adapter->ifp->if_mtu); 1977 if (unlikely(rc != 0)) 1978 return (rc); 1979 1980 ena_refill_all_rx_bufs(adapter); 1981 ena_reset_counters((counter_u64_t *)&adapter->hw_stats, 1982 sizeof(adapter->hw_stats)); 1983 1984 return (0); 1985 } 1986 1987 static void 1988 set_io_rings_size(struct ena_adapter *adapter, int new_tx_size, 1989 int new_rx_size) 1990 { 1991 int i; 1992 1993 for (i = 0; i < adapter->num_io_queues; i++) { 1994 adapter->tx_ring[i].ring_size = new_tx_size; 1995 adapter->rx_ring[i].ring_size = new_rx_size; 1996 } 1997 } 1998 1999 static int 2000 create_queues_with_size_backoff(struct ena_adapter *adapter) 2001 { 2002 device_t pdev = adapter->pdev; 2003 int rc; 2004 uint32_t cur_rx_ring_size, cur_tx_ring_size; 2005 uint32_t new_rx_ring_size, new_tx_ring_size; 2006 2007 /* 2008 * Current queue sizes might be set to smaller than the requested 2009 * ones due to past queue allocation failures. 2010 */ 2011 set_io_rings_size(adapter, adapter->requested_tx_ring_size, 2012 adapter->requested_rx_ring_size); 2013 2014 while (1) { 2015 /* Allocate transmit descriptors */ 2016 rc = ena_setup_all_tx_resources(adapter); 2017 if (unlikely(rc != 0)) { 2018 ena_log(pdev, ERR, "err_setup_tx\n"); 2019 goto err_setup_tx; 2020 } 2021 2022 /* Allocate receive descriptors */ 2023 rc = ena_setup_all_rx_resources(adapter); 2024 if (unlikely(rc != 0)) { 2025 ena_log(pdev, ERR, "err_setup_rx\n"); 2026 goto err_setup_rx; 2027 } 2028 2029 /* Create IO queues for Rx & Tx */ 2030 rc = ena_create_io_queues(adapter); 2031 if (unlikely(rc != 0)) { 2032 ena_log(pdev, ERR, 2033 "create IO queues failed\n"); 2034 goto err_io_que; 2035 } 2036 2037 return (0); 2038 2039 err_io_que: 2040 ena_free_all_rx_resources(adapter); 2041 err_setup_rx: 2042 ena_free_all_tx_resources(adapter); 2043 err_setup_tx: 2044 /* 2045 * Lower the ring size if ENOMEM. Otherwise, return the 2046 * error straightaway. 2047 */ 2048 if (unlikely(rc != ENOMEM)) { 2049 ena_log(pdev, ERR, 2050 "Queue creation failed with error code: %d\n", rc); 2051 return (rc); 2052 } 2053 2054 cur_tx_ring_size = adapter->tx_ring[0].ring_size; 2055 cur_rx_ring_size = adapter->rx_ring[0].ring_size; 2056 2057 ena_log(pdev, ERR, 2058 "Not enough memory to create queues with sizes TX=%d, RX=%d\n", 2059 cur_tx_ring_size, cur_rx_ring_size); 2060 2061 new_tx_ring_size = cur_tx_ring_size; 2062 new_rx_ring_size = cur_rx_ring_size; 2063 2064 /* 2065 * Decrease the size of a larger queue, or decrease both if they are 2066 * the same size. 2067 */ 2068 if (cur_rx_ring_size <= cur_tx_ring_size) 2069 new_tx_ring_size = cur_tx_ring_size / 2; 2070 if (cur_rx_ring_size >= cur_tx_ring_size) 2071 new_rx_ring_size = cur_rx_ring_size / 2; 2072 2073 if (new_tx_ring_size < ENA_MIN_RING_SIZE || 2074 new_rx_ring_size < ENA_MIN_RING_SIZE) { 2075 ena_log(pdev, ERR, 2076 "Queue creation failed with the smallest possible queue size" 2077 "of %d for both queues. Not retrying with smaller queues\n", 2078 ENA_MIN_RING_SIZE); 2079 return (rc); 2080 } 2081 2082 ena_log(pdev, INFO, 2083 "Retrying queue creation with sizes TX=%d, RX=%d\n", 2084 new_tx_ring_size, new_rx_ring_size); 2085 2086 set_io_rings_size(adapter, new_tx_ring_size, new_rx_ring_size); 2087 } 2088 } 2089 2090 int 2091 ena_up(struct ena_adapter *adapter) 2092 { 2093 int rc = 0; 2094 2095 if (unlikely(device_is_attached(adapter->pdev) == 0)) { 2096 ena_log(adapter->pdev, ERR, "device is not attached!\n"); 2097 return (ENXIO); 2098 } 2099 2100 if (ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter)) 2101 return (0); 2102 2103 ena_log(adapter->pdev, INFO, "device is going UP\n"); 2104 2105 /* setup interrupts for IO queues */ 2106 rc = ena_setup_io_intr(adapter); 2107 if (unlikely(rc != 0)) { 2108 ena_log(adapter->pdev, ERR, "error setting up IO interrupt\n"); 2109 goto error; 2110 } 2111 rc = ena_request_io_irq(adapter); 2112 if (unlikely(rc != 0)) { 2113 ena_log(adapter->pdev, ERR, "err_req_irq\n"); 2114 goto error; 2115 } 2116 2117 ena_log(adapter->pdev, INFO, 2118 "Creating %u IO queues. Rx queue size: %d, Tx queue size: %d, " 2119 "LLQ is %s\n", 2120 adapter->num_io_queues, 2121 adapter->requested_rx_ring_size, 2122 adapter->requested_tx_ring_size, 2123 (adapter->ena_dev->tx_mem_queue_type == 2124 ENA_ADMIN_PLACEMENT_POLICY_DEV) ? "ENABLED" : "DISABLED"); 2125 2126 rc = create_queues_with_size_backoff(adapter); 2127 if (unlikely(rc != 0)) { 2128 ena_log(adapter->pdev, ERR, 2129 "error creating queues with size backoff\n"); 2130 goto err_create_queues_with_backoff; 2131 } 2132 2133 if (ENA_FLAG_ISSET(ENA_FLAG_LINK_UP, adapter)) 2134 if_link_state_change(adapter->ifp, LINK_STATE_UP); 2135 2136 rc = ena_up_complete(adapter); 2137 if (unlikely(rc != 0)) 2138 goto err_up_complete; 2139 2140 counter_u64_add(adapter->dev_stats.interface_up, 1); 2141 2142 ena_update_hwassist(adapter); 2143 2144 if_setdrvflagbits(adapter->ifp, IFF_DRV_RUNNING, 2145 IFF_DRV_OACTIVE); 2146 2147 /* Activate timer service only if the device is running. 2148 * If this flag is not set, it means that the driver is being 2149 * reset and timer service will be activated afterwards. 2150 */ 2151 if (ENA_FLAG_ISSET(ENA_FLAG_DEVICE_RUNNING, adapter)) { 2152 callout_reset_sbt(&adapter->timer_service, SBT_1S, 2153 SBT_1S, ena_timer_service, (void *)adapter, 0); 2154 } 2155 2156 ENA_FLAG_SET_ATOMIC(ENA_FLAG_DEV_UP, adapter); 2157 2158 ena_unmask_all_io_irqs(adapter); 2159 2160 return (0); 2161 2162 err_up_complete: 2163 ena_destroy_all_io_queues(adapter); 2164 ena_free_all_rx_resources(adapter); 2165 ena_free_all_tx_resources(adapter); 2166 err_create_queues_with_backoff: 2167 ena_free_io_irq(adapter); 2168 error: 2169 return (rc); 2170 } 2171 2172 static uint64_t 2173 ena_get_counter(if_t ifp, ift_counter cnt) 2174 { 2175 struct ena_adapter *adapter; 2176 struct ena_hw_stats *stats; 2177 2178 adapter = if_getsoftc(ifp); 2179 stats = &adapter->hw_stats; 2180 2181 switch (cnt) { 2182 case IFCOUNTER_IPACKETS: 2183 return (counter_u64_fetch(stats->rx_packets)); 2184 case IFCOUNTER_OPACKETS: 2185 return (counter_u64_fetch(stats->tx_packets)); 2186 case IFCOUNTER_IBYTES: 2187 return (counter_u64_fetch(stats->rx_bytes)); 2188 case IFCOUNTER_OBYTES: 2189 return (counter_u64_fetch(stats->tx_bytes)); 2190 case IFCOUNTER_IQDROPS: 2191 return (counter_u64_fetch(stats->rx_drops)); 2192 case IFCOUNTER_OQDROPS: 2193 return (counter_u64_fetch(stats->tx_drops)); 2194 default: 2195 return (if_get_counter_default(ifp, cnt)); 2196 } 2197 } 2198 2199 static int 2200 ena_media_change(if_t ifp) 2201 { 2202 /* Media Change is not supported by firmware */ 2203 return (0); 2204 } 2205 2206 static void 2207 ena_media_status(if_t ifp, struct ifmediareq *ifmr) 2208 { 2209 struct ena_adapter *adapter = if_getsoftc(ifp); 2210 ena_log(adapter->pdev, DBG, "Media status update\n"); 2211 2212 ENA_LOCK_LOCK(adapter); 2213 2214 ifmr->ifm_status = IFM_AVALID; 2215 ifmr->ifm_active = IFM_ETHER; 2216 2217 if (!ENA_FLAG_ISSET(ENA_FLAG_LINK_UP, adapter)) { 2218 ENA_LOCK_UNLOCK(adapter); 2219 ena_log(adapter->pdev, INFO, "Link is down\n"); 2220 return; 2221 } 2222 2223 ifmr->ifm_status |= IFM_ACTIVE; 2224 ifmr->ifm_active |= IFM_UNKNOWN | IFM_FDX; 2225 2226 ENA_LOCK_UNLOCK(adapter); 2227 } 2228 2229 static void 2230 ena_init(void *arg) 2231 { 2232 struct ena_adapter *adapter = (struct ena_adapter *)arg; 2233 2234 if (!ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter)) { 2235 ENA_LOCK_LOCK(adapter); 2236 ena_up(adapter); 2237 ENA_LOCK_UNLOCK(adapter); 2238 } 2239 } 2240 2241 static int 2242 ena_ioctl(if_t ifp, u_long command, caddr_t data) 2243 { 2244 struct ena_adapter *adapter; 2245 struct ifreq *ifr; 2246 int rc; 2247 2248 adapter = ifp->if_softc; 2249 ifr = (struct ifreq *)data; 2250 2251 /* 2252 * Acquiring lock to prevent from running up and down routines parallel. 2253 */ 2254 rc = 0; 2255 switch (command) { 2256 case SIOCSIFMTU: 2257 if (ifp->if_mtu == ifr->ifr_mtu) 2258 break; 2259 ENA_LOCK_LOCK(adapter); 2260 ena_down(adapter); 2261 2262 ena_change_mtu(ifp, ifr->ifr_mtu); 2263 2264 rc = ena_up(adapter); 2265 ENA_LOCK_UNLOCK(adapter); 2266 break; 2267 2268 case SIOCSIFFLAGS: 2269 if ((ifp->if_flags & IFF_UP) != 0) { 2270 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) { 2271 if ((ifp->if_flags & (IFF_PROMISC | 2272 IFF_ALLMULTI)) != 0) { 2273 ena_log(adapter->pdev, INFO, 2274 "ioctl promisc/allmulti\n"); 2275 } 2276 } else { 2277 ENA_LOCK_LOCK(adapter); 2278 rc = ena_up(adapter); 2279 ENA_LOCK_UNLOCK(adapter); 2280 } 2281 } else { 2282 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) { 2283 ENA_LOCK_LOCK(adapter); 2284 ena_down(adapter); 2285 ENA_LOCK_UNLOCK(adapter); 2286 } 2287 } 2288 break; 2289 2290 case SIOCADDMULTI: 2291 case SIOCDELMULTI: 2292 break; 2293 2294 case SIOCSIFMEDIA: 2295 case SIOCGIFMEDIA: 2296 rc = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 2297 break; 2298 2299 case SIOCSIFCAP: 2300 { 2301 int reinit = 0; 2302 2303 if (ifr->ifr_reqcap != ifp->if_capenable) { 2304 ifp->if_capenable = ifr->ifr_reqcap; 2305 reinit = 1; 2306 } 2307 2308 if ((reinit != 0) && 2309 ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0)) { 2310 ENA_LOCK_LOCK(adapter); 2311 ena_down(adapter); 2312 rc = ena_up(adapter); 2313 ENA_LOCK_UNLOCK(adapter); 2314 } 2315 } 2316 2317 break; 2318 default: 2319 rc = ether_ioctl(ifp, command, data); 2320 break; 2321 } 2322 2323 return (rc); 2324 } 2325 2326 static int 2327 ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *feat) 2328 { 2329 int caps = 0; 2330 2331 if ((feat->offload.tx & 2332 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK | 2333 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK | 2334 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK)) != 0) 2335 caps |= IFCAP_TXCSUM; 2336 2337 if ((feat->offload.tx & 2338 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_MASK | 2339 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)) != 0) 2340 caps |= IFCAP_TXCSUM_IPV6; 2341 2342 if ((feat->offload.tx & 2343 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) != 0) 2344 caps |= IFCAP_TSO4; 2345 2346 if ((feat->offload.tx & 2347 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) != 0) 2348 caps |= IFCAP_TSO6; 2349 2350 if ((feat->offload.rx_supported & 2351 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK | 2352 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L3_CSUM_IPV4_MASK)) != 0) 2353 caps |= IFCAP_RXCSUM; 2354 2355 if ((feat->offload.rx_supported & 2356 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) != 0) 2357 caps |= IFCAP_RXCSUM_IPV6; 2358 2359 caps |= IFCAP_LRO | IFCAP_JUMBO_MTU; 2360 2361 return (caps); 2362 } 2363 2364 static void 2365 ena_update_host_info(struct ena_admin_host_info *host_info, if_t ifp) 2366 { 2367 2368 host_info->supported_network_features[0] = 2369 (uint32_t)if_getcapabilities(ifp); 2370 } 2371 2372 static void 2373 ena_update_hwassist(struct ena_adapter *adapter) 2374 { 2375 if_t ifp = adapter->ifp; 2376 uint32_t feat = adapter->tx_offload_cap; 2377 int cap = if_getcapenable(ifp); 2378 int flags = 0; 2379 2380 if_clearhwassist(ifp); 2381 2382 if ((cap & IFCAP_TXCSUM) != 0) { 2383 if ((feat & 2384 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK) != 0) 2385 flags |= CSUM_IP; 2386 if ((feat & 2387 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK | 2388 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)) != 0) 2389 flags |= CSUM_IP_UDP | CSUM_IP_TCP; 2390 } 2391 2392 if ((cap & IFCAP_TXCSUM_IPV6) != 0) 2393 flags |= CSUM_IP6_UDP | CSUM_IP6_TCP; 2394 2395 if ((cap & IFCAP_TSO4) != 0) 2396 flags |= CSUM_IP_TSO; 2397 2398 if ((cap & IFCAP_TSO6) != 0) 2399 flags |= CSUM_IP6_TSO; 2400 2401 if_sethwassistbits(ifp, flags, 0); 2402 } 2403 2404 static int 2405 ena_setup_ifnet(device_t pdev, struct ena_adapter *adapter, 2406 struct ena_com_dev_get_features_ctx *feat) 2407 { 2408 if_t ifp; 2409 int caps = 0; 2410 2411 ifp = adapter->ifp = if_gethandle(IFT_ETHER); 2412 if (unlikely(ifp == NULL)) { 2413 ena_log(pdev, ERR, "can not allocate ifnet structure\n"); 2414 return (ENXIO); 2415 } 2416 if_initname(ifp, device_get_name(pdev), device_get_unit(pdev)); 2417 if_setdev(ifp, pdev); 2418 if_setsoftc(ifp, adapter); 2419 2420 if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST | 2421 IFF_KNOWSEPOCH); 2422 if_setinitfn(ifp, ena_init); 2423 if_settransmitfn(ifp, ena_mq_start); 2424 if_setqflushfn(ifp, ena_qflush); 2425 if_setioctlfn(ifp, ena_ioctl); 2426 if_setgetcounterfn(ifp, ena_get_counter); 2427 2428 if_setsendqlen(ifp, adapter->requested_tx_ring_size); 2429 if_setsendqready(ifp); 2430 if_setmtu(ifp, ETHERMTU); 2431 if_setbaudrate(ifp, 0); 2432 /* Zeroize capabilities... */ 2433 if_setcapabilities(ifp, 0); 2434 if_setcapenable(ifp, 0); 2435 /* check hardware support */ 2436 caps = ena_get_dev_offloads(feat); 2437 /* ... and set them */ 2438 if_setcapabilitiesbit(ifp, caps, 0); 2439 2440 /* TSO parameters */ 2441 ifp->if_hw_tsomax = ENA_TSO_MAXSIZE - 2442 (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN); 2443 ifp->if_hw_tsomaxsegcount = adapter->max_tx_sgl_size - 1; 2444 ifp->if_hw_tsomaxsegsize = ENA_TSO_MAXSIZE; 2445 2446 if_setifheaderlen(ifp, sizeof(struct ether_vlan_header)); 2447 if_setcapenable(ifp, if_getcapabilities(ifp)); 2448 2449 /* 2450 * Specify the media types supported by this adapter and register 2451 * callbacks to update media and link information 2452 */ 2453 ifmedia_init(&adapter->media, IFM_IMASK, 2454 ena_media_change, ena_media_status); 2455 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 2456 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 2457 2458 ether_ifattach(ifp, adapter->mac_addr); 2459 2460 return (0); 2461 } 2462 2463 void 2464 ena_down(struct ena_adapter *adapter) 2465 { 2466 int rc; 2467 2468 if (!ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter)) 2469 return; 2470 2471 ena_log(adapter->pdev, INFO, "device is going DOWN\n"); 2472 2473 callout_drain(&adapter->timer_service); 2474 2475 ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_DEV_UP, adapter); 2476 if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE, 2477 IFF_DRV_RUNNING); 2478 2479 ena_free_io_irq(adapter); 2480 2481 if (ENA_FLAG_ISSET(ENA_FLAG_TRIGGER_RESET, adapter)) { 2482 rc = ena_com_dev_reset(adapter->ena_dev, 2483 adapter->reset_reason); 2484 if (unlikely(rc != 0)) 2485 ena_log(adapter->pdev, ERR, 2486 "Device reset failed\n"); 2487 } 2488 2489 ena_destroy_all_io_queues(adapter); 2490 2491 ena_free_all_tx_bufs(adapter); 2492 ena_free_all_rx_bufs(adapter); 2493 ena_free_all_tx_resources(adapter); 2494 ena_free_all_rx_resources(adapter); 2495 2496 counter_u64_add(adapter->dev_stats.interface_down, 1); 2497 } 2498 2499 static uint32_t 2500 ena_calc_max_io_queue_num(device_t pdev, struct ena_com_dev *ena_dev, 2501 struct ena_com_dev_get_features_ctx *get_feat_ctx) 2502 { 2503 uint32_t io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues; 2504 2505 /* Regular queues capabilities */ 2506 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 2507 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 2508 &get_feat_ctx->max_queue_ext.max_queue_ext; 2509 io_rx_num = min_t(int, max_queue_ext->max_rx_sq_num, 2510 max_queue_ext->max_rx_cq_num); 2511 2512 io_tx_sq_num = max_queue_ext->max_tx_sq_num; 2513 io_tx_cq_num = max_queue_ext->max_tx_cq_num; 2514 } else { 2515 struct ena_admin_queue_feature_desc *max_queues = 2516 &get_feat_ctx->max_queues; 2517 io_tx_sq_num = max_queues->max_sq_num; 2518 io_tx_cq_num = max_queues->max_cq_num; 2519 io_rx_num = min_t(int, io_tx_sq_num, io_tx_cq_num); 2520 } 2521 2522 /* In case of LLQ use the llq fields for the tx SQ/CQ */ 2523 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 2524 io_tx_sq_num = get_feat_ctx->llq.max_llq_num; 2525 2526 max_num_io_queues = min_t(uint32_t, mp_ncpus, ENA_MAX_NUM_IO_QUEUES); 2527 max_num_io_queues = min_t(uint32_t, max_num_io_queues, io_rx_num); 2528 max_num_io_queues = min_t(uint32_t, max_num_io_queues, io_tx_sq_num); 2529 max_num_io_queues = min_t(uint32_t, max_num_io_queues, io_tx_cq_num); 2530 /* 1 IRQ for for mgmnt and 1 IRQ for each TX/RX pair */ 2531 max_num_io_queues = min_t(uint32_t, max_num_io_queues, 2532 pci_msix_count(pdev) - 1); 2533 2534 return (max_num_io_queues); 2535 } 2536 2537 static int 2538 ena_enable_wc(device_t pdev, struct resource *res) 2539 { 2540 #if defined(__i386) || defined(__amd64) || defined(__aarch64__) 2541 vm_offset_t va; 2542 vm_size_t len; 2543 int rc; 2544 2545 va = (vm_offset_t)rman_get_virtual(res); 2546 len = rman_get_size(res); 2547 /* Enable write combining */ 2548 rc = pmap_change_attr(va, len, VM_MEMATTR_WRITE_COMBINING); 2549 if (unlikely(rc != 0)) { 2550 ena_log(pdev, ERR, "pmap_change_attr failed, %d\n", rc); 2551 return (rc); 2552 } 2553 2554 return (0); 2555 #endif 2556 return (EOPNOTSUPP); 2557 } 2558 2559 static int 2560 ena_set_queues_placement_policy(device_t pdev, struct ena_com_dev *ena_dev, 2561 struct ena_admin_feature_llq_desc *llq, 2562 struct ena_llq_configurations *llq_default_configurations) 2563 { 2564 struct ena_adapter *adapter = device_get_softc(pdev); 2565 int rc, rid; 2566 uint32_t llq_feature_mask; 2567 2568 llq_feature_mask = 1 << ENA_ADMIN_LLQ; 2569 if (!(ena_dev->supported_features & llq_feature_mask)) { 2570 ena_log(pdev, WARN, 2571 "LLQ is not supported. Fallback to host mode policy.\n"); 2572 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 2573 return (0); 2574 } 2575 2576 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations); 2577 if (unlikely(rc != 0)) { 2578 ena_log(pdev, WARN, "Failed to configure the device mode. " 2579 "Fallback to host mode policy.\n"); 2580 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 2581 return (0); 2582 } 2583 2584 /* Nothing to config, exit */ 2585 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) 2586 return (0); 2587 2588 /* Try to allocate resources for LLQ bar */ 2589 rid = PCIR_BAR(ENA_MEM_BAR); 2590 adapter->memory = bus_alloc_resource_any(pdev, SYS_RES_MEMORY, 2591 &rid, RF_ACTIVE); 2592 if (unlikely(adapter->memory == NULL)) { 2593 ena_log(pdev, WARN, "unable to allocate LLQ bar resource. " 2594 "Fallback to host mode policy.\n"); 2595 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 2596 return (0); 2597 } 2598 2599 /* Enable write combining for better LLQ performance */ 2600 rc = ena_enable_wc(adapter->pdev, adapter->memory); 2601 if (unlikely(rc != 0)) { 2602 ena_log(pdev, ERR, "failed to enable write combining.\n"); 2603 return (rc); 2604 } 2605 2606 /* 2607 * Save virtual address of the device's memory region 2608 * for the ena_com layer. 2609 */ 2610 ena_dev->mem_bar = rman_get_virtual(adapter->memory); 2611 2612 return (0); 2613 } 2614 2615 static inline 2616 void set_default_llq_configurations(struct ena_llq_configurations *llq_config, 2617 struct ena_admin_feature_llq_desc *llq) 2618 { 2619 2620 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER; 2621 llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY; 2622 llq_config->llq_num_decs_before_header = 2623 ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2; 2624 if ((llq->entry_size_ctrl_supported & 2625 ENA_ADMIN_LIST_ENTRY_SIZE_256B) != 0 && 2626 ena_force_large_llq_header) { 2627 llq_config->llq_ring_entry_size = 2628 ENA_ADMIN_LIST_ENTRY_SIZE_256B; 2629 llq_config->llq_ring_entry_size_value = 256; 2630 } else { 2631 llq_config->llq_ring_entry_size = 2632 ENA_ADMIN_LIST_ENTRY_SIZE_128B; 2633 llq_config->llq_ring_entry_size_value = 128; 2634 } 2635 } 2636 2637 static int 2638 ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx) 2639 { 2640 struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq; 2641 struct ena_com_dev *ena_dev = ctx->ena_dev; 2642 uint32_t tx_queue_size = ENA_DEFAULT_RING_SIZE; 2643 uint32_t rx_queue_size = ENA_DEFAULT_RING_SIZE; 2644 uint32_t max_tx_queue_size; 2645 uint32_t max_rx_queue_size; 2646 2647 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 2648 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 2649 &ctx->get_feat_ctx->max_queue_ext.max_queue_ext; 2650 max_rx_queue_size = min_t(uint32_t, 2651 max_queue_ext->max_rx_cq_depth, 2652 max_queue_ext->max_rx_sq_depth); 2653 max_tx_queue_size = max_queue_ext->max_tx_cq_depth; 2654 2655 if (ena_dev->tx_mem_queue_type == 2656 ENA_ADMIN_PLACEMENT_POLICY_DEV) 2657 max_tx_queue_size = min_t(uint32_t, max_tx_queue_size, 2658 llq->max_llq_depth); 2659 else 2660 max_tx_queue_size = min_t(uint32_t, max_tx_queue_size, 2661 max_queue_ext->max_tx_sq_depth); 2662 2663 ctx->max_tx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS, 2664 max_queue_ext->max_per_packet_tx_descs); 2665 ctx->max_rx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS, 2666 max_queue_ext->max_per_packet_rx_descs); 2667 } else { 2668 struct ena_admin_queue_feature_desc *max_queues = 2669 &ctx->get_feat_ctx->max_queues; 2670 max_rx_queue_size = min_t(uint32_t, 2671 max_queues->max_cq_depth, 2672 max_queues->max_sq_depth); 2673 max_tx_queue_size = max_queues->max_cq_depth; 2674 2675 if (ena_dev->tx_mem_queue_type == 2676 ENA_ADMIN_PLACEMENT_POLICY_DEV) 2677 max_tx_queue_size = min_t(uint32_t, max_tx_queue_size, 2678 llq->max_llq_depth); 2679 else 2680 max_tx_queue_size = min_t(uint32_t, max_tx_queue_size, 2681 max_queues->max_sq_depth); 2682 2683 ctx->max_tx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS, 2684 max_queues->max_packet_tx_descs); 2685 ctx->max_rx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS, 2686 max_queues->max_packet_rx_descs); 2687 } 2688 2689 /* round down to the nearest power of 2 */ 2690 max_tx_queue_size = 1 << (flsl(max_tx_queue_size) - 1); 2691 max_rx_queue_size = 1 << (flsl(max_rx_queue_size) - 1); 2692 2693 /* 2694 * When forcing large headers, we multiply the entry size by 2, 2695 * and therefore divide the queue size by 2, leaving the amount 2696 * of memory used by the queues unchanged. 2697 */ 2698 if (ena_force_large_llq_header) { 2699 if ((llq->entry_size_ctrl_supported & 2700 ENA_ADMIN_LIST_ENTRY_SIZE_256B) != 0 && 2701 ena_dev->tx_mem_queue_type == 2702 ENA_ADMIN_PLACEMENT_POLICY_DEV) { 2703 max_tx_queue_size /= 2; 2704 ena_log(ctx->pdev, INFO, 2705 "Forcing large headers and decreasing maximum Tx queue size to %d\n", 2706 max_tx_queue_size); 2707 } else { 2708 ena_log(ctx->pdev, WARN, 2709 "Forcing large headers failed: LLQ is disabled or device does not support large headers\n"); 2710 } 2711 } 2712 2713 tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE, 2714 max_tx_queue_size); 2715 rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE, 2716 max_rx_queue_size); 2717 2718 tx_queue_size = 1 << (flsl(tx_queue_size) - 1); 2719 rx_queue_size = 1 << (flsl(rx_queue_size) - 1); 2720 2721 ctx->max_tx_queue_size = max_tx_queue_size; 2722 ctx->max_rx_queue_size = max_rx_queue_size; 2723 ctx->tx_queue_size = tx_queue_size; 2724 ctx->rx_queue_size = rx_queue_size; 2725 2726 return (0); 2727 } 2728 2729 static int 2730 ena_rss_init_default(struct ena_adapter *adapter) 2731 { 2732 struct ena_com_dev *ena_dev = adapter->ena_dev; 2733 device_t dev = adapter->pdev; 2734 int qid, rc, i; 2735 2736 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE); 2737 if (unlikely(rc != 0)) { 2738 ena_log(dev, ERR, "Cannot init indirect table\n"); 2739 return (rc); 2740 } 2741 2742 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { 2743 qid = i % adapter->num_io_queues; 2744 rc = ena_com_indirect_table_fill_entry(ena_dev, i, 2745 ENA_IO_RXQ_IDX(qid)); 2746 if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) { 2747 ena_log(dev, ERR, "Cannot fill indirect table\n"); 2748 goto err_rss_destroy; 2749 } 2750 } 2751 2752 #ifdef RSS 2753 uint8_t rss_algo = rss_gethashalgo(); 2754 if (rss_algo == RSS_HASH_TOEPLITZ) { 2755 uint8_t hash_key[RSS_KEYSIZE]; 2756 2757 rss_getkey(hash_key); 2758 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, 2759 hash_key, RSS_KEYSIZE, 0xFFFFFFFF); 2760 } else 2761 #endif 2762 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL, 2763 ENA_HASH_KEY_SIZE, 0xFFFFFFFF); 2764 if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) { 2765 ena_log(dev, ERR, "Cannot fill hash function\n"); 2766 goto err_rss_destroy; 2767 } 2768 2769 rc = ena_com_set_default_hash_ctrl(ena_dev); 2770 if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) { 2771 ena_log(dev, ERR, "Cannot fill hash control\n"); 2772 goto err_rss_destroy; 2773 } 2774 2775 return (0); 2776 2777 err_rss_destroy: 2778 ena_com_rss_destroy(ena_dev); 2779 return (rc); 2780 } 2781 2782 static void 2783 ena_rss_init_default_deferred(void *arg) 2784 { 2785 struct ena_adapter *adapter; 2786 devclass_t dc; 2787 int max; 2788 int rc; 2789 2790 dc = devclass_find("ena"); 2791 if (unlikely(dc == NULL)) { 2792 ena_log_raw(ERR, "SYSINIT: %s: No devclass ena\n", __func__); 2793 return; 2794 } 2795 2796 max = devclass_get_maxunit(dc); 2797 while (max-- >= 0) { 2798 adapter = devclass_get_softc(dc, max); 2799 if (adapter != NULL) { 2800 rc = ena_rss_init_default(adapter); 2801 ENA_FLAG_SET_ATOMIC(ENA_FLAG_RSS_ACTIVE, adapter); 2802 if (unlikely(rc != 0)) { 2803 ena_log(adapter->pdev, WARN, 2804 "WARNING: RSS was not properly initialized," 2805 " it will affect bandwidth\n"); 2806 ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_RSS_ACTIVE, adapter); 2807 } 2808 } 2809 } 2810 } 2811 SYSINIT(ena_rss_init, SI_SUB_KICK_SCHEDULER, SI_ORDER_SECOND, ena_rss_init_default_deferred, NULL); 2812 2813 static void 2814 ena_config_host_info(struct ena_com_dev *ena_dev, device_t dev) 2815 { 2816 struct ena_admin_host_info *host_info; 2817 uintptr_t rid; 2818 int rc; 2819 2820 /* Allocate only the host info */ 2821 rc = ena_com_allocate_host_info(ena_dev); 2822 if (unlikely(rc != 0)) { 2823 ena_log(dev, ERR, "Cannot allocate host info\n"); 2824 return; 2825 } 2826 2827 host_info = ena_dev->host_attr.host_info; 2828 2829 if (pci_get_id(dev, PCI_ID_RID, &rid) == 0) 2830 host_info->bdf = rid; 2831 host_info->os_type = ENA_ADMIN_OS_FREEBSD; 2832 host_info->kernel_ver = osreldate; 2833 2834 sprintf(host_info->kernel_ver_str, "%d", osreldate); 2835 host_info->os_dist = 0; 2836 strncpy(host_info->os_dist_str, osrelease, 2837 sizeof(host_info->os_dist_str) - 1); 2838 2839 host_info->driver_version = 2840 (DRV_MODULE_VER_MAJOR) | 2841 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) | 2842 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT); 2843 host_info->num_cpus = mp_ncpus; 2844 host_info->driver_supported_features = 2845 ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK; 2846 2847 rc = ena_com_set_host_attributes(ena_dev); 2848 if (unlikely(rc != 0)) { 2849 if (rc == EOPNOTSUPP) 2850 ena_log(dev, WARN, "Cannot set host attributes\n"); 2851 else 2852 ena_log(dev, ERR, "Cannot set host attributes\n"); 2853 2854 goto err; 2855 } 2856 2857 return; 2858 2859 err: 2860 ena_com_delete_host_info(ena_dev); 2861 } 2862 2863 static int 2864 ena_device_init(struct ena_adapter *adapter, device_t pdev, 2865 struct ena_com_dev_get_features_ctx *get_feat_ctx, int *wd_active) 2866 { 2867 struct ena_com_dev* ena_dev = adapter->ena_dev; 2868 bool readless_supported; 2869 uint32_t aenq_groups; 2870 int dma_width; 2871 int rc; 2872 2873 rc = ena_com_mmio_reg_read_request_init(ena_dev); 2874 if (unlikely(rc != 0)) { 2875 ena_log(pdev, ERR, "failed to init mmio read less\n"); 2876 return (rc); 2877 } 2878 2879 /* 2880 * The PCIe configuration space revision id indicate if mmio reg 2881 * read is disabled 2882 */ 2883 readless_supported = !(pci_get_revid(pdev) & ENA_MMIO_DISABLE_REG_READ); 2884 ena_com_set_mmio_read_mode(ena_dev, readless_supported); 2885 2886 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL); 2887 if (unlikely(rc != 0)) { 2888 ena_log(pdev, ERR, "Can not reset device\n"); 2889 goto err_mmio_read_less; 2890 } 2891 2892 rc = ena_com_validate_version(ena_dev); 2893 if (unlikely(rc != 0)) { 2894 ena_log(pdev, ERR, "device version is too low\n"); 2895 goto err_mmio_read_less; 2896 } 2897 2898 dma_width = ena_com_get_dma_width(ena_dev); 2899 if (unlikely(dma_width < 0)) { 2900 ena_log(pdev, ERR, "Invalid dma width value %d", dma_width); 2901 rc = dma_width; 2902 goto err_mmio_read_less; 2903 } 2904 adapter->dma_width = dma_width; 2905 2906 /* ENA admin level init */ 2907 rc = ena_com_admin_init(ena_dev, &aenq_handlers); 2908 if (unlikely(rc != 0)) { 2909 ena_log(pdev, ERR, 2910 "Can not initialize ena admin queue with device\n"); 2911 goto err_mmio_read_less; 2912 } 2913 2914 /* 2915 * To enable the msix interrupts the driver needs to know the number 2916 * of queues. So the driver uses polling mode to retrieve this 2917 * information 2918 */ 2919 ena_com_set_admin_polling_mode(ena_dev, true); 2920 2921 ena_config_host_info(ena_dev, pdev); 2922 2923 /* Get Device Attributes */ 2924 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx); 2925 if (unlikely(rc != 0)) { 2926 ena_log(pdev, ERR, 2927 "Cannot get attribute for ena device rc: %d\n", rc); 2928 goto err_admin_init; 2929 } 2930 2931 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | 2932 BIT(ENA_ADMIN_FATAL_ERROR) | 2933 BIT(ENA_ADMIN_WARNING) | 2934 BIT(ENA_ADMIN_NOTIFICATION) | 2935 BIT(ENA_ADMIN_KEEP_ALIVE); 2936 2937 aenq_groups &= get_feat_ctx->aenq.supported_groups; 2938 rc = ena_com_set_aenq_config(ena_dev, aenq_groups); 2939 if (unlikely(rc != 0)) { 2940 ena_log(pdev, ERR, "Cannot configure aenq groups rc: %d\n", rc); 2941 goto err_admin_init; 2942 } 2943 2944 *wd_active = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)); 2945 2946 return (0); 2947 2948 err_admin_init: 2949 ena_com_delete_host_info(ena_dev); 2950 ena_com_admin_destroy(ena_dev); 2951 err_mmio_read_less: 2952 ena_com_mmio_reg_read_request_destroy(ena_dev); 2953 2954 return (rc); 2955 } 2956 2957 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter) 2958 { 2959 struct ena_com_dev *ena_dev = adapter->ena_dev; 2960 int rc; 2961 2962 rc = ena_enable_msix(adapter); 2963 if (unlikely(rc != 0)) { 2964 ena_log(adapter->pdev, ERR, "Error with MSI-X enablement\n"); 2965 return (rc); 2966 } 2967 2968 ena_setup_mgmnt_intr(adapter); 2969 2970 rc = ena_request_mgmnt_irq(adapter); 2971 if (unlikely(rc != 0)) { 2972 ena_log(adapter->pdev, ERR, "Cannot setup mgmnt queue intr\n"); 2973 goto err_disable_msix; 2974 } 2975 2976 ena_com_set_admin_polling_mode(ena_dev, false); 2977 2978 ena_com_admin_aenq_enable(ena_dev); 2979 2980 return (0); 2981 2982 err_disable_msix: 2983 ena_disable_msix(adapter); 2984 2985 return (rc); 2986 } 2987 2988 /* Function called on ENA_ADMIN_KEEP_ALIVE event */ 2989 static void ena_keep_alive_wd(void *adapter_data, 2990 struct ena_admin_aenq_entry *aenq_e) 2991 { 2992 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 2993 struct ena_admin_aenq_keep_alive_desc *desc; 2994 sbintime_t stime; 2995 uint64_t rx_drops; 2996 uint64_t tx_drops; 2997 2998 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e; 2999 3000 rx_drops = ((uint64_t)desc->rx_drops_high << 32) | desc->rx_drops_low; 3001 tx_drops = ((uint64_t)desc->tx_drops_high << 32) | desc->tx_drops_low; 3002 counter_u64_zero(adapter->hw_stats.rx_drops); 3003 counter_u64_add(adapter->hw_stats.rx_drops, rx_drops); 3004 counter_u64_zero(adapter->hw_stats.tx_drops); 3005 counter_u64_add(adapter->hw_stats.tx_drops, tx_drops); 3006 3007 stime = getsbinuptime(); 3008 atomic_store_rel_64(&adapter->keep_alive_timestamp, stime); 3009 } 3010 3011 /* Check for keep alive expiration */ 3012 static void check_for_missing_keep_alive(struct ena_adapter *adapter) 3013 { 3014 sbintime_t timestamp, time; 3015 3016 if (adapter->wd_active == 0) 3017 return; 3018 3019 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3020 return; 3021 3022 timestamp = atomic_load_acq_64(&adapter->keep_alive_timestamp); 3023 time = getsbinuptime() - timestamp; 3024 if (unlikely(time > adapter->keep_alive_timeout)) { 3025 ena_log(adapter->pdev, ERR, "Keep alive watchdog timeout.\n"); 3026 counter_u64_add(adapter->dev_stats.wd_expired, 1); 3027 ena_trigger_reset(adapter, ENA_REGS_RESET_KEEP_ALIVE_TO); 3028 } 3029 } 3030 3031 /* Check if admin queue is enabled */ 3032 static void check_for_admin_com_state(struct ena_adapter *adapter) 3033 { 3034 if (unlikely(ena_com_get_admin_running_state(adapter->ena_dev) == 3035 false)) { 3036 ena_log(adapter->pdev, ERR, 3037 "ENA admin queue is not in running state!\n"); 3038 counter_u64_add(adapter->dev_stats.admin_q_pause, 1); 3039 ena_trigger_reset(adapter, ENA_REGS_RESET_ADMIN_TO); 3040 } 3041 } 3042 3043 static int 3044 check_for_rx_interrupt_queue(struct ena_adapter *adapter, 3045 struct ena_ring *rx_ring) 3046 { 3047 if (likely(rx_ring->first_interrupt)) 3048 return (0); 3049 3050 if (ena_com_cq_empty(rx_ring->ena_com_io_cq)) 3051 return (0); 3052 3053 rx_ring->no_interrupt_event_cnt++; 3054 3055 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) { 3056 ena_log(adapter->pdev, ERR, "Potential MSIX issue on Rx side " 3057 "Queue = %d. Reset the device\n", rx_ring->qid); 3058 ena_trigger_reset(adapter, ENA_REGS_RESET_MISS_INTERRUPT); 3059 return (EIO); 3060 } 3061 3062 return (0); 3063 } 3064 3065 static int 3066 check_missing_comp_in_tx_queue(struct ena_adapter *adapter, 3067 struct ena_ring *tx_ring) 3068 { 3069 device_t pdev = adapter->pdev; 3070 struct bintime curtime, time; 3071 struct ena_tx_buffer *tx_buf; 3072 sbintime_t time_offset; 3073 uint32_t missed_tx = 0; 3074 int i, rc = 0; 3075 3076 getbinuptime(&curtime); 3077 3078 for (i = 0; i < tx_ring->ring_size; i++) { 3079 tx_buf = &tx_ring->tx_buffer_info[i]; 3080 3081 if (bintime_isset(&tx_buf->timestamp) == 0) 3082 continue; 3083 3084 time = curtime; 3085 bintime_sub(&time, &tx_buf->timestamp); 3086 time_offset = bttosbt(time); 3087 3088 if (unlikely(!tx_ring->first_interrupt && 3089 time_offset > 2 * adapter->missing_tx_timeout)) { 3090 /* 3091 * If after graceful period interrupt is still not 3092 * received, we schedule a reset. 3093 */ 3094 ena_log(pdev, ERR, 3095 "Potential MSIX issue on Tx side Queue = %d. " 3096 "Reset the device\n", tx_ring->qid); 3097 ena_trigger_reset(adapter, 3098 ENA_REGS_RESET_MISS_INTERRUPT); 3099 return (EIO); 3100 } 3101 3102 /* Check again if packet is still waiting */ 3103 if (unlikely(time_offset > adapter->missing_tx_timeout)) { 3104 3105 if (!tx_buf->print_once) 3106 ena_log(pdev, WARN, "Found a Tx that wasn't " 3107 "completed on time, qid %d, index %d.\n", 3108 tx_ring->qid, i); 3109 3110 tx_buf->print_once = true; 3111 missed_tx++; 3112 } 3113 } 3114 3115 if (unlikely(missed_tx > adapter->missing_tx_threshold)) { 3116 ena_log(pdev, ERR, 3117 "The number of lost tx completion is above the threshold " 3118 "(%d > %d). Reset the device\n", 3119 missed_tx, adapter->missing_tx_threshold); 3120 ena_trigger_reset(adapter, ENA_REGS_RESET_MISS_TX_CMPL); 3121 rc = EIO; 3122 } 3123 3124 counter_u64_add(tx_ring->tx_stats.missing_tx_comp, missed_tx); 3125 3126 return (rc); 3127 } 3128 3129 /* 3130 * Check for TX which were not completed on time. 3131 * Timeout is defined by "missing_tx_timeout". 3132 * Reset will be performed if number of incompleted 3133 * transactions exceeds "missing_tx_threshold". 3134 */ 3135 static void 3136 check_for_missing_completions(struct ena_adapter *adapter) 3137 { 3138 struct ena_ring *tx_ring; 3139 struct ena_ring *rx_ring; 3140 int i, budget, rc; 3141 3142 /* Make sure the driver doesn't turn the device in other process */ 3143 rmb(); 3144 3145 if (!ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter)) 3146 return; 3147 3148 if (ENA_FLAG_ISSET(ENA_FLAG_TRIGGER_RESET, adapter)) 3149 return; 3150 3151 if (adapter->missing_tx_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3152 return; 3153 3154 budget = adapter->missing_tx_max_queues; 3155 3156 for (i = adapter->next_monitored_tx_qid; i < adapter->num_io_queues; i++) { 3157 tx_ring = &adapter->tx_ring[i]; 3158 rx_ring = &adapter->rx_ring[i]; 3159 3160 rc = check_missing_comp_in_tx_queue(adapter, tx_ring); 3161 if (unlikely(rc != 0)) 3162 return; 3163 3164 rc = check_for_rx_interrupt_queue(adapter, rx_ring); 3165 if (unlikely(rc != 0)) 3166 return; 3167 3168 budget--; 3169 if (budget == 0) { 3170 i++; 3171 break; 3172 } 3173 } 3174 3175 adapter->next_monitored_tx_qid = i % adapter->num_io_queues; 3176 } 3177 3178 /* trigger rx cleanup after 2 consecutive detections */ 3179 #define EMPTY_RX_REFILL 2 3180 /* For the rare case where the device runs out of Rx descriptors and the 3181 * msix handler failed to refill new Rx descriptors (due to a lack of memory 3182 * for example). 3183 * This case will lead to a deadlock: 3184 * The device won't send interrupts since all the new Rx packets will be dropped 3185 * The msix handler won't allocate new Rx descriptors so the device won't be 3186 * able to send new packets. 3187 * 3188 * When such a situation is detected - execute rx cleanup task in another thread 3189 */ 3190 static void 3191 check_for_empty_rx_ring(struct ena_adapter *adapter) 3192 { 3193 struct ena_ring *rx_ring; 3194 int i, refill_required; 3195 3196 if (!ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter)) 3197 return; 3198 3199 if (ENA_FLAG_ISSET(ENA_FLAG_TRIGGER_RESET, adapter)) 3200 return; 3201 3202 for (i = 0; i < adapter->num_io_queues; i++) { 3203 rx_ring = &adapter->rx_ring[i]; 3204 3205 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq); 3206 if (unlikely(refill_required == (rx_ring->ring_size - 1))) { 3207 rx_ring->empty_rx_queue++; 3208 3209 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) { 3210 counter_u64_add(rx_ring->rx_stats.empty_rx_ring, 3211 1); 3212 3213 ena_log(adapter->pdev, WARN, 3214 "Rx ring %d is stalled. Triggering the refill function\n", 3215 i); 3216 3217 taskqueue_enqueue(rx_ring->que->cleanup_tq, 3218 &rx_ring->que->cleanup_task); 3219 rx_ring->empty_rx_queue = 0; 3220 } 3221 } else { 3222 rx_ring->empty_rx_queue = 0; 3223 } 3224 } 3225 } 3226 3227 static void ena_update_hints(struct ena_adapter *adapter, 3228 struct ena_admin_ena_hw_hints *hints) 3229 { 3230 struct ena_com_dev *ena_dev = adapter->ena_dev; 3231 3232 if (hints->admin_completion_tx_timeout) 3233 ena_dev->admin_queue.completion_timeout = 3234 hints->admin_completion_tx_timeout * 1000; 3235 3236 if (hints->mmio_read_timeout) 3237 /* convert to usec */ 3238 ena_dev->mmio_read.reg_read_to = 3239 hints->mmio_read_timeout * 1000; 3240 3241 if (hints->missed_tx_completion_count_threshold_to_reset) 3242 adapter->missing_tx_threshold = 3243 hints->missed_tx_completion_count_threshold_to_reset; 3244 3245 if (hints->missing_tx_completion_timeout) { 3246 if (hints->missing_tx_completion_timeout == 3247 ENA_HW_HINTS_NO_TIMEOUT) 3248 adapter->missing_tx_timeout = ENA_HW_HINTS_NO_TIMEOUT; 3249 else 3250 adapter->missing_tx_timeout = 3251 SBT_1MS * hints->missing_tx_completion_timeout; 3252 } 3253 3254 if (hints->driver_watchdog_timeout) { 3255 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3256 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT; 3257 else 3258 adapter->keep_alive_timeout = 3259 SBT_1MS * hints->driver_watchdog_timeout; 3260 } 3261 } 3262 3263 /** 3264 * ena_copy_eni_metrics - Get and copy ENI metrics from the HW. 3265 * @adapter: ENA device adapter 3266 * 3267 * Returns 0 on success, EOPNOTSUPP if current HW doesn't support those metrics 3268 * and other error codes on failure. 3269 * 3270 * This function can possibly cause a race with other calls to the admin queue. 3271 * Because of that, the caller should either lock this function or make sure 3272 * that there is no race in the current context. 3273 */ 3274 static int 3275 ena_copy_eni_metrics(struct ena_adapter *adapter) 3276 { 3277 static bool print_once = true; 3278 int rc; 3279 3280 rc = ena_com_get_eni_stats(adapter->ena_dev, &adapter->eni_metrics); 3281 3282 if (rc != 0) { 3283 if (rc == ENA_COM_UNSUPPORTED) { 3284 if (print_once) { 3285 ena_log(adapter->pdev, WARN, 3286 "Retrieving ENI metrics is not supported.\n"); 3287 print_once = false; 3288 } else { 3289 ena_log(adapter->pdev, DBG, 3290 "Retrieving ENI metrics is not supported.\n"); 3291 } 3292 } else { 3293 ena_log(adapter->pdev, ERR, 3294 "Failed to get ENI metrics: %d\n", rc); 3295 } 3296 } 3297 3298 return (rc); 3299 } 3300 3301 static void 3302 ena_timer_service(void *data) 3303 { 3304 struct ena_adapter *adapter = (struct ena_adapter *)data; 3305 struct ena_admin_host_info *host_info = 3306 adapter->ena_dev->host_attr.host_info; 3307 3308 check_for_missing_keep_alive(adapter); 3309 3310 check_for_admin_com_state(adapter); 3311 3312 check_for_missing_completions(adapter); 3313 3314 check_for_empty_rx_ring(adapter); 3315 3316 /* 3317 * User controller update of the ENI metrics. 3318 * If the delay was set to 0, then the stats shouldn't be updated at 3319 * all. 3320 * Otherwise, wait 'eni_metrics_sample_interval' seconds, before 3321 * updating stats. 3322 * As timer service is executed every second, it's enough to increment 3323 * appropriate counter each time the timer service is executed. 3324 */ 3325 if ((adapter->eni_metrics_sample_interval != 0) && 3326 (++adapter->eni_metrics_sample_interval_cnt >= 3327 adapter->eni_metrics_sample_interval)) { 3328 /* 3329 * There is no race with other admin queue calls, as: 3330 * - Timer service runs after interface is up, so all 3331 * configuration calls to the admin queue are finished. 3332 * - After interface is up, the driver doesn't use (at least 3333 * for now) other functions writing to the admin queue. 3334 * 3335 * It may change in the future, so in that situation, the lock 3336 * will be needed. ENA_LOCK_*() cannot be used for that purpose, 3337 * as callout ena_timer_service is protected by them. It could 3338 * lead to the deadlock if callout_drain() would hold the lock 3339 * before ena_copy_eni_metrics() was executed. It's advised to 3340 * use separate lock in that situation which will be used only 3341 * for the admin queue. 3342 */ 3343 (void)ena_copy_eni_metrics(adapter); 3344 adapter->eni_metrics_sample_interval_cnt = 0; 3345 } 3346 3347 3348 if (host_info != NULL) 3349 ena_update_host_info(host_info, adapter->ifp); 3350 3351 if (unlikely(ENA_FLAG_ISSET(ENA_FLAG_TRIGGER_RESET, adapter))) { 3352 ena_log(adapter->pdev, WARN, "Trigger reset is on\n"); 3353 taskqueue_enqueue(adapter->reset_tq, &adapter->reset_task); 3354 return; 3355 } 3356 3357 /* 3358 * Schedule another timeout one second from now. 3359 */ 3360 callout_schedule_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 0); 3361 } 3362 3363 void 3364 ena_destroy_device(struct ena_adapter *adapter, bool graceful) 3365 { 3366 if_t ifp = adapter->ifp; 3367 struct ena_com_dev *ena_dev = adapter->ena_dev; 3368 bool dev_up; 3369 3370 if (!ENA_FLAG_ISSET(ENA_FLAG_DEVICE_RUNNING, adapter)) 3371 return; 3372 3373 if_link_state_change(ifp, LINK_STATE_DOWN); 3374 3375 callout_drain(&adapter->timer_service); 3376 3377 dev_up = ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter); 3378 if (dev_up) 3379 ENA_FLAG_SET_ATOMIC(ENA_FLAG_DEV_UP_BEFORE_RESET, adapter); 3380 3381 if (!graceful) 3382 ena_com_set_admin_running_state(ena_dev, false); 3383 3384 if (ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, adapter)) 3385 ena_down(adapter); 3386 3387 /* 3388 * Stop the device from sending AENQ events (if the device was up, and 3389 * the trigger reset was on, ena_down already performs device reset) 3390 */ 3391 if (!(ENA_FLAG_ISSET(ENA_FLAG_TRIGGER_RESET, adapter) && dev_up)) 3392 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 3393 3394 ena_free_mgmnt_irq(adapter); 3395 3396 ena_disable_msix(adapter); 3397 3398 /* 3399 * IO rings resources should be freed because `ena_restore_device()` 3400 * calls (not directly) `ena_enable_msix()`, which re-allocates MSIX 3401 * vectors. The amount of MSIX vectors after destroy-restore may be 3402 * different than before. Therefore, IO rings resources should be 3403 * established from scratch each time. 3404 */ 3405 ena_free_all_io_rings_resources(adapter); 3406 3407 ena_com_abort_admin_commands(ena_dev); 3408 3409 ena_com_wait_for_abort_completion(ena_dev); 3410 3411 ena_com_admin_destroy(ena_dev); 3412 3413 ena_com_mmio_reg_read_request_destroy(ena_dev); 3414 3415 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3416 3417 ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_TRIGGER_RESET, adapter); 3418 ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_DEVICE_RUNNING, adapter); 3419 } 3420 3421 static int 3422 ena_device_validate_params(struct ena_adapter *adapter, 3423 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3424 { 3425 3426 if (memcmp(get_feat_ctx->dev_attr.mac_addr, adapter->mac_addr, 3427 ETHER_ADDR_LEN) != 0) { 3428 ena_log(adapter->pdev, ERR, "Error, mac addresses differ\n"); 3429 return (EINVAL); 3430 } 3431 3432 if (get_feat_ctx->dev_attr.max_mtu < if_getmtu(adapter->ifp)) { 3433 ena_log(adapter->pdev, ERR, 3434 "Error, device max mtu is smaller than ifp MTU\n"); 3435 return (EINVAL); 3436 } 3437 3438 return 0; 3439 } 3440 3441 int 3442 ena_restore_device(struct ena_adapter *adapter) 3443 { 3444 struct ena_com_dev_get_features_ctx get_feat_ctx; 3445 struct ena_com_dev *ena_dev = adapter->ena_dev; 3446 if_t ifp = adapter->ifp; 3447 device_t dev = adapter->pdev; 3448 int wd_active; 3449 int rc; 3450 3451 ENA_FLAG_SET_ATOMIC(ENA_FLAG_ONGOING_RESET, adapter); 3452 3453 rc = ena_device_init(adapter, dev, &get_feat_ctx, &wd_active); 3454 if (rc != 0) { 3455 ena_log(dev, ERR, "Cannot initialize device\n"); 3456 goto err; 3457 } 3458 /* 3459 * Only enable WD if it was enabled before reset, so it won't override 3460 * value set by the user by the sysctl. 3461 */ 3462 if (adapter->wd_active != 0) 3463 adapter->wd_active = wd_active; 3464 3465 rc = ena_device_validate_params(adapter, &get_feat_ctx); 3466 if (rc != 0) { 3467 ena_log(dev, ERR, "Validation of device parameters failed\n"); 3468 goto err_device_destroy; 3469 } 3470 3471 ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_ONGOING_RESET, adapter); 3472 /* Make sure we don't have a race with AENQ Links state handler */ 3473 if (ENA_FLAG_ISSET(ENA_FLAG_LINK_UP, adapter)) 3474 if_link_state_change(ifp, LINK_STATE_UP); 3475 3476 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 3477 if (rc != 0) { 3478 ena_log(dev, ERR, "Enable MSI-X failed\n"); 3479 goto err_device_destroy; 3480 } 3481 3482 /* 3483 * Effective value of used MSIX vectors should be the same as before 3484 * `ena_destroy_device()`, if possible, or closest to it if less vectors 3485 * are available. 3486 */ 3487 if ((adapter->msix_vecs - ENA_ADMIN_MSIX_VEC) < adapter->num_io_queues) 3488 adapter->num_io_queues = 3489 adapter->msix_vecs - ENA_ADMIN_MSIX_VEC; 3490 3491 /* Re-initialize rings basic information */ 3492 ena_init_io_rings(adapter); 3493 3494 /* If the interface was up before the reset bring it up */ 3495 if (ENA_FLAG_ISSET(ENA_FLAG_DEV_UP_BEFORE_RESET, adapter)) { 3496 rc = ena_up(adapter); 3497 if (rc != 0) { 3498 ena_log(dev, ERR, "Failed to create I/O queues\n"); 3499 goto err_disable_msix; 3500 } 3501 } 3502 3503 /* Indicate that device is running again and ready to work */ 3504 ENA_FLAG_SET_ATOMIC(ENA_FLAG_DEVICE_RUNNING, adapter); 3505 3506 if (ENA_FLAG_ISSET(ENA_FLAG_DEV_UP_BEFORE_RESET, adapter)) { 3507 /* 3508 * As the AENQ handlers weren't executed during reset because 3509 * the flag ENA_FLAG_DEVICE_RUNNING was turned off, the 3510 * timestamp must be updated again That will prevent next reset 3511 * caused by missing keep alive. 3512 */ 3513 adapter->keep_alive_timestamp = getsbinuptime(); 3514 callout_reset_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 3515 ena_timer_service, (void *)adapter, 0); 3516 } 3517 ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_DEV_UP_BEFORE_RESET, adapter); 3518 3519 ena_log(dev, INFO, 3520 "Device reset completed successfully, Driver info: %s\n", ena_version); 3521 3522 return (rc); 3523 3524 err_disable_msix: 3525 ena_free_mgmnt_irq(adapter); 3526 ena_disable_msix(adapter); 3527 err_device_destroy: 3528 ena_com_abort_admin_commands(ena_dev); 3529 ena_com_wait_for_abort_completion(ena_dev); 3530 ena_com_admin_destroy(ena_dev); 3531 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE); 3532 ena_com_mmio_reg_read_request_destroy(ena_dev); 3533 err: 3534 ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_DEVICE_RUNNING, adapter); 3535 ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_ONGOING_RESET, adapter); 3536 ena_log(dev, ERR, "Reset attempt failed. Can not reset the device\n"); 3537 3538 return (rc); 3539 } 3540 3541 static void 3542 ena_reset_task(void *arg, int pending) 3543 { 3544 struct ena_adapter *adapter = (struct ena_adapter *)arg; 3545 3546 ENA_LOCK_LOCK(adapter); 3547 if (likely(ENA_FLAG_ISSET(ENA_FLAG_TRIGGER_RESET, adapter))) { 3548 ena_destroy_device(adapter, false); 3549 ena_restore_device(adapter); 3550 } 3551 ENA_LOCK_UNLOCK(adapter); 3552 } 3553 3554 /** 3555 * ena_attach - Device Initialization Routine 3556 * @pdev: device information struct 3557 * 3558 * Returns 0 on success, otherwise on failure. 3559 * 3560 * ena_attach initializes an adapter identified by a device structure. 3561 * The OS initialization, configuring of the adapter private structure, 3562 * and a hardware reset occur. 3563 **/ 3564 static int 3565 ena_attach(device_t pdev) 3566 { 3567 struct ena_com_dev_get_features_ctx get_feat_ctx; 3568 struct ena_llq_configurations llq_config; 3569 struct ena_calc_queue_size_ctx calc_queue_ctx = { 0 }; 3570 static int version_printed; 3571 struct ena_adapter *adapter; 3572 struct ena_com_dev *ena_dev = NULL; 3573 uint32_t max_num_io_queues; 3574 int msix_rid; 3575 int rid, rc; 3576 3577 adapter = device_get_softc(pdev); 3578 adapter->pdev = pdev; 3579 3580 ENA_LOCK_INIT(adapter); 3581 3582 /* 3583 * Set up the timer service - driver is responsible for avoiding 3584 * concurrency, as the callout won't be using any locking inside. 3585 */ 3586 callout_init(&adapter->timer_service, true); 3587 adapter->keep_alive_timeout = DEFAULT_KEEP_ALIVE_TO; 3588 adapter->missing_tx_timeout = DEFAULT_TX_CMP_TO; 3589 adapter->missing_tx_max_queues = DEFAULT_TX_MONITORED_QUEUES; 3590 adapter->missing_tx_threshold = DEFAULT_TX_CMP_THRESHOLD; 3591 3592 if (version_printed++ == 0) 3593 ena_log(pdev, INFO, "%s\n", ena_version); 3594 3595 /* Allocate memory for ena_dev structure */ 3596 ena_dev = malloc(sizeof(struct ena_com_dev), M_DEVBUF, 3597 M_WAITOK | M_ZERO); 3598 3599 adapter->ena_dev = ena_dev; 3600 ena_dev->dmadev = pdev; 3601 3602 rid = PCIR_BAR(ENA_REG_BAR); 3603 adapter->memory = NULL; 3604 adapter->registers = bus_alloc_resource_any(pdev, SYS_RES_MEMORY, 3605 &rid, RF_ACTIVE); 3606 if (unlikely(adapter->registers == NULL)) { 3607 ena_log(pdev, ERR, 3608 "unable to allocate bus resource: registers!\n"); 3609 rc = ENOMEM; 3610 goto err_dev_free; 3611 } 3612 3613 /* MSIx vector table may reside on BAR0 with registers or on BAR1. */ 3614 msix_rid = pci_msix_table_bar(pdev); 3615 if (msix_rid != rid) { 3616 adapter->msix = bus_alloc_resource_any(pdev, SYS_RES_MEMORY, 3617 &msix_rid, RF_ACTIVE); 3618 if (unlikely(adapter->msix == NULL)) { 3619 ena_log(pdev, ERR, 3620 "unable to allocate bus resource: msix!\n"); 3621 rc = ENOMEM; 3622 goto err_pci_free; 3623 } 3624 adapter->msix_rid = msix_rid; 3625 } 3626 3627 ena_dev->bus = malloc(sizeof(struct ena_bus), M_DEVBUF, 3628 M_WAITOK | M_ZERO); 3629 3630 /* Store register resources */ 3631 ((struct ena_bus*)(ena_dev->bus))->reg_bar_t = 3632 rman_get_bustag(adapter->registers); 3633 ((struct ena_bus*)(ena_dev->bus))->reg_bar_h = 3634 rman_get_bushandle(adapter->registers); 3635 3636 if (unlikely(((struct ena_bus*)(ena_dev->bus))->reg_bar_h == 0)) { 3637 ena_log(pdev, ERR, "failed to pmap registers bar\n"); 3638 rc = ENXIO; 3639 goto err_bus_free; 3640 } 3641 3642 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3643 3644 /* Initially clear all the flags */ 3645 ENA_FLAG_ZERO(adapter); 3646 3647 /* Device initialization */ 3648 rc = ena_device_init(adapter, pdev, &get_feat_ctx, &adapter->wd_active); 3649 if (unlikely(rc != 0)) { 3650 ena_log(pdev, ERR, "ENA device init failed! (err: %d)\n", rc); 3651 rc = ENXIO; 3652 goto err_bus_free; 3653 } 3654 3655 set_default_llq_configurations(&llq_config, &get_feat_ctx.llq); 3656 3657 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx.llq, 3658 &llq_config); 3659 if (unlikely(rc != 0)) { 3660 ena_log(pdev, ERR, "failed to set placement policy\n"); 3661 goto err_com_free; 3662 } 3663 3664 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 3665 adapter->disable_meta_caching = 3666 !!(get_feat_ctx.llq.accel_mode.u.get.supported_flags & 3667 BIT(ENA_ADMIN_DISABLE_META_CACHING)); 3668 3669 adapter->keep_alive_timestamp = getsbinuptime(); 3670 3671 adapter->tx_offload_cap = get_feat_ctx.offload.tx; 3672 3673 memcpy(adapter->mac_addr, get_feat_ctx.dev_attr.mac_addr, 3674 ETHER_ADDR_LEN); 3675 3676 calc_queue_ctx.pdev = pdev; 3677 calc_queue_ctx.ena_dev = ena_dev; 3678 calc_queue_ctx.get_feat_ctx = &get_feat_ctx; 3679 3680 /* Calculate initial and maximum IO queue number and size */ 3681 max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, 3682 &get_feat_ctx); 3683 rc = ena_calc_io_queue_size(&calc_queue_ctx); 3684 if (unlikely((rc != 0) || (max_num_io_queues <= 0))) { 3685 rc = EFAULT; 3686 goto err_com_free; 3687 } 3688 3689 adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size; 3690 adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size; 3691 adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size; 3692 adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size; 3693 adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size; 3694 adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size; 3695 3696 adapter->max_num_io_queues = max_num_io_queues; 3697 3698 adapter->buf_ring_size = ENA_DEFAULT_BUF_RING_SIZE; 3699 3700 adapter->max_mtu = get_feat_ctx.dev_attr.max_mtu; 3701 3702 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3703 3704 /* set up dma tags for rx and tx buffers */ 3705 rc = ena_setup_tx_dma_tag(adapter); 3706 if (unlikely(rc != 0)) { 3707 ena_log(pdev, ERR, "Failed to create TX DMA tag\n"); 3708 goto err_com_free; 3709 } 3710 3711 rc = ena_setup_rx_dma_tag(adapter); 3712 if (unlikely(rc != 0)) { 3713 ena_log(pdev, ERR, "Failed to create RX DMA tag\n"); 3714 goto err_tx_tag_free; 3715 } 3716 3717 /* 3718 * The amount of requested MSIX vectors is equal to 3719 * adapter::max_num_io_queues (see `ena_enable_msix()`), plus a constant 3720 * number of admin queue interrupts. The former is initially determined 3721 * by HW capabilities (see `ena_calc_max_io_queue_num())` but may not be 3722 * achieved if there are not enough system resources. By default, the 3723 * number of effectively used IO queues is the same but later on it can 3724 * be limited by the user using sysctl interface. 3725 */ 3726 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 3727 if (unlikely(rc != 0)) { 3728 ena_log(pdev, ERR, 3729 "Failed to enable and set the admin interrupts\n"); 3730 goto err_io_free; 3731 } 3732 /* By default all of allocated MSIX vectors are actively used */ 3733 adapter->num_io_queues = adapter->msix_vecs - ENA_ADMIN_MSIX_VEC; 3734 3735 /* initialize rings basic information */ 3736 ena_init_io_rings(adapter); 3737 3738 /* setup network interface */ 3739 rc = ena_setup_ifnet(pdev, adapter, &get_feat_ctx); 3740 if (unlikely(rc != 0)) { 3741 ena_log(pdev, ERR, "Error with network interface setup\n"); 3742 goto err_msix_free; 3743 } 3744 3745 /* Initialize reset task queue */ 3746 TASK_INIT(&adapter->reset_task, 0, ena_reset_task, adapter); 3747 adapter->reset_tq = taskqueue_create("ena_reset_enqueue", 3748 M_WAITOK | M_ZERO, taskqueue_thread_enqueue, &adapter->reset_tq); 3749 taskqueue_start_threads(&adapter->reset_tq, 1, PI_NET, 3750 "%s rstq", device_get_nameunit(adapter->pdev)); 3751 3752 /* Initialize statistics */ 3753 ena_alloc_counters((counter_u64_t *)&adapter->dev_stats, 3754 sizeof(struct ena_stats_dev)); 3755 ena_alloc_counters((counter_u64_t *)&adapter->hw_stats, 3756 sizeof(struct ena_hw_stats)); 3757 ena_sysctl_add_nodes(adapter); 3758 3759 #ifdef DEV_NETMAP 3760 rc = ena_netmap_attach(adapter); 3761 if (rc != 0) { 3762 ena_log(pdev, ERR, "netmap attach failed: %d\n", rc); 3763 goto err_detach; 3764 } 3765 #endif /* DEV_NETMAP */ 3766 3767 /* Tell the stack that the interface is not active */ 3768 if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE, IFF_DRV_RUNNING); 3769 ENA_FLAG_SET_ATOMIC(ENA_FLAG_DEVICE_RUNNING, adapter); 3770 3771 return (0); 3772 3773 #ifdef DEV_NETMAP 3774 err_detach: 3775 ether_ifdetach(adapter->ifp); 3776 #endif /* DEV_NETMAP */ 3777 err_msix_free: 3778 ena_com_dev_reset(adapter->ena_dev, ENA_REGS_RESET_INIT_ERR); 3779 ena_free_mgmnt_irq(adapter); 3780 ena_disable_msix(adapter); 3781 err_io_free: 3782 ena_free_all_io_rings_resources(adapter); 3783 ena_free_rx_dma_tag(adapter); 3784 err_tx_tag_free: 3785 ena_free_tx_dma_tag(adapter); 3786 err_com_free: 3787 ena_com_admin_destroy(ena_dev); 3788 ena_com_delete_host_info(ena_dev); 3789 ena_com_mmio_reg_read_request_destroy(ena_dev); 3790 err_bus_free: 3791 free(ena_dev->bus, M_DEVBUF); 3792 err_pci_free: 3793 ena_free_pci_resources(adapter); 3794 err_dev_free: 3795 free(ena_dev, M_DEVBUF); 3796 3797 return (rc); 3798 } 3799 3800 /** 3801 * ena_detach - Device Removal Routine 3802 * @pdev: device information struct 3803 * 3804 * ena_detach is called by the device subsystem to alert the driver 3805 * that it should release a PCI device. 3806 **/ 3807 static int 3808 ena_detach(device_t pdev) 3809 { 3810 struct ena_adapter *adapter = device_get_softc(pdev); 3811 struct ena_com_dev *ena_dev = adapter->ena_dev; 3812 int rc; 3813 3814 /* Make sure VLANS are not using driver */ 3815 if (adapter->ifp->if_vlantrunk != NULL) { 3816 ena_log(adapter->pdev, ERR, "VLAN is in use, detach first\n"); 3817 return (EBUSY); 3818 } 3819 3820 ether_ifdetach(adapter->ifp); 3821 3822 /* Stop timer service */ 3823 ENA_LOCK_LOCK(adapter); 3824 callout_drain(&adapter->timer_service); 3825 ENA_LOCK_UNLOCK(adapter); 3826 3827 /* Release reset task */ 3828 while (taskqueue_cancel(adapter->reset_tq, &adapter->reset_task, NULL)) 3829 taskqueue_drain(adapter->reset_tq, &adapter->reset_task); 3830 taskqueue_free(adapter->reset_tq); 3831 3832 ENA_LOCK_LOCK(adapter); 3833 ena_down(adapter); 3834 ena_destroy_device(adapter, true); 3835 ENA_LOCK_UNLOCK(adapter); 3836 3837 /* Restore unregistered sysctl queue nodes. */ 3838 ena_sysctl_update_queue_node_nb(adapter, adapter->num_io_queues, 3839 adapter->max_num_io_queues); 3840 3841 #ifdef DEV_NETMAP 3842 netmap_detach(adapter->ifp); 3843 #endif /* DEV_NETMAP */ 3844 3845 ena_free_counters((counter_u64_t *)&adapter->hw_stats, 3846 sizeof(struct ena_hw_stats)); 3847 ena_free_counters((counter_u64_t *)&adapter->dev_stats, 3848 sizeof(struct ena_stats_dev)); 3849 3850 rc = ena_free_rx_dma_tag(adapter); 3851 if (unlikely(rc != 0)) 3852 ena_log(adapter->pdev, WARN, 3853 "Unmapped RX DMA tag associations\n"); 3854 3855 rc = ena_free_tx_dma_tag(adapter); 3856 if (unlikely(rc != 0)) 3857 ena_log(adapter->pdev, WARN, 3858 "Unmapped TX DMA tag associations\n"); 3859 3860 ena_free_irqs(adapter); 3861 3862 ena_free_pci_resources(adapter); 3863 3864 if (likely(ENA_FLAG_ISSET(ENA_FLAG_RSS_ACTIVE, adapter))) 3865 ena_com_rss_destroy(ena_dev); 3866 3867 ena_com_delete_host_info(ena_dev); 3868 3869 ENA_LOCK_DESTROY(adapter); 3870 3871 if_free(adapter->ifp); 3872 3873 free(ena_dev->bus, M_DEVBUF); 3874 3875 free(ena_dev, M_DEVBUF); 3876 3877 return (bus_generic_detach(pdev)); 3878 } 3879 3880 /****************************************************************************** 3881 ******************************** AENQ Handlers ******************************* 3882 *****************************************************************************/ 3883 /** 3884 * ena_update_on_link_change: 3885 * Notify the network interface about the change in link status 3886 **/ 3887 static void 3888 ena_update_on_link_change(void *adapter_data, 3889 struct ena_admin_aenq_entry *aenq_e) 3890 { 3891 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3892 struct ena_admin_aenq_link_change_desc *aenq_desc; 3893 int status; 3894 if_t ifp; 3895 3896 aenq_desc = (struct ena_admin_aenq_link_change_desc *)aenq_e; 3897 ifp = adapter->ifp; 3898 status = aenq_desc->flags & 3899 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK; 3900 3901 if (status != 0) { 3902 ena_log(adapter->pdev, INFO, "link is UP\n"); 3903 ENA_FLAG_SET_ATOMIC(ENA_FLAG_LINK_UP, adapter); 3904 if (!ENA_FLAG_ISSET(ENA_FLAG_ONGOING_RESET, adapter)) 3905 if_link_state_change(ifp, LINK_STATE_UP); 3906 } else { 3907 ena_log(adapter->pdev, INFO, "link is DOWN\n"); 3908 if_link_state_change(ifp, LINK_STATE_DOWN); 3909 ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_LINK_UP, adapter); 3910 } 3911 } 3912 3913 static void ena_notification(void *adapter_data, 3914 struct ena_admin_aenq_entry *aenq_e) 3915 { 3916 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3917 struct ena_admin_ena_hw_hints *hints; 3918 3919 ENA_WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION, adapter->ena_dev, 3920 "Invalid group(%x) expected %x\n", aenq_e->aenq_common_desc.group, 3921 ENA_ADMIN_NOTIFICATION); 3922 3923 switch (aenq_e->aenq_common_desc.syndrome) { 3924 case ENA_ADMIN_UPDATE_HINTS: 3925 hints = 3926 (struct ena_admin_ena_hw_hints *)(&aenq_e->inline_data_w4); 3927 ena_update_hints(adapter, hints); 3928 break; 3929 default: 3930 ena_log(adapter->pdev, ERR, 3931 "Invalid aenq notification link state %d\n", 3932 aenq_e->aenq_common_desc.syndrome); 3933 } 3934 } 3935 3936 /** 3937 * This handler will called for unknown event group or unimplemented handlers 3938 **/ 3939 static void 3940 unimplemented_aenq_handler(void *adapter_data, 3941 struct ena_admin_aenq_entry *aenq_e) 3942 { 3943 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3944 3945 ena_log(adapter->pdev, ERR, 3946 "Unknown event was received or event with unimplemented handler\n"); 3947 } 3948 3949 static struct ena_aenq_handlers aenq_handlers = { 3950 .handlers = { 3951 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, 3952 [ENA_ADMIN_NOTIFICATION] = ena_notification, 3953 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd, 3954 }, 3955 .unimplemented_handler = unimplemented_aenq_handler 3956 }; 3957 3958 /********************************************************************* 3959 * FreeBSD Device Interface Entry Points 3960 *********************************************************************/ 3961 3962 static device_method_t ena_methods[] = { 3963 /* Device interface */ 3964 DEVMETHOD(device_probe, ena_probe), 3965 DEVMETHOD(device_attach, ena_attach), 3966 DEVMETHOD(device_detach, ena_detach), 3967 DEVMETHOD_END 3968 }; 3969 3970 static driver_t ena_driver = { 3971 "ena", ena_methods, sizeof(struct ena_adapter), 3972 }; 3973 3974 devclass_t ena_devclass; 3975 DRIVER_MODULE(ena, pci, ena_driver, ena_devclass, 0, 0); 3976 MODULE_PNP_INFO("U16:vendor;U16:device", pci, ena, ena_vendor_info_array, 3977 nitems(ena_vendor_info_array) - 1); 3978 MODULE_DEPEND(ena, pci, 1, 1, 1); 3979 MODULE_DEPEND(ena, ether, 1, 1, 1); 3980 #ifdef DEV_NETMAP 3981 MODULE_DEPEND(ena, netmap, 1, 1, 1); 3982 #endif /* DEV_NETMAP */ 3983 3984 /*********************************************************************/ 3985