1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) 2015-2017 Amazon.com, Inc. or its affiliates. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 #include <sys/endian.h> 37 #include <sys/kernel.h> 38 #include <sys/kthread.h> 39 #include <sys/malloc.h> 40 #include <sys/mbuf.h> 41 #include <sys/module.h> 42 #include <sys/rman.h> 43 #include <sys/smp.h> 44 #include <sys/socket.h> 45 #include <sys/sockio.h> 46 #include <sys/sysctl.h> 47 #include <sys/taskqueue.h> 48 #include <sys/time.h> 49 #include <sys/eventhandler.h> 50 51 #include <machine/bus.h> 52 #include <machine/resource.h> 53 #include <machine/in_cksum.h> 54 55 #include <net/bpf.h> 56 #include <net/ethernet.h> 57 #include <net/if.h> 58 #include <net/if_var.h> 59 #include <net/if_arp.h> 60 #include <net/if_dl.h> 61 #include <net/if_media.h> 62 #include <net/rss_config.h> 63 #include <net/if_types.h> 64 #include <net/if_vlan_var.h> 65 66 #include <netinet/in_rss.h> 67 #include <netinet/in_systm.h> 68 #include <netinet/in.h> 69 #include <netinet/if_ether.h> 70 #include <netinet/ip.h> 71 #include <netinet/ip6.h> 72 #include <netinet/tcp.h> 73 #include <netinet/udp.h> 74 75 #include <dev/pci/pcivar.h> 76 #include <dev/pci/pcireg.h> 77 78 #include "ena.h" 79 #include "ena_sysctl.h" 80 81 /********************************************************* 82 * Function prototypes 83 *********************************************************/ 84 static int ena_probe(device_t); 85 static void ena_intr_msix_mgmnt(void *); 86 static int ena_allocate_pci_resources(struct ena_adapter*); 87 static void ena_free_pci_resources(struct ena_adapter *); 88 static int ena_change_mtu(if_t, int); 89 static inline void ena_alloc_counters(counter_u64_t *, int); 90 static inline void ena_free_counters(counter_u64_t *, int); 91 static inline void ena_reset_counters(counter_u64_t *, int); 92 static void ena_init_io_rings_common(struct ena_adapter *, 93 struct ena_ring *, uint16_t); 94 static void ena_init_io_rings(struct ena_adapter *); 95 static void ena_free_io_ring_resources(struct ena_adapter *, unsigned int); 96 static void ena_free_all_io_rings_resources(struct ena_adapter *); 97 static int ena_setup_tx_dma_tag(struct ena_adapter *); 98 static int ena_free_tx_dma_tag(struct ena_adapter *); 99 static int ena_setup_rx_dma_tag(struct ena_adapter *); 100 static int ena_free_rx_dma_tag(struct ena_adapter *); 101 static int ena_setup_tx_resources(struct ena_adapter *, int); 102 static void ena_free_tx_resources(struct ena_adapter *, int); 103 static int ena_setup_all_tx_resources(struct ena_adapter *); 104 static void ena_free_all_tx_resources(struct ena_adapter *); 105 static inline int validate_rx_req_id(struct ena_ring *, uint16_t); 106 static int ena_setup_rx_resources(struct ena_adapter *, unsigned int); 107 static void ena_free_rx_resources(struct ena_adapter *, unsigned int); 108 static int ena_setup_all_rx_resources(struct ena_adapter *); 109 static void ena_free_all_rx_resources(struct ena_adapter *); 110 static inline int ena_alloc_rx_mbuf(struct ena_adapter *, struct ena_ring *, 111 struct ena_rx_buffer *); 112 static void ena_free_rx_mbuf(struct ena_adapter *, struct ena_ring *, 113 struct ena_rx_buffer *); 114 static int ena_refill_rx_bufs(struct ena_ring *, uint32_t); 115 static void ena_free_rx_bufs(struct ena_adapter *, unsigned int); 116 static void ena_refill_all_rx_bufs(struct ena_adapter *); 117 static void ena_free_all_rx_bufs(struct ena_adapter *); 118 static void ena_free_tx_bufs(struct ena_adapter *, unsigned int); 119 static void ena_free_all_tx_bufs(struct ena_adapter *); 120 static void ena_destroy_all_tx_queues(struct ena_adapter *); 121 static void ena_destroy_all_rx_queues(struct ena_adapter *); 122 static void ena_destroy_all_io_queues(struct ena_adapter *); 123 static int ena_create_io_queues(struct ena_adapter *); 124 static int ena_tx_cleanup(struct ena_ring *); 125 static int ena_rx_cleanup(struct ena_ring *); 126 static inline int validate_tx_req_id(struct ena_ring *, uint16_t); 127 static void ena_rx_hash_mbuf(struct ena_ring *, struct ena_com_rx_ctx *, 128 struct mbuf *); 129 static struct mbuf* ena_rx_mbuf(struct ena_ring *, struct ena_com_rx_buf_info *, 130 struct ena_com_rx_ctx *, uint16_t *); 131 static inline void ena_rx_checksum(struct ena_ring *, struct ena_com_rx_ctx *, 132 struct mbuf *); 133 static void ena_handle_msix(void *); 134 static int ena_enable_msix(struct ena_adapter *); 135 static void ena_setup_mgmnt_intr(struct ena_adapter *); 136 static void ena_setup_io_intr(struct ena_adapter *); 137 static int ena_request_mgmnt_irq(struct ena_adapter *); 138 static int ena_request_io_irq(struct ena_adapter *); 139 static void ena_free_mgmnt_irq(struct ena_adapter *); 140 static void ena_free_io_irq(struct ena_adapter *); 141 static void ena_free_irqs(struct ena_adapter*); 142 static void ena_disable_msix(struct ena_adapter *); 143 static void ena_unmask_all_io_irqs(struct ena_adapter *); 144 static int ena_rss_configure(struct ena_adapter *); 145 static int ena_up_complete(struct ena_adapter *); 146 static int ena_up(struct ena_adapter *); 147 static void ena_down(struct ena_adapter *); 148 static uint64_t ena_get_counter(if_t, ift_counter); 149 static int ena_media_change(if_t); 150 static void ena_media_status(if_t, struct ifmediareq *); 151 static void ena_init(void *); 152 static int ena_ioctl(if_t, u_long, caddr_t); 153 static int ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *); 154 static void ena_update_host_info(struct ena_admin_host_info *, if_t); 155 static void ena_update_hwassist(struct ena_adapter *); 156 static int ena_setup_ifnet(device_t, struct ena_adapter *, 157 struct ena_com_dev_get_features_ctx *); 158 static void ena_tx_csum(struct ena_com_tx_ctx *, struct mbuf *); 159 static int ena_check_and_collapse_mbuf(struct ena_ring *tx_ring, 160 struct mbuf **mbuf); 161 static int ena_xmit_mbuf(struct ena_ring *, struct mbuf **); 162 static void ena_start_xmit(struct ena_ring *); 163 static int ena_mq_start(if_t, struct mbuf *); 164 static void ena_deferred_mq_start(void *, int); 165 static void ena_qflush(if_t); 166 static int ena_calc_io_queue_num(struct ena_adapter *, 167 struct ena_com_dev_get_features_ctx *); 168 static int ena_calc_queue_size(struct ena_adapter *, uint16_t *, 169 uint16_t *, struct ena_com_dev_get_features_ctx *); 170 static int ena_rss_init_default(struct ena_adapter *); 171 static void ena_rss_init_default_deferred(void *); 172 static void ena_config_host_info(struct ena_com_dev *); 173 static int ena_attach(device_t); 174 static int ena_detach(device_t); 175 static int ena_device_init(struct ena_adapter *, device_t, 176 struct ena_com_dev_get_features_ctx *, int *); 177 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *, 178 int); 179 static void ena_update_on_link_change(void *, struct ena_admin_aenq_entry *); 180 static void unimplemented_aenq_handler(void *, 181 struct ena_admin_aenq_entry *); 182 static void ena_timer_service(void *); 183 184 static char ena_version[] = DEVICE_NAME DRV_MODULE_NAME " v" DRV_MODULE_VERSION; 185 186 static SYSCTL_NODE(_hw, OID_AUTO, ena, CTLFLAG_RD, 0, "ENA driver parameters"); 187 188 /* 189 * Tuneable number of buffers in the buf-ring (drbr) 190 */ 191 static int ena_buf_ring_size = 4096; 192 SYSCTL_INT(_hw_ena, OID_AUTO, buf_ring_size, CTLFLAG_RWTUN, 193 &ena_buf_ring_size, 0, "Size of the bufring"); 194 195 196 static ena_vendor_info_t ena_vendor_info_array[] = { 197 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_PF, 0}, 198 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_LLQ_PF, 0}, 199 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_VF, 0}, 200 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_LLQ_VF, 0}, 201 /* Last entry */ 202 { 0, 0, 0 } 203 }; 204 205 /* 206 * Contains pointers to event handlers, e.g. link state chage. 207 */ 208 static struct ena_aenq_handlers aenq_handlers; 209 210 void 211 ena_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nseg, int error) 212 { 213 if (error) 214 return; 215 *(bus_addr_t *) arg = segs[0].ds_addr; 216 return; 217 } 218 219 int 220 ena_dma_alloc(device_t dmadev, bus_size_t size, 221 ena_mem_handle_t *dma , int mapflags) 222 { 223 struct ena_adapter* adapter = device_get_softc(dmadev); 224 uint32_t maxsize = ((size - 1)/PAGE_SIZE + 1) * PAGE_SIZE; 225 uint64_t dma_space_addr = ENA_DMA_BIT_MASK(adapter->dma_width); 226 int error; 227 228 if (dma_space_addr == 0) 229 dma_space_addr = BUS_SPACE_MAXADDR; 230 error = bus_dma_tag_create(bus_get_dma_tag(dmadev), /* parent */ 231 8, 0, /* alignment, bounds */ 232 dma_space_addr, /* lowaddr of exclusion window */ 233 BUS_SPACE_MAXADDR,/* highaddr of exclusion window */ 234 NULL, NULL, /* filter, filterarg */ 235 maxsize, /* maxsize */ 236 1, /* nsegments */ 237 maxsize, /* maxsegsize */ 238 BUS_DMA_ALLOCNOW, /* flags */ 239 NULL, /* lockfunc */ 240 NULL, /* lockarg */ 241 &dma->tag); 242 if (error) { 243 device_printf(dmadev, 244 "%s: bus_dma_tag_create failed: %d\n", 245 __func__, error); 246 goto fail_tag; 247 } 248 249 error = bus_dmamem_alloc(dma->tag, (void**) &dma->vaddr, 250 BUS_DMA_COHERENT | BUS_DMA_ZERO, &dma->map); 251 if (error) { 252 device_printf(dmadev, 253 "%s: bus_dmamem_alloc(%ju) failed: %d\n", 254 __func__, (uintmax_t)size, error); 255 goto fail_map_create; 256 } 257 258 dma->paddr = 0; 259 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, 260 size, ena_dmamap_callback, &dma->paddr, mapflags); 261 if (error || dma->paddr == 0) { 262 device_printf(dmadev, 263 "%s: bus_dmamap_load failed: %d\n", 264 __func__, error); 265 goto fail_map_load; 266 } 267 268 return (0); 269 270 fail_map_load: 271 bus_dmamap_unload(dma->tag, dma->map); 272 fail_map_create: 273 bus_dmamem_free(dma->tag, dma->vaddr, dma->map); 274 bus_dma_tag_destroy(dma->tag); 275 fail_tag: 276 dma->tag = NULL; 277 278 return (error); 279 } 280 281 static int 282 ena_allocate_pci_resources(struct ena_adapter* adapter) 283 { 284 device_t pdev = adapter->pdev; 285 int rid; 286 287 rid = PCIR_BAR(ENA_REG_BAR); 288 adapter->memory = NULL; 289 adapter->registers = bus_alloc_resource_any(pdev, SYS_RES_MEMORY, 290 &rid, RF_ACTIVE); 291 if (adapter->registers == NULL) { 292 device_printf(pdev, "Unable to allocate bus resource: " 293 "registers\n"); 294 return (ENXIO); 295 } 296 297 return (0); 298 } 299 300 static void 301 ena_free_pci_resources(struct ena_adapter *adapter) 302 { 303 device_t pdev = adapter->pdev; 304 305 if (adapter->memory != NULL) { 306 bus_release_resource(pdev, SYS_RES_MEMORY, 307 PCIR_BAR(ENA_MEM_BAR), adapter->memory); 308 } 309 310 if (adapter->registers != NULL) { 311 bus_release_resource(pdev, SYS_RES_MEMORY, 312 PCIR_BAR(ENA_REG_BAR), adapter->registers); 313 } 314 315 return; 316 } 317 318 static int 319 ena_probe(device_t dev) 320 { 321 ena_vendor_info_t *ent; 322 char adapter_name[60]; 323 uint16_t pci_vendor_id = 0; 324 uint16_t pci_device_id = 0; 325 326 pci_vendor_id = pci_get_vendor(dev); 327 pci_device_id = pci_get_device(dev); 328 329 ent = ena_vendor_info_array; 330 while (ent->vendor_id != 0) { 331 if ((pci_vendor_id == ent->vendor_id) && 332 (pci_device_id == ent->device_id)) { 333 ena_trace(ENA_DBG, "vendor=%x device=%x ", 334 pci_vendor_id, pci_device_id); 335 336 sprintf(adapter_name, DEVICE_DESC); 337 device_set_desc_copy(dev, adapter_name); 338 return (BUS_PROBE_DEFAULT); 339 } 340 341 ent++; 342 343 } 344 345 return (ENXIO); 346 } 347 348 static int 349 ena_change_mtu(if_t ifp, int new_mtu) 350 { 351 struct ena_adapter *adapter = if_getsoftc(ifp); 352 struct ena_com_dev_get_features_ctx get_feat_ctx; 353 int rc, old_mtu, max_frame; 354 355 rc = ena_com_get_dev_attr_feat(adapter->ena_dev, &get_feat_ctx); 356 if (rc) { 357 device_printf(adapter->pdev, 358 "Cannot get attribute for ena device\n"); 359 return (ENXIO); 360 } 361 362 /* Save old MTU in case of fail */ 363 old_mtu = if_getmtu(ifp); 364 365 /* Change MTU and calculate max frame */ 366 if_setmtu(ifp, new_mtu); 367 max_frame = ETHER_MAX_FRAME(ifp, ETHERTYPE_VLAN, 1); 368 369 if ((new_mtu < ENA_MIN_FRAME_LEN) || 370 (new_mtu > get_feat_ctx.dev_attr.max_mtu) || 371 (max_frame > ENA_MAX_FRAME_LEN)) { 372 device_printf(adapter->pdev, "Invalid MTU setting. " 373 "new_mtu: %d\n", new_mtu); 374 goto error; 375 } 376 377 rc = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu); 378 if (rc != 0) 379 goto error; 380 381 return (0); 382 error: 383 if_setmtu(ifp, old_mtu); 384 return (EINVAL); 385 } 386 387 static inline void 388 ena_alloc_counters(counter_u64_t *begin, int size) 389 { 390 counter_u64_t *end = (counter_u64_t *)((char *)begin + size); 391 392 for (; begin < end; ++begin) 393 *begin = counter_u64_alloc(M_WAITOK); 394 } 395 396 static inline void 397 ena_free_counters(counter_u64_t *begin, int size) 398 { 399 counter_u64_t *end = (counter_u64_t *)((char *)begin + size); 400 401 for (; begin < end; ++begin) 402 counter_u64_free(*begin); 403 } 404 405 static inline void 406 ena_reset_counters(counter_u64_t *begin, int size) 407 { 408 counter_u64_t *end = (counter_u64_t *)((char *)begin + size); 409 410 for (; begin < end; ++begin) 411 counter_u64_zero(*begin); 412 } 413 414 static void 415 ena_init_io_rings_common(struct ena_adapter *adapter, struct ena_ring *ring, 416 uint16_t qid) 417 { 418 419 ring->qid = qid; 420 ring->adapter = adapter; 421 ring->ena_dev = adapter->ena_dev; 422 } 423 424 static void 425 ena_init_io_rings(struct ena_adapter *adapter) 426 { 427 struct ena_com_dev *ena_dev; 428 struct ena_ring *txr, *rxr; 429 struct ena_que *que; 430 int i; 431 432 ena_dev = adapter->ena_dev; 433 434 for (i = 0; i < adapter->num_queues; i++) { 435 txr = &adapter->tx_ring[i]; 436 rxr = &adapter->rx_ring[i]; 437 438 /* TX/RX common ring state */ 439 ena_init_io_rings_common(adapter, txr, i); 440 ena_init_io_rings_common(adapter, rxr, i); 441 442 /* TX specific ring state */ 443 txr->ring_size = adapter->tx_ring_size; 444 txr->tx_max_header_size = ena_dev->tx_max_header_size; 445 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 446 txr->smoothed_interval = 447 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev); 448 449 /* Allocate a buf ring */ 450 txr->br = buf_ring_alloc(ena_buf_ring_size, M_DEVBUF, 451 M_WAITOK, &txr->ring_mtx); 452 453 /* Alloc TX statistics. */ 454 ena_alloc_counters((counter_u64_t *)&txr->tx_stats, 455 sizeof(txr->tx_stats)); 456 457 /* RX specific ring state */ 458 rxr->ring_size = adapter->rx_ring_size; 459 rxr->rx_small_copy_len = adapter->small_copy_len; 460 rxr->smoothed_interval = 461 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev); 462 463 /* Alloc RX statistics. */ 464 ena_alloc_counters((counter_u64_t *)&rxr->rx_stats, 465 sizeof(rxr->rx_stats)); 466 467 /* Initialize locks */ 468 snprintf(txr->mtx_name, nitems(txr->mtx_name), "%s:tx(%d)", 469 device_get_nameunit(adapter->pdev), i); 470 snprintf(rxr->mtx_name, nitems(rxr->mtx_name), "%s:rx(%d)", 471 device_get_nameunit(adapter->pdev), i); 472 473 mtx_init(&txr->ring_mtx, txr->mtx_name, NULL, MTX_DEF); 474 475 que = &adapter->que[i]; 476 que->adapter = adapter; 477 que->id = i; 478 que->tx_ring = txr; 479 que->rx_ring = rxr; 480 481 txr->que = que; 482 rxr->que = que; 483 } 484 } 485 486 static void 487 ena_free_io_ring_resources(struct ena_adapter *adapter, unsigned int qid) 488 { 489 struct ena_ring *txr = &adapter->tx_ring[qid]; 490 struct ena_ring *rxr = &adapter->rx_ring[qid]; 491 492 ena_free_counters((counter_u64_t *)&txr->tx_stats, 493 sizeof(txr->tx_stats)); 494 ena_free_counters((counter_u64_t *)&rxr->rx_stats, 495 sizeof(rxr->rx_stats)); 496 497 mtx_destroy(&txr->ring_mtx); 498 499 drbr_free(txr->br, M_DEVBUF); 500 501 } 502 503 static void 504 ena_free_all_io_rings_resources(struct ena_adapter *adapter) 505 { 506 int i; 507 508 for (i = 0; i < adapter->num_queues; i++) 509 ena_free_io_ring_resources(adapter, i); 510 511 } 512 513 static int 514 ena_setup_tx_dma_tag(struct ena_adapter *adapter) 515 { 516 int ret; 517 518 /* Create DMA tag for Tx buffers */ 519 ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev), 520 1, 0, /* alignment, bounds */ 521 ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window */ 522 BUS_SPACE_MAXADDR, /* highaddr of excl window */ 523 NULL, NULL, /* filter, filterarg */ 524 ENA_TSO_MAXSIZE, /* maxsize */ 525 adapter->max_tx_sgl_size - 1, /* nsegments */ 526 ENA_TSO_MAXSIZE, /* maxsegsize */ 527 0, /* flags */ 528 NULL, /* lockfunc */ 529 NULL, /* lockfuncarg */ 530 &adapter->tx_buf_tag); 531 532 if (ret != 0) 533 device_printf(adapter->pdev, "Unable to create Tx DMA tag\n"); 534 535 return (ret); 536 } 537 538 static int 539 ena_free_tx_dma_tag(struct ena_adapter *adapter) 540 { 541 int ret; 542 543 ret = bus_dma_tag_destroy(adapter->tx_buf_tag); 544 545 if (ret == 0) 546 adapter->tx_buf_tag = NULL; 547 548 return (ret); 549 } 550 551 static int 552 ena_setup_rx_dma_tag(struct ena_adapter *adapter) 553 { 554 int ret; 555 556 /* Create DMA tag for Rx buffers*/ 557 ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev), /* parent */ 558 1, 0, /* alignment, bounds */ 559 ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window */ 560 BUS_SPACE_MAXADDR, /* highaddr of excl window */ 561 NULL, NULL, /* filter, filterarg */ 562 MJUM16BYTES, /* maxsize */ 563 1, /* nsegments */ 564 MJUM16BYTES, /* maxsegsize */ 565 0, /* flags */ 566 NULL, /* lockfunc */ 567 NULL, /* lockarg */ 568 &adapter->rx_buf_tag); 569 570 if (ret != 0) 571 device_printf(adapter->pdev, "Unable to create Rx DMA tag\n"); 572 573 return (ret); 574 } 575 576 static int 577 ena_free_rx_dma_tag(struct ena_adapter *adapter) 578 { 579 int ret; 580 581 ret = bus_dma_tag_destroy(adapter->rx_buf_tag); 582 583 if (ret == 0) 584 adapter->rx_buf_tag = NULL; 585 586 return (ret); 587 } 588 589 590 /** 591 * ena_setup_tx_resources - allocate Tx resources (Descriptors) 592 * @adapter: network interface device structure 593 * @qid: queue index 594 * 595 * Returns 0 on success, otherwise on failure. 596 **/ 597 static int 598 ena_setup_tx_resources(struct ena_adapter *adapter, int qid) 599 { 600 struct ena_que *que = &adapter->que[qid]; 601 struct ena_ring *tx_ring = que->tx_ring; 602 int size, i, err; 603 #ifdef RSS 604 cpuset_t cpu_mask; 605 #endif 606 607 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size; 608 609 tx_ring->tx_buffer_info = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); 610 if (tx_ring->tx_buffer_info == NULL) 611 goto err_tx_buffer_info; 612 613 size = sizeof(uint16_t) * tx_ring->ring_size; 614 tx_ring->free_tx_ids = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); 615 if (tx_ring->free_tx_ids == NULL) 616 goto err_tx_reqs; 617 618 /* Req id stack for TX OOO completions */ 619 for (i = 0; i < tx_ring->ring_size; i++) 620 tx_ring->free_tx_ids[i] = i; 621 622 /* Reset TX statistics. */ 623 ena_reset_counters((counter_u64_t *)&tx_ring->tx_stats, 624 sizeof(tx_ring->tx_stats)); 625 626 tx_ring->next_to_use = 0; 627 tx_ring->next_to_clean = 0; 628 629 /* Make sure that drbr is empty */ 630 ENA_RING_MTX_LOCK(tx_ring); 631 drbr_flush(adapter->ifp, tx_ring->br); 632 ENA_RING_MTX_UNLOCK(tx_ring); 633 634 /* ... and create the buffer DMA maps */ 635 for (i = 0; i < tx_ring->ring_size; i++) { 636 err = bus_dmamap_create(adapter->tx_buf_tag, 0, 637 &tx_ring->tx_buffer_info[i].map); 638 if (err != 0) { 639 device_printf(adapter->pdev, 640 "Unable to create Tx DMA map for buffer %d\n", i); 641 goto err_tx_map; 642 } 643 } 644 645 /* Allocate taskqueues */ 646 TASK_INIT(&tx_ring->enqueue_task, 0, ena_deferred_mq_start, tx_ring); 647 tx_ring->enqueue_tq = taskqueue_create_fast("ena_tx_enque", M_NOWAIT, 648 taskqueue_thread_enqueue, &tx_ring->enqueue_tq); 649 if (tx_ring->enqueue_tq == NULL) { 650 device_printf(adapter->pdev, 651 "Unable to create taskqueue for enqueue task\n"); 652 i = tx_ring->ring_size; 653 goto err_tx_map; 654 } 655 656 /* RSS set cpu for thread */ 657 #ifdef RSS 658 CPU_SETOF(que->cpu, &cpu_mask); 659 taskqueue_start_threads_cpuset(&tx_ring->enqueue_tq, 1, PI_NET, 660 &cpu_mask, "%s tx_ring enq (bucket %d)", 661 device_get_nameunit(adapter->pdev), que->cpu); 662 #else /* RSS */ 663 taskqueue_start_threads(&tx_ring->enqueue_tq, 1, PI_NET, 664 "%s txeq %d", device_get_nameunit(adapter->pdev), que->cpu); 665 #endif /* RSS */ 666 667 return (0); 668 669 err_tx_map: 670 while (i--) { 671 bus_dmamap_destroy(adapter->tx_buf_tag, 672 tx_ring->tx_buffer_info[i].map); 673 } 674 free(tx_ring->free_tx_ids, M_DEVBUF); 675 err_tx_reqs: 676 free(tx_ring->tx_buffer_info, M_DEVBUF); 677 err_tx_buffer_info: 678 return (ENOMEM); 679 } 680 681 /** 682 * ena_free_tx_resources - Free Tx Resources per Queue 683 * @adapter: network interface device structure 684 * @qid: queue index 685 * 686 * Free all transmit software resources 687 **/ 688 static void 689 ena_free_tx_resources(struct ena_adapter *adapter, int qid) 690 { 691 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 692 693 while (taskqueue_cancel(tx_ring->enqueue_tq, &tx_ring->enqueue_task, 694 NULL)) 695 taskqueue_drain(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 696 697 taskqueue_free(tx_ring->enqueue_tq); 698 699 ENA_RING_MTX_LOCK(tx_ring); 700 /* Flush buffer ring, */ 701 drbr_flush(adapter->ifp, tx_ring->br); 702 703 /* Free buffer DMA maps, */ 704 for (int i = 0; i < tx_ring->ring_size; i++) { 705 m_freem(tx_ring->tx_buffer_info[i].mbuf); 706 tx_ring->tx_buffer_info[i].mbuf = NULL; 707 bus_dmamap_unload(adapter->tx_buf_tag, 708 tx_ring->tx_buffer_info[i].map); 709 bus_dmamap_destroy(adapter->tx_buf_tag, 710 tx_ring->tx_buffer_info[i].map); 711 } 712 ENA_RING_MTX_UNLOCK(tx_ring); 713 714 /* And free allocated memory. */ 715 free(tx_ring->tx_buffer_info, M_DEVBUF); 716 tx_ring->tx_buffer_info = NULL; 717 718 free(tx_ring->free_tx_ids, M_DEVBUF); 719 tx_ring->free_tx_ids = NULL; 720 } 721 722 /** 723 * ena_setup_all_tx_resources - allocate all queues Tx resources 724 * @adapter: network interface device structure 725 * 726 * Returns 0 on success, otherwise on failure. 727 **/ 728 static int 729 ena_setup_all_tx_resources(struct ena_adapter *adapter) 730 { 731 int i, rc; 732 733 for (i = 0; i < adapter->num_queues; i++) { 734 rc = ena_setup_tx_resources(adapter, i); 735 if (rc == 0) 736 continue; 737 738 device_printf(adapter->pdev, 739 "Allocation for Tx Queue %u failed\n", i); 740 goto err_setup_tx; 741 } 742 743 return (0); 744 745 err_setup_tx: 746 /* Rewind the index freeing the rings as we go */ 747 while (i--) 748 ena_free_tx_resources(adapter, i); 749 return (rc); 750 } 751 752 /** 753 * ena_free_all_tx_resources - Free Tx Resources for All Queues 754 * @adapter: network interface device structure 755 * 756 * Free all transmit software resources 757 **/ 758 static void 759 ena_free_all_tx_resources(struct ena_adapter *adapter) 760 { 761 int i; 762 763 for (i = 0; i < adapter->num_queues; i++) 764 ena_free_tx_resources(adapter, i); 765 766 return; 767 } 768 769 static inline int 770 validate_rx_req_id(struct ena_ring *rx_ring, uint16_t req_id) 771 { 772 if (likely(req_id < rx_ring->ring_size)) 773 return (0); 774 775 device_printf(rx_ring->adapter->pdev, "Invalid rx req_id: %hu\n", 776 req_id); 777 counter_u64_add(rx_ring->rx_stats.bad_req_id, 1); 778 779 /* Trigger device reset */ 780 rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID; 781 rx_ring->adapter->trigger_reset = true; 782 783 return (EFAULT); 784 } 785 786 /** 787 * ena_setup_rx_resources - allocate Rx resources (Descriptors) 788 * @adapter: network interface device structure 789 * @qid: queue index 790 * 791 * Returns 0 on success, otherwise on failure. 792 **/ 793 static int 794 ena_setup_rx_resources(struct ena_adapter *adapter, unsigned int qid) 795 { 796 struct ena_que *que = &adapter->que[qid]; 797 struct ena_ring *rx_ring = que->rx_ring; 798 int size, err, i; 799 #ifdef RSS 800 cpuset_t cpu_mask; 801 #endif 802 803 size = sizeof(struct ena_rx_buffer) * rx_ring->ring_size; 804 805 /* 806 * Alloc extra element so in rx path 807 * we can always prefetch rx_info + 1 808 */ 809 size += sizeof(struct ena_rx_buffer); 810 811 rx_ring->rx_buffer_info = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO); 812 813 size = sizeof(uint16_t) * rx_ring->ring_size; 814 rx_ring->free_rx_ids = malloc(size, M_DEVBUF, M_WAITOK); 815 816 for (i = 0; i < rx_ring->ring_size; i++) 817 rx_ring->free_rx_ids[i] = i; 818 819 /* Reset RX statistics. */ 820 ena_reset_counters((counter_u64_t *)&rx_ring->rx_stats, 821 sizeof(rx_ring->rx_stats)); 822 823 rx_ring->next_to_clean = 0; 824 rx_ring->next_to_use = 0; 825 826 /* ... and create the buffer DMA maps */ 827 for (i = 0; i < rx_ring->ring_size; i++) { 828 err = bus_dmamap_create(adapter->rx_buf_tag, 0, 829 &(rx_ring->rx_buffer_info[i].map)); 830 if (err != 0) { 831 device_printf(adapter->pdev, 832 "Unable to create Rx DMA map for buffer %d\n", i); 833 goto err_rx_dma; 834 } 835 } 836 837 /* Create LRO for the ring */ 838 if (adapter->ifp->if_capenable & IFCAP_LRO) { 839 int err = tcp_lro_init(&rx_ring->lro); 840 if (err) { 841 device_printf(adapter->pdev, 842 "LRO[%d] Initialization failed!\n", qid); 843 } else { 844 ena_trace(ENA_INFO, 845 "RX Soft LRO[%d] Initialized\n", qid); 846 rx_ring->lro.ifp = adapter->ifp; 847 } 848 } 849 850 return (0); 851 852 err_rx_dma: 853 while (i--) { 854 bus_dmamap_destroy(adapter->rx_buf_tag, 855 rx_ring->rx_buffer_info[i].map); 856 } 857 858 free(rx_ring->free_rx_ids, M_DEVBUF); 859 rx_ring->free_rx_ids = NULL; 860 free(rx_ring->rx_buffer_info, M_DEVBUF); 861 rx_ring->rx_buffer_info = NULL; 862 ena_trace(ENA_ALERT, "RX resource allocation fail"); 863 return (ENOMEM); 864 } 865 866 /** 867 * ena_free_rx_resources - Free Rx Resources 868 * @adapter: network interface device structure 869 * @qid: queue index 870 * 871 * Free all receive software resources 872 **/ 873 static void 874 ena_free_rx_resources(struct ena_adapter *adapter, unsigned int qid) 875 { 876 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 877 878 ena_trace(ENA_INFO, "%s qid %d\n", __func__, qid); 879 880 /* Free buffer DMA maps, */ 881 for (int i = 0; i < rx_ring->ring_size; i++) { 882 m_freem(rx_ring->rx_buffer_info[i].mbuf); 883 rx_ring->rx_buffer_info[i].mbuf = NULL; 884 bus_dmamap_unload(adapter->rx_buf_tag, 885 rx_ring->rx_buffer_info[i].map); 886 bus_dmamap_destroy(adapter->rx_buf_tag, 887 rx_ring->rx_buffer_info[i].map); 888 } 889 890 /* free LRO resources, */ 891 tcp_lro_free(&rx_ring->lro); 892 893 /* free allocated memory */ 894 free(rx_ring->rx_buffer_info, M_DEVBUF); 895 rx_ring->rx_buffer_info = NULL; 896 897 free(rx_ring->free_rx_ids, M_DEVBUF); 898 rx_ring->free_rx_ids = NULL; 899 900 return; 901 } 902 903 /** 904 * ena_setup_all_rx_resources - allocate all queues Rx resources 905 * @adapter: network interface device structure 906 * 907 * Returns 0 on success, otherwise on failure. 908 **/ 909 static int 910 ena_setup_all_rx_resources(struct ena_adapter *adapter) 911 { 912 int i, rc = 0; 913 914 for (i = 0; i < adapter->num_queues; i++) { 915 rc = ena_setup_rx_resources(adapter, i); 916 if (rc == 0) 917 continue; 918 919 device_printf(adapter->pdev, 920 "Allocation for Rx Queue %u failed\n", i); 921 goto err_setup_rx; 922 } 923 return (0); 924 925 err_setup_rx: 926 /* rewind the index freeing the rings as we go */ 927 while (i--) 928 ena_free_rx_resources(adapter, i); 929 return (rc); 930 } 931 932 /** 933 * ena_free_all_rx_resources - Free Rx resources for all queues 934 * @adapter: network interface device structure 935 * 936 * Free all receive software resources 937 **/ 938 static void 939 ena_free_all_rx_resources(struct ena_adapter *adapter) 940 { 941 int i; 942 943 for (i = 0; i < adapter->num_queues; i++) 944 ena_free_rx_resources(adapter, i); 945 946 return; 947 } 948 949 static inline int 950 ena_alloc_rx_mbuf(struct ena_adapter *adapter, 951 struct ena_ring *rx_ring, struct ena_rx_buffer *rx_info) 952 { 953 struct ena_com_buf *ena_buf; 954 bus_dma_segment_t segs[1]; 955 int nsegs, error; 956 957 /* if previous allocated frag is not used */ 958 if (rx_info->mbuf != NULL) 959 return (0); 960 961 /* Get mbuf using UMA allocator */ 962 rx_info->mbuf = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUM16BYTES); 963 964 if (rx_info->mbuf == NULL) { 965 counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1); 966 return (ENOMEM); 967 } 968 /* Set mbuf length*/ 969 rx_info->mbuf->m_pkthdr.len = rx_info->mbuf->m_len = MJUM16BYTES; 970 971 /* Map packets for DMA */ 972 ena_trace(ENA_DBG | ENA_RSC | ENA_RXPTH, 973 "Using tag %p for buffers' DMA mapping, mbuf %p len: %d", 974 adapter->rx_buf_tag,rx_info->mbuf, rx_info->mbuf->m_len); 975 error = bus_dmamap_load_mbuf_sg(adapter->rx_buf_tag, rx_info->map, 976 rx_info->mbuf, segs, &nsegs, BUS_DMA_NOWAIT); 977 if (error || (nsegs != 1)) { 978 device_printf(adapter->pdev, "failed to map mbuf, error: %d, " 979 "nsegs: %d\n", error, nsegs); 980 counter_u64_add(rx_ring->rx_stats.dma_mapping_err, 1); 981 goto exit; 982 983 } 984 985 bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map, BUS_DMASYNC_PREREAD); 986 987 ena_buf = &rx_info->ena_buf; 988 ena_buf->paddr = segs[0].ds_addr; 989 ena_buf->len = MJUM16BYTES; 990 991 ena_trace(ENA_DBG | ENA_RSC | ENA_RXPTH, 992 "ALLOC RX BUF: mbuf %p, rx_info %p, len %d, paddr %#jx\n", 993 rx_info->mbuf, rx_info,ena_buf->len, (uintmax_t)ena_buf->paddr); 994 995 return (0); 996 997 exit: 998 m_freem(rx_info->mbuf); 999 rx_info->mbuf = NULL; 1000 return (EFAULT); 1001 } 1002 1003 static void 1004 ena_free_rx_mbuf(struct ena_adapter *adapter, struct ena_ring *rx_ring, 1005 struct ena_rx_buffer *rx_info) 1006 { 1007 1008 if (rx_info->mbuf == NULL) 1009 return; 1010 1011 bus_dmamap_unload(adapter->rx_buf_tag, rx_info->map); 1012 m_freem(rx_info->mbuf); 1013 rx_info->mbuf = NULL; 1014 1015 return; 1016 } 1017 1018 1019 /** 1020 * ena_refill_rx_bufs - Refills ring with descriptors 1021 * @rx_ring: the ring which we want to feed with free descriptors 1022 * @num: number of descriptors to refill 1023 * Refills the ring with newly allocated DMA-mapped mbufs for receiving 1024 **/ 1025 static int 1026 ena_refill_rx_bufs(struct ena_ring *rx_ring, uint32_t num) 1027 { 1028 struct ena_adapter *adapter = rx_ring->adapter; 1029 uint16_t next_to_use, req_id; 1030 uint32_t i; 1031 int rc; 1032 1033 ena_trace(ENA_DBG | ENA_RXPTH | ENA_RSC, "refill qid: %d", 1034 rx_ring->qid); 1035 1036 next_to_use = rx_ring->next_to_use; 1037 1038 for (i = 0; i < num; i++) { 1039 struct ena_rx_buffer *rx_info; 1040 1041 ena_trace(ENA_DBG | ENA_RXPTH | ENA_RSC, 1042 "RX buffer - next to use: %d", next_to_use); 1043 1044 req_id = rx_ring->free_rx_ids[next_to_use]; 1045 rc = validate_rx_req_id(rx_ring, req_id); 1046 if (unlikely(rc)) 1047 break; 1048 1049 rx_info = &rx_ring->rx_buffer_info[req_id]; 1050 1051 rc = ena_alloc_rx_mbuf(adapter, rx_ring, rx_info); 1052 if (rc != 0) { 1053 device_printf(adapter->pdev, 1054 "failed to alloc buffer for rx queue\n"); 1055 break; 1056 } 1057 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq, 1058 &rx_info->ena_buf, req_id); 1059 if (unlikely(rc)) { 1060 device_printf(adapter->pdev, 1061 "failed to add buffer for rx queue %d\n", 1062 rx_ring->qid); 1063 break; 1064 } 1065 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use, 1066 rx_ring->ring_size); 1067 } 1068 1069 if (i < num) { 1070 counter_u64_add(rx_ring->rx_stats.refil_partial, 1); 1071 device_printf(adapter->pdev, 1072 "refilled rx queue %d with %d pages only\n", 1073 rx_ring->qid, i); 1074 } 1075 1076 if (i != 0) { 1077 wmb(); 1078 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq); 1079 } 1080 rx_ring->next_to_use = next_to_use; 1081 return (i); 1082 } 1083 1084 static void 1085 ena_free_rx_bufs(struct ena_adapter *adapter, unsigned int qid) 1086 { 1087 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 1088 unsigned int i; 1089 1090 for (i = 0; i < rx_ring->ring_size; i++) { 1091 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i]; 1092 1093 if (rx_info->mbuf) 1094 ena_free_rx_mbuf(adapter, rx_ring, rx_info); 1095 } 1096 1097 return; 1098 } 1099 1100 /** 1101 * ena_refill_all_rx_bufs - allocate all queues Rx buffers 1102 * @adapter: network interface device structure 1103 * 1104 */ 1105 static void 1106 ena_refill_all_rx_bufs(struct ena_adapter *adapter) 1107 { 1108 struct ena_ring *rx_ring; 1109 int i, rc, bufs_num; 1110 1111 for (i = 0; i < adapter->num_queues; i++) { 1112 rx_ring = &adapter->rx_ring[i]; 1113 bufs_num = rx_ring->ring_size - 1; 1114 rc = ena_refill_rx_bufs(rx_ring, bufs_num); 1115 1116 if (unlikely(rc != bufs_num)) 1117 device_printf(adapter->pdev, 1118 "refilling Queue %d failed. allocated %d buffers" 1119 " from: %d\n", i, rc, bufs_num); 1120 } 1121 } 1122 1123 static void 1124 ena_free_all_rx_bufs(struct ena_adapter *adapter) 1125 { 1126 int i; 1127 1128 for (i = 0; i < adapter->num_queues; i++) 1129 ena_free_rx_bufs(adapter, i); 1130 return; 1131 } 1132 1133 /** 1134 * ena_free_tx_bufs - Free Tx Buffers per Queue 1135 * @adapter: network interface device structure 1136 * @qid: queue index 1137 **/ 1138 static void 1139 ena_free_tx_bufs(struct ena_adapter *adapter, unsigned int qid) 1140 { 1141 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 1142 1143 ENA_RING_MTX_LOCK(tx_ring); 1144 for (int i = 0; i < tx_ring->ring_size; i++) { 1145 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i]; 1146 1147 if (tx_info->mbuf == NULL) 1148 continue; 1149 1150 ena_trace(ENA_DBG | ENA_TXPTH | ENA_RSC, 1151 "free uncompleted Tx mbufs qid[%d] idx: 0x%x", qid, i); 1152 1153 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map); 1154 m_free(tx_info->mbuf); 1155 tx_info->mbuf = NULL; 1156 } 1157 ENA_RING_MTX_UNLOCK(tx_ring); 1158 1159 return; 1160 } 1161 1162 static void 1163 ena_free_all_tx_bufs(struct ena_adapter *adapter) 1164 { 1165 1166 for (int i = 0; i < adapter->num_queues; i++) 1167 ena_free_tx_bufs(adapter, i); 1168 1169 return; 1170 } 1171 1172 static void 1173 ena_destroy_all_tx_queues(struct ena_adapter *adapter) 1174 { 1175 uint16_t ena_qid; 1176 int i; 1177 1178 for (i = 0; i < adapter->num_queues; i++) { 1179 ena_qid = ENA_IO_TXQ_IDX(i); 1180 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1181 } 1182 } 1183 1184 static void 1185 ena_destroy_all_rx_queues(struct ena_adapter *adapter) 1186 { 1187 uint16_t ena_qid; 1188 int i; 1189 1190 for (i = 0; i < adapter->num_queues; i++) { 1191 ena_qid = ENA_IO_RXQ_IDX(i); 1192 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1193 } 1194 } 1195 1196 static void 1197 ena_destroy_all_io_queues(struct ena_adapter *adapter) 1198 { 1199 ena_destroy_all_tx_queues(adapter); 1200 ena_destroy_all_rx_queues(adapter); 1201 } 1202 1203 static inline int 1204 validate_tx_req_id(struct ena_ring *tx_ring, uint16_t req_id) 1205 { 1206 struct ena_tx_buffer *tx_info = NULL; 1207 1208 if (likely(req_id < tx_ring->ring_size)) { 1209 tx_info = &tx_ring->tx_buffer_info[req_id]; 1210 if (tx_info->mbuf) 1211 return 0; 1212 } 1213 1214 counter_u64_add(tx_ring->tx_stats.bad_req_id, 1); 1215 1216 return (EFAULT); 1217 } 1218 1219 static int 1220 ena_create_io_queues(struct ena_adapter *adapter) 1221 { 1222 struct ena_com_dev *ena_dev = adapter->ena_dev; 1223 struct ena_com_create_io_ctx ctx; 1224 struct ena_ring *ring; 1225 uint16_t ena_qid; 1226 uint32_t msix_vector; 1227 int rc, i; 1228 1229 /* Create TX queues */ 1230 for (i = 0; i < adapter->num_queues; i++) { 1231 msix_vector = ENA_IO_IRQ_IDX(i); 1232 ena_qid = ENA_IO_TXQ_IDX(i); 1233 ctx.mem_queue_type = ena_dev->tx_mem_queue_type; 1234 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX; 1235 ctx.queue_size = adapter->tx_ring_size; 1236 ctx.msix_vector = msix_vector; 1237 ctx.qid = ena_qid; 1238 rc = ena_com_create_io_queue(ena_dev, &ctx); 1239 if (rc) { 1240 device_printf(adapter->pdev, 1241 "Failed to create io TX queue #%d rc: %d\n", i, rc); 1242 goto err_tx; 1243 } 1244 ring = &adapter->tx_ring[i]; 1245 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 1246 &ring->ena_com_io_sq, 1247 &ring->ena_com_io_cq); 1248 if (rc) { 1249 device_printf(adapter->pdev, 1250 "Failed to get TX queue handlers. TX queue num" 1251 " %d rc: %d\n", i, rc); 1252 ena_com_destroy_io_queue(ena_dev, ena_qid); 1253 goto err_tx; 1254 } 1255 } 1256 1257 /* Create RX queues */ 1258 for (i = 0; i < adapter->num_queues; i++) { 1259 msix_vector = ENA_IO_IRQ_IDX(i); 1260 ena_qid = ENA_IO_RXQ_IDX(i); 1261 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 1262 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX; 1263 ctx.queue_size = adapter->rx_ring_size; 1264 ctx.msix_vector = msix_vector; 1265 ctx.qid = ena_qid; 1266 rc = ena_com_create_io_queue(ena_dev, &ctx); 1267 if (rc) { 1268 device_printf(adapter->pdev, 1269 "Failed to create io RX queue[%d] rc: %d\n", i, rc); 1270 goto err_rx; 1271 } 1272 1273 ring = &adapter->rx_ring[i]; 1274 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 1275 &ring->ena_com_io_sq, 1276 &ring->ena_com_io_cq); 1277 if (rc) { 1278 device_printf(adapter->pdev, 1279 "Failed to get RX queue handlers. RX queue num" 1280 " %d rc: %d\n", i, rc); 1281 ena_com_destroy_io_queue(ena_dev, ena_qid); 1282 goto err_rx; 1283 } 1284 } 1285 1286 return (0); 1287 1288 err_rx: 1289 while (i--) 1290 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i)); 1291 i = adapter->num_queues; 1292 err_tx: 1293 while (i--) 1294 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i)); 1295 1296 return (ENXIO); 1297 } 1298 1299 /** 1300 * ena_tx_cleanup - clear sent packets and corresponding descriptors 1301 * @tx_ring: ring for which we want to clean packets 1302 * 1303 * Once packets are sent, we ask the device in a loop for no longer used 1304 * descriptors. We find the related mbuf chain in a map (index in an array) 1305 * and free it, then update ring state. 1306 * This is performed in "endless" loop, updating ring pointers every 1307 * TX_COMMIT. The first check of free descriptor is performed before the actual 1308 * loop, then repeated at the loop end. 1309 **/ 1310 static int 1311 ena_tx_cleanup(struct ena_ring *tx_ring) 1312 { 1313 struct ena_adapter *adapter; 1314 struct ena_com_io_cq* io_cq; 1315 uint16_t next_to_clean; 1316 uint16_t req_id; 1317 uint16_t ena_qid; 1318 unsigned int total_done = 0; 1319 int rc; 1320 int commit = TX_COMMIT; 1321 int budget = TX_BUDGET; 1322 int work_done; 1323 1324 adapter = tx_ring->que->adapter; 1325 ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id); 1326 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 1327 next_to_clean = tx_ring->next_to_clean; 1328 1329 do { 1330 struct ena_tx_buffer *tx_info; 1331 struct mbuf *mbuf; 1332 1333 rc = ena_com_tx_comp_req_id_get(io_cq, &req_id); 1334 if (rc != 0) 1335 break; 1336 1337 rc = validate_tx_req_id(tx_ring, req_id); 1338 if (rc) 1339 break; 1340 1341 tx_info = &tx_ring->tx_buffer_info[req_id]; 1342 1343 mbuf = tx_info->mbuf; 1344 1345 tx_info->mbuf = NULL; 1346 bintime_clear(&tx_info->timestamp); 1347 1348 if (tx_info->num_of_bufs != 0) { 1349 /* Map is no longer required */ 1350 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map); 1351 } 1352 1353 m_freem(mbuf); 1354 1355 total_done += tx_info->tx_descs; 1356 1357 tx_ring->free_tx_ids[next_to_clean] = req_id; 1358 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1359 tx_ring->ring_size); 1360 1361 if (--commit == 0) { 1362 commit = TX_COMMIT; 1363 /* update ring state every TX_COMMIT descriptor */ 1364 tx_ring->next_to_clean = next_to_clean; 1365 ena_com_comp_ack(&adapter->ena_dev->io_sq_queues[ena_qid], total_done); 1366 ena_com_update_dev_comp_head(io_cq); 1367 total_done = 0; 1368 } 1369 } while (--budget); 1370 1371 work_done = TX_BUDGET - budget; 1372 1373 /* If there is still something to commit update ring state */ 1374 if (commit != TX_COMMIT) { 1375 tx_ring->next_to_clean = next_to_clean; 1376 ena_com_comp_ack(&adapter->ena_dev->io_sq_queues[ena_qid], total_done); 1377 ena_com_update_dev_comp_head(io_cq); 1378 } 1379 1380 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 1381 1382 return (work_done); 1383 } 1384 1385 static void 1386 ena_rx_hash_mbuf(struct ena_ring *rx_ring, struct ena_com_rx_ctx *ena_rx_ctx, 1387 struct mbuf *mbuf) 1388 { 1389 struct ena_adapter *adapter = rx_ring->adapter; 1390 1391 if (adapter->rss_support) { 1392 mbuf->m_pkthdr.flowid = ena_rx_ctx->hash; 1393 1394 if (ena_rx_ctx->frag && 1395 ena_rx_ctx->l3_proto != ENA_ETH_IO_L4_PROTO_UNKNOWN) { 1396 M_HASHTYPE_SET(mbuf, M_HASHTYPE_OPAQUE_HASH); 1397 return; 1398 } 1399 1400 switch (ena_rx_ctx->l3_proto) { 1401 case ENA_ETH_IO_L3_PROTO_IPV4: 1402 switch (ena_rx_ctx->l4_proto) { 1403 case ENA_ETH_IO_L4_PROTO_TCP: 1404 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_TCP_IPV4); 1405 break; 1406 case ENA_ETH_IO_L4_PROTO_UDP: 1407 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_UDP_IPV4); 1408 break; 1409 default: 1410 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_IPV4); 1411 } 1412 break; 1413 case ENA_ETH_IO_L3_PROTO_IPV6: 1414 switch (ena_rx_ctx->l4_proto) { 1415 case ENA_ETH_IO_L4_PROTO_TCP: 1416 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_TCP_IPV6); 1417 break; 1418 case ENA_ETH_IO_L4_PROTO_UDP: 1419 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_UDP_IPV6); 1420 break; 1421 default: 1422 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_IPV6); 1423 } 1424 break; 1425 case ENA_ETH_IO_L3_PROTO_UNKNOWN: 1426 M_HASHTYPE_SET(mbuf, M_HASHTYPE_NONE); 1427 break; 1428 default: 1429 M_HASHTYPE_SET(mbuf, M_HASHTYPE_OPAQUE_HASH); 1430 } 1431 } else { 1432 mbuf->m_pkthdr.flowid = rx_ring->qid; 1433 M_HASHTYPE_SET(mbuf, M_HASHTYPE_NONE); 1434 } 1435 } 1436 1437 /** 1438 * ena_rx_mbuf - assemble mbuf from descriptors 1439 * @rx_ring: ring for which we want to clean packets 1440 * @ena_bufs: buffer info 1441 * @ena_rx_ctx: metadata for this packet(s) 1442 * @next_to_clean: ring pointer, will be updated only upon success 1443 * 1444 **/ 1445 static struct mbuf* 1446 ena_rx_mbuf(struct ena_ring *rx_ring, struct ena_com_rx_buf_info *ena_bufs, 1447 struct ena_com_rx_ctx *ena_rx_ctx, uint16_t *next_to_clean) 1448 { 1449 struct mbuf *mbuf; 1450 struct ena_rx_buffer *rx_info; 1451 struct ena_adapter *adapter; 1452 unsigned int descs = ena_rx_ctx->descs; 1453 uint16_t ntc, len, req_id, buf = 0; 1454 1455 ntc = *next_to_clean; 1456 adapter = rx_ring->adapter; 1457 rx_info = &rx_ring->rx_buffer_info[ntc]; 1458 1459 if (unlikely(rx_info->mbuf == NULL)) { 1460 device_printf(adapter->pdev, "NULL mbuf in rx_info"); 1461 return (NULL); 1462 } 1463 1464 len = ena_bufs[buf].len; 1465 req_id = ena_bufs[buf].req_id; 1466 rx_info = &rx_ring->rx_buffer_info[req_id]; 1467 1468 ena_trace(ENA_DBG | ENA_RXPTH, "rx_info %p, mbuf %p, paddr %jx", 1469 rx_info, rx_info->mbuf, (uintmax_t)rx_info->ena_buf.paddr); 1470 1471 mbuf = rx_info->mbuf; 1472 mbuf->m_flags |= M_PKTHDR; 1473 mbuf->m_pkthdr.len = len; 1474 mbuf->m_len = len; 1475 mbuf->m_pkthdr.rcvif = rx_ring->que->adapter->ifp; 1476 1477 /* Fill mbuf with hash key and it's interpretation for optimization */ 1478 ena_rx_hash_mbuf(rx_ring, ena_rx_ctx, mbuf); 1479 1480 ena_trace(ENA_DBG | ENA_RXPTH, "rx mbuf 0x%p, flags=0x%x, len: %d", 1481 mbuf, mbuf->m_flags, mbuf->m_pkthdr.len); 1482 1483 /* DMA address is not needed anymore, unmap it */ 1484 bus_dmamap_unload(rx_ring->adapter->rx_buf_tag, rx_info->map); 1485 1486 rx_info->mbuf = NULL; 1487 rx_ring->free_rx_ids[ntc] = req_id; 1488 ntc = ENA_RX_RING_IDX_NEXT(ntc, rx_ring->ring_size); 1489 1490 /* 1491 * While we have more than 1 descriptors for one rcvd packet, append 1492 * other mbufs to the main one 1493 */ 1494 while (--descs) { 1495 ++buf; 1496 len = ena_bufs[buf].len; 1497 req_id = ena_bufs[buf].req_id; 1498 rx_info = &rx_ring->rx_buffer_info[req_id]; 1499 1500 if (unlikely(rx_info->mbuf == NULL)) { 1501 device_printf(adapter->pdev, "NULL mbuf in rx_info"); 1502 /* 1503 * If one of the required mbufs was not allocated yet, 1504 * we can break there. 1505 * All earlier used descriptors will be reallocated 1506 * later and not used mbufs can be reused. 1507 * The next_to_clean pointer will not be updated in case 1508 * of an error, so caller should advance it manually 1509 * in error handling routine to keep it up to date 1510 * with hw ring. 1511 */ 1512 m_freem(mbuf); 1513 return (NULL); 1514 } 1515 1516 if (m_append(mbuf, len, rx_info->mbuf->m_data) == 0) { 1517 counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1); 1518 ena_trace(ENA_WARNING, "Failed to append Rx mbuf %p", 1519 mbuf); 1520 } 1521 /* Free already appended mbuf, it won't be useful anymore */ 1522 bus_dmamap_unload(rx_ring->adapter->rx_buf_tag, rx_info->map); 1523 m_freem(rx_info->mbuf); 1524 rx_info->mbuf = NULL; 1525 1526 rx_ring->free_rx_ids[ntc] = req_id; 1527 ntc = ENA_RX_RING_IDX_NEXT(ntc, rx_ring->ring_size); 1528 } 1529 1530 *next_to_clean = ntc; 1531 1532 return (mbuf); 1533 } 1534 1535 /** 1536 * ena_rx_checksum - indicate in mbuf if hw indicated a good cksum 1537 **/ 1538 static inline void 1539 ena_rx_checksum(struct ena_ring *rx_ring, struct ena_com_rx_ctx *ena_rx_ctx, 1540 struct mbuf *mbuf) 1541 { 1542 1543 /* if IP and error */ 1544 if ((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) && 1545 (ena_rx_ctx->l3_csum_err)) { 1546 /* ipv4 checksum error */ 1547 mbuf->m_pkthdr.csum_flags = 0; 1548 counter_u64_add(rx_ring->rx_stats.bad_csum, 1); 1549 return; 1550 } 1551 1552 /* if TCP/UDP */ 1553 if ((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1554 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)) { 1555 if (ena_rx_ctx->l4_csum_err) { 1556 /* TCP/UDP checksum error */ 1557 mbuf->m_pkthdr.csum_flags = 0; 1558 counter_u64_add(rx_ring->rx_stats.bad_csum, 1); 1559 } else { 1560 mbuf->m_pkthdr.csum_flags = CSUM_IP_CHECKED; 1561 mbuf->m_pkthdr.csum_flags |= CSUM_IP_VALID; 1562 } 1563 } 1564 1565 return; 1566 } 1567 1568 /** 1569 * ena_rx_cleanup - handle rx irq 1570 * @arg: ring for which irq is being handled 1571 **/ 1572 static int 1573 ena_rx_cleanup(struct ena_ring *rx_ring) 1574 { 1575 struct ena_adapter *adapter; 1576 struct mbuf *mbuf; 1577 struct ena_com_rx_ctx ena_rx_ctx; 1578 struct ena_com_io_cq* io_cq; 1579 struct ena_com_io_sq* io_sq; 1580 /* struct ena_eth_io_intr_reg intr_reg; */ 1581 if_t ifp; 1582 uint16_t ena_qid; 1583 uint16_t next_to_clean; 1584 uint32_t refill_required; 1585 uint32_t refill_threshold; 1586 uint32_t do_if_input = 0; 1587 unsigned int qid; 1588 int rc, i; 1589 int budget = RX_BUDGET; 1590 1591 adapter = rx_ring->que->adapter; 1592 ifp = adapter->ifp; 1593 qid = rx_ring->que->id; 1594 ena_qid = ENA_IO_RXQ_IDX(qid); 1595 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 1596 io_sq = &adapter->ena_dev->io_sq_queues[ena_qid]; 1597 next_to_clean = rx_ring->next_to_clean; 1598 1599 do { 1600 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs; 1601 ena_rx_ctx.max_bufs = adapter->max_rx_sgl_size; 1602 ena_rx_ctx.descs = 0; 1603 rc = ena_com_rx_pkt(io_cq, io_sq, &ena_rx_ctx); 1604 1605 if (unlikely(rc)) 1606 goto error; 1607 1608 if (unlikely(ena_rx_ctx.descs == 0)) 1609 break; 1610 1611 /* Receive mbuf from the ring */ 1612 mbuf = ena_rx_mbuf(rx_ring, rx_ring->ena_bufs, 1613 &ena_rx_ctx, &next_to_clean); 1614 1615 /* Exit if we failed to retrieve a buffer */ 1616 if (unlikely(!mbuf)) { 1617 for (i = 0; i < ena_rx_ctx.descs; ++i) { 1618 rx_ring->free_rx_ids[next_to_clean] = 1619 rx_ring->ena_bufs[i].req_id; 1620 next_to_clean = 1621 ENA_RX_RING_IDX_NEXT(next_to_clean, 1622 rx_ring->ring_size); 1623 1624 } 1625 break; 1626 } 1627 ena_trace(ENA_DBG | ENA_RXPTH, "Rx: %d bytes", 1628 mbuf->m_pkthdr.len); 1629 1630 if ((ifp->if_capenable & IFCAP_RXCSUM) || 1631 (ifp->if_capenable & IFCAP_RXCSUM_IPV6)) { 1632 ena_rx_checksum(rx_ring, &ena_rx_ctx, mbuf); 1633 } 1634 1635 counter_enter(); 1636 counter_u64_add_protected(rx_ring->rx_stats.bytes, 1637 mbuf->m_pkthdr.len); 1638 counter_u64_add_protected(adapter->hw_stats.rx_bytes, 1639 mbuf->m_pkthdr.len); 1640 counter_exit(); 1641 /* 1642 * LRO is only for IP/TCP packets and TCP checksum of the packet 1643 * should be computed by hardware. 1644 */ 1645 do_if_input = 1; 1646 if ((ifp->if_capenable & IFCAP_LRO) && 1647 (mbuf->m_pkthdr.csum_flags & CSUM_IP_VALID) && 1648 ena_rx_ctx.l4_proto == ENA_ETH_IO_L4_PROTO_TCP) { 1649 /* 1650 * Send to the stack if: 1651 * - LRO not enabled, or 1652 * - no LRO resources, or 1653 * - lro enqueue fails 1654 */ 1655 if (rx_ring->lro.lro_cnt != 0 && 1656 tcp_lro_rx(&rx_ring->lro, mbuf, 0) == 0) 1657 do_if_input = 0; 1658 } 1659 if (do_if_input) { 1660 ena_trace(ENA_DBG | ENA_RXPTH, "calling if_input() with mbuf %p", 1661 mbuf); 1662 (*ifp->if_input)(ifp, mbuf); 1663 } 1664 1665 counter_enter(); 1666 counter_u64_add_protected(rx_ring->rx_stats.cnt, 1); 1667 counter_u64_add_protected(adapter->hw_stats.rx_packets, 1); 1668 counter_exit(); 1669 } while (--budget); 1670 1671 rx_ring->next_to_clean = next_to_clean; 1672 1673 refill_required = ena_com_free_desc(io_sq); 1674 refill_threshold = rx_ring->ring_size / ENA_RX_REFILL_THRESH_DEVIDER; 1675 1676 if (refill_required > refill_threshold) { 1677 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq); 1678 ena_refill_rx_bufs(rx_ring, refill_required); 1679 } 1680 1681 tcp_lro_flush_all(&rx_ring->lro); 1682 1683 return (RX_BUDGET - budget); 1684 1685 error: 1686 counter_u64_add(rx_ring->rx_stats.bad_desc_num, 1); 1687 return (RX_BUDGET - budget); 1688 } 1689 1690 /********************************************************************* 1691 * 1692 * MSIX & Interrupt Service routine 1693 * 1694 **********************************************************************/ 1695 1696 /** 1697 * ena_handle_msix - MSIX Interrupt Handler for admin/async queue 1698 * @arg: interrupt number 1699 **/ 1700 static void 1701 ena_intr_msix_mgmnt(void *arg) 1702 { 1703 struct ena_adapter *adapter = (struct ena_adapter *)arg; 1704 1705 ena_com_admin_q_comp_intr_handler(adapter->ena_dev); 1706 if (likely(adapter->running)) 1707 ena_com_aenq_intr_handler(adapter->ena_dev, arg); 1708 } 1709 1710 /** 1711 * ena_handle_msix - MSIX Interrupt Handler for Tx/Rx 1712 * @arg: interrupt number 1713 **/ 1714 static void 1715 ena_handle_msix(void *arg) 1716 { 1717 struct ena_que *que = arg; 1718 struct ena_adapter *adapter = que->adapter; 1719 if_t ifp = adapter->ifp; 1720 struct ena_ring *tx_ring; 1721 struct ena_ring *rx_ring; 1722 struct ena_com_io_cq* io_cq; 1723 struct ena_eth_io_intr_reg intr_reg; 1724 int qid, ena_qid; 1725 int txc, rxc, i; 1726 1727 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1728 return; 1729 1730 ena_trace(ENA_DBG, "MSI-X TX/RX routine"); 1731 1732 tx_ring = que->tx_ring; 1733 rx_ring = que->rx_ring; 1734 qid = que->id; 1735 ena_qid = ENA_IO_TXQ_IDX(qid); 1736 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 1737 1738 for (i = 0; i < CLEAN_BUDGET; ++i) { 1739 rxc = ena_rx_cleanup(rx_ring); 1740 1741 /* Protection from calling ena_tx_cleanup from ena_start_xmit */ 1742 ENA_RING_MTX_LOCK(tx_ring); 1743 txc = ena_tx_cleanup(tx_ring); 1744 ENA_RING_MTX_UNLOCK(tx_ring); 1745 1746 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1747 return; 1748 1749 if (txc != TX_BUDGET && rxc != RX_BUDGET) 1750 break; 1751 } 1752 1753 /* Signal that work is done and unmask interrupt */ 1754 ena_com_update_intr_reg(&intr_reg, 1755 RX_IRQ_INTERVAL, 1756 TX_IRQ_INTERVAL, 1757 true); 1758 ena_com_unmask_intr(io_cq, &intr_reg); 1759 } 1760 1761 static int 1762 ena_enable_msix(struct ena_adapter *adapter) 1763 { 1764 device_t dev = adapter->pdev; 1765 int i, msix_vecs, rc = 0; 1766 1767 /* Reserved the max msix vectors we might need */ 1768 msix_vecs = ENA_MAX_MSIX_VEC(adapter->num_queues); 1769 1770 adapter->msix_entries = malloc(msix_vecs * sizeof(struct msix_entry), 1771 M_DEVBUF, M_WAITOK | M_ZERO); 1772 1773 device_printf(dev, "Allocated msix_entries, vectors (cnt: %d)\n", 1774 msix_vecs); 1775 1776 for (i = 0; i < msix_vecs; i++) { 1777 adapter->msix_entries[i].entry = i; 1778 /* Vectors must start from 1 */ 1779 adapter->msix_entries[i].vector = i + 1; 1780 } 1781 1782 rc = pci_alloc_msix(dev, &msix_vecs); 1783 if (rc != 0) { 1784 device_printf(dev, 1785 "Failed to enable MSIX, vectors %d rc %d\n", msix_vecs, rc); 1786 free(adapter->msix_entries, M_DEVBUF); 1787 adapter->msix_entries = NULL; 1788 rc = ENOSPC; 1789 goto error; 1790 } 1791 1792 adapter->msix_vecs = msix_vecs; 1793 adapter->msix_enabled = true; 1794 1795 error: 1796 return (rc); 1797 } 1798 1799 static void 1800 ena_setup_mgmnt_intr(struct ena_adapter *adapter) 1801 { 1802 1803 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, 1804 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s", 1805 device_get_nameunit(adapter->pdev)); 1806 /* 1807 * Handler is NULL on purpose, it will be set 1808 * when mgmnt interrupt is acquired 1809 */ 1810 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = NULL; 1811 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter; 1812 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector = 1813 adapter->msix_entries[ENA_MGMNT_IRQ_IDX].vector; 1814 1815 return; 1816 } 1817 1818 static void 1819 ena_setup_io_intr(struct ena_adapter *adapter) 1820 { 1821 static int last_bind_cpu = -1; 1822 int irq_idx; 1823 ena_trace(ENA_DBG, "enter"); 1824 1825 for (int i = 0; i < adapter->num_queues; i++) { 1826 irq_idx = ENA_IO_IRQ_IDX(i); 1827 1828 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, 1829 "%s-TxRx-%d", device_get_nameunit(adapter->pdev), i); 1830 adapter->irq_tbl[irq_idx].handler = ena_handle_msix; 1831 adapter->irq_tbl[irq_idx].data = &adapter->que[i]; 1832 adapter->irq_tbl[irq_idx].vector = 1833 adapter->msix_entries[irq_idx].vector; 1834 ena_trace(ENA_INFO | ENA_IOQ, "ena_setup_io_intr vector: %d\n", 1835 adapter->msix_entries[irq_idx].vector); 1836 #ifdef RSS 1837 adapter->que[i].cpu = adapter->irq_tbl[irq_idx].cpu = 1838 rss_getcpu(i % rss_getnumbuckets()); 1839 #else 1840 /* 1841 * We still want to bind rings to the corresponding cpu 1842 * using something similar to the RSS round-robin technique. 1843 */ 1844 if (last_bind_cpu < 0) 1845 last_bind_cpu = CPU_FIRST(); 1846 adapter->que[i].cpu = adapter->irq_tbl[irq_idx].cpu = 1847 last_bind_cpu; 1848 last_bind_cpu = CPU_NEXT(last_bind_cpu); 1849 #endif 1850 } 1851 1852 return; 1853 } 1854 1855 static int 1856 ena_request_mgmnt_irq(struct ena_adapter *adapter) 1857 { 1858 struct ena_irq *irq; 1859 unsigned long flags; 1860 int rc, rcc; 1861 1862 flags = RF_ACTIVE | RF_SHAREABLE; 1863 1864 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 1865 irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ, 1866 &irq->vector, flags); 1867 1868 if (irq->res == NULL) { 1869 device_printf(adapter->pdev, "could not allocate " 1870 "irq vector: %d\n", irq->vector); 1871 rc = ENXIO; 1872 goto exit_res; 1873 } 1874 1875 if ((rc = bus_activate_resource(adapter->pdev, SYS_RES_IRQ, irq->vector, 1876 irq->res)) != 0) { 1877 device_printf(adapter->pdev, "could not activate " 1878 "irq vector: %d\n", irq->vector); 1879 goto exit_intr; 1880 } 1881 1882 if ((rc = bus_setup_intr(adapter->pdev, irq->res, 1883 INTR_TYPE_NET | INTR_MPSAFE, NULL, 1884 ena_intr_msix_mgmnt, irq->data, &irq->cookie)) != 0) { 1885 device_printf(adapter->pdev, "failed to register " 1886 "interrupt handler for irq %ju: %d\n", 1887 rman_get_start(irq->res), rc); 1888 goto exit_intr; 1889 } 1890 irq->requested = true; 1891 1892 return (rc); 1893 1894 exit_intr: 1895 device_printf(adapter->pdev, "exit_intr: releasing resource" 1896 " for irq %d\n", irq->vector); 1897 rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 1898 irq->vector, irq->res); 1899 if (rcc) 1900 device_printf(adapter->pdev, "dev has no parent while " 1901 "releasing res for irq: %d\n", irq->vector); 1902 irq->res = NULL; 1903 1904 exit_res: 1905 return (rc); 1906 } 1907 1908 static int 1909 ena_request_io_irq(struct ena_adapter *adapter) 1910 { 1911 struct ena_irq *irq; 1912 unsigned long flags = 0; 1913 int rc = 0, i, rcc; 1914 1915 if (!adapter->msix_enabled) { 1916 device_printf(adapter->pdev, "failed to request irq\n"); 1917 return (EINVAL); 1918 } else { 1919 flags = RF_ACTIVE | RF_SHAREABLE; 1920 } 1921 1922 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) { 1923 irq = &adapter->irq_tbl[i]; 1924 1925 if (irq->requested) 1926 continue; 1927 1928 irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ, 1929 &irq->vector, flags); 1930 if (irq->res == NULL) { 1931 device_printf(adapter->pdev, "could not allocate " 1932 "irq vector: %d\n", irq->vector); 1933 goto err; 1934 } 1935 1936 if ((rc = bus_setup_intr(adapter->pdev, irq->res, 1937 INTR_TYPE_NET | INTR_MPSAFE, NULL, irq->handler, 1938 irq->data, &irq->cookie)) != 0) { 1939 device_printf(adapter->pdev, "failed to register " 1940 "interrupt handler for irq %ju: %d\n", 1941 rman_get_start(irq->res), rc); 1942 goto err; 1943 } 1944 irq->requested = true; 1945 1946 #ifdef RSS 1947 device_printf(adapter->pdev, "queue %d - RSS bucket %d\n", 1948 i - ENA_IO_IRQ_FIRST_IDX, irq->cpu); 1949 #else 1950 device_printf(adapter->pdev, "queue %d - cpu %d\n", 1951 i - ENA_IO_IRQ_FIRST_IDX, irq->cpu); 1952 #endif 1953 } 1954 1955 return (rc); 1956 1957 err: 1958 1959 for (; i >= ENA_IO_IRQ_FIRST_IDX; i--) { 1960 irq = &adapter->irq_tbl[i]; 1961 rcc = 0; 1962 1963 /* Once we entered err: section and irq->requested is true we 1964 free both intr and resources */ 1965 if (irq->requested == true) 1966 rcc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie); 1967 if (rcc) 1968 device_printf(adapter->pdev, "could not release" 1969 " irq: %d, error: %d\n", irq->vector, rcc); 1970 1971 /* If we entred err: section without irq->requested set we know 1972 it was bus_alloc_resource_any() that needs cleanup, provided 1973 res is not NULL. In case res is NULL no work in needed in 1974 this iteration */ 1975 rcc = 0; 1976 if (irq->res != NULL) { 1977 rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 1978 irq->vector, irq->res); 1979 } 1980 if (rcc) 1981 device_printf(adapter->pdev, "dev has no parent while " 1982 "releasing res for irq: %d\n", irq->vector); 1983 irq->requested = false; 1984 irq->res = NULL; 1985 } 1986 1987 return (rc); 1988 } 1989 1990 static void 1991 ena_free_mgmnt_irq(struct ena_adapter *adapter) 1992 { 1993 struct ena_irq *irq; 1994 int rc; 1995 1996 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 1997 if (irq->requested) { 1998 ena_trace(ENA_INFO | ENA_ADMQ, "tear down irq: %d\n", 1999 irq->vector); 2000 rc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie); 2001 if (rc) 2002 device_printf(adapter->pdev, "failed to tear " 2003 "down irq: %d\n", irq->vector); 2004 irq->requested = 0; 2005 } 2006 2007 if (irq->res != NULL) { 2008 ena_trace(ENA_INFO | ENA_ADMQ, "release resource irq: %d\n", 2009 irq->vector); 2010 rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 2011 irq->vector, irq->res); 2012 irq->res = NULL; 2013 if (rc) 2014 device_printf(adapter->pdev, "dev has no parent while " 2015 "releasing res for irq: %d\n", irq->vector); 2016 } 2017 2018 return; 2019 } 2020 2021 static void 2022 ena_free_io_irq(struct ena_adapter *adapter) 2023 { 2024 struct ena_irq *irq; 2025 int rc; 2026 2027 for (int i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) { 2028 irq = &adapter->irq_tbl[i]; 2029 if (irq->requested) { 2030 ena_trace(ENA_INFO | ENA_IOQ, "tear down irq: %d\n", 2031 irq->vector); 2032 rc = bus_teardown_intr(adapter->pdev, irq->res, 2033 irq->cookie); 2034 if (rc) { 2035 device_printf(adapter->pdev, "failed to tear " 2036 "down irq: %d\n", irq->vector); 2037 } 2038 irq->requested = 0; 2039 } 2040 2041 if (irq->res != NULL) { 2042 ena_trace(ENA_INFO | ENA_IOQ, "release resource irq: %d\n", 2043 irq->vector); 2044 rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 2045 irq->vector, irq->res); 2046 irq->res = NULL; 2047 if (rc) { 2048 device_printf(adapter->pdev, "dev has no parent" 2049 " while releasing res for irq: %d\n", 2050 irq->vector); 2051 } 2052 } 2053 } 2054 2055 return; 2056 } 2057 2058 static void 2059 ena_free_irqs(struct ena_adapter* adapter) 2060 { 2061 2062 ena_free_io_irq(adapter); 2063 ena_free_mgmnt_irq(adapter); 2064 ena_disable_msix(adapter); 2065 } 2066 2067 static void 2068 ena_disable_msix(struct ena_adapter *adapter) 2069 { 2070 2071 pci_release_msi(adapter->pdev); 2072 2073 adapter->msix_vecs = 0; 2074 free(adapter->msix_entries, M_DEVBUF); 2075 adapter->msix_entries = NULL; 2076 } 2077 2078 static void 2079 ena_unmask_all_io_irqs(struct ena_adapter *adapter) 2080 { 2081 struct ena_com_io_cq* io_cq; 2082 struct ena_eth_io_intr_reg intr_reg; 2083 uint16_t ena_qid; 2084 int i; 2085 2086 /* Unmask interrupts for all queues */ 2087 for (i = 0; i < adapter->num_queues; i++) { 2088 ena_qid = ENA_IO_TXQ_IDX(i); 2089 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 2090 ena_com_update_intr_reg(&intr_reg, 0, 0, true); 2091 ena_com_unmask_intr(io_cq, &intr_reg); 2092 } 2093 } 2094 2095 /* Configure the Rx forwarding */ 2096 static int ena_rss_configure(struct ena_adapter *adapter) 2097 { 2098 struct ena_com_dev *ena_dev = adapter->ena_dev; 2099 int rc; 2100 2101 /* Set indirect table */ 2102 rc = ena_com_indirect_table_set(ena_dev); 2103 if (unlikely(rc && rc != EOPNOTSUPP)) 2104 return rc; 2105 2106 /* Configure hash function (if supported) */ 2107 rc = ena_com_set_hash_function(ena_dev); 2108 if (unlikely(rc && (rc != EOPNOTSUPP))) 2109 return rc; 2110 2111 /* Configure hash inputs (if supported) */ 2112 rc = ena_com_set_hash_ctrl(ena_dev); 2113 if (unlikely(rc && (rc != EOPNOTSUPP))) 2114 return rc; 2115 2116 return 0; 2117 } 2118 2119 static int 2120 ena_up_complete(struct ena_adapter *adapter) 2121 { 2122 int rc; 2123 2124 if (adapter->rss_support) { 2125 rc = ena_rss_configure(adapter); 2126 if (rc) 2127 return (rc); 2128 } 2129 2130 ena_change_mtu(adapter->ifp, adapter->ifp->if_mtu); 2131 ena_refill_all_rx_bufs(adapter); 2132 ena_reset_counters((counter_u64_t *)&adapter->hw_stats, 2133 sizeof(adapter->hw_stats)); 2134 2135 return (0); 2136 } 2137 2138 static int 2139 ena_up(struct ena_adapter *adapter) 2140 { 2141 int rc = 0; 2142 2143 if (!device_is_attached(adapter->pdev)) { 2144 device_printf(adapter->pdev, "device is not attached!\n"); 2145 return (ENXIO); 2146 } 2147 2148 if (!adapter->running) { 2149 device_printf(adapter->pdev, "device is not running!\n"); 2150 return (ENXIO); 2151 } 2152 2153 if (!adapter->up) { 2154 device_printf(adapter->pdev, "device is going UP\n"); 2155 2156 /* setup interrupts for IO queues */ 2157 ena_setup_io_intr(adapter); 2158 rc = ena_request_io_irq(adapter); 2159 if (rc) { 2160 ena_trace(ENA_ALERT, "err_req_irq"); 2161 goto err_req_irq; 2162 } 2163 2164 /* allocate transmit descriptors */ 2165 rc = ena_setup_all_tx_resources(adapter); 2166 if (rc) { 2167 ena_trace(ENA_ALERT, "err_setup_tx"); 2168 goto err_setup_tx; 2169 } 2170 2171 /* allocate receive descriptors */ 2172 rc = ena_setup_all_rx_resources(adapter); 2173 if (rc) { 2174 ena_trace(ENA_ALERT, "err_setup_rx"); 2175 goto err_setup_rx; 2176 } 2177 2178 /* create IO queues for Rx & Tx */ 2179 rc = ena_create_io_queues(adapter); 2180 if (rc) { 2181 ena_trace(ENA_ALERT, 2182 "create IO queues failed"); 2183 goto err_io_que; 2184 } 2185 2186 if (adapter->link_status) 2187 if_link_state_change(adapter->ifp, LINK_STATE_UP); 2188 2189 rc = ena_up_complete(adapter); 2190 if (rc) 2191 goto err_up_complete; 2192 2193 counter_u64_add(adapter->dev_stats.interface_up, 1); 2194 2195 ena_update_hwassist(adapter); 2196 2197 if_setdrvflagbits(adapter->ifp, IFF_DRV_RUNNING, 2198 IFF_DRV_OACTIVE); 2199 2200 callout_reset_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 2201 ena_timer_service, (void *)adapter, 0); 2202 2203 adapter->up = true; 2204 2205 ena_unmask_all_io_irqs(adapter); 2206 } 2207 2208 return (0); 2209 2210 err_up_complete: 2211 ena_destroy_all_io_queues(adapter); 2212 err_io_que: 2213 ena_free_all_rx_resources(adapter); 2214 err_setup_rx: 2215 ena_free_all_tx_resources(adapter); 2216 err_setup_tx: 2217 ena_free_io_irq(adapter); 2218 err_req_irq: 2219 return (rc); 2220 } 2221 2222 static uint64_t 2223 ena_get_counter(if_t ifp, ift_counter cnt) 2224 { 2225 struct ena_adapter *adapter; 2226 struct ena_hw_stats *stats; 2227 2228 adapter = if_getsoftc(ifp); 2229 stats = &adapter->hw_stats; 2230 2231 switch (cnt) { 2232 case IFCOUNTER_IPACKETS: 2233 return (counter_u64_fetch(stats->rx_packets)); 2234 case IFCOUNTER_OPACKETS: 2235 return (counter_u64_fetch(stats->tx_packets)); 2236 case IFCOUNTER_IBYTES: 2237 return (counter_u64_fetch(stats->rx_bytes)); 2238 case IFCOUNTER_OBYTES: 2239 return (counter_u64_fetch(stats->tx_bytes)); 2240 case IFCOUNTER_IQDROPS: 2241 return (counter_u64_fetch(stats->rx_drops)); 2242 default: 2243 return (if_get_counter_default(ifp, cnt)); 2244 } 2245 } 2246 2247 static int 2248 ena_media_change(if_t ifp) 2249 { 2250 /* Media Change is not supported by firmware */ 2251 return (0); 2252 } 2253 2254 static void 2255 ena_media_status(if_t ifp, struct ifmediareq *ifmr) 2256 { 2257 struct ena_adapter *adapter = if_getsoftc(ifp); 2258 ena_trace(ENA_DBG, "enter"); 2259 2260 ENA_DEV_LOCK; 2261 2262 ifmr->ifm_status = IFM_AVALID; 2263 ifmr->ifm_active = IFM_ETHER; 2264 2265 if (!adapter->link_status) { 2266 ENA_DEV_UNLOCK; 2267 ena_trace(ENA_WARNING, "link_status = false"); 2268 return; 2269 } 2270 2271 ifmr->ifm_status |= IFM_ACTIVE; 2272 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 2273 2274 ENA_DEV_UNLOCK; 2275 2276 return; 2277 } 2278 2279 static void 2280 ena_init(void *arg) 2281 { 2282 struct ena_adapter *adapter = (struct ena_adapter *)arg; 2283 2284 if (adapter->up == false) { 2285 sx_xlock(&adapter->ioctl_sx); 2286 ena_up(adapter); 2287 sx_unlock(&adapter->ioctl_sx); 2288 } 2289 2290 return; 2291 } 2292 2293 static int 2294 ena_ioctl(if_t ifp, u_long command, caddr_t data) 2295 { 2296 struct ena_adapter *adapter; 2297 struct ifreq *ifr; 2298 int rc; 2299 2300 adapter = ifp->if_softc; 2301 ifr = (struct ifreq *)data; 2302 2303 /* 2304 * Acquiring lock to prevent from running up and down routines parallel. 2305 */ 2306 rc = 0; 2307 switch (command) { 2308 case SIOCSIFMTU: 2309 sx_xlock(&adapter->ioctl_sx); 2310 ena_down(adapter); 2311 2312 ena_change_mtu(ifp, ifr->ifr_mtu); 2313 2314 rc = ena_up(adapter); 2315 sx_unlock(&adapter->ioctl_sx); 2316 break; 2317 2318 case SIOCSIFFLAGS: 2319 if (ifp->if_flags & IFF_UP) { 2320 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2321 if (ifp->if_flags & (IFF_PROMISC | 2322 IFF_ALLMULTI)) { 2323 device_printf(adapter->pdev, 2324 "ioctl promisc/allmulti\n"); 2325 } 2326 } else { 2327 sx_xlock(&adapter->ioctl_sx); 2328 rc = ena_up(adapter); 2329 sx_unlock(&adapter->ioctl_sx); 2330 } 2331 } else { 2332 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 2333 sx_xlock(&adapter->ioctl_sx); 2334 ena_down(adapter); 2335 sx_unlock(&adapter->ioctl_sx); 2336 } 2337 } 2338 break; 2339 2340 case SIOCADDMULTI: 2341 case SIOCDELMULTI: 2342 break; 2343 2344 case SIOCSIFMEDIA: 2345 case SIOCGIFMEDIA: 2346 rc = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 2347 break; 2348 2349 case SIOCSIFCAP: 2350 { 2351 int reinit = 0; 2352 2353 if (ifr->ifr_reqcap != ifp->if_capenable) { 2354 ifp->if_capenable = ifr->ifr_reqcap; 2355 reinit = 1; 2356 } 2357 2358 if (reinit && (ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2359 sx_xlock(&adapter->ioctl_sx); 2360 ena_down(adapter); 2361 rc = ena_up(adapter); 2362 sx_unlock(&adapter->ioctl_sx); 2363 } 2364 } 2365 2366 break; 2367 default: 2368 rc = ether_ioctl(ifp, command, data); 2369 break; 2370 } 2371 2372 return (rc); 2373 } 2374 2375 static int 2376 ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *feat) 2377 { 2378 int caps = 0; 2379 2380 if (feat->offload.tx & 2381 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK | 2382 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK | 2383 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK)) 2384 caps |= IFCAP_TXCSUM; 2385 2386 if (feat->offload.tx & 2387 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_MASK | 2388 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)) 2389 caps |= IFCAP_TXCSUM_IPV6; 2390 2391 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) 2392 caps |= IFCAP_TSO4; 2393 2394 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) 2395 caps |= IFCAP_TSO6; 2396 2397 if (feat->offload.rx_supported & 2398 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK | 2399 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L3_CSUM_IPV4_MASK)) 2400 caps |= IFCAP_RXCSUM; 2401 2402 if (feat->offload.rx_supported & 2403 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) 2404 caps |= IFCAP_RXCSUM_IPV6; 2405 2406 caps |= IFCAP_LRO | IFCAP_JUMBO_MTU; 2407 2408 return (caps); 2409 } 2410 2411 static void 2412 ena_update_host_info(struct ena_admin_host_info *host_info, if_t ifp) 2413 { 2414 2415 host_info->supported_network_features[0] = 2416 (uint32_t)if_getcapabilities(ifp); 2417 } 2418 2419 static void 2420 ena_update_hwassist(struct ena_adapter *adapter) 2421 { 2422 if_t ifp = adapter->ifp; 2423 uint32_t feat = adapter->tx_offload_cap; 2424 int cap = if_getcapenable(ifp); 2425 int flags = 0; 2426 2427 if_clearhwassist(ifp); 2428 2429 if (cap & IFCAP_TXCSUM) { 2430 if (feat & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK) 2431 flags |= CSUM_IP; 2432 if (feat & 2433 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK | 2434 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)) 2435 flags |= CSUM_IP_UDP | CSUM_IP_TCP; 2436 } 2437 2438 if (cap & IFCAP_TXCSUM_IPV6) 2439 flags |= CSUM_IP6_UDP | CSUM_IP6_TCP; 2440 2441 if (cap & IFCAP_TSO4) 2442 flags |= CSUM_IP_TSO; 2443 2444 if (cap & IFCAP_TSO6) 2445 flags |= CSUM_IP6_TSO; 2446 2447 if_sethwassistbits(ifp, flags, 0); 2448 } 2449 2450 static int 2451 ena_setup_ifnet(device_t pdev, struct ena_adapter *adapter, 2452 struct ena_com_dev_get_features_ctx *feat) 2453 { 2454 if_t ifp; 2455 int caps = 0; 2456 2457 ena_trace(ENA_DBG, "enter"); 2458 2459 ifp = adapter->ifp = if_gethandle(IFT_ETHER); 2460 if (ifp == 0) { 2461 device_printf(pdev, "can not allocate ifnet structure\n"); 2462 return (ENXIO); 2463 } 2464 if_initname(ifp, device_get_name(pdev), device_get_unit(pdev)); 2465 if_setdev(ifp, pdev); 2466 if_setsoftc(ifp, adapter); 2467 2468 if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST); 2469 if_setinitfn(ifp, ena_init); 2470 if_settransmitfn(ifp, ena_mq_start); 2471 if_setqflushfn(ifp, ena_qflush); 2472 if_setioctlfn(ifp, ena_ioctl); 2473 if_setgetcounterfn(ifp, ena_get_counter); 2474 2475 if_setsendqlen(ifp, adapter->tx_ring_size); 2476 if_setsendqready(ifp); 2477 if_setmtu(ifp, ETHERMTU); 2478 if_setbaudrate(ifp, 0); 2479 /* Zeroize capabilities... */ 2480 if_setcapabilities(ifp, 0); 2481 if_setcapenable(ifp, 0); 2482 /* check hardware support */ 2483 caps = ena_get_dev_offloads(feat); 2484 /* ... and set them */ 2485 if_setcapabilitiesbit(ifp, caps, 0); 2486 2487 /* TSO parameters */ 2488 ifp->if_hw_tsomax = ENA_TSO_MAXSIZE - 2489 (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN); 2490 ifp->if_hw_tsomaxsegcount = adapter->max_tx_sgl_size - 1; 2491 ifp->if_hw_tsomaxsegsize = ENA_TSO_MAXSIZE; 2492 2493 if_setifheaderlen(ifp, sizeof(struct ether_vlan_header)); 2494 if_setcapenable(ifp, if_getcapabilities(ifp)); 2495 2496 /* 2497 * Specify the media types supported by this adapter and register 2498 * callbacks to update media and link information 2499 */ 2500 ifmedia_init(&adapter->media, IFM_IMASK, 2501 ena_media_change, ena_media_status); 2502 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 2503 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 2504 2505 ether_ifattach(ifp, adapter->mac_addr); 2506 2507 return (0); 2508 } 2509 2510 static void 2511 ena_down(struct ena_adapter *adapter) 2512 { 2513 int rc; 2514 2515 if (adapter->up) { 2516 device_printf(adapter->pdev, "device is going DOWN\n"); 2517 2518 callout_drain(&adapter->timer_service); 2519 2520 adapter->up = false; 2521 if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE, 2522 IFF_DRV_RUNNING); 2523 2524 ena_free_io_irq(adapter); 2525 2526 if (adapter->trigger_reset) { 2527 rc = ena_com_dev_reset(adapter->ena_dev, 2528 adapter->reset_reason); 2529 if (rc) 2530 device_printf(adapter->pdev, 2531 "Device reset failed\n"); 2532 } 2533 2534 ena_destroy_all_io_queues(adapter); 2535 2536 ena_free_all_tx_bufs(adapter); 2537 ena_free_all_rx_bufs(adapter); 2538 ena_free_all_tx_resources(adapter); 2539 ena_free_all_rx_resources(adapter); 2540 2541 counter_u64_add(adapter->dev_stats.interface_down, 1); 2542 } 2543 2544 return; 2545 } 2546 2547 static void 2548 ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct mbuf *mbuf) 2549 { 2550 struct ena_com_tx_meta *ena_meta; 2551 struct ether_vlan_header *eh; 2552 u32 mss; 2553 bool offload; 2554 uint16_t etype; 2555 int ehdrlen; 2556 struct ip *ip; 2557 int iphlen; 2558 struct tcphdr *th; 2559 2560 offload = false; 2561 ena_meta = &ena_tx_ctx->ena_meta; 2562 mss = mbuf->m_pkthdr.tso_segsz; 2563 2564 if (mss != 0) 2565 offload = true; 2566 2567 if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) != 0) 2568 offload = true; 2569 2570 if ((mbuf->m_pkthdr.csum_flags & CSUM_OFFLOAD) != 0) 2571 offload = true; 2572 2573 if (offload == false) { 2574 ena_tx_ctx->meta_valid = 0; 2575 return; 2576 } 2577 2578 /* Determine where frame payload starts. */ 2579 eh = mtod(mbuf, struct ether_vlan_header *); 2580 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) { 2581 etype = ntohs(eh->evl_proto); 2582 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN; 2583 } else { 2584 etype = ntohs(eh->evl_encap_proto); 2585 ehdrlen = ETHER_HDR_LEN; 2586 } 2587 2588 ip = (struct ip *)(mbuf->m_data + ehdrlen); 2589 iphlen = ip->ip_hl << 2; 2590 th = (struct tcphdr *)((caddr_t)ip + iphlen); 2591 2592 if ((mbuf->m_pkthdr.csum_flags & CSUM_IP) != 0) { 2593 ena_tx_ctx->l3_csum_enable = 1; 2594 } 2595 if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) != 0) { 2596 ena_tx_ctx->tso_enable = 1; 2597 ena_meta->l4_hdr_len = (th->th_off); 2598 } 2599 2600 switch (etype) { 2601 case ETHERTYPE_IP: 2602 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4; 2603 if (ip->ip_off == 0) 2604 ena_tx_ctx->df = 1; 2605 break; 2606 case ETHERTYPE_IPV6: 2607 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6; 2608 2609 default: 2610 break; 2611 } 2612 2613 if (ip->ip_p == IPPROTO_TCP) { 2614 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP; 2615 if (mbuf->m_pkthdr.csum_flags & (CSUM_IP_TCP | CSUM_IP6_TCP)) 2616 ena_tx_ctx->l4_csum_enable = 1; 2617 else 2618 ena_tx_ctx->l4_csum_enable = 0; 2619 } else if (ip->ip_p == IPPROTO_UDP) { 2620 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP; 2621 if (mbuf->m_pkthdr.csum_flags & (CSUM_IP_UDP | CSUM_IP6_UDP)) 2622 ena_tx_ctx->l4_csum_enable = 1; 2623 else 2624 ena_tx_ctx->l4_csum_enable = 0; 2625 } else { 2626 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UNKNOWN; 2627 ena_tx_ctx->l4_csum_enable = 0; 2628 } 2629 2630 ena_meta->mss = mss; 2631 ena_meta->l3_hdr_len = iphlen; 2632 ena_meta->l3_hdr_offset = ehdrlen; 2633 ena_tx_ctx->meta_valid = 1; 2634 } 2635 2636 static int 2637 ena_check_and_collapse_mbuf(struct ena_ring *tx_ring, struct mbuf **mbuf) 2638 { 2639 struct ena_adapter *adapter; 2640 struct mbuf *collapsed_mbuf; 2641 int num_frags; 2642 2643 adapter = tx_ring->adapter; 2644 num_frags = ena_mbuf_count(*mbuf); 2645 2646 /* One segment must be reserved for configuration descriptor. */ 2647 if (num_frags < adapter->max_tx_sgl_size) 2648 return (0); 2649 counter_u64_add(tx_ring->tx_stats.collapse, 1); 2650 2651 collapsed_mbuf = m_collapse(*mbuf, M_NOWAIT, 2652 adapter->max_tx_sgl_size - 1); 2653 if (collapsed_mbuf == NULL) { 2654 counter_u64_add(tx_ring->tx_stats.collapse_err, 1); 2655 return (ENOMEM); 2656 } 2657 2658 /* If mbuf was collapsed succesfully, original mbuf is released. */ 2659 *mbuf = collapsed_mbuf; 2660 2661 return (0); 2662 } 2663 2664 static int 2665 ena_xmit_mbuf(struct ena_ring *tx_ring, struct mbuf **mbuf) 2666 { 2667 struct ena_adapter *adapter; 2668 struct ena_tx_buffer *tx_info; 2669 struct ena_com_tx_ctx ena_tx_ctx; 2670 struct ena_com_dev *ena_dev; 2671 struct ena_com_buf *ena_buf; 2672 struct ena_com_io_sq* io_sq; 2673 bus_dma_segment_t segs[ENA_BUS_DMA_SEGS]; 2674 void *push_hdr; 2675 uint16_t next_to_use; 2676 uint16_t req_id; 2677 uint16_t push_len; 2678 uint16_t ena_qid; 2679 uint32_t len, nsegs, header_len; 2680 int i, rc; 2681 int nb_hw_desc; 2682 2683 ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id); 2684 adapter = tx_ring->que->adapter; 2685 ena_dev = adapter->ena_dev; 2686 io_sq = &adapter->ena_dev->io_sq_queues[ena_qid]; 2687 2688 ENA_ASSERT(*mbuf, "mbuf is NULL\n"); 2689 2690 rc = ena_check_and_collapse_mbuf(tx_ring, mbuf); 2691 if (rc) { 2692 ena_trace(ENA_WARNING, 2693 "Failed to collapse mbuf! err: %d", rc); 2694 return (rc); 2695 } 2696 2697 next_to_use = tx_ring->next_to_use; 2698 req_id = tx_ring->free_tx_ids[next_to_use]; 2699 tx_info = &tx_ring->tx_buffer_info[req_id]; 2700 2701 tx_info->mbuf = *mbuf; 2702 tx_info->num_of_bufs = 0; 2703 2704 ena_buf = tx_info->bufs; 2705 len = (*mbuf)->m_len; 2706 2707 ena_trace(ENA_DBG | ENA_TXPTH, "Tx: %d bytes", (*mbuf)->m_pkthdr.len); 2708 2709 push_len = 0; 2710 header_len = min_t(uint32_t, len, tx_ring->tx_max_header_size); 2711 push_hdr = NULL; 2712 2713 rc = bus_dmamap_load_mbuf_sg(adapter->tx_buf_tag, tx_info->map, 2714 *mbuf, segs, &nsegs, BUS_DMA_NOWAIT); 2715 2716 if (rc || (nsegs == 0)) { 2717 ena_trace(ENA_WARNING, 2718 "dmamap load failed! err: %d nsegs: %d", rc, nsegs); 2719 counter_u64_add(tx_ring->tx_stats.dma_mapping_err, 1); 2720 tx_info->mbuf = NULL; 2721 if (rc == ENOMEM) 2722 return (ENA_COM_NO_MEM); 2723 else 2724 return (ENA_COM_INVAL); 2725 } 2726 2727 for (i = 0; i < nsegs; i++) { 2728 ena_buf->len = segs[i].ds_len; 2729 ena_buf->paddr = segs[i].ds_addr; 2730 ena_buf++; 2731 } 2732 tx_info->num_of_bufs = nsegs; 2733 2734 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx)); 2735 ena_tx_ctx.ena_bufs = tx_info->bufs; 2736 ena_tx_ctx.push_header = push_hdr; 2737 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 2738 ena_tx_ctx.req_id = req_id; 2739 ena_tx_ctx.header_len = header_len; 2740 2741 /* Set flags and meta data */ 2742 ena_tx_csum(&ena_tx_ctx, *mbuf); 2743 /* Prepare the packet's descriptors and send them to device */ 2744 rc = ena_com_prepare_tx(io_sq, &ena_tx_ctx, &nb_hw_desc); 2745 if (rc != 0) { 2746 ena_trace(ENA_WARNING, "failed to prepare tx bufs\n"); 2747 counter_enter(); 2748 counter_u64_add_protected(tx_ring->tx_stats.queue_stop, 1); 2749 counter_u64_add_protected(tx_ring->tx_stats.prepare_ctx_err, 1); 2750 counter_exit(); 2751 goto dma_error; 2752 } 2753 2754 counter_enter(); 2755 counter_u64_add_protected(tx_ring->tx_stats.cnt, 1); 2756 counter_u64_add_protected(tx_ring->tx_stats.bytes, (*mbuf)->m_pkthdr.len); 2757 2758 counter_u64_add_protected(adapter->hw_stats.tx_packets, 1); 2759 counter_u64_add_protected(adapter->hw_stats.tx_bytes, 2760 (*mbuf)->m_pkthdr.len); 2761 counter_exit(); 2762 2763 tx_info->tx_descs = nb_hw_desc; 2764 getbinuptime(&tx_info->timestamp); 2765 tx_info->print_once = true; 2766 2767 tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use, 2768 tx_ring->ring_size); 2769 2770 bus_dmamap_sync(adapter->tx_buf_tag, tx_info->map, BUS_DMASYNC_PREWRITE); 2771 2772 return (0); 2773 2774 dma_error: 2775 tx_info->mbuf = NULL; 2776 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map); 2777 2778 return (rc); 2779 } 2780 2781 static void 2782 ena_start_xmit(struct ena_ring *tx_ring) 2783 { 2784 struct mbuf *mbuf; 2785 struct ena_adapter *adapter = tx_ring->adapter; 2786 struct ena_com_io_sq* io_sq; 2787 int ena_qid; 2788 int acum_pkts = 0; 2789 int ret = 0; 2790 2791 if ((adapter->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 2792 return; 2793 2794 if (!adapter->link_status) 2795 return; 2796 2797 ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id); 2798 io_sq = &adapter->ena_dev->io_sq_queues[ena_qid]; 2799 2800 while ((mbuf = drbr_peek(adapter->ifp, tx_ring->br)) != NULL) { 2801 ena_trace(ENA_DBG | ENA_TXPTH, "\ndequeued mbuf %p with flags %#x and" 2802 " header csum flags %#jx", 2803 mbuf, mbuf->m_flags, mbuf->m_pkthdr.csum_flags); 2804 2805 if (!ena_com_sq_have_enough_space(io_sq, 2806 ENA_TX_CLEANUP_THRESHOLD)) 2807 ena_tx_cleanup(tx_ring); 2808 2809 if ((ret = ena_xmit_mbuf(tx_ring, &mbuf)) != 0) { 2810 if (ret == ENA_COM_NO_MEM) { 2811 drbr_putback(adapter->ifp, tx_ring->br, mbuf); 2812 } else if (ret == ENA_COM_NO_SPACE) { 2813 drbr_putback(adapter->ifp, tx_ring->br, mbuf); 2814 } else { 2815 m_freem(mbuf); 2816 drbr_advance(adapter->ifp, tx_ring->br); 2817 } 2818 2819 break; 2820 } 2821 2822 drbr_advance(adapter->ifp, tx_ring->br); 2823 2824 if ((adapter->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 2825 return; 2826 2827 acum_pkts++; 2828 2829 BPF_MTAP(adapter->ifp, mbuf); 2830 2831 if (acum_pkts == DB_THRESHOLD) { 2832 acum_pkts = 0; 2833 wmb(); 2834 /* Trigger the dma engine */ 2835 ena_com_write_sq_doorbell(io_sq); 2836 counter_u64_add(tx_ring->tx_stats.doorbells, 1); 2837 } 2838 2839 } 2840 2841 if (acum_pkts) { 2842 wmb(); 2843 /* Trigger the dma engine */ 2844 ena_com_write_sq_doorbell(io_sq); 2845 counter_u64_add(tx_ring->tx_stats.doorbells, 1); 2846 } 2847 2848 if (!ena_com_sq_have_enough_space(io_sq, 2849 ENA_TX_CLEANUP_THRESHOLD)) 2850 ena_tx_cleanup(tx_ring); 2851 } 2852 2853 static void 2854 ena_deferred_mq_start(void *arg, int pending) 2855 { 2856 struct ena_ring *tx_ring = (struct ena_ring *)arg; 2857 struct ifnet *ifp = tx_ring->adapter->ifp; 2858 2859 while (drbr_empty(ifp, tx_ring->br) == FALSE && 2860 (ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) { 2861 ENA_RING_MTX_LOCK(tx_ring); 2862 ena_start_xmit(tx_ring); 2863 ENA_RING_MTX_UNLOCK(tx_ring); 2864 } 2865 } 2866 2867 static int 2868 ena_mq_start(if_t ifp, struct mbuf *m) 2869 { 2870 struct ena_adapter *adapter = ifp->if_softc; 2871 struct ena_ring *tx_ring; 2872 int ret, is_drbr_empty; 2873 uint32_t i; 2874 2875 if ((adapter->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 2876 return (ENODEV); 2877 2878 /* Which queue to use */ 2879 /* 2880 * If everything is setup correctly, it should be the 2881 * same bucket that the current CPU we're on is. 2882 * It should improve performance. 2883 */ 2884 if (M_HASHTYPE_GET(m) != M_HASHTYPE_NONE) { 2885 #ifdef RSS 2886 if (rss_hash2bucket(m->m_pkthdr.flowid, 2887 M_HASHTYPE_GET(m), &i) == 0) { 2888 i = i % adapter->num_queues; 2889 2890 } else 2891 #endif 2892 { 2893 i = m->m_pkthdr.flowid % adapter->num_queues; 2894 } 2895 } else { 2896 i = curcpu % adapter->num_queues; 2897 } 2898 tx_ring = &adapter->tx_ring[i]; 2899 2900 /* Check if drbr is empty before putting packet */ 2901 is_drbr_empty = drbr_empty(ifp, tx_ring->br); 2902 ret = drbr_enqueue(ifp, tx_ring->br, m); 2903 if (ret) { 2904 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 2905 return (ret); 2906 } 2907 2908 if (is_drbr_empty && ENA_RING_MTX_TRYLOCK(tx_ring)) { 2909 ena_start_xmit(tx_ring); 2910 ENA_RING_MTX_UNLOCK(tx_ring); 2911 } else { 2912 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 2913 } 2914 2915 return (0); 2916 } 2917 2918 static void 2919 ena_qflush(if_t ifp) 2920 { 2921 struct ena_adapter *adapter = ifp->if_softc; 2922 struct ena_ring *tx_ring = adapter->tx_ring; 2923 int i; 2924 2925 for(i = 0; i < adapter->num_queues; ++i, ++tx_ring) 2926 if (drbr_empty(ifp, tx_ring->br) == FALSE) { 2927 ENA_RING_MTX_LOCK(tx_ring); 2928 drbr_flush(ifp, tx_ring->br); 2929 ENA_RING_MTX_UNLOCK(tx_ring); 2930 } 2931 2932 if_qflush(ifp); 2933 2934 return; 2935 } 2936 2937 static int ena_calc_io_queue_num(struct ena_adapter *adapter, 2938 struct ena_com_dev_get_features_ctx *get_feat_ctx) 2939 { 2940 int io_sq_num, io_cq_num, io_queue_num; 2941 2942 io_sq_num = get_feat_ctx->max_queues.max_sq_num; 2943 io_cq_num = get_feat_ctx->max_queues.max_sq_num; 2944 2945 io_queue_num = min_t(int, mp_ncpus, ENA_MAX_NUM_IO_QUEUES); 2946 io_queue_num = min_t(int, io_queue_num, io_sq_num); 2947 io_queue_num = min_t(int, io_queue_num, io_cq_num); 2948 /* 1 IRQ for for mgmnt and 1 IRQ for each TX/RX pair */ 2949 io_queue_num = min_t(int, io_queue_num, 2950 pci_msix_count(adapter->pdev) - 1); 2951 #ifdef RSS 2952 io_queue_num = min_t(int, io_queue_num, rss_getnumbuckets()); 2953 #endif 2954 2955 return io_queue_num; 2956 } 2957 2958 static int ena_calc_queue_size(struct ena_adapter *adapter, 2959 uint16_t *max_tx_sgl_size, uint16_t *max_rx_sgl_size, 2960 struct ena_com_dev_get_features_ctx *feat) 2961 { 2962 uint32_t queue_size = ENA_DEFAULT_RING_SIZE; 2963 uint32_t v; 2964 uint32_t q; 2965 2966 queue_size = min_t(uint32_t, queue_size, 2967 feat->max_queues.max_cq_depth); 2968 queue_size = min_t(uint32_t, queue_size, 2969 feat->max_queues.max_sq_depth); 2970 2971 /* round down to the nearest power of 2 */ 2972 v = queue_size; 2973 while (v != 0) { 2974 if (powerof2(queue_size)) 2975 break; 2976 v /= 2; 2977 q = rounddown2(queue_size, v); 2978 if (q != 0) { 2979 queue_size = q; 2980 break; 2981 } 2982 } 2983 2984 if (unlikely(!queue_size)) { 2985 device_printf(adapter->pdev, "Invalid queue size\n"); 2986 return ENA_COM_FAULT; 2987 } 2988 2989 *max_tx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS, 2990 feat->max_queues.max_packet_tx_descs); 2991 *max_rx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS, 2992 feat->max_queues.max_packet_rx_descs); 2993 2994 return queue_size; 2995 } 2996 2997 static int ena_rss_init_default(struct ena_adapter *adapter) 2998 { 2999 struct ena_com_dev *ena_dev = adapter->ena_dev; 3000 device_t dev = adapter->pdev; 3001 int qid, rc, i; 3002 3003 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE); 3004 if (unlikely(rc)) { 3005 device_printf(dev, "Cannot init RSS\n"); 3006 goto err_rss_init; 3007 } 3008 3009 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { 3010 #ifdef RSS 3011 qid = rss_get_indirection_to_bucket(i); 3012 qid = qid % adapter->num_queues; 3013 #else 3014 qid = i % adapter->num_queues; 3015 #endif 3016 rc = ena_com_indirect_table_fill_entry(ena_dev, i, 3017 ENA_IO_RXQ_IDX(qid)); 3018 if (unlikely(rc && (rc != EOPNOTSUPP))) { 3019 device_printf(dev, "Cannot fill indirect table\n"); 3020 goto err_fill_indir; 3021 } 3022 } 3023 3024 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL, 3025 ENA_HASH_KEY_SIZE, 0xFFFFFFFF); 3026 if (unlikely(rc && (rc != EOPNOTSUPP))) { 3027 device_printf(dev, "Cannot fill hash function\n"); 3028 goto err_fill_indir; 3029 } 3030 3031 rc = ena_com_set_default_hash_ctrl(ena_dev); 3032 if (unlikely(rc && (rc != EOPNOTSUPP))) { 3033 device_printf(dev, "Cannot fill hash control\n"); 3034 goto err_fill_indir; 3035 } 3036 3037 return (0); 3038 3039 err_fill_indir: 3040 ena_com_rss_destroy(ena_dev); 3041 err_rss_init: 3042 return (rc); 3043 } 3044 3045 static void 3046 ena_rss_init_default_deferred(void *arg) 3047 { 3048 struct ena_adapter *adapter; 3049 devclass_t dc; 3050 int max; 3051 int rc; 3052 3053 dc = devclass_find("ena"); 3054 if (dc == NULL) { 3055 ena_trace(ENA_DBG, "No devclass ena\n"); 3056 return; 3057 } 3058 3059 max = devclass_get_maxunit(dc); 3060 while (max-- >= 0) { 3061 adapter = devclass_get_softc(dc, max); 3062 if (adapter != NULL) { 3063 rc = ena_rss_init_default(adapter); 3064 adapter->rss_support = true; 3065 if (rc) { 3066 device_printf(adapter->pdev, 3067 "WARNING: RSS was not properly initialized," 3068 " it will affect bandwith\n"); 3069 adapter->rss_support = false; 3070 } 3071 } 3072 } 3073 } 3074 SYSINIT(ena_rss_init, SI_SUB_KICK_SCHEDULER, SI_ORDER_SECOND, ena_rss_init_default_deferred, NULL); 3075 3076 static void ena_config_host_info(struct ena_com_dev *ena_dev) 3077 { 3078 struct ena_admin_host_info *host_info; 3079 int rc; 3080 3081 /* Allocate only the host info */ 3082 rc = ena_com_allocate_host_info(ena_dev); 3083 if (rc) { 3084 ena_trace(ENA_ALERT, "Cannot allocate host info\n"); 3085 return; 3086 } 3087 3088 host_info = ena_dev->host_attr.host_info; 3089 3090 host_info->os_type = ENA_ADMIN_OS_FREEBSD; 3091 host_info->kernel_ver = osreldate; 3092 3093 sprintf(host_info->kernel_ver_str, "%d", osreldate); 3094 host_info->os_dist = 0; 3095 strncpy(host_info->os_dist_str, osrelease, 3096 sizeof(host_info->os_dist_str) - 1); 3097 3098 host_info->driver_version = 3099 (DRV_MODULE_VER_MAJOR) | 3100 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) | 3101 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT); 3102 3103 rc = ena_com_set_host_attributes(ena_dev); 3104 if (rc) { 3105 if (rc == EOPNOTSUPP) 3106 ena_trace(ENA_WARNING, "Cannot set host attributes\n"); 3107 else 3108 ena_trace(ENA_ALERT, "Cannot set host attributes\n"); 3109 3110 goto err; 3111 } 3112 3113 return; 3114 3115 err: 3116 ena_com_delete_host_info(ena_dev); 3117 } 3118 3119 static int 3120 ena_device_init(struct ena_adapter *adapter, device_t pdev, 3121 struct ena_com_dev_get_features_ctx *get_feat_ctx, int *wd_active) 3122 { 3123 struct ena_com_dev* ena_dev = adapter->ena_dev; 3124 bool readless_supported; 3125 uint32_t aenq_groups; 3126 int dma_width; 3127 int rc; 3128 3129 rc = ena_com_mmio_reg_read_request_init(ena_dev); 3130 if (rc) { 3131 device_printf(pdev, "failed to init mmio read less\n"); 3132 return rc; 3133 } 3134 3135 /* 3136 * The PCIe configuration space revision id indicate if mmio reg 3137 * read is disabled 3138 */ 3139 readless_supported = !(pci_get_revid(pdev) & ENA_MMIO_DISABLE_REG_READ); 3140 ena_com_set_mmio_read_mode(ena_dev, readless_supported); 3141 3142 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL); 3143 if (rc) { 3144 device_printf(pdev, "Can not reset device\n"); 3145 goto err_mmio_read_less; 3146 } 3147 3148 rc = ena_com_validate_version(ena_dev); 3149 if (rc) { 3150 device_printf(pdev, "device version is too low\n"); 3151 goto err_mmio_read_less; 3152 } 3153 3154 dma_width = ena_com_get_dma_width(ena_dev); 3155 if (dma_width < 0) { 3156 device_printf(pdev, "Invalid dma width value %d", dma_width); 3157 rc = dma_width; 3158 goto err_mmio_read_less; 3159 } 3160 adapter->dma_width = dma_width; 3161 3162 /* ENA admin level init */ 3163 rc = ena_com_admin_init(ena_dev, &aenq_handlers, true); 3164 if (rc) { 3165 device_printf(pdev, 3166 "Can not initialize ena admin queue with device\n"); 3167 goto err_mmio_read_less; 3168 } 3169 3170 /* 3171 * To enable the msix interrupts the driver needs to know the number 3172 * of queues. So the driver uses polling mode to retrieve this 3173 * information 3174 */ 3175 ena_com_set_admin_polling_mode(ena_dev, true); 3176 3177 ena_config_host_info(ena_dev); 3178 3179 /* Get Device Attributes */ 3180 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx); 3181 if (rc) { 3182 device_printf(pdev, 3183 "Cannot get attribute for ena device rc: %d\n", rc); 3184 goto err_admin_init; 3185 } 3186 3187 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | 3188 BIT(ENA_ADMIN_FATAL_ERROR) | 3189 BIT(ENA_ADMIN_WARNING) | 3190 BIT(ENA_ADMIN_NOTIFICATION) | 3191 BIT(ENA_ADMIN_KEEP_ALIVE); 3192 3193 aenq_groups &= get_feat_ctx->aenq.supported_groups; 3194 rc = ena_com_set_aenq_config(ena_dev, aenq_groups); 3195 if (rc) { 3196 device_printf(pdev, "Cannot configure aenq groups rc: %d\n", rc); 3197 goto err_admin_init; 3198 } 3199 3200 *wd_active = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)); 3201 3202 return 0; 3203 3204 err_admin_init: 3205 ena_com_delete_host_info(ena_dev); 3206 ena_com_admin_destroy(ena_dev); 3207 err_mmio_read_less: 3208 ena_com_mmio_reg_read_request_destroy(ena_dev); 3209 3210 return rc; 3211 } 3212 3213 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter, 3214 int io_vectors) 3215 { 3216 struct ena_com_dev *ena_dev = adapter->ena_dev; 3217 int rc; 3218 3219 rc = ena_enable_msix(adapter); 3220 if (rc) { 3221 device_printf(adapter->pdev, "Error with MSI-X enablement\n"); 3222 return rc; 3223 } 3224 3225 ena_setup_mgmnt_intr(adapter); 3226 3227 rc = ena_request_mgmnt_irq(adapter); 3228 if (rc) { 3229 device_printf(adapter->pdev, "Cannot setup mgmnt queue intr\n"); 3230 goto err_disable_msix; 3231 } 3232 3233 ena_com_set_admin_polling_mode(ena_dev, false); 3234 3235 ena_com_admin_aenq_enable(ena_dev); 3236 3237 return 0; 3238 3239 err_disable_msix: 3240 ena_disable_msix(adapter); 3241 3242 return rc; 3243 } 3244 3245 /* Function called on ENA_ADMIN_KEEP_ALIVE event */ 3246 static void ena_keep_alive_wd(void *adapter_data, 3247 struct ena_admin_aenq_entry *aenq_e) 3248 { 3249 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3250 struct ena_admin_aenq_keep_alive_desc *desc; 3251 sbintime_t stime; 3252 uint64_t rx_drops; 3253 3254 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e; 3255 3256 rx_drops = ((uint64_t)desc->rx_drops_high << 32) | desc->rx_drops_low; 3257 counter_u64_zero(adapter->hw_stats.rx_drops); 3258 counter_u64_add(adapter->hw_stats.rx_drops, rx_drops); 3259 3260 stime = getsbinuptime(); 3261 atomic_store_rel_64(&adapter->keep_alive_timestamp, stime); 3262 } 3263 3264 /* Check for keep alive expiration */ 3265 static void check_for_missing_keep_alive(struct ena_adapter *adapter) 3266 { 3267 sbintime_t timestamp, time; 3268 3269 if (adapter->wd_active == 0) 3270 return; 3271 3272 if (adapter->keep_alive_timeout == 0) 3273 return; 3274 3275 timestamp = atomic_load_acq_64(&adapter->keep_alive_timestamp); 3276 time = getsbinuptime() - timestamp; 3277 if (unlikely(time > adapter->keep_alive_timeout)) { 3278 device_printf(adapter->pdev, 3279 "Keep alive watchdog timeout.\n"); 3280 counter_u64_add(adapter->dev_stats.wd_expired, 1); 3281 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO; 3282 adapter->trigger_reset = true; 3283 } 3284 } 3285 3286 /* Check if admin queue is enabled */ 3287 static void check_for_admin_com_state(struct ena_adapter *adapter) 3288 { 3289 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) { 3290 device_printf(adapter->pdev, 3291 "ENA admin queue is not in running state!\n"); 3292 counter_u64_add(adapter->dev_stats.admin_q_pause, 1); 3293 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO; 3294 adapter->trigger_reset = true; 3295 } 3296 } 3297 3298 /* 3299 * Check for TX which were not completed on time. 3300 * Timeout is defined by "missing_tx_timeout". 3301 * Reset will be performed if number of incompleted 3302 * transactions exceeds "missing_tx_threshold". 3303 */ 3304 static void check_for_missing_tx_completions(struct ena_adapter *adapter) 3305 { 3306 struct ena_ring *tx_ring; 3307 struct ena_tx_buffer *tx_info; 3308 struct bintime curtime, time; 3309 int i, j, budget, missed_tx; 3310 3311 /* Make sure the driver doesn't turn the device in other process */ 3312 rmb(); 3313 3314 if (!adapter->up) 3315 return; 3316 3317 if (adapter->trigger_reset) 3318 return; 3319 3320 if (adapter->missing_tx_timeout == 0) 3321 return; 3322 3323 budget = adapter->missing_tx_max_queues; 3324 getbinuptime(&curtime); 3325 3326 for (i = adapter->next_monitored_tx_qid; i < adapter->num_queues; i++) { 3327 tx_ring = &adapter->tx_ring[i]; 3328 3329 missed_tx = 0; 3330 3331 for (j = 0; j < tx_ring->ring_size; j++) { 3332 tx_info = &tx_ring->tx_buffer_info[j]; 3333 3334 if (!bintime_isset(&tx_info->timestamp)) 3335 continue; 3336 3337 time = curtime; 3338 bintime_sub(&time, &tx_info->timestamp); 3339 3340 /* Check again if packet is still waiting */ 3341 if (bintime_isset(&tx_info->timestamp) && unlikely( 3342 bttosbt(time) > adapter->missing_tx_timeout)) { 3343 if (tx_info->print_once) 3344 device_printf(adapter->pdev, 3345 "Found a Tx that wasn't completed " 3346 "on time, qid %d, index %d.\n", 3347 tx_ring->qid, j); 3348 3349 tx_info->print_once = false; 3350 missed_tx++; 3351 3352 if (unlikely(missed_tx > 3353 adapter->missing_tx_threshold)) { 3354 device_printf(adapter->pdev, 3355 "The number of lost tx completion " 3356 "is above the threshold (%d > %d). " 3357 "Reset the device\n", missed_tx, 3358 adapter->missing_tx_threshold); 3359 adapter->reset_reason = 3360 ENA_REGS_RESET_MISS_TX_CMPL; 3361 adapter->trigger_reset = true; 3362 return; 3363 } 3364 } 3365 } 3366 3367 budget--; 3368 if (budget == 0) { 3369 i++; 3370 break; 3371 } 3372 } 3373 3374 adapter->next_monitored_tx_qid = i % adapter->num_queues; 3375 } 3376 3377 3378 static void 3379 ena_timer_service(void *data) 3380 { 3381 struct ena_adapter *adapter = (struct ena_adapter *)data; 3382 struct ena_admin_host_info *host_info = 3383 adapter->ena_dev->host_attr.host_info; 3384 3385 check_for_missing_keep_alive(adapter); 3386 3387 check_for_admin_com_state(adapter); 3388 3389 check_for_missing_tx_completions(adapter); 3390 3391 if (host_info) 3392 ena_update_host_info(host_info, adapter->ifp); 3393 3394 if (unlikely(adapter->trigger_reset)) { 3395 device_printf(adapter->pdev, "Trigger reset is on\n"); 3396 taskqueue_enqueue(adapter->reset_tq, &adapter->reset_task); 3397 return; 3398 } 3399 3400 /* 3401 * Schedule another timeout one second from now. 3402 */ 3403 callout_schedule_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 0); 3404 } 3405 3406 static void 3407 ena_reset_task(void *arg, int pending) 3408 { 3409 struct ena_com_dev_get_features_ctx get_feat_ctx; 3410 struct ena_adapter *adapter = (struct ena_adapter *)arg; 3411 struct ena_com_dev *ena_dev = adapter->ena_dev; 3412 bool dev_up; 3413 int rc; 3414 3415 if (unlikely(!adapter->trigger_reset)) { 3416 device_printf(adapter->pdev, 3417 "device reset scheduled but trigger_reset is off\n"); 3418 return; 3419 } 3420 3421 sx_xlock(&adapter->ioctl_sx); 3422 3423 callout_drain(&adapter->timer_service); 3424 3425 dev_up = adapter->up; 3426 3427 ena_com_set_admin_running_state(ena_dev, false); 3428 ena_down(adapter); 3429 ena_free_mgmnt_irq(adapter); 3430 ena_disable_msix(adapter); 3431 ena_com_abort_admin_commands(ena_dev); 3432 ena_com_wait_for_abort_completion(ena_dev); 3433 ena_com_admin_destroy(ena_dev); 3434 ena_com_mmio_reg_read_request_destroy(ena_dev); 3435 3436 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3437 adapter->trigger_reset = false; 3438 3439 /* Finished destroy part. Restart the device */ 3440 rc = ena_device_init(adapter, adapter->pdev, &get_feat_ctx, 3441 &adapter->wd_active); 3442 if (rc) { 3443 device_printf(adapter->pdev, 3444 "ENA device init failed! (err: %d)\n", rc); 3445 goto err_dev_free; 3446 } 3447 3448 rc = ena_enable_msix_and_set_admin_interrupts(adapter, 3449 adapter->num_queues); 3450 if (rc) { 3451 device_printf(adapter->pdev, "Enable MSI-X failed\n"); 3452 goto err_com_free; 3453 } 3454 3455 /* If the interface was up before the reset bring it up */ 3456 if (dev_up) { 3457 rc = ena_up(adapter); 3458 if (rc) { 3459 device_printf(adapter->pdev, 3460 "Failed to create I/O queues\n"); 3461 goto err_msix_free; 3462 } 3463 } 3464 3465 callout_reset_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 3466 ena_timer_service, (void *)adapter, 0); 3467 3468 sx_unlock(&adapter->ioctl_sx); 3469 3470 return; 3471 3472 err_msix_free: 3473 ena_free_mgmnt_irq(adapter); 3474 ena_disable_msix(adapter); 3475 err_com_free: 3476 ena_com_admin_destroy(ena_dev); 3477 err_dev_free: 3478 device_printf(adapter->pdev, "ENA reset failed!\n"); 3479 adapter->running = false; 3480 sx_unlock(&adapter->ioctl_sx); 3481 } 3482 3483 /** 3484 * ena_attach - Device Initialization Routine 3485 * @pdev: device information struct 3486 * 3487 * Returns 0 on success, otherwise on failure. 3488 * 3489 * ena_attach initializes an adapter identified by a device structure. 3490 * The OS initialization, configuring of the adapter private structure, 3491 * and a hardware reset occur. 3492 **/ 3493 static int 3494 ena_attach(device_t pdev) 3495 { 3496 struct ena_com_dev_get_features_ctx get_feat_ctx; 3497 static int version_printed; 3498 struct ena_adapter *adapter; 3499 struct ena_com_dev *ena_dev = NULL; 3500 uint16_t tx_sgl_size = 0; 3501 uint16_t rx_sgl_size = 0; 3502 int io_queue_num; 3503 int queue_size; 3504 int rc; 3505 struct sysctl_ctx_list *ctx; 3506 struct sysctl_oid_list *children; 3507 3508 adapter = device_get_softc(pdev); 3509 adapter->pdev = pdev; 3510 ctx = device_get_sysctl_ctx(pdev); 3511 children = SYSCTL_CHILDREN(device_get_sysctl_tree(pdev)); 3512 3513 mtx_init(&adapter->global_mtx, "ENA global mtx", NULL, MTX_DEF); 3514 sx_init(&adapter->ioctl_sx, "ENA ioctl sx"); 3515 3516 /* Sysctl calls for Watchdog service */ 3517 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "wd_active", 3518 CTLFLAG_RWTUN, &adapter->wd_active, 0, 3519 "Watchdog is active"); 3520 3521 SYSCTL_ADD_QUAD(ctx, children, OID_AUTO, "keep_alive_timeout", 3522 CTLFLAG_RWTUN, &adapter->keep_alive_timeout, 3523 "Timeout for Keep Alive messages"); 3524 3525 SYSCTL_ADD_QUAD(ctx, children, OID_AUTO, "missing_tx_timeout", 3526 CTLFLAG_RWTUN, &adapter->missing_tx_timeout, 3527 "Timeout for TX completion"); 3528 3529 SYSCTL_ADD_U32(ctx, children, OID_AUTO, "missing_tx_max_queues", 3530 CTLFLAG_RWTUN, &adapter->missing_tx_max_queues, 0, 3531 "Number of TX queues to check per run"); 3532 3533 SYSCTL_ADD_U32(ctx, children, OID_AUTO, "missing_tx_threshold", 3534 CTLFLAG_RWTUN, &adapter->missing_tx_threshold, 0, 3535 "Max number of timeouted packets"); 3536 3537 /* Set up the timer service */ 3538 callout_init_mtx(&adapter->timer_service, &adapter->global_mtx, 0); 3539 adapter->keep_alive_timeout = DEFAULT_KEEP_ALIVE_TO; 3540 adapter->missing_tx_timeout = DEFAULT_TX_CMP_TO; 3541 adapter->missing_tx_max_queues = DEFAULT_TX_MONITORED_QUEUES; 3542 adapter->missing_tx_threshold = DEFAULT_TX_CMP_THRESHOLD; 3543 3544 if (version_printed++ == 0) 3545 device_printf(pdev, "%s\n", ena_version); 3546 3547 rc = ena_allocate_pci_resources(adapter); 3548 if (rc) { 3549 device_printf(pdev, "PCI resource allocation failed!\n"); 3550 ena_free_pci_resources(adapter); 3551 return (rc); 3552 } 3553 3554 /* Allocate memory for ena_dev structure */ 3555 ena_dev = malloc(sizeof(struct ena_com_dev), M_DEVBUF, 3556 M_WAITOK | M_ZERO); 3557 3558 adapter->ena_dev = ena_dev; 3559 ena_dev->dmadev = pdev; 3560 ena_dev->bus = malloc(sizeof(struct ena_bus), M_DEVBUF, 3561 M_WAITOK | M_ZERO); 3562 3563 /* Store register resources */ 3564 ((struct ena_bus*)(ena_dev->bus))->reg_bar_t = 3565 rman_get_bustag(adapter->registers); 3566 ((struct ena_bus*)(ena_dev->bus))->reg_bar_h = 3567 rman_get_bushandle(adapter->registers); 3568 3569 if (((struct ena_bus*)(ena_dev->bus))->reg_bar_h == 0) { 3570 device_printf(pdev, "failed to pmap registers bar\n"); 3571 rc = ENXIO; 3572 goto err_bus_free; 3573 } 3574 3575 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3576 3577 /* Device initialization */ 3578 rc = ena_device_init(adapter, pdev, &get_feat_ctx, &adapter->wd_active); 3579 if (rc) { 3580 device_printf(pdev, "ENA device init failed! (err: %d)\n", rc); 3581 rc = ENXIO; 3582 goto err_bus_free; 3583 } 3584 3585 adapter->keep_alive_timestamp = getsbinuptime(); 3586 3587 adapter->tx_offload_cap = get_feat_ctx.offload.tx; 3588 3589 /* Set for sure that interface is not up */ 3590 adapter->up = false; 3591 3592 memcpy(adapter->mac_addr, get_feat_ctx.dev_attr.mac_addr, 3593 ETHER_ADDR_LEN); 3594 3595 adapter->small_copy_len = 3596 ENA_DEFAULT_SMALL_PACKET_LEN; 3597 3598 /* calculate IO queue number to create */ 3599 io_queue_num = ena_calc_io_queue_num(adapter, &get_feat_ctx); 3600 3601 ENA_ASSERT(io_queue_num > 0, "Invalid queue number: %d\n", 3602 io_queue_num); 3603 adapter->num_queues = io_queue_num; 3604 3605 /* calculatre ring sizes */ 3606 queue_size = ena_calc_queue_size(adapter,&tx_sgl_size, 3607 &rx_sgl_size, &get_feat_ctx); 3608 if ((queue_size <= 0) || (io_queue_num <= 0)) { 3609 rc = ENA_COM_FAULT; 3610 goto err_com_free; 3611 } 3612 3613 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3614 3615 adapter->tx_ring_size = queue_size; 3616 adapter->rx_ring_size = queue_size; 3617 3618 adapter->max_tx_sgl_size = tx_sgl_size; 3619 adapter->max_rx_sgl_size = rx_sgl_size; 3620 3621 /* set up dma tags for rx and tx buffers */ 3622 rc = ena_setup_tx_dma_tag(adapter); 3623 if (rc) 3624 goto err_com_free; 3625 3626 rc = ena_setup_rx_dma_tag(adapter); 3627 if (rc) 3628 goto err_tx_tag_free; 3629 3630 /* initialize rings basic information */ 3631 device_printf(pdev, "initalize %d io queues\n", io_queue_num); 3632 ena_init_io_rings(adapter); 3633 3634 /* setup network interface */ 3635 rc = ena_setup_ifnet(pdev, adapter, &get_feat_ctx); 3636 if (rc) { 3637 device_printf(pdev,"Error with network interface setup\n"); 3638 goto err_io_free; 3639 } 3640 3641 rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num); 3642 if (rc) { 3643 device_printf(pdev, 3644 "Failed to enable and set the admin interrupts\n"); 3645 goto err_ifp_free; 3646 } 3647 3648 /* Initialize reset task queue */ 3649 TASK_INIT(&adapter->reset_task, 0, ena_reset_task, adapter); 3650 adapter->reset_tq = taskqueue_create("ena_reset_enqueue", 3651 M_WAITOK | M_ZERO, taskqueue_thread_enqueue, &adapter->reset_tq); 3652 taskqueue_start_threads(&adapter->reset_tq, 1, PI_NET, 3653 "%s rstq", device_get_nameunit(adapter->pdev)); 3654 3655 /* Initialize statistics */ 3656 ena_alloc_counters((counter_u64_t *)&adapter->dev_stats, 3657 sizeof(struct ena_stats_dev)); 3658 ena_alloc_counters((counter_u64_t *)&adapter->hw_stats, 3659 sizeof(struct ena_hw_stats)); 3660 ena_sysctl_add_nodes(adapter); 3661 3662 /* Tell the stack that the interface is not active */ 3663 if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE, IFF_DRV_RUNNING); 3664 3665 adapter->running = true; 3666 return (0); 3667 3668 err_ifp_free: 3669 if_detach(adapter->ifp); 3670 if_free(adapter->ifp); 3671 err_io_free: 3672 ena_free_all_io_rings_resources(adapter); 3673 ena_free_rx_dma_tag(adapter); 3674 err_tx_tag_free: 3675 ena_free_tx_dma_tag(adapter); 3676 err_com_free: 3677 ena_com_admin_destroy(ena_dev); 3678 ena_com_delete_host_info(ena_dev); 3679 ena_com_mmio_reg_read_request_destroy(ena_dev); 3680 err_bus_free: 3681 free(ena_dev->bus, M_DEVBUF); 3682 free(ena_dev, M_DEVBUF); 3683 ena_free_pci_resources(adapter); 3684 3685 return (rc); 3686 } 3687 3688 /** 3689 * ena_detach - Device Removal Routine 3690 * @pdev: device information struct 3691 * 3692 * ena_detach is called by the device subsystem to alert the driver 3693 * that it should release a PCI device. 3694 **/ 3695 static int 3696 ena_detach(device_t pdev) 3697 { 3698 struct ena_adapter *adapter = device_get_softc(pdev); 3699 struct ena_com_dev *ena_dev = adapter->ena_dev; 3700 int rc; 3701 3702 /* Make sure VLANS are not using driver */ 3703 if (adapter->ifp->if_vlantrunk != NULL) { 3704 device_printf(adapter->pdev ,"VLAN is in use, detach first\n"); 3705 return (EBUSY); 3706 } 3707 3708 /* Free reset task and callout */ 3709 callout_drain(&adapter->timer_service); 3710 while (taskqueue_cancel(adapter->reset_tq, &adapter->reset_task, NULL)) 3711 taskqueue_drain(adapter->reset_tq, &adapter->reset_task); 3712 taskqueue_free(adapter->reset_tq); 3713 3714 sx_xlock(&adapter->ioctl_sx); 3715 ena_down(adapter); 3716 sx_unlock(&adapter->ioctl_sx); 3717 3718 if (adapter->ifp != NULL) { 3719 ether_ifdetach(adapter->ifp); 3720 if_free(adapter->ifp); 3721 } 3722 3723 ena_free_all_io_rings_resources(adapter); 3724 3725 ena_free_counters((counter_u64_t *)&adapter->hw_stats, 3726 sizeof(struct ena_hw_stats)); 3727 ena_free_counters((counter_u64_t *)&adapter->dev_stats, 3728 sizeof(struct ena_stats_dev)); 3729 3730 if (adapter->rss_support) 3731 ena_com_rss_destroy(ena_dev); 3732 3733 rc = ena_free_rx_dma_tag(adapter); 3734 if (rc) 3735 device_printf(adapter->pdev, 3736 "Unmapped RX DMA tag associations\n"); 3737 3738 rc = ena_free_tx_dma_tag(adapter); 3739 if (rc) 3740 device_printf(adapter->pdev, 3741 "Unmapped TX DMA tag associations\n"); 3742 3743 /* Reset the device only if the device is running. */ 3744 if (adapter->running) 3745 ena_com_dev_reset(ena_dev, adapter->reset_reason); 3746 3747 ena_com_delete_host_info(ena_dev); 3748 3749 ena_com_admin_destroy(ena_dev); 3750 3751 ena_free_irqs(adapter); 3752 3753 ena_com_mmio_reg_read_request_destroy(ena_dev); 3754 3755 ena_free_pci_resources(adapter); 3756 3757 mtx_destroy(&adapter->global_mtx); 3758 sx_destroy(&adapter->ioctl_sx); 3759 3760 if (ena_dev->bus != NULL) 3761 free(ena_dev->bus, M_DEVBUF); 3762 3763 if (ena_dev != NULL) 3764 free(ena_dev, M_DEVBUF); 3765 3766 return (bus_generic_detach(pdev)); 3767 } 3768 3769 /****************************************************************************** 3770 ******************************** AENQ Handlers ******************************* 3771 *****************************************************************************/ 3772 /** 3773 * ena_update_on_link_change: 3774 * Notify the network interface about the change in link status 3775 **/ 3776 static void 3777 ena_update_on_link_change(void *adapter_data, 3778 struct ena_admin_aenq_entry *aenq_e) 3779 { 3780 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3781 struct ena_admin_aenq_link_change_desc *aenq_desc; 3782 int status; 3783 if_t ifp; 3784 3785 aenq_desc = (struct ena_admin_aenq_link_change_desc *)aenq_e; 3786 ifp = adapter->ifp; 3787 status = aenq_desc->flags & 3788 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK; 3789 3790 if (status != 0) { 3791 device_printf(adapter->pdev, "link is UP\n"); 3792 if_link_state_change(ifp, LINK_STATE_UP); 3793 } else if (status == 0) { 3794 device_printf(adapter->pdev, "link is DOWN\n"); 3795 if_link_state_change(ifp, LINK_STATE_DOWN); 3796 } else { 3797 device_printf(adapter->pdev, "invalid value recvd\n"); 3798 BUG(); 3799 } 3800 3801 adapter->link_status = status; 3802 3803 return; 3804 } 3805 3806 /** 3807 * This handler will called for unknown event group or unimplemented handlers 3808 **/ 3809 static void 3810 unimplemented_aenq_handler(void *data, 3811 struct ena_admin_aenq_entry *aenq_e) 3812 { 3813 return; 3814 } 3815 3816 static struct ena_aenq_handlers aenq_handlers = { 3817 .handlers = { 3818 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, 3819 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd, 3820 }, 3821 .unimplemented_handler = unimplemented_aenq_handler 3822 }; 3823 3824 /********************************************************************* 3825 * FreeBSD Device Interface Entry Points 3826 *********************************************************************/ 3827 3828 static device_method_t ena_methods[] = { 3829 /* Device interface */ 3830 DEVMETHOD(device_probe, ena_probe), 3831 DEVMETHOD(device_attach, ena_attach), 3832 DEVMETHOD(device_detach, ena_detach), 3833 DEVMETHOD_END 3834 }; 3835 3836 static driver_t ena_driver = { 3837 "ena", ena_methods, sizeof(struct ena_adapter), 3838 }; 3839 3840 devclass_t ena_devclass; 3841 DRIVER_MODULE(ena, pci, ena_driver, ena_devclass, 0, 0); 3842 MODULE_DEPEND(ena, pci, 1, 1, 1); 3843 MODULE_DEPEND(ena, ether, 1, 1, 1); 3844 3845 /*********************************************************************/ 3846