1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2016 Nicole Graziano <nicole@nextbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 30 #ifndef _EM_H_DEFINED_ 31 #define _EM_H_DEFINED_ 32 33 #include "opt_ddb.h" 34 #include "opt_inet.h" 35 #include "opt_inet6.h" 36 #include "opt_rss.h" 37 38 #ifdef HAVE_KERNEL_OPTION_HEADERS 39 #include "opt_device_polling.h" 40 #endif 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #ifdef DDB 45 #include <sys/types.h> 46 #include <ddb/ddb.h> 47 #endif 48 #include <sys/buf_ring.h> 49 #include <sys/bus.h> 50 #include <sys/endian.h> 51 #include <sys/kernel.h> 52 #include <sys/kthread.h> 53 #include <sys/malloc.h> 54 #include <sys/mbuf.h> 55 #include <sys/module.h> 56 #include <sys/rman.h> 57 #include <sys/smp.h> 58 #include <sys/socket.h> 59 #include <sys/sockio.h> 60 #include <sys/sysctl.h> 61 #include <sys/taskqueue.h> 62 #include <sys/eventhandler.h> 63 #include <machine/bus.h> 64 #include <machine/resource.h> 65 66 #include <net/bpf.h> 67 #include <net/ethernet.h> 68 #include <net/if.h> 69 #include <net/if_var.h> 70 #include <net/if_arp.h> 71 #include <net/if_dl.h> 72 #include <net/if_media.h> 73 #include <net/iflib.h> 74 #ifdef RSS 75 #include <net/rss_config.h> 76 #include <netinet/in_rss.h> 77 #endif 78 79 #include <net/if_types.h> 80 #include <net/if_vlan_var.h> 81 82 #include <netinet/in_systm.h> 83 #include <netinet/in.h> 84 #include <netinet/if_ether.h> 85 #include <netinet/ip.h> 86 #include <netinet/ip6.h> 87 #include <netinet/tcp.h> 88 #include <netinet/udp.h> 89 90 #include <machine/in_cksum.h> 91 #include <dev/led/led.h> 92 #include <dev/pci/pcivar.h> 93 #include <dev/pci/pcireg.h> 94 95 #include "e1000_api.h" 96 #include "e1000_82571.h" 97 #include "ifdi_if.h" 98 99 /* Tunables */ 100 101 /* 102 * EM_MAX_TXD: Maximum number of Transmit Descriptors 103 * Valid Range: 80-256 for 82542 and 82543-based adapters 104 * 80-4096 for others 105 * Default Value: 1024 106 * This value is the number of transmit descriptors allocated by the driver. 107 * Increasing this value allows the driver to queue more transmits. Each 108 * descriptor is 16 bytes. 109 * Since TDLEN should be multiple of 128bytes, the number of transmit 110 * desscriptors should meet the following condition. 111 * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0 112 */ 113 #define EM_MIN_TXD 128 114 #define EM_MAX_TXD 4096 115 #define EM_DEFAULT_TXD 1024 116 #define EM_DEFAULT_MULTI_TXD 4096 117 #define IGB_MAX_TXD 4096 118 119 /* 120 * EM_MAX_RXD - Maximum number of receive Descriptors 121 * Valid Range: 80-256 for 82542 and 82543-based adapters 122 * 80-4096 for others 123 * Default Value: 1024 124 * This value is the number of receive descriptors allocated by the driver. 125 * Increasing this value allows the driver to buffer more incoming packets. 126 * Each descriptor is 16 bytes. A receive buffer is also allocated for each 127 * descriptor. The maximum MTU size is 16110. 128 * Since TDLEN should be multiple of 128bytes, the number of transmit 129 * desscriptors should meet the following condition. 130 * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0 131 */ 132 #define EM_MIN_RXD 128 133 #define EM_MAX_RXD 4096 134 #define EM_DEFAULT_RXD 1024 135 #define EM_DEFAULT_MULTI_RXD 4096 136 #define IGB_MAX_RXD 4096 137 138 /* 139 * EM_TIDV - Transmit Interrupt Delay Value 140 * Valid Range: 0-65535 (0=off) 141 * Default Value: 64 142 * This value delays the generation of transmit interrupts in units of 143 * 1.024 microseconds. Transmit interrupt reduction can improve CPU 144 * efficiency if properly tuned for specific network traffic. If the 145 * system is reporting dropped transmits, this value may be set too high 146 * causing the driver to run out of available transmit descriptors. 147 */ 148 #define EM_TIDV 64 149 150 /* 151 * EM_TADV - Transmit Absolute Interrupt Delay Value 152 * (Not valid for 82542/82543/82544) 153 * Valid Range: 0-65535 (0=off) 154 * Default Value: 64 155 * This value, in units of 1.024 microseconds, limits the delay in which a 156 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero, 157 * this value ensures that an interrupt is generated after the initial 158 * packet is sent on the wire within the set amount of time. Proper tuning, 159 * along with EM_TIDV, may improve traffic throughput in specific 160 * network conditions. 161 */ 162 #define EM_TADV 64 163 164 /* 165 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer) 166 * Valid Range: 0-65535 (0=off) 167 * Default Value: 0 168 * This value delays the generation of receive interrupts in units of 1.024 169 * microseconds. Receive interrupt reduction can improve CPU efficiency if 170 * properly tuned for specific network traffic. Increasing this value adds 171 * extra latency to frame reception and can end up decreasing the throughput 172 * of TCP traffic. If the system is reporting dropped receives, this value 173 * may be set too high, causing the driver to run out of available receive 174 * descriptors. 175 * 176 * CAUTION: When setting EM_RDTR to a value other than 0, adapters 177 * may hang (stop transmitting) under certain network conditions. 178 * If this occurs a WATCHDOG message is logged in the system 179 * event log. In addition, the controller is automatically reset, 180 * restoring the network connection. To eliminate the potential 181 * for the hang ensure that EM_RDTR is set to 0. 182 */ 183 #define EM_RDTR 0 184 185 /* 186 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) 187 * Valid Range: 0-65535 (0=off) 188 * Default Value: 64 189 * This value, in units of 1.024 microseconds, limits the delay in which a 190 * receive interrupt is generated. Useful only if EM_RDTR is non-zero, 191 * this value ensures that an interrupt is generated after the initial 192 * packet is received within the set amount of time. Proper tuning, 193 * along with EM_RDTR, may improve traffic throughput in specific network 194 * conditions. 195 */ 196 #define EM_RADV 64 197 198 /* 199 * This parameter controls whether or not autonegotiation is enabled. 200 * 0 - Disable autonegotiation 201 * 1 - Enable autonegotiation 202 */ 203 #define DO_AUTO_NEG 1 204 205 /* 206 * This parameter control whether or not the driver will wait for 207 * autonegotiation to complete. 208 * 1 - Wait for autonegotiation to complete 209 * 0 - Don't wait for autonegotiation to complete 210 */ 211 #define WAIT_FOR_AUTO_NEG_DEFAULT 0 212 213 /* Tunables -- End */ 214 215 #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ 216 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ 217 ADVERTISE_1000_FULL) 218 219 #define AUTO_ALL_MODES 0 220 221 /* PHY master/slave setting */ 222 #define EM_MASTER_SLAVE e1000_ms_hw_default 223 224 /* 225 * Miscellaneous constants 226 */ 227 #define EM_VENDOR_ID 0x8086 228 #define EM_FLASH 0x0014 229 230 #define EM_JUMBO_PBA 0x00000028 231 #define EM_DEFAULT_PBA 0x00000030 232 #define EM_SMARTSPEED_DOWNSHIFT 3 233 #define EM_SMARTSPEED_MAX 15 234 #define EM_MAX_LOOP 10 235 236 #define MAX_NUM_MULTICAST_ADDRESSES 128 237 #define PCI_ANY_ID (~0U) 238 #define ETHER_ALIGN 2 239 #define EM_FC_PAUSE_TIME 0x0680 240 #define EM_EEPROM_APME 0x400; 241 #define EM_82544_APME 0x0004; 242 243 /* Support AutoMediaDetect for Marvell M88 PHY in i354 */ 244 #define IGB_MEDIA_RESET (1 << 0) 245 246 /* Define the starting Interrupt rate per Queue */ 247 #define EM_INTS_PER_SEC 8000 248 #define EM_INTS_MULTIPLIER 256 249 #define EM_ITR_DIVIDEND 1000000000 250 #define EM_INTS_TO_ITR(i) (EM_ITR_DIVIDEND/(i * EM_INTS_MULTIPLIER)) 251 #define IGB_ITR_DIVIDEND 1000000 252 #define IGB_ITR_SHIFT 2 253 #define IGB_QVECTOR_MASK 0x7FFC 254 #define IGB_INTS_TO_EITR(i) (((IGB_ITR_DIVIDEND/i) & IGB_QVECTOR_MASK) << \ 255 IGB_ITR_SHIFT) 256 257 #define IGB_LINK_ITR 2000 258 #define I210_LINK_DELAY 1000 259 260 #define IGB_TXPBSIZE 20408 261 #define IGB_HDR_BUF 128 262 #define IGB_PKTTYPE_MASK 0x0000FFF0 263 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ 264 265 /* 266 * Driver state logic for the detection of a hung state 267 * in hardware. Set TX_HUNG whenever a TX packet is used 268 * (data is sent) and clear it when txeof() is invoked if 269 * any descriptors from the ring are cleaned/reclaimed. 270 * Increment internal counter if no descriptors are cleaned 271 * and compare to TX_MAXTRIES. When counter > TX_MAXTRIES, 272 * reset adapter. 273 */ 274 #define EM_TX_IDLE 0x00000000 275 #define EM_TX_BUSY 0x00000001 276 #define EM_TX_HUNG 0x80000000 277 #define EM_TX_MAXTRIES 10 278 279 #define PCICFG_DESC_RING_STATUS 0xe4 280 #define FLUSH_DESC_REQUIRED 0x100 281 282 283 #define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : \ 284 ((hw->mac.type <= e1000_82576) ? 16 : 8)) 285 #define IGB_RX_HTHRESH 8 286 #define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \ 287 (sc->intr_type == IFLIB_INTR_MSIX)) ? 1 : 4) 288 289 #define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8) 290 #define IGB_TX_HTHRESH 1 291 #define IGB_TX_WTHRESH ((hw->mac.type != e1000_82575 && \ 292 sc->intr_type == IFLIB_INTR_MSIX) ? 1 : 16) 293 294 /* 295 * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be 296 * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will 297 * also optimize cache line size effect. H/W supports up to cache line size 128. 298 */ 299 #define EM_DBA_ALIGN 128 300 301 /* 302 * See Intel 82574 Driver Programming Interface Manual, Section 10.2.6.9 303 */ 304 #define TARC_COMPENSATION_MODE (1 << 7) /* Compensation Mode */ 305 #define TARC_SPEED_MODE_BIT (1 << 21) /* On PCI-E MACs only */ 306 #define TARC_MQ_FIX (1 << 23) | \ 307 (1 << 24) | \ 308 (1 << 25) /* Handle errata in MQ mode */ 309 #define TARC_ERRATA_BIT (1 << 26) /* Note from errata on 82574 */ 310 311 /* PCI Config defines */ 312 #define EM_BAR_TYPE(v) ((v) & EM_BAR_TYPE_MASK) 313 #define EM_BAR_TYPE_MASK 0x00000001 314 #define EM_BAR_TYPE_MMEM 0x00000000 315 #define EM_BAR_TYPE_IO 0x00000001 316 #define EM_BAR_TYPE_FLASH 0x0014 317 #define EM_BAR_MEM_TYPE(v) ((v) & EM_BAR_MEM_TYPE_MASK) 318 #define EM_BAR_MEM_TYPE_MASK 0x00000006 319 #define EM_BAR_MEM_TYPE_32BIT 0x00000000 320 #define EM_BAR_MEM_TYPE_64BIT 0x00000004 321 322 /* Defines for printing debug information */ 323 #define DEBUG_INIT 0 324 #define DEBUG_IOCTL 0 325 #define DEBUG_HW 0 326 327 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 328 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 329 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 330 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 331 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 332 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 333 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 334 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 335 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 336 337 #define EM_MAX_SCATTER 40 338 #define EM_VFTA_SIZE 128 339 #define EM_TSO_SIZE 65535 340 #define EM_TSO_SEG_SIZE 4096 /* Max dma segment size */ 341 #define ETH_ZLEN 60 342 343 /* Offload bits in mbuf flag */ 344 #define EM_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | \ 345 CSUM_IP6_UDP | CSUM_IP6_TCP) 346 #define IGB_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | \ 347 CSUM_IP_SCTP | CSUM_IP6_UDP | CSUM_IP6_TCP | \ 348 CSUM_IP6_SCTP) 349 350 #define IGB_PKTTYPE_MASK 0x0000FFF0 351 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ 352 353 /* 354 * 82574 has a nonstandard address for EIAC 355 * and since its only used in MSI-X, and in 356 * the em driver only 82574 uses MSI-X we can 357 * solve it just using this define. 358 */ 359 #define EM_EIAC 0x000DC 360 /* 361 * 82574 only reports 3 MSI-X vectors by default; 362 * defines assisting with making it report 5 are 363 * located here. 364 */ 365 #define EM_NVM_PCIE_CTRL 0x1B 366 #define EM_NVM_MSIX_N_MASK (0x7 << EM_NVM_MSIX_N_SHIFT) 367 #define EM_NVM_MSIX_N_SHIFT 7 368 369 struct e1000_softc; 370 371 struct em_int_delay_info { 372 struct e1000_softc *sc; /* Back-pointer to the sc struct */ 373 int offset; /* Register offset to read/write */ 374 int value; /* Current value in usecs */ 375 }; 376 377 /* 378 * The transmit ring, one per tx queue 379 */ 380 struct tx_ring { 381 struct e1000_softc *sc; 382 struct e1000_tx_desc *tx_base; 383 uint64_t tx_paddr; 384 qidx_t *tx_rsq; 385 bool tx_tso; /* last tx was tso */ 386 uint8_t me; 387 qidx_t tx_rs_cidx; 388 qidx_t tx_rs_pidx; 389 qidx_t tx_cidx_processed; 390 /* Interrupt resources */ 391 void *tag; 392 struct resource *res; 393 unsigned long tx_irq; 394 395 /* Saved csum offloading context information */ 396 int csum_flags; 397 int csum_lhlen; 398 int csum_iphlen; 399 400 int csum_thlen; 401 int csum_mss; 402 int csum_pktlen; 403 404 uint32_t csum_txd_upper; 405 uint32_t csum_txd_lower; /* last field */ 406 }; 407 408 /* 409 * The Receive ring, one per rx queue 410 */ 411 struct rx_ring { 412 struct e1000_softc *sc; 413 struct em_rx_queue *que; 414 u32 me; 415 u32 payload; 416 union e1000_rx_desc_extended *rx_base; 417 uint64_t rx_paddr; 418 419 /* Interrupt resources */ 420 void *tag; 421 struct resource *res; 422 bool discard; 423 424 /* Soft stats */ 425 unsigned long rx_irq; 426 unsigned long rx_discarded; 427 unsigned long rx_packets; 428 unsigned long rx_bytes; 429 }; 430 431 struct em_tx_queue { 432 struct e1000_softc *sc; 433 u32 msix; 434 u32 eims; /* This queue's EIMS bit */ 435 u32 me; 436 struct tx_ring txr; 437 }; 438 439 struct em_rx_queue { 440 struct e1000_softc *sc; 441 u32 me; 442 u32 msix; 443 u32 eims; 444 struct rx_ring rxr; 445 u64 irqs; 446 struct if_irq que_irq; 447 }; 448 449 /* Our softc structure */ 450 struct e1000_softc { 451 struct e1000_hw hw; 452 453 if_softc_ctx_t shared; 454 if_ctx_t ctx; 455 #define tx_num_queues shared->isc_ntxqsets 456 #define rx_num_queues shared->isc_nrxqsets 457 #define intr_type shared->isc_intr 458 /* FreeBSD operating-system-specific structures. */ 459 struct e1000_osdep osdep; 460 device_t dev; 461 struct cdev *led_dev; 462 463 struct em_tx_queue *tx_queues; 464 struct em_rx_queue *rx_queues; 465 struct if_irq irq; 466 467 struct resource *memory; 468 struct resource *flash; 469 struct resource *ioport; 470 471 struct resource *res; 472 void *tag; 473 u32 linkvec; 474 u32 ivars; 475 476 struct ifmedia *media; 477 int msix; 478 int if_flags; 479 int em_insert_vlan_header; 480 u32 ims; 481 bool in_detach; 482 483 u32 flags; 484 /* Task for FAST handling */ 485 struct grouptask link_task; 486 487 u16 num_vlans; 488 u32 txd_cmd; 489 490 u32 rx_mbuf_sz; 491 492 /* Management and WOL features */ 493 u32 wol; 494 bool has_manage; 495 bool has_amt; 496 497 /* Multicast array memory */ 498 u8 *mta; 499 500 /* 501 ** Shadow VFTA table, this is needed because 502 ** the real vlan filter table gets cleared during 503 ** a soft reset and the driver needs to be able 504 ** to repopulate it. 505 */ 506 u32 shadow_vfta[EM_VFTA_SIZE]; 507 508 /* Info about the interface */ 509 u16 link_active; 510 u16 fc; 511 u16 link_speed; 512 u16 link_duplex; 513 u32 smartspeed; 514 u32 dmac; 515 int link_mask; 516 int tso_automasked; 517 518 u64 que_mask; 519 520 /* We need to store this at attach due to e1000 hw/sw locking model */ 521 struct e1000_fw_version fw_ver; 522 523 struct em_int_delay_info tx_int_delay; 524 struct em_int_delay_info tx_abs_int_delay; 525 struct em_int_delay_info rx_int_delay; 526 struct em_int_delay_info rx_abs_int_delay; 527 struct em_int_delay_info tx_itr; 528 529 /* Misc stats maintained by the driver */ 530 unsigned long dropped_pkts; 531 unsigned long link_irq; 532 unsigned long rx_overruns; 533 unsigned long watchdog_events; 534 535 struct e1000_hw_stats stats; 536 u16 vf_ifp; 537 }; 538 539 /******************************************************************************** 540 * vendor_info_array 541 * 542 * This array contains the list of Subvendor/Subdevice IDs on which the driver 543 * should load. 544 * 545 ********************************************************************************/ 546 typedef struct _em_vendor_info_t { 547 unsigned int vendor_id; 548 unsigned int device_id; 549 unsigned int subvendor_id; 550 unsigned int subdevice_id; 551 unsigned int index; 552 } em_vendor_info_t; 553 554 void em_dump_rs(struct e1000_softc *); 555 556 #define EM_RSSRK_SIZE 4 557 #define EM_RSSRK_VAL(key, i) (key[(i) * EM_RSSRK_SIZE] | \ 558 key[(i) * EM_RSSRK_SIZE + 1] << 8 | \ 559 key[(i) * EM_RSSRK_SIZE + 2] << 16 | \ 560 key[(i) * EM_RSSRK_SIZE + 3] << 24) 561 #endif /* _EM_H_DEFINED_ */ 562