xref: /freebsd/sys/dev/e1000/if_em.h (revision 031beb4e239bfce798af17f5fe8dba8bcaf13d99)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2016 Nicole Graziano <nicole@nextbsd.org>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 
30 #ifndef _EM_H_DEFINED_
31 #define _EM_H_DEFINED_
32 
33 #include "opt_ddb.h"
34 #include "opt_inet.h"
35 #include "opt_inet6.h"
36 #include "opt_rss.h"
37 
38 #ifdef HAVE_KERNEL_OPTION_HEADERS
39 #include "opt_device_polling.h"
40 #endif
41 
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #ifdef DDB
45 #include <sys/types.h>
46 #include <ddb/ddb.h>
47 #endif
48 #include <sys/buf_ring.h>
49 #include <sys/bus.h>
50 #include <sys/endian.h>
51 #include <sys/kernel.h>
52 #include <sys/kthread.h>
53 #include <sys/malloc.h>
54 #include <sys/mbuf.h>
55 #include <sys/module.h>
56 #include <sys/rman.h>
57 #include <sys/smp.h>
58 #include <sys/socket.h>
59 #include <sys/sockio.h>
60 #include <sys/sysctl.h>
61 #include <sys/taskqueue.h>
62 #include <sys/eventhandler.h>
63 #include <machine/bus.h>
64 #include <machine/resource.h>
65 
66 #include <net/bpf.h>
67 #include <net/ethernet.h>
68 #include <net/if.h>
69 #include <net/if_var.h>
70 #include <net/if_arp.h>
71 #include <net/if_dl.h>
72 #include <net/if_media.h>
73 #include <net/iflib.h>
74 #ifdef	RSS
75 #include <net/rss_config.h>
76 #include <netinet/in_rss.h>
77 #endif
78 
79 #include <net/if_types.h>
80 #include <net/if_vlan_var.h>
81 
82 #include <netinet/in_systm.h>
83 #include <netinet/in.h>
84 #include <netinet/if_ether.h>
85 #include <netinet/ip.h>
86 #include <netinet/ip6.h>
87 #include <netinet/tcp.h>
88 #include <netinet/udp.h>
89 
90 #include <machine/in_cksum.h>
91 #include <dev/led/led.h>
92 #include <dev/pci/pcivar.h>
93 #include <dev/pci/pcireg.h>
94 
95 #include "e1000_api.h"
96 #include "e1000_82571.h"
97 #include "ifdi_if.h"
98 
99 /* Tunables */
100 
101 /*
102  * EM_MAX_TXD: Maximum number of Transmit Descriptors
103  * Valid Range: 80-256 for 82542 and 82543-based adapters
104  *              80-4096 for others
105  * Default Value: 1024
106  *   This value is the number of transmit descriptors allocated by the driver.
107  *   Increasing this value allows the driver to queue more transmits. Each
108  *   descriptor is 16 bytes.
109  *   Since TDLEN should be multiple of 128bytes, the number of transmit
110  *   desscriptors should meet the following condition.
111  *      (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0
112  */
113 #define EM_MIN_TXD		128
114 #define EM_MAX_TXD		4096
115 #define EM_DEFAULT_TXD		1024
116 #define EM_DEFAULT_MULTI_TXD	4096
117 #define IGB_MAX_TXD		4096
118 
119 /*
120  * EM_MAX_RXD - Maximum number of receive Descriptors
121  * Valid Range: 80-256 for 82542 and 82543-based adapters
122  *              80-4096 for others
123  * Default Value: 1024
124  *   This value is the number of receive descriptors allocated by the driver.
125  *   Increasing this value allows the driver to buffer more incoming packets.
126  *   Each descriptor is 16 bytes.  A receive buffer is also allocated for each
127  *   descriptor. The maximum MTU size is 16110.
128  *   Since TDLEN should be multiple of 128bytes, the number of transmit
129  *   desscriptors should meet the following condition.
130  *      (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0
131  */
132 #define EM_MIN_RXD		128
133 #define EM_MAX_RXD		4096
134 #define EM_DEFAULT_RXD		1024
135 #define EM_DEFAULT_MULTI_RXD	4096
136 #define IGB_MAX_RXD		4096
137 
138 /*
139  * EM_TIDV - Transmit Interrupt Delay Value
140  * Valid Range: 0-65535 (0=off)
141  * Default Value: 64
142  *   This value delays the generation of transmit interrupts in units of
143  *   1.024 microseconds. Transmit interrupt reduction can improve CPU
144  *   efficiency if properly tuned for specific network traffic. If the
145  *   system is reporting dropped transmits, this value may be set too high
146  *   causing the driver to run out of available transmit descriptors.
147  */
148 #define EM_TIDV		64
149 
150 /*
151  * EM_TADV - Transmit Absolute Interrupt Delay Value
152  * (Not valid for 82542/82543/82544)
153  * Valid Range: 0-65535 (0=off)
154  * Default Value: 64
155  *   This value, in units of 1.024 microseconds, limits the delay in which a
156  *   transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
157  *   this value ensures that an interrupt is generated after the initial
158  *   packet is sent on the wire within the set amount of time.  Proper tuning,
159  *   along with EM_TIDV, may improve traffic throughput in specific
160  *   network conditions.
161  */
162 #define EM_TADV		64
163 
164 /*
165  * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
166  * Valid Range: 0-65535 (0=off)
167  * Default Value: 0
168  *   This value delays the generation of receive interrupts in units of 1.024
169  *   microseconds.  Receive interrupt reduction can improve CPU efficiency if
170  *   properly tuned for specific network traffic. Increasing this value adds
171  *   extra latency to frame reception and can end up decreasing the throughput
172  *   of TCP traffic. If the system is reporting dropped receives, this value
173  *   may be set too high, causing the driver to run out of available receive
174  *   descriptors.
175  *
176  *   CAUTION: When setting EM_RDTR to a value other than 0, adapters
177  *            may hang (stop transmitting) under certain network conditions.
178  *            If this occurs a WATCHDOG message is logged in the system
179  *            event log. In addition, the controller is automatically reset,
180  *            restoring the network connection. To eliminate the potential
181  *            for the hang ensure that EM_RDTR is set to 0.
182  */
183 #define EM_RDTR		0
184 
185 /*
186  * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
187  * Valid Range: 0-65535 (0=off)
188  * Default Value: 64
189  *   This value, in units of 1.024 microseconds, limits the delay in which a
190  *   receive interrupt is generated. Useful only if EM_RDTR is non-zero,
191  *   this value ensures that an interrupt is generated after the initial
192  *   packet is received within the set amount of time.  Proper tuning,
193  *   along with EM_RDTR, may improve traffic throughput in specific network
194  *   conditions.
195  */
196 #define EM_RADV		64
197 
198 /*
199  * This parameter controls whether or not autonegotiation is enabled.
200  *              0 - Disable autonegotiation
201  *              1 - Enable  autonegotiation
202  */
203 #define DO_AUTO_NEG	1
204 
205 /*
206  * This parameter control whether or not the driver will wait for
207  * autonegotiation to complete.
208  *              1 - Wait for autonegotiation to complete
209  *              0 - Don't wait for autonegotiation to complete
210  */
211 #define WAIT_FOR_AUTO_NEG_DEFAULT	0
212 
213 /* Tunables -- End */
214 
215 #define AUTONEG_ADV_DEFAULT	(ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
216 				    ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
217 				    ADVERTISE_1000_FULL)
218 
219 #define AUTO_ALL_MODES		0
220 
221 /* PHY master/slave setting */
222 #define EM_MASTER_SLAVE		e1000_ms_hw_default
223 
224 /*
225  * Miscellaneous constants
226  */
227 #define EM_VENDOR_ID			0x8086
228 #define EM_FLASH			0x0014
229 
230 #define EM_JUMBO_PBA			0x00000028
231 #define EM_DEFAULT_PBA			0x00000030
232 #define EM_SMARTSPEED_DOWNSHIFT		3
233 #define EM_SMARTSPEED_MAX		15
234 #define EM_MAX_LOOP			10
235 
236 #define MAX_NUM_MULTICAST_ADDRESSES	128
237 #define PCI_ANY_ID			(~0U)
238 #define ETHER_ALIGN			2
239 #define EM_FC_PAUSE_TIME		0x0680
240 #define EM_EEPROM_APME			0x400;
241 #define EM_82544_APME			0x0004;
242 
243 /* Support AutoMediaDetect for Marvell M88 PHY in i354 */
244 #define IGB_MEDIA_RESET		(1 << 0)
245 
246 /* Define the starting Interrupt rate per Queue */
247 #define IGB_INTS_PER_SEC	8000
248 #define IGB_DEFAULT_ITR		((1000000/IGB_INTS_PER_SEC) << 2)
249 
250 #define IGB_LINK_ITR		2000
251 #define I210_LINK_DELAY		1000
252 
253 #define IGB_TXPBSIZE		20408
254 #define IGB_HDR_BUF		128
255 #define IGB_PKTTYPE_MASK	0x0000FFF0
256 #define IGB_DMCTLX_DCFLUSH_DIS	0x80000000  /* Disable DMA Coalesce Flush */
257 
258 /*
259  * Driver state logic for the detection of a hung state
260  * in hardware.  Set TX_HUNG whenever a TX packet is used
261  * (data is sent) and clear it when txeof() is invoked if
262  * any descriptors from the ring are cleaned/reclaimed.
263  * Increment internal counter if no descriptors are cleaned
264  * and compare to TX_MAXTRIES.  When counter > TX_MAXTRIES,
265  * reset adapter.
266  */
267 #define EM_TX_IDLE		0x00000000
268 #define EM_TX_BUSY		0x00000001
269 #define EM_TX_HUNG		0x80000000
270 #define EM_TX_MAXTRIES		10
271 
272 #define PCICFG_DESC_RING_STATUS	0xe4
273 #define FLUSH_DESC_REQUIRED	0x100
274 
275 
276 #define IGB_RX_PTHRESH	((hw->mac.type == e1000_i354) ? 12 : \
277 			    ((hw->mac.type <= e1000_82576) ? 16 : 8))
278 #define IGB_RX_HTHRESH	8
279 #define IGB_RX_WTHRESH	((hw->mac.type == e1000_82576 && \
280 			    (sc->intr_type == IFLIB_INTR_MSIX)) ? 1 : 4)
281 
282 #define IGB_TX_PTHRESH	((hw->mac.type == e1000_i354) ? 20 : 8)
283 #define IGB_TX_HTHRESH	1
284 #define IGB_TX_WTHRESH	((hw->mac.type != e1000_82575 && \
285 			    sc->intr_type == IFLIB_INTR_MSIX) ? 1 : 16)
286 
287 /*
288  * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be
289  * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will
290  * also optimize cache line size effect. H/W supports up to cache line size 128.
291  */
292 #define EM_DBA_ALIGN			128
293 
294 /*
295  * See Intel 82574 Driver Programming Interface Manual, Section 10.2.6.9
296  */
297 #define TARC_COMPENSATION_MODE	(1 << 7)	/* Compensation Mode */
298 #define TARC_SPEED_MODE_BIT 	(1 << 21)	/* On PCI-E MACs only */
299 #define TARC_MQ_FIX		(1 << 23) | \
300 				    (1 << 24) | \
301 				    (1 << 25)	/* Handle errata in MQ mode */
302 #define TARC_ERRATA_BIT 	(1 << 26)	/* Note from errata on 82574 */
303 
304 /* PCI Config defines */
305 #define EM_BAR_TYPE(v)		((v) & EM_BAR_TYPE_MASK)
306 #define EM_BAR_TYPE_MASK	0x00000001
307 #define EM_BAR_TYPE_MMEM	0x00000000
308 #define EM_BAR_TYPE_IO		0x00000001
309 #define EM_BAR_TYPE_FLASH	0x0014
310 #define EM_BAR_MEM_TYPE(v)	((v) & EM_BAR_MEM_TYPE_MASK)
311 #define EM_BAR_MEM_TYPE_MASK	0x00000006
312 #define EM_BAR_MEM_TYPE_32BIT	0x00000000
313 #define EM_BAR_MEM_TYPE_64BIT	0x00000004
314 
315 /* Defines for printing debug information */
316 #define DEBUG_INIT	0
317 #define DEBUG_IOCTL	0
318 #define DEBUG_HW	0
319 
320 #define INIT_DEBUGOUT(S)		if (DEBUG_INIT)  printf(S "\n")
321 #define INIT_DEBUGOUT1(S, A)		if (DEBUG_INIT)  printf(S "\n", A)
322 #define INIT_DEBUGOUT2(S, A, B)		if (DEBUG_INIT)  printf(S "\n", A, B)
323 #define IOCTL_DEBUGOUT(S)		if (DEBUG_IOCTL) printf(S "\n")
324 #define IOCTL_DEBUGOUT1(S, A)		if (DEBUG_IOCTL) printf(S "\n", A)
325 #define IOCTL_DEBUGOUT2(S, A, B)	if (DEBUG_IOCTL) printf(S "\n", A, B)
326 #define HW_DEBUGOUT(S)			if (DEBUG_HW) printf(S "\n")
327 #define HW_DEBUGOUT1(S, A)		if (DEBUG_HW) printf(S "\n", A)
328 #define HW_DEBUGOUT2(S, A, B)		if (DEBUG_HW) printf(S "\n", A, B)
329 
330 #define EM_MAX_SCATTER		40
331 #define EM_VFTA_SIZE		128
332 #define EM_TSO_SIZE		65535
333 #define EM_TSO_SEG_SIZE		4096	/* Max dma segment size */
334 #define ETH_ZLEN		60
335 
336 /* Offload bits in mbuf flag */
337 #define EM_CSUM_OFFLOAD		(CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | \
338 				    CSUM_IP6_UDP | CSUM_IP6_TCP)
339 #define IGB_CSUM_OFFLOAD	(CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | \
340 				    CSUM_IP_SCTP | CSUM_IP6_UDP | CSUM_IP6_TCP | \
341 				    CSUM_IP6_SCTP)
342 
343 #define IGB_PKTTYPE_MASK	0x0000FFF0
344 #define IGB_DMCTLX_DCFLUSH_DIS	0x80000000  /* Disable DMA Coalesce Flush */
345 
346 /*
347  * 82574 has a nonstandard address for EIAC
348  * and since its only used in MSI-X, and in
349  * the em driver only 82574 uses MSI-X we can
350  * solve it just using this define.
351  */
352 #define EM_EIAC	0x000DC
353 /*
354  * 82574 only reports 3 MSI-X vectors by default;
355  * defines assisting with making it report 5 are
356  * located here.
357  */
358 #define EM_NVM_PCIE_CTRL	0x1B
359 #define EM_NVM_MSIX_N_MASK	(0x7 << EM_NVM_MSIX_N_SHIFT)
360 #define EM_NVM_MSIX_N_SHIFT	7
361 
362 struct e1000_softc;
363 
364 struct em_int_delay_info {
365 	struct e1000_softc	*sc;		/* Back-pointer to the sc struct */
366 	int			offset;		/* Register offset to read/write */
367 	int			value;		/* Current value in usecs */
368 };
369 
370 /*
371  * The transmit ring, one per tx queue
372  */
373 struct tx_ring {
374 	struct e1000_softc	*sc;
375 	struct e1000_tx_desc	*tx_base;
376 	uint64_t		tx_paddr;
377 	qidx_t			*tx_rsq;
378 	bool			tx_tso;		/* last tx was tso */
379 	uint8_t			me;
380 	qidx_t			tx_rs_cidx;
381 	qidx_t			tx_rs_pidx;
382 	qidx_t			tx_cidx_processed;
383 	/* Interrupt resources */
384 	void			*tag;
385 	struct resource		*res;
386 	unsigned long		tx_irq;
387 
388 	/* Saved csum offloading context information */
389 	int			csum_flags;
390 	int			csum_lhlen;
391 	int			csum_iphlen;
392 
393 	int			csum_thlen;
394 	int			csum_mss;
395 	int			csum_pktlen;
396 
397 	uint32_t		csum_txd_upper;
398 	uint32_t		csum_txd_lower;	/* last field */
399 };
400 
401 /*
402  * The Receive ring, one per rx queue
403  */
404 struct rx_ring {
405 	struct e1000_softc	*sc;
406 	struct em_rx_queue	*que;
407 	u32			me;
408 	u32			payload;
409 	union e1000_rx_desc_extended *rx_base;
410 	uint64_t		rx_paddr;
411 
412 	/* Interrupt resources */
413 	void			*tag;
414 	struct resource	*res;
415 	bool			discard;
416 
417 	/* Soft stats */
418 	unsigned long		rx_irq;
419 	unsigned long		rx_discarded;
420 	unsigned long		rx_packets;
421 	unsigned long		rx_bytes;
422 };
423 
424 struct em_tx_queue {
425 	struct e1000_softc	*sc;
426 	u32			msix;
427 	u32			eims;	/* This queue's EIMS bit */
428 	u32			me;
429 	struct tx_ring		txr;
430 };
431 
432 struct em_rx_queue {
433 	struct e1000_softc	*sc;
434 	u32			me;
435 	u32			msix;
436 	u32			eims;
437 	struct rx_ring		rxr;
438 	u64			irqs;
439 	struct if_irq		que_irq;
440 };
441 
442 /* Our softc structure */
443 struct e1000_softc {
444 	struct e1000_hw		hw;
445 
446 	if_softc_ctx_t		shared;
447 	if_ctx_t		ctx;
448 #define tx_num_queues		shared->isc_ntxqsets
449 #define rx_num_queues		shared->isc_nrxqsets
450 #define intr_type		shared->isc_intr
451 	/* FreeBSD operating-system-specific structures. */
452 	struct e1000_osdep	osdep;
453 	device_t		dev;
454 	struct cdev		*led_dev;
455 
456 	struct em_tx_queue	*tx_queues;
457 	struct em_rx_queue	*rx_queues;
458 	struct if_irq		irq;
459 
460 	struct resource		*memory;
461 	struct resource		*flash;
462 	struct resource		*ioport;
463 
464 	struct resource		*res;
465 	void			*tag;
466 	u32			linkvec;
467 	u32			ivars;
468 
469 	struct ifmedia		*media;
470 	int			msix;
471 	int			if_flags;
472 	int			em_insert_vlan_header;
473 	u32			ims;
474 	bool			in_detach;
475 
476 	u32			flags;
477 	/* Task for FAST handling */
478 	struct grouptask	link_task;
479 
480 	u16			num_vlans;
481 	u32			txd_cmd;
482 
483 	u32			tx_process_limit;
484 	u32			rx_process_limit;
485 	u32			rx_mbuf_sz;
486 
487 	/* Management and WOL features */
488 	u32			wol;
489 	bool			has_manage;
490 	bool			has_amt;
491 
492 	/* Multicast array memory */
493 	u8			*mta;
494 
495 	/*
496 	** Shadow VFTA table, this is needed because
497 	** the real vlan filter table gets cleared during
498 	** a soft reset and the driver needs to be able
499 	** to repopulate it.
500 	*/
501 	u32			shadow_vfta[EM_VFTA_SIZE];
502 
503 	/* Info about the interface */
504 	u16			link_active;
505 	u16			fc;
506 	u16			link_speed;
507 	u16			link_duplex;
508 	u32			smartspeed;
509 	u32			dmac;
510 	int			link_mask;
511 	int			tso_automasked;
512 
513 	u64			que_mask;
514 
515 	/* We need to store this at attach due to e1000 hw/sw locking model */
516 	struct e1000_fw_version	fw_ver;
517 
518 	struct em_int_delay_info tx_int_delay;
519 	struct em_int_delay_info tx_abs_int_delay;
520 	struct em_int_delay_info rx_int_delay;
521 	struct em_int_delay_info rx_abs_int_delay;
522 	struct em_int_delay_info tx_itr;
523 
524 	/* Misc stats maintained by the driver */
525 	unsigned long		dropped_pkts;
526 	unsigned long		link_irq;
527 	unsigned long		rx_overruns;
528 	unsigned long		watchdog_events;
529 
530 	struct e1000_hw_stats	stats;
531 	u16			vf_ifp;
532 };
533 
534 /********************************************************************************
535  * vendor_info_array
536  *
537  * This array contains the list of Subvendor/Subdevice IDs on which the driver
538  * should load.
539  *
540  ********************************************************************************/
541 typedef struct _em_vendor_info_t {
542 	unsigned int	vendor_id;
543 	unsigned int	device_id;
544 	unsigned int	subvendor_id;
545 	unsigned int	subdevice_id;
546 	unsigned int	index;
547 } em_vendor_info_t;
548 
549 void em_dump_rs(struct e1000_softc *);
550 
551 #define EM_RSSRK_SIZE	4
552 #define EM_RSSRK_VAL(key, i)	(key[(i) * EM_RSSRK_SIZE] | \
553 				    key[(i) * EM_RSSRK_SIZE + 1] << 8 | \
554 				    key[(i) * EM_RSSRK_SIZE + 2] << 16 | \
555 				    key[(i) * EM_RSSRK_SIZE + 3] << 24)
556 #endif /* _EM_H_DEFINED_ */
557