xref: /freebsd/sys/dev/e1000/if_em.h (revision fd33ce416ef7b822fea15969b5ffa957782c4108)
18cfa0ad2SJack F Vogel /******************************************************************************
28cfa0ad2SJack F Vogel 
3e61e0b91SJack F Vogel   Copyright (c) 2001-2011, Intel Corporation
48cfa0ad2SJack F Vogel   All rights reserved.
58cfa0ad2SJack F Vogel 
68cfa0ad2SJack F Vogel   Redistribution and use in source and binary forms, with or without
78cfa0ad2SJack F Vogel   modification, are permitted provided that the following conditions are met:
88cfa0ad2SJack F Vogel 
98cfa0ad2SJack F Vogel    1. Redistributions of source code must retain the above copyright notice,
108cfa0ad2SJack F Vogel       this list of conditions and the following disclaimer.
118cfa0ad2SJack F Vogel 
128cfa0ad2SJack F Vogel    2. Redistributions in binary form must reproduce the above copyright
138cfa0ad2SJack F Vogel       notice, this list of conditions and the following disclaimer in the
148cfa0ad2SJack F Vogel       documentation and/or other materials provided with the distribution.
158cfa0ad2SJack F Vogel 
168cfa0ad2SJack F Vogel    3. Neither the name of the Intel Corporation nor the names of its
178cfa0ad2SJack F Vogel       contributors may be used to endorse or promote products derived from
188cfa0ad2SJack F Vogel       this software without specific prior written permission.
198cfa0ad2SJack F Vogel 
208cfa0ad2SJack F Vogel   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
218cfa0ad2SJack F Vogel   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
228cfa0ad2SJack F Vogel   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
238cfa0ad2SJack F Vogel   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
248cfa0ad2SJack F Vogel   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
258cfa0ad2SJack F Vogel   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
268cfa0ad2SJack F Vogel   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
278cfa0ad2SJack F Vogel   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
288cfa0ad2SJack F Vogel   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
298cfa0ad2SJack F Vogel   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
308cfa0ad2SJack F Vogel   POSSIBILITY OF SUCH DAMAGE.
318cfa0ad2SJack F Vogel 
328cfa0ad2SJack F Vogel ******************************************************************************/
338cfa0ad2SJack F Vogel /*$FreeBSD$*/
348cfa0ad2SJack F Vogel 
358cfa0ad2SJack F Vogel 
368cfa0ad2SJack F Vogel #ifndef _EM_H_DEFINED_
378cfa0ad2SJack F Vogel #define _EM_H_DEFINED_
388cfa0ad2SJack F Vogel 
399d81738fSJack F Vogel 
408cfa0ad2SJack F Vogel /* Tunables */
418cfa0ad2SJack F Vogel 
428cfa0ad2SJack F Vogel /*
438cfa0ad2SJack F Vogel  * EM_TXD: Maximum number of Transmit Descriptors
448cfa0ad2SJack F Vogel  * Valid Range: 80-256 for 82542 and 82543-based adapters
458cfa0ad2SJack F Vogel  *              80-4096 for others
468cfa0ad2SJack F Vogel  * Default Value: 256
478cfa0ad2SJack F Vogel  *   This value is the number of transmit descriptors allocated by the driver.
488cfa0ad2SJack F Vogel  *   Increasing this value allows the driver to queue more transmits. Each
498cfa0ad2SJack F Vogel  *   descriptor is 16 bytes.
508cfa0ad2SJack F Vogel  *   Since TDLEN should be multiple of 128bytes, the number of transmit
518cfa0ad2SJack F Vogel  *   desscriptors should meet the following condition.
528cfa0ad2SJack F Vogel  *      (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0
538cfa0ad2SJack F Vogel  */
548cfa0ad2SJack F Vogel #define EM_MIN_TXD		80
558cfa0ad2SJack F Vogel #define EM_MAX_TXD		4096
56a69ed8dfSJack F Vogel #define EM_DEFAULT_TXD		1024
578cfa0ad2SJack F Vogel 
588cfa0ad2SJack F Vogel /*
598cfa0ad2SJack F Vogel  * EM_RXD - Maximum number of receive Descriptors
608cfa0ad2SJack F Vogel  * Valid Range: 80-256 for 82542 and 82543-based adapters
618cfa0ad2SJack F Vogel  *              80-4096 for others
628cfa0ad2SJack F Vogel  * Default Value: 256
638cfa0ad2SJack F Vogel  *   This value is the number of receive descriptors allocated by the driver.
648cfa0ad2SJack F Vogel  *   Increasing this value allows the driver to buffer more incoming packets.
658cfa0ad2SJack F Vogel  *   Each descriptor is 16 bytes.  A receive buffer is also allocated for each
668cfa0ad2SJack F Vogel  *   descriptor. The maximum MTU size is 16110.
678cfa0ad2SJack F Vogel  *   Since TDLEN should be multiple of 128bytes, the number of transmit
688cfa0ad2SJack F Vogel  *   desscriptors should meet the following condition.
698cfa0ad2SJack F Vogel  *      (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0
708cfa0ad2SJack F Vogel  */
718cfa0ad2SJack F Vogel #define EM_MIN_RXD		80
728cfa0ad2SJack F Vogel #define EM_MAX_RXD		4096
73a69ed8dfSJack F Vogel #define EM_DEFAULT_RXD		1024
748cfa0ad2SJack F Vogel 
758cfa0ad2SJack F Vogel /*
768cfa0ad2SJack F Vogel  * EM_TIDV - Transmit Interrupt Delay Value
778cfa0ad2SJack F Vogel  * Valid Range: 0-65535 (0=off)
788cfa0ad2SJack F Vogel  * Default Value: 64
798cfa0ad2SJack F Vogel  *   This value delays the generation of transmit interrupts in units of
808cfa0ad2SJack F Vogel  *   1.024 microseconds. Transmit interrupt reduction can improve CPU
818cfa0ad2SJack F Vogel  *   efficiency if properly tuned for specific network traffic. If the
828cfa0ad2SJack F Vogel  *   system is reporting dropped transmits, this value may be set too high
838cfa0ad2SJack F Vogel  *   causing the driver to run out of available transmit descriptors.
848cfa0ad2SJack F Vogel  */
858cfa0ad2SJack F Vogel #define EM_TIDV                         64
868cfa0ad2SJack F Vogel 
878cfa0ad2SJack F Vogel /*
888cfa0ad2SJack F Vogel  * EM_TADV - Transmit Absolute Interrupt Delay Value
898cfa0ad2SJack F Vogel  * (Not valid for 82542/82543/82544)
908cfa0ad2SJack F Vogel  * Valid Range: 0-65535 (0=off)
918cfa0ad2SJack F Vogel  * Default Value: 64
928cfa0ad2SJack F Vogel  *   This value, in units of 1.024 microseconds, limits the delay in which a
938cfa0ad2SJack F Vogel  *   transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
948cfa0ad2SJack F Vogel  *   this value ensures that an interrupt is generated after the initial
958cfa0ad2SJack F Vogel  *   packet is sent on the wire within the set amount of time.  Proper tuning,
968cfa0ad2SJack F Vogel  *   along with EM_TIDV, may improve traffic throughput in specific
978cfa0ad2SJack F Vogel  *   network conditions.
988cfa0ad2SJack F Vogel  */
998cfa0ad2SJack F Vogel #define EM_TADV                         64
1008cfa0ad2SJack F Vogel 
1018cfa0ad2SJack F Vogel /*
1028cfa0ad2SJack F Vogel  * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
1038cfa0ad2SJack F Vogel  * Valid Range: 0-65535 (0=off)
1048cfa0ad2SJack F Vogel  * Default Value: 0
1058cfa0ad2SJack F Vogel  *   This value delays the generation of receive interrupts in units of 1.024
1068cfa0ad2SJack F Vogel  *   microseconds.  Receive interrupt reduction can improve CPU efficiency if
1078cfa0ad2SJack F Vogel  *   properly tuned for specific network traffic. Increasing this value adds
1088cfa0ad2SJack F Vogel  *   extra latency to frame reception and can end up decreasing the throughput
1098cfa0ad2SJack F Vogel  *   of TCP traffic. If the system is reporting dropped receives, this value
1108cfa0ad2SJack F Vogel  *   may be set too high, causing the driver to run out of available receive
1118cfa0ad2SJack F Vogel  *   descriptors.
1128cfa0ad2SJack F Vogel  *
1138cfa0ad2SJack F Vogel  *   CAUTION: When setting EM_RDTR to a value other than 0, adapters
1148cfa0ad2SJack F Vogel  *            may hang (stop transmitting) under certain network conditions.
1158cfa0ad2SJack F Vogel  *            If this occurs a WATCHDOG message is logged in the system
1168cfa0ad2SJack F Vogel  *            event log. In addition, the controller is automatically reset,
1178cfa0ad2SJack F Vogel  *            restoring the network connection. To eliminate the potential
1188cfa0ad2SJack F Vogel  *            for the hang ensure that EM_RDTR is set to 0.
1198cfa0ad2SJack F Vogel  */
1208cfa0ad2SJack F Vogel #define EM_RDTR                         0
1218cfa0ad2SJack F Vogel 
1228cfa0ad2SJack F Vogel /*
1238cfa0ad2SJack F Vogel  * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
1248cfa0ad2SJack F Vogel  * Valid Range: 0-65535 (0=off)
1258cfa0ad2SJack F Vogel  * Default Value: 64
1268cfa0ad2SJack F Vogel  *   This value, in units of 1.024 microseconds, limits the delay in which a
1278cfa0ad2SJack F Vogel  *   receive interrupt is generated. Useful only if EM_RDTR is non-zero,
1288cfa0ad2SJack F Vogel  *   this value ensures that an interrupt is generated after the initial
1298cfa0ad2SJack F Vogel  *   packet is received within the set amount of time.  Proper tuning,
1308cfa0ad2SJack F Vogel  *   along with EM_RDTR, may improve traffic throughput in specific network
1318cfa0ad2SJack F Vogel  *   conditions.
1328cfa0ad2SJack F Vogel  */
1338cfa0ad2SJack F Vogel #define EM_RADV                         64
1348cfa0ad2SJack F Vogel 
1358cfa0ad2SJack F Vogel /*
1366c8d4b16SJack F Vogel  * This parameter controls the max duration of transmit watchdog.
1378cfa0ad2SJack F Vogel  */
138a69ed8dfSJack F Vogel #define EM_WATCHDOG                   (10 * hz)
1398cfa0ad2SJack F Vogel 
1408cfa0ad2SJack F Vogel /*
1418cfa0ad2SJack F Vogel  * This parameter controls when the driver calls the routine to reclaim
1428cfa0ad2SJack F Vogel  * transmit descriptors.
1438cfa0ad2SJack F Vogel  */
1448cfa0ad2SJack F Vogel #define EM_TX_CLEANUP_THRESHOLD	(adapter->num_tx_desc / 8)
1458cfa0ad2SJack F Vogel 
1468cfa0ad2SJack F Vogel /*
1478cfa0ad2SJack F Vogel  * This parameter controls whether or not autonegotation is enabled.
1488cfa0ad2SJack F Vogel  *              0 - Disable autonegotiation
1498cfa0ad2SJack F Vogel  *              1 - Enable  autonegotiation
1508cfa0ad2SJack F Vogel  */
1518cfa0ad2SJack F Vogel #define DO_AUTO_NEG                     1
1528cfa0ad2SJack F Vogel 
1538cfa0ad2SJack F Vogel /*
1548cfa0ad2SJack F Vogel  * This parameter control whether or not the driver will wait for
1558cfa0ad2SJack F Vogel  * autonegotiation to complete.
1568cfa0ad2SJack F Vogel  *              1 - Wait for autonegotiation to complete
1578cfa0ad2SJack F Vogel  *              0 - Don't wait for autonegotiation to complete
1588cfa0ad2SJack F Vogel  */
1598cfa0ad2SJack F Vogel #define WAIT_FOR_AUTO_NEG_DEFAULT       0
1608cfa0ad2SJack F Vogel 
1618cfa0ad2SJack F Vogel /* Tunables -- End */
1628cfa0ad2SJack F Vogel 
1638cfa0ad2SJack F Vogel #define AUTONEG_ADV_DEFAULT	(ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
1648cfa0ad2SJack F Vogel 				ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
1658cfa0ad2SJack F Vogel 				ADVERTISE_1000_FULL)
1668cfa0ad2SJack F Vogel 
1678cfa0ad2SJack F Vogel #define AUTO_ALL_MODES		0
1688cfa0ad2SJack F Vogel 
1698cfa0ad2SJack F Vogel /* PHY master/slave setting */
1708cfa0ad2SJack F Vogel #define EM_MASTER_SLAVE		e1000_ms_hw_default
1718cfa0ad2SJack F Vogel 
1728cfa0ad2SJack F Vogel /*
1738cfa0ad2SJack F Vogel  * Micellaneous constants
1748cfa0ad2SJack F Vogel  */
1758cfa0ad2SJack F Vogel #define EM_VENDOR_ID                    0x8086
1768cfa0ad2SJack F Vogel #define EM_FLASH                        0x0014
1778cfa0ad2SJack F Vogel 
1788cfa0ad2SJack F Vogel #define EM_JUMBO_PBA                    0x00000028
1798cfa0ad2SJack F Vogel #define EM_DEFAULT_PBA                  0x00000030
1808cfa0ad2SJack F Vogel #define EM_SMARTSPEED_DOWNSHIFT         3
1818cfa0ad2SJack F Vogel #define EM_SMARTSPEED_MAX               15
1828ec87fc5SJack F Vogel #define EM_MAX_LOOP			10
1838cfa0ad2SJack F Vogel 
1848cfa0ad2SJack F Vogel #define MAX_NUM_MULTICAST_ADDRESSES     128
1858cfa0ad2SJack F Vogel #define PCI_ANY_ID                      (~0U)
1868cfa0ad2SJack F Vogel #define ETHER_ALIGN                     2
1878cfa0ad2SJack F Vogel #define EM_FC_PAUSE_TIME		0x0680
1888cfa0ad2SJack F Vogel #define EM_EEPROM_APME			0x400;
1894edd8523SJack F Vogel #define EM_82544_APME			0x0004;
1908cfa0ad2SJack F Vogel 
1917deff7f9SJack F Vogel #define EM_QUEUE_IDLE			0
1927deff7f9SJack F Vogel #define EM_QUEUE_WORKING		1
1937deff7f9SJack F Vogel #define EM_QUEUE_HUNG			2
1947deff7f9SJack F Vogel 
1958cfa0ad2SJack F Vogel /*
1968cfa0ad2SJack F Vogel  * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be
1978cfa0ad2SJack F Vogel  * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will
1988cfa0ad2SJack F Vogel  * also optimize cache line size effect. H/W supports up to cache line size 128.
1998cfa0ad2SJack F Vogel  */
2008cfa0ad2SJack F Vogel #define EM_DBA_ALIGN			128
2018cfa0ad2SJack F Vogel 
2028cfa0ad2SJack F Vogel #define SPEED_MODE_BIT (1<<21)		/* On PCI-E MACs only */
2038cfa0ad2SJack F Vogel 
2048cfa0ad2SJack F Vogel /* PCI Config defines */
2058cfa0ad2SJack F Vogel #define EM_BAR_TYPE(v)		((v) & EM_BAR_TYPE_MASK)
2068cfa0ad2SJack F Vogel #define EM_BAR_TYPE_MASK	0x00000001
2078cfa0ad2SJack F Vogel #define EM_BAR_TYPE_MMEM	0x00000000
2088cfa0ad2SJack F Vogel #define EM_BAR_TYPE_FLASH	0x0014
2098cfa0ad2SJack F Vogel #define EM_BAR_MEM_TYPE(v)	((v) & EM_BAR_MEM_TYPE_MASK)
2108cfa0ad2SJack F Vogel #define EM_BAR_MEM_TYPE_MASK	0x00000006
2118cfa0ad2SJack F Vogel #define EM_BAR_MEM_TYPE_32BIT	0x00000000
2128cfa0ad2SJack F Vogel #define EM_BAR_MEM_TYPE_64BIT	0x00000004
2138cfa0ad2SJack F Vogel #define EM_MSIX_BAR		3	/* On 82575 */
2148cfa0ad2SJack F Vogel 
215*fd33ce41SJack F Vogel /* More backward compatibility */
216*fd33ce41SJack F Vogel #if __FreeBSD_version < 900000
2171fd3c44fSJack F Vogel #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
2181fd3c44fSJack F Vogel #endif
2191fd3c44fSJack F Vogel 
2208cfa0ad2SJack F Vogel /* Defines for printing debug information */
2218cfa0ad2SJack F Vogel #define DEBUG_INIT  0
2228cfa0ad2SJack F Vogel #define DEBUG_IOCTL 0
2238cfa0ad2SJack F Vogel #define DEBUG_HW    0
2248cfa0ad2SJack F Vogel 
2258cfa0ad2SJack F Vogel #define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
2268cfa0ad2SJack F Vogel #define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
2278cfa0ad2SJack F Vogel #define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
2288cfa0ad2SJack F Vogel #define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
2298cfa0ad2SJack F Vogel #define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
2308cfa0ad2SJack F Vogel #define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
2318cfa0ad2SJack F Vogel #define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
2328cfa0ad2SJack F Vogel #define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
2338cfa0ad2SJack F Vogel #define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
2348cfa0ad2SJack F Vogel 
235681ac9c0SJack F Vogel #define EM_MAX_SCATTER		32
2369d81738fSJack F Vogel #define EM_VFTA_SIZE		128
2378cfa0ad2SJack F Vogel #define EM_TSO_SIZE		(65535 + sizeof(struct ether_vlan_header))
2388cfa0ad2SJack F Vogel #define EM_TSO_SEG_SIZE		4096	/* Max dma segment size */
2398cfa0ad2SJack F Vogel #define EM_MSIX_MASK		0x01F00000 /* For 82574 use */
2408ec87fc5SJack F Vogel #define EM_MSIX_LINK		0x01000000 /* For 82574 use */
2418cfa0ad2SJack F Vogel #define ETH_ZLEN		60
2428cfa0ad2SJack F Vogel #define ETH_ADDR_LEN		6
2438cfa0ad2SJack F Vogel #define CSUM_OFFLOAD		7	/* Offload bits in mbuf flag */
2448cfa0ad2SJack F Vogel 
2458cfa0ad2SJack F Vogel /*
2468cfa0ad2SJack F Vogel  * 82574 has a nonstandard address for EIAC
2478cfa0ad2SJack F Vogel  * and since its only used in MSIX, and in
2488cfa0ad2SJack F Vogel  * the em driver only 82574 uses MSIX we can
2498cfa0ad2SJack F Vogel  * solve it just using this define.
2508cfa0ad2SJack F Vogel  */
2518cfa0ad2SJack F Vogel #define EM_EIAC 0x000DC
2528cfa0ad2SJack F Vogel 
2538cfa0ad2SJack F Vogel /*
2548cfa0ad2SJack F Vogel  * Bus dma allocation structure used by
2558cfa0ad2SJack F Vogel  * e1000_dma_malloc and e1000_dma_free.
2568cfa0ad2SJack F Vogel  */
2578cfa0ad2SJack F Vogel struct em_dma_alloc {
2588cfa0ad2SJack F Vogel         bus_addr_t              dma_paddr;
2598cfa0ad2SJack F Vogel         caddr_t                 dma_vaddr;
2608cfa0ad2SJack F Vogel         bus_dma_tag_t           dma_tag;
2618cfa0ad2SJack F Vogel         bus_dmamap_t            dma_map;
2628cfa0ad2SJack F Vogel         bus_dma_segment_t       dma_seg;
2638cfa0ad2SJack F Vogel         int                     dma_nseg;
2648cfa0ad2SJack F Vogel };
2658cfa0ad2SJack F Vogel 
2669d81738fSJack F Vogel struct adapter;
2679d81738fSJack F Vogel 
2689d81738fSJack F Vogel struct em_int_delay_info {
2699d81738fSJack F Vogel 	struct adapter *adapter;	/* Back-pointer to the adapter struct */
2709d81738fSJack F Vogel 	int offset;			/* Register offset to read/write */
2719d81738fSJack F Vogel 	int value;			/* Current value in usecs */
2729d81738fSJack F Vogel };
2739d81738fSJack F Vogel 
2748ec87fc5SJack F Vogel /*
2758ec87fc5SJack F Vogel  * The transmit ring, one per tx queue
2768ec87fc5SJack F Vogel  */
2778ec87fc5SJack F Vogel struct tx_ring {
2788ec87fc5SJack F Vogel         struct adapter          *adapter;
2798ec87fc5SJack F Vogel         struct mtx              tx_mtx;
2808ec87fc5SJack F Vogel         char                    mtx_name[16];
2818ec87fc5SJack F Vogel         u32                     me;
2828ec87fc5SJack F Vogel         u32                     msix;
2838ec87fc5SJack F Vogel 	u32			ims;
2847deff7f9SJack F Vogel         int			queue_status;
2858ec87fc5SJack F Vogel         int                     watchdog_time;
2868ec87fc5SJack F Vogel 	struct em_dma_alloc	txdma;
2878ec87fc5SJack F Vogel 	struct e1000_tx_desc	*tx_base;
2888ec87fc5SJack F Vogel         struct task             tx_task;
2898ec87fc5SJack F Vogel         struct taskqueue        *tq;
2908ec87fc5SJack F Vogel         u32                     next_avail_desc;
2918ec87fc5SJack F Vogel         u32                     next_to_clean;
2928ec87fc5SJack F Vogel         struct em_buffer	*tx_buffers;
2938ec87fc5SJack F Vogel         volatile u16            tx_avail;
2948ec87fc5SJack F Vogel 	u32			tx_tso;		/* last tx was tso */
2958ec87fc5SJack F Vogel         u16			last_hw_offload;
2967d9119bdSJack F Vogel 	u8			last_hw_ipcso;
2977d9119bdSJack F Vogel 	u8			last_hw_ipcss;
2987d9119bdSJack F Vogel 	u8			last_hw_tucso;
2997d9119bdSJack F Vogel 	u8			last_hw_tucss;
3009d81738fSJack F Vogel #if __FreeBSD_version >= 800000
301f2502470SKip Macy 	struct buf_ring         *br;
302f2502470SKip Macy #endif
3038ec87fc5SJack F Vogel 	/* Interrupt resources */
3048ec87fc5SJack F Vogel         bus_dma_tag_t           txtag;
3058ec87fc5SJack F Vogel 	void                    *tag;
3068ec87fc5SJack F Vogel 	struct resource         *res;
307eaa9db2bSJack F Vogel         unsigned long		tx_irq;
308eaa9db2bSJack F Vogel         unsigned long		no_desc_avail;
3098ec87fc5SJack F Vogel };
3108ec87fc5SJack F Vogel 
3118ec87fc5SJack F Vogel /*
3128ec87fc5SJack F Vogel  * The Receive ring, one per rx queue
3138ec87fc5SJack F Vogel  */
3148ec87fc5SJack F Vogel struct rx_ring {
3158ec87fc5SJack F Vogel         struct adapter          *adapter;
3168ec87fc5SJack F Vogel         u32                     me;
3178ec87fc5SJack F Vogel         u32                     msix;
3188ec87fc5SJack F Vogel 	u32			ims;
3198ec87fc5SJack F Vogel         struct mtx              rx_mtx;
3208ec87fc5SJack F Vogel         char                    mtx_name[16];
3218ec87fc5SJack F Vogel         u32                     payload;
3228ec87fc5SJack F Vogel         struct task             rx_task;
3238ec87fc5SJack F Vogel         struct taskqueue        *tq;
3248ec87fc5SJack F Vogel         struct e1000_rx_desc	*rx_base;
3258ec87fc5SJack F Vogel         struct em_dma_alloc	rxdma;
326eaa9db2bSJack F Vogel         u32			next_to_refresh;
327eaa9db2bSJack F Vogel         u32			next_to_check;
3288ec87fc5SJack F Vogel         struct em_buffer	*rx_buffers;
3298ec87fc5SJack F Vogel 	struct mbuf		*fmp;
3308ec87fc5SJack F Vogel 	struct mbuf		*lmp;
3318ec87fc5SJack F Vogel 
3328ec87fc5SJack F Vogel         /* Interrupt resources */
3338ec87fc5SJack F Vogel         void                    *tag;
3348ec87fc5SJack F Vogel         struct resource         *res;
3358ec87fc5SJack F Vogel         bus_dma_tag_t           rxtag;
336d9f1a5aaSJack F Vogel 	bool			discard;
3378ec87fc5SJack F Vogel 
3388ec87fc5SJack F Vogel         /* Soft stats */
339eaa9db2bSJack F Vogel         unsigned long		rx_irq;
340d9f1a5aaSJack F Vogel         unsigned long		rx_discarded;
341eaa9db2bSJack F Vogel         unsigned long		rx_packets;
342eaa9db2bSJack F Vogel         unsigned long		rx_bytes;
3438ec87fc5SJack F Vogel };
3448ec87fc5SJack F Vogel 
3458ec87fc5SJack F Vogel 
3468ec87fc5SJack F Vogel /* Our adapter structure */
3478ec87fc5SJack F Vogel struct adapter {
3488ec87fc5SJack F Vogel 	struct ifnet	*ifp;
3496c8d4b16SJack F Vogel 	struct e1000_hw	hw;
3508cfa0ad2SJack F Vogel 
3516c8d4b16SJack F Vogel 	/* FreeBSD operating-system-specific structures. */
3526c8d4b16SJack F Vogel 	struct e1000_osdep osdep;
3536c8d4b16SJack F Vogel 	struct device	*dev;
35479c7b719SMarius Strobl 	struct cdev	*led_dev;
3558cfa0ad2SJack F Vogel 
3566c8d4b16SJack F Vogel 	struct resource *memory;
3576c8d4b16SJack F Vogel 	struct resource *flash;
3588ec87fc5SJack F Vogel 	struct resource *msix_mem;
3596c8d4b16SJack F Vogel 
3608ec87fc5SJack F Vogel 	struct resource	*res;
3618ec87fc5SJack F Vogel 	void		*tag;
3628ec87fc5SJack F Vogel 	u32		linkvec;
3638ec87fc5SJack F Vogel 	u32		ivars;
3646c8d4b16SJack F Vogel 
3656c8d4b16SJack F Vogel 	struct ifmedia	media;
3666c8d4b16SJack F Vogel 	struct callout	timer;
3678ec87fc5SJack F Vogel 	int		msix;
3686c8d4b16SJack F Vogel 	int		if_flags;
3696c8d4b16SJack F Vogel 	int		max_frame_size;
3706c8d4b16SJack F Vogel 	int		min_frame_size;
3717d9119bdSJack F Vogel 	int		pause_frames;
3726c8d4b16SJack F Vogel 	struct mtx	core_mtx;
3736c8d4b16SJack F Vogel 	int		em_insert_vlan_header;
3748ec87fc5SJack F Vogel 	u32		ims;
3758ec87fc5SJack F Vogel 	bool		in_detach;
3766c8d4b16SJack F Vogel 
3776c8d4b16SJack F Vogel 	/* Task for FAST handling */
3786c8d4b16SJack F Vogel 	struct task     link_task;
3798ec87fc5SJack F Vogel 	struct task     que_task;
3806c8d4b16SJack F Vogel 	struct taskqueue *tq;           /* private task queue */
3816c8d4b16SJack F Vogel 
3826c8d4b16SJack F Vogel 	eventhandler_tag vlan_attach;
3836c8d4b16SJack F Vogel 	eventhandler_tag vlan_detach;
3848ec87fc5SJack F Vogel 
3858ec87fc5SJack F Vogel 	u16	num_vlans;
3868ec87fc5SJack F Vogel 	u16	num_queues;
3878ec87fc5SJack F Vogel 
3888ec87fc5SJack F Vogel         /*
3898ec87fc5SJack F Vogel          * Transmit rings:
3908ec87fc5SJack F Vogel          *      Allocated at run time, an array of rings.
3918ec87fc5SJack F Vogel          */
3928ec87fc5SJack F Vogel         struct tx_ring  *tx_rings;
3938ec87fc5SJack F Vogel         int             num_tx_desc;
3948ec87fc5SJack F Vogel         u32		txd_cmd;
3958ec87fc5SJack F Vogel 
3968ec87fc5SJack F Vogel         /*
3978ec87fc5SJack F Vogel          * Receive rings:
3988ec87fc5SJack F Vogel          *      Allocated at run time, an array of rings.
3998ec87fc5SJack F Vogel          */
4008ec87fc5SJack F Vogel         struct rx_ring  *rx_rings;
4018ec87fc5SJack F Vogel         int             num_rx_desc;
4028ec87fc5SJack F Vogel         u32             rx_process_limit;
4037deff7f9SJack F Vogel 	u32		rx_mbuf_sz;
4046c8d4b16SJack F Vogel 
4056c8d4b16SJack F Vogel 	/* Management and WOL features */
4066c8d4b16SJack F Vogel 	u32		wol;
4076c8d4b16SJack F Vogel 	bool		has_manage;
4086c8d4b16SJack F Vogel 	bool		has_amt;
4096c8d4b16SJack F Vogel 
410dd20cce1SPyun YongHyeon 	/* Multicast array memory */
411dd20cce1SPyun YongHyeon 	u8		*mta;
412d9f1a5aaSJack F Vogel 
4137deff7f9SJack F Vogel 	/*
4147deff7f9SJack F Vogel 	** Shadow VFTA table, this is needed because
4157deff7f9SJack F Vogel 	** the real vlan filter table gets cleared during
4167deff7f9SJack F Vogel 	** a soft reset and the driver needs to be able
4177deff7f9SJack F Vogel 	** to repopulate it.
4187deff7f9SJack F Vogel 	*/
4197deff7f9SJack F Vogel 	u32		shadow_vfta[EM_VFTA_SIZE];
4207deff7f9SJack F Vogel 
4217deff7f9SJack F Vogel 	/* Info about the interface */
422*fd33ce41SJack F Vogel 	u16		link_active;
423*fd33ce41SJack F Vogel 	u16		fc;
4247deff7f9SJack F Vogel 	u16		link_speed;
4257deff7f9SJack F Vogel 	u16		link_duplex;
4267deff7f9SJack F Vogel 	u32		smartspeed;
4277deff7f9SJack F Vogel 
4286c8d4b16SJack F Vogel 	struct em_int_delay_info tx_int_delay;
4296c8d4b16SJack F Vogel 	struct em_int_delay_info tx_abs_int_delay;
4306c8d4b16SJack F Vogel 	struct em_int_delay_info rx_int_delay;
4316c8d4b16SJack F Vogel 	struct em_int_delay_info rx_abs_int_delay;
432a69ed8dfSJack F Vogel 
4338cfa0ad2SJack F Vogel 	/* Misc stats maintained by the driver */
4348cfa0ad2SJack F Vogel 	unsigned long	dropped_pkts;
4356c8d4b16SJack F Vogel 	unsigned long	mbuf_alloc_failed;
4366c8d4b16SJack F Vogel 	unsigned long	mbuf_cluster_failed;
4378cfa0ad2SJack F Vogel 	unsigned long	no_tx_map_avail;
4388cfa0ad2SJack F Vogel         unsigned long	no_tx_dma_setup;
4398cfa0ad2SJack F Vogel 	unsigned long	rx_overruns;
4408ec87fc5SJack F Vogel 	unsigned long	watchdog_events;
4416c8d4b16SJack F Vogel 	unsigned long	link_irq;
4428cfa0ad2SJack F Vogel 
4438cfa0ad2SJack F Vogel 	struct e1000_hw_stats stats;
4448cfa0ad2SJack F Vogel };
4458cfa0ad2SJack F Vogel 
4468ec87fc5SJack F Vogel /********************************************************************************
4478cfa0ad2SJack F Vogel  * vendor_info_array
4488cfa0ad2SJack F Vogel  *
4498cfa0ad2SJack F Vogel  * This array contains the list of Subvendor/Subdevice IDs on which the driver
4508cfa0ad2SJack F Vogel  * should load.
4518cfa0ad2SJack F Vogel  *
4528ec87fc5SJack F Vogel  ********************************************************************************/
4538cfa0ad2SJack F Vogel typedef struct _em_vendor_info_t {
4548cfa0ad2SJack F Vogel 	unsigned int vendor_id;
4558cfa0ad2SJack F Vogel 	unsigned int device_id;
4568cfa0ad2SJack F Vogel 	unsigned int subvendor_id;
4578cfa0ad2SJack F Vogel 	unsigned int subdevice_id;
4588cfa0ad2SJack F Vogel 	unsigned int index;
4598cfa0ad2SJack F Vogel } em_vendor_info_t;
4608cfa0ad2SJack F Vogel 
4618cfa0ad2SJack F Vogel struct em_buffer {
4628cfa0ad2SJack F Vogel 	int		next_eop;  /* Index of the desc to watch */
4638cfa0ad2SJack F Vogel         struct mbuf    *m_head;
4648cfa0ad2SJack F Vogel         bus_dmamap_t    map;         /* bus_dma map for packet */
4658cfa0ad2SJack F Vogel };
4668cfa0ad2SJack F Vogel 
467e61e0b91SJack F Vogel 
468e61e0b91SJack F Vogel /*
469e61e0b91SJack F Vogel ** Find the number of unrefreshed RX descriptors
470e61e0b91SJack F Vogel */
471e61e0b91SJack F Vogel static inline u16
472e61e0b91SJack F Vogel e1000_rx_unrefreshed(struct rx_ring *rxr)
473e61e0b91SJack F Vogel {
474e61e0b91SJack F Vogel 	struct adapter	*adapter = rxr->adapter;
475e61e0b91SJack F Vogel 
476e61e0b91SJack F Vogel 	if (rxr->next_to_check > rxr->next_to_refresh)
477e61e0b91SJack F Vogel 		return (rxr->next_to_check - rxr->next_to_refresh - 1);
478e61e0b91SJack F Vogel 	else
479e61e0b91SJack F Vogel 		return ((adapter->num_rx_desc + rxr->next_to_check) -
480e61e0b91SJack F Vogel 		    rxr->next_to_refresh - 1);
481e61e0b91SJack F Vogel }
482e61e0b91SJack F Vogel 
4838cfa0ad2SJack F Vogel #define	EM_CORE_LOCK_INIT(_sc, _name) \
4848cfa0ad2SJack F Vogel 	mtx_init(&(_sc)->core_mtx, _name, "EM Core Lock", MTX_DEF)
4858cfa0ad2SJack F Vogel #define	EM_TX_LOCK_INIT(_sc, _name) \
4868cfa0ad2SJack F Vogel 	mtx_init(&(_sc)->tx_mtx, _name, "EM TX Lock", MTX_DEF)
4878cfa0ad2SJack F Vogel #define	EM_RX_LOCK_INIT(_sc, _name) \
4888cfa0ad2SJack F Vogel 	mtx_init(&(_sc)->rx_mtx, _name, "EM RX Lock", MTX_DEF)
4898cfa0ad2SJack F Vogel #define	EM_CORE_LOCK_DESTROY(_sc)	mtx_destroy(&(_sc)->core_mtx)
4908cfa0ad2SJack F Vogel #define	EM_TX_LOCK_DESTROY(_sc)		mtx_destroy(&(_sc)->tx_mtx)
4918cfa0ad2SJack F Vogel #define	EM_RX_LOCK_DESTROY(_sc)		mtx_destroy(&(_sc)->rx_mtx)
4928cfa0ad2SJack F Vogel #define	EM_CORE_LOCK(_sc)		mtx_lock(&(_sc)->core_mtx)
4938cfa0ad2SJack F Vogel #define	EM_TX_LOCK(_sc)			mtx_lock(&(_sc)->tx_mtx)
494f2502470SKip Macy #define	EM_TX_TRYLOCK(_sc)		mtx_trylock(&(_sc)->tx_mtx)
4958cfa0ad2SJack F Vogel #define	EM_RX_LOCK(_sc)			mtx_lock(&(_sc)->rx_mtx)
4968cfa0ad2SJack F Vogel #define	EM_CORE_UNLOCK(_sc)		mtx_unlock(&(_sc)->core_mtx)
4978cfa0ad2SJack F Vogel #define	EM_TX_UNLOCK(_sc)		mtx_unlock(&(_sc)->tx_mtx)
4988cfa0ad2SJack F Vogel #define	EM_RX_UNLOCK(_sc)		mtx_unlock(&(_sc)->rx_mtx)
4998cfa0ad2SJack F Vogel #define	EM_CORE_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->core_mtx, MA_OWNED)
5008cfa0ad2SJack F Vogel #define	EM_TX_LOCK_ASSERT(_sc)		mtx_assert(&(_sc)->tx_mtx, MA_OWNED)
50191ce5735SJack F Vogel #define	EM_RX_LOCK_ASSERT(_sc)		mtx_assert(&(_sc)->rx_mtx, MA_OWNED)
5028cfa0ad2SJack F Vogel 
5038cfa0ad2SJack F Vogel #endif /* _EM_H_DEFINED_ */
504