1 /****************************************************************************** 2 3 Copyright (c) 2001-2009, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 #ifdef HAVE_KERNEL_OPTION_HEADERS 36 #include "opt_device_polling.h" 37 #include "opt_inet.h" 38 #endif 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #if __FreeBSD_version >= 800000 43 #include <sys/buf_ring.h> 44 #endif 45 #include <sys/bus.h> 46 #include <sys/endian.h> 47 #include <sys/kernel.h> 48 #include <sys/kthread.h> 49 #include <sys/malloc.h> 50 #include <sys/mbuf.h> 51 #include <sys/module.h> 52 #include <sys/rman.h> 53 #include <sys/socket.h> 54 #include <sys/sockio.h> 55 #include <sys/sysctl.h> 56 #include <sys/taskqueue.h> 57 #if __FreeBSD_version >= 700029 58 #include <sys/eventhandler.h> 59 #endif 60 #include <machine/bus.h> 61 #include <machine/resource.h> 62 63 #include <net/bpf.h> 64 #include <net/ethernet.h> 65 #include <net/if.h> 66 #include <net/if_arp.h> 67 #include <net/if_dl.h> 68 #include <net/if_media.h> 69 70 #include <net/if_types.h> 71 #include <net/if_vlan_var.h> 72 73 #include <netinet/in_systm.h> 74 #include <netinet/in.h> 75 #include <netinet/if_ether.h> 76 #include <netinet/ip.h> 77 #include <netinet/ip6.h> 78 #include <netinet/tcp.h> 79 #include <netinet/udp.h> 80 81 #include <machine/in_cksum.h> 82 #include <dev/pci/pcivar.h> 83 #include <dev/pci/pcireg.h> 84 85 #include "e1000_api.h" 86 #include "e1000_82571.h" 87 #include "if_em.h" 88 89 /********************************************************************* 90 * Set this to one to display debug statistics 91 *********************************************************************/ 92 int em_display_debug_stats = 0; 93 94 /********************************************************************* 95 * Driver version: 96 *********************************************************************/ 97 char em_driver_version[] = "6.9.14"; 98 99 100 /********************************************************************* 101 * PCI Device ID Table 102 * 103 * Used by probe to select devices to load on 104 * Last field stores an index into e1000_strings 105 * Last entry must be all 0s 106 * 107 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 108 *********************************************************************/ 109 110 static em_vendor_info_t em_vendor_info_array[] = 111 { 112 /* Intel(R) PRO/1000 Network Connection */ 113 { 0x8086, E1000_DEV_ID_82540EM, PCI_ANY_ID, PCI_ANY_ID, 0}, 114 { 0x8086, E1000_DEV_ID_82540EM_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 115 { 0x8086, E1000_DEV_ID_82540EP, PCI_ANY_ID, PCI_ANY_ID, 0}, 116 { 0x8086, E1000_DEV_ID_82540EP_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 117 { 0x8086, E1000_DEV_ID_82540EP_LP, PCI_ANY_ID, PCI_ANY_ID, 0}, 118 119 { 0x8086, E1000_DEV_ID_82541EI, PCI_ANY_ID, PCI_ANY_ID, 0}, 120 { 0x8086, E1000_DEV_ID_82541ER, PCI_ANY_ID, PCI_ANY_ID, 0}, 121 { 0x8086, E1000_DEV_ID_82541ER_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 122 { 0x8086, E1000_DEV_ID_82541EI_MOBILE, PCI_ANY_ID, PCI_ANY_ID, 0}, 123 { 0x8086, E1000_DEV_ID_82541GI, PCI_ANY_ID, PCI_ANY_ID, 0}, 124 { 0x8086, E1000_DEV_ID_82541GI_LF, PCI_ANY_ID, PCI_ANY_ID, 0}, 125 { 0x8086, E1000_DEV_ID_82541GI_MOBILE, PCI_ANY_ID, PCI_ANY_ID, 0}, 126 127 { 0x8086, E1000_DEV_ID_82542, PCI_ANY_ID, PCI_ANY_ID, 0}, 128 129 { 0x8086, E1000_DEV_ID_82543GC_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 130 { 0x8086, E1000_DEV_ID_82543GC_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 131 132 { 0x8086, E1000_DEV_ID_82544EI_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 133 { 0x8086, E1000_DEV_ID_82544EI_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 134 { 0x8086, E1000_DEV_ID_82544GC_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 135 { 0x8086, E1000_DEV_ID_82544GC_LOM, PCI_ANY_ID, PCI_ANY_ID, 0}, 136 137 { 0x8086, E1000_DEV_ID_82545EM_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 138 { 0x8086, E1000_DEV_ID_82545EM_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 139 { 0x8086, E1000_DEV_ID_82545GM_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 140 { 0x8086, E1000_DEV_ID_82545GM_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 141 { 0x8086, E1000_DEV_ID_82545GM_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 142 143 { 0x8086, E1000_DEV_ID_82546EB_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 144 { 0x8086, E1000_DEV_ID_82546EB_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 145 { 0x8086, E1000_DEV_ID_82546EB_QUAD_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 146 { 0x8086, E1000_DEV_ID_82546GB_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 147 { 0x8086, E1000_DEV_ID_82546GB_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 148 { 0x8086, E1000_DEV_ID_82546GB_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 149 { 0x8086, E1000_DEV_ID_82546GB_PCIE, PCI_ANY_ID, PCI_ANY_ID, 0}, 150 { 0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 151 { 0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3, 152 PCI_ANY_ID, PCI_ANY_ID, 0}, 153 154 { 0x8086, E1000_DEV_ID_82547EI, PCI_ANY_ID, PCI_ANY_ID, 0}, 155 { 0x8086, E1000_DEV_ID_82547EI_MOBILE, PCI_ANY_ID, PCI_ANY_ID, 0}, 156 { 0x8086, E1000_DEV_ID_82547GI, PCI_ANY_ID, PCI_ANY_ID, 0}, 157 158 { 0x8086, E1000_DEV_ID_82571EB_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 159 { 0x8086, E1000_DEV_ID_82571EB_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 160 { 0x8086, E1000_DEV_ID_82571EB_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 161 { 0x8086, E1000_DEV_ID_82571EB_SERDES_DUAL, 162 PCI_ANY_ID, PCI_ANY_ID, 0}, 163 { 0x8086, E1000_DEV_ID_82571EB_SERDES_QUAD, 164 PCI_ANY_ID, PCI_ANY_ID, 0}, 165 { 0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER, 166 PCI_ANY_ID, PCI_ANY_ID, 0}, 167 { 0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER_LP, 168 PCI_ANY_ID, PCI_ANY_ID, 0}, 169 { 0x8086, E1000_DEV_ID_82571EB_QUAD_FIBER, 170 PCI_ANY_ID, PCI_ANY_ID, 0}, 171 { 0x8086, E1000_DEV_ID_82571PT_QUAD_COPPER, 172 PCI_ANY_ID, PCI_ANY_ID, 0}, 173 { 0x8086, E1000_DEV_ID_82572EI_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0}, 174 { 0x8086, E1000_DEV_ID_82572EI_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0}, 175 { 0x8086, E1000_DEV_ID_82572EI_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0}, 176 { 0x8086, E1000_DEV_ID_82572EI, PCI_ANY_ID, PCI_ANY_ID, 0}, 177 178 { 0x8086, E1000_DEV_ID_82573E, PCI_ANY_ID, PCI_ANY_ID, 0}, 179 { 0x8086, E1000_DEV_ID_82573E_IAMT, PCI_ANY_ID, PCI_ANY_ID, 0}, 180 { 0x8086, E1000_DEV_ID_82573L, PCI_ANY_ID, PCI_ANY_ID, 0}, 181 { 0x8086, E1000_DEV_ID_82583V, PCI_ANY_ID, PCI_ANY_ID, 0}, 182 { 0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_SPT, 183 PCI_ANY_ID, PCI_ANY_ID, 0}, 184 { 0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_SPT, 185 PCI_ANY_ID, PCI_ANY_ID, 0}, 186 { 0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_DPT, 187 PCI_ANY_ID, PCI_ANY_ID, 0}, 188 { 0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_DPT, 189 PCI_ANY_ID, PCI_ANY_ID, 0}, 190 { 0x8086, E1000_DEV_ID_ICH8_IGP_M_AMT, PCI_ANY_ID, PCI_ANY_ID, 0}, 191 { 0x8086, E1000_DEV_ID_ICH8_IGP_AMT, PCI_ANY_ID, PCI_ANY_ID, 0}, 192 { 0x8086, E1000_DEV_ID_ICH8_IGP_C, PCI_ANY_ID, PCI_ANY_ID, 0}, 193 { 0x8086, E1000_DEV_ID_ICH8_IFE, PCI_ANY_ID, PCI_ANY_ID, 0}, 194 { 0x8086, E1000_DEV_ID_ICH8_IFE_GT, PCI_ANY_ID, PCI_ANY_ID, 0}, 195 { 0x8086, E1000_DEV_ID_ICH8_IFE_G, PCI_ANY_ID, PCI_ANY_ID, 0}, 196 { 0x8086, E1000_DEV_ID_ICH8_IGP_M, PCI_ANY_ID, PCI_ANY_ID, 0}, 197 198 { 0x8086, E1000_DEV_ID_ICH9_IGP_M_AMT, PCI_ANY_ID, PCI_ANY_ID, 0}, 199 { 0x8086, E1000_DEV_ID_ICH9_IGP_AMT, PCI_ANY_ID, PCI_ANY_ID, 0}, 200 { 0x8086, E1000_DEV_ID_ICH9_IGP_C, PCI_ANY_ID, PCI_ANY_ID, 0}, 201 { 0x8086, E1000_DEV_ID_ICH9_IGP_M, PCI_ANY_ID, PCI_ANY_ID, 0}, 202 { 0x8086, E1000_DEV_ID_ICH9_IGP_M_V, PCI_ANY_ID, PCI_ANY_ID, 0}, 203 { 0x8086, E1000_DEV_ID_ICH9_IFE, PCI_ANY_ID, PCI_ANY_ID, 0}, 204 { 0x8086, E1000_DEV_ID_ICH9_IFE_GT, PCI_ANY_ID, PCI_ANY_ID, 0}, 205 { 0x8086, E1000_DEV_ID_ICH9_IFE_G, PCI_ANY_ID, PCI_ANY_ID, 0}, 206 { 0x8086, E1000_DEV_ID_ICH9_BM, PCI_ANY_ID, PCI_ANY_ID, 0}, 207 { 0x8086, E1000_DEV_ID_82574L, PCI_ANY_ID, PCI_ANY_ID, 0}, 208 { 0x8086, E1000_DEV_ID_82574LA, PCI_ANY_ID, PCI_ANY_ID, 0}, 209 { 0x8086, E1000_DEV_ID_ICH10_R_BM_LM, PCI_ANY_ID, PCI_ANY_ID, 0}, 210 { 0x8086, E1000_DEV_ID_ICH10_R_BM_LF, PCI_ANY_ID, PCI_ANY_ID, 0}, 211 { 0x8086, E1000_DEV_ID_ICH10_R_BM_V, PCI_ANY_ID, PCI_ANY_ID, 0}, 212 { 0x8086, E1000_DEV_ID_ICH10_D_BM_LM, PCI_ANY_ID, PCI_ANY_ID, 0}, 213 { 0x8086, E1000_DEV_ID_ICH10_D_BM_LF, PCI_ANY_ID, PCI_ANY_ID, 0}, 214 /* required last entry */ 215 { 0, 0, 0, 0, 0} 216 }; 217 218 /********************************************************************* 219 * Table of branding strings for all supported NICs. 220 *********************************************************************/ 221 222 static char *em_strings[] = { 223 "Intel(R) PRO/1000 Network Connection" 224 }; 225 226 /********************************************************************* 227 * Function prototypes 228 *********************************************************************/ 229 static int em_probe(device_t); 230 static int em_attach(device_t); 231 static int em_detach(device_t); 232 static int em_shutdown(device_t); 233 static int em_suspend(device_t); 234 static int em_resume(device_t); 235 static void em_start(struct ifnet *); 236 static void em_start_locked(struct ifnet *ifp); 237 #if __FreeBSD_version >= 800000 238 static int em_mq_start(struct ifnet *, struct mbuf *); 239 static int em_mq_start_locked(struct ifnet *, struct mbuf *); 240 static void em_qflush(struct ifnet *); 241 #endif 242 static int em_ioctl(struct ifnet *, u_long, caddr_t); 243 static void em_watchdog(struct adapter *); 244 static void em_init(void *); 245 static void em_init_locked(struct adapter *); 246 static void em_stop(void *); 247 static void em_media_status(struct ifnet *, struct ifmediareq *); 248 static int em_media_change(struct ifnet *); 249 static void em_identify_hardware(struct adapter *); 250 static int em_allocate_pci_resources(struct adapter *); 251 static int em_allocate_legacy(struct adapter *adapter); 252 static int em_allocate_msix(struct adapter *adapter); 253 static int em_setup_msix(struct adapter *); 254 static void em_free_pci_resources(struct adapter *); 255 static void em_local_timer(void *); 256 static int em_hardware_init(struct adapter *); 257 static void em_setup_interface(device_t, struct adapter *); 258 static void em_setup_transmit_structures(struct adapter *); 259 static void em_initialize_transmit_unit(struct adapter *); 260 static int em_setup_receive_structures(struct adapter *); 261 static void em_initialize_receive_unit(struct adapter *); 262 static void em_enable_intr(struct adapter *); 263 static void em_disable_intr(struct adapter *); 264 static void em_free_transmit_structures(struct adapter *); 265 static void em_free_receive_structures(struct adapter *); 266 static void em_update_stats_counters(struct adapter *); 267 static void em_txeof(struct adapter *); 268 static void em_tx_purge(struct adapter *); 269 static int em_allocate_receive_structures(struct adapter *); 270 static int em_allocate_transmit_structures(struct adapter *); 271 static int em_rxeof(struct adapter *, int); 272 #ifndef __NO_STRICT_ALIGNMENT 273 static int em_fixup_rx(struct adapter *); 274 #endif 275 static void em_receive_checksum(struct adapter *, struct e1000_rx_desc *, 276 struct mbuf *); 277 static void em_transmit_checksum_setup(struct adapter *, struct mbuf *, 278 u32 *, u32 *); 279 #if __FreeBSD_version >= 700000 280 static bool em_tso_setup(struct adapter *, struct mbuf *, 281 u32 *, u32 *); 282 #endif /* FreeBSD_version >= 700000 */ 283 static void em_set_promisc(struct adapter *); 284 static void em_disable_promisc(struct adapter *); 285 static void em_set_multi(struct adapter *); 286 static void em_print_hw_stats(struct adapter *); 287 static void em_update_link_status(struct adapter *); 288 static int em_get_buf(struct adapter *, int); 289 #if __FreeBSD_version >= 700029 290 static void em_register_vlan(void *, struct ifnet *, u16); 291 static void em_unregister_vlan(void *, struct ifnet *, u16); 292 static void em_setup_vlan_hw_support(struct adapter *); 293 #endif 294 static int em_xmit(struct adapter *, struct mbuf **); 295 static void em_smartspeed(struct adapter *); 296 static int em_82547_fifo_workaround(struct adapter *, int); 297 static void em_82547_update_fifo_head(struct adapter *, int); 298 static int em_82547_tx_fifo_reset(struct adapter *); 299 static void em_82547_move_tail(void *); 300 static int em_dma_malloc(struct adapter *, bus_size_t, 301 struct em_dma_alloc *, int); 302 static void em_dma_free(struct adapter *, struct em_dma_alloc *); 303 static void em_print_debug_info(struct adapter *); 304 static void em_print_nvm_info(struct adapter *); 305 static int em_is_valid_ether_addr(u8 *); 306 static int em_sysctl_stats(SYSCTL_HANDLER_ARGS); 307 static int em_sysctl_debug_info(SYSCTL_HANDLER_ARGS); 308 static u32 em_fill_descriptors (bus_addr_t address, u32 length, 309 PDESC_ARRAY desc_array); 310 static int em_sysctl_int_delay(SYSCTL_HANDLER_ARGS); 311 static void em_add_int_delay_sysctl(struct adapter *, const char *, 312 const char *, struct em_int_delay_info *, int, int); 313 /* Management and WOL Support */ 314 static void em_init_manageability(struct adapter *); 315 static void em_release_manageability(struct adapter *); 316 static void em_get_hw_control(struct adapter *); 317 static void em_release_hw_control(struct adapter *); 318 static void em_enable_wakeup(device_t); 319 320 #ifdef EM_LEGACY_IRQ 321 static void em_intr(void *); 322 #else /* FAST IRQ */ 323 #if __FreeBSD_version < 700000 324 static void em_irq_fast(void *); 325 #else 326 static int em_irq_fast(void *); 327 #endif 328 329 /* MSIX handlers */ 330 static void em_msix_tx(void *); 331 static void em_msix_rx(void *); 332 static void em_msix_link(void *); 333 static void em_handle_rx(void *context, int pending); 334 static void em_handle_tx(void *context, int pending); 335 336 static void em_handle_rxtx(void *context, int pending); 337 static void em_handle_link(void *context, int pending); 338 static void em_add_rx_process_limit(struct adapter *, const char *, 339 const char *, int *, int); 340 #endif /* ~EM_LEGACY_IRQ */ 341 342 #ifdef DEVICE_POLLING 343 static poll_handler_t em_poll; 344 #endif /* POLLING */ 345 346 /********************************************************************* 347 * FreeBSD Device Interface Entry Points 348 *********************************************************************/ 349 350 static device_method_t em_methods[] = { 351 /* Device interface */ 352 DEVMETHOD(device_probe, em_probe), 353 DEVMETHOD(device_attach, em_attach), 354 DEVMETHOD(device_detach, em_detach), 355 DEVMETHOD(device_shutdown, em_shutdown), 356 DEVMETHOD(device_suspend, em_suspend), 357 DEVMETHOD(device_resume, em_resume), 358 {0, 0} 359 }; 360 361 static driver_t em_driver = { 362 "em", em_methods, sizeof(struct adapter), 363 }; 364 365 static devclass_t em_devclass; 366 DRIVER_MODULE(em, pci, em_driver, em_devclass, 0, 0); 367 MODULE_DEPEND(em, pci, 1, 1, 1); 368 MODULE_DEPEND(em, ether, 1, 1, 1); 369 370 /********************************************************************* 371 * Tunable default values. 372 *********************************************************************/ 373 374 #define EM_TICKS_TO_USECS(ticks) ((1024 * (ticks) + 500) / 1000) 375 #define EM_USECS_TO_TICKS(usecs) ((1000 * (usecs) + 512) / 1024) 376 #define M_TSO_LEN 66 377 378 /* Allow common code without TSO */ 379 #ifndef CSUM_TSO 380 #define CSUM_TSO 0 381 #endif 382 383 static int em_tx_int_delay_dflt = EM_TICKS_TO_USECS(EM_TIDV); 384 static int em_rx_int_delay_dflt = EM_TICKS_TO_USECS(EM_RDTR); 385 static int em_tx_abs_int_delay_dflt = EM_TICKS_TO_USECS(EM_TADV); 386 static int em_rx_abs_int_delay_dflt = EM_TICKS_TO_USECS(EM_RADV); 387 static int em_rxd = EM_DEFAULT_RXD; 388 static int em_txd = EM_DEFAULT_TXD; 389 static int em_smart_pwr_down = FALSE; 390 /* Controls whether promiscuous also shows bad packets */ 391 static int em_debug_sbp = FALSE; 392 /* Local switch for MSI/MSIX */ 393 static int em_enable_msi = TRUE; 394 395 TUNABLE_INT("hw.em.tx_int_delay", &em_tx_int_delay_dflt); 396 TUNABLE_INT("hw.em.rx_int_delay", &em_rx_int_delay_dflt); 397 TUNABLE_INT("hw.em.tx_abs_int_delay", &em_tx_abs_int_delay_dflt); 398 TUNABLE_INT("hw.em.rx_abs_int_delay", &em_rx_abs_int_delay_dflt); 399 TUNABLE_INT("hw.em.rxd", &em_rxd); 400 TUNABLE_INT("hw.em.txd", &em_txd); 401 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down); 402 TUNABLE_INT("hw.em.sbp", &em_debug_sbp); 403 TUNABLE_INT("hw.em.enable_msi", &em_enable_msi); 404 405 #ifndef EM_LEGACY_IRQ 406 /* How many packets rxeof tries to clean at a time */ 407 static int em_rx_process_limit = 100; 408 TUNABLE_INT("hw.em.rx_process_limit", &em_rx_process_limit); 409 #endif 410 411 /* Flow control setting - default to FULL */ 412 static int em_fc_setting = e1000_fc_full; 413 TUNABLE_INT("hw.em.fc_setting", &em_fc_setting); 414 415 /* 416 ** Shadow VFTA table, this is needed because 417 ** the real vlan filter table gets cleared during 418 ** a soft reset and the driver needs to be able 419 ** to repopulate it. 420 */ 421 static u32 em_shadow_vfta[EM_VFTA_SIZE]; 422 423 /* Global used in WOL setup with multiport cards */ 424 static int global_quad_port_a = 0; 425 426 /********************************************************************* 427 * Device identification routine 428 * 429 * em_probe determines if the driver should be loaded on 430 * adapter based on PCI vendor/device id of the adapter. 431 * 432 * return BUS_PROBE_DEFAULT on success, positive on failure 433 *********************************************************************/ 434 435 static int 436 em_probe(device_t dev) 437 { 438 char adapter_name[60]; 439 u16 pci_vendor_id = 0; 440 u16 pci_device_id = 0; 441 u16 pci_subvendor_id = 0; 442 u16 pci_subdevice_id = 0; 443 em_vendor_info_t *ent; 444 445 INIT_DEBUGOUT("em_probe: begin"); 446 447 pci_vendor_id = pci_get_vendor(dev); 448 if (pci_vendor_id != EM_VENDOR_ID) 449 return (ENXIO); 450 451 pci_device_id = pci_get_device(dev); 452 pci_subvendor_id = pci_get_subvendor(dev); 453 pci_subdevice_id = pci_get_subdevice(dev); 454 455 ent = em_vendor_info_array; 456 while (ent->vendor_id != 0) { 457 if ((pci_vendor_id == ent->vendor_id) && 458 (pci_device_id == ent->device_id) && 459 460 ((pci_subvendor_id == ent->subvendor_id) || 461 (ent->subvendor_id == PCI_ANY_ID)) && 462 463 ((pci_subdevice_id == ent->subdevice_id) || 464 (ent->subdevice_id == PCI_ANY_ID))) { 465 sprintf(adapter_name, "%s %s", 466 em_strings[ent->index], 467 em_driver_version); 468 device_set_desc_copy(dev, adapter_name); 469 return (BUS_PROBE_DEFAULT); 470 } 471 ent++; 472 } 473 474 return (ENXIO); 475 } 476 477 /********************************************************************* 478 * Device initialization routine 479 * 480 * The attach entry point is called when the driver is being loaded. 481 * This routine identifies the type of hardware, allocates all resources 482 * and initializes the hardware. 483 * 484 * return 0 on success, positive on failure 485 *********************************************************************/ 486 487 static int 488 em_attach(device_t dev) 489 { 490 struct adapter *adapter; 491 int tsize, rsize; 492 int error = 0; 493 u16 eeprom_data, device_id; 494 495 INIT_DEBUGOUT("em_attach: begin"); 496 497 adapter = device_get_softc(dev); 498 adapter->dev = adapter->osdep.dev = dev; 499 EM_CORE_LOCK_INIT(adapter, device_get_nameunit(dev)); 500 EM_TX_LOCK_INIT(adapter, device_get_nameunit(dev)); 501 EM_RX_LOCK_INIT(adapter, device_get_nameunit(dev)); 502 503 /* SYSCTL stuff */ 504 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 505 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 506 OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0, 507 em_sysctl_debug_info, "I", "Debug Information"); 508 509 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 510 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 511 OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0, 512 em_sysctl_stats, "I", "Statistics"); 513 514 callout_init_mtx(&adapter->timer, &adapter->core_mtx, 0); 515 callout_init_mtx(&adapter->tx_fifo_timer, &adapter->tx_mtx, 0); 516 517 /* Determine hardware and mac info */ 518 em_identify_hardware(adapter); 519 520 /* Setup PCI resources */ 521 if (em_allocate_pci_resources(adapter)) { 522 device_printf(dev, "Allocation of PCI resources failed\n"); 523 error = ENXIO; 524 goto err_pci; 525 } 526 527 /* 528 ** For ICH8 and family we need to 529 ** map the flash memory, and this 530 ** must happen after the MAC is 531 ** identified 532 */ 533 if ((adapter->hw.mac.type == e1000_ich8lan) || 534 (adapter->hw.mac.type == e1000_ich9lan) || 535 (adapter->hw.mac.type == e1000_ich10lan)) { 536 int rid = EM_BAR_TYPE_FLASH; 537 adapter->flash = bus_alloc_resource_any(dev, 538 SYS_RES_MEMORY, &rid, RF_ACTIVE); 539 if (adapter->flash == NULL) { 540 device_printf(dev, "Mapping of Flash failed\n"); 541 error = ENXIO; 542 goto err_pci; 543 } 544 /* This is used in the shared code */ 545 adapter->hw.flash_address = (u8 *)adapter->flash; 546 adapter->osdep.flash_bus_space_tag = 547 rman_get_bustag(adapter->flash); 548 adapter->osdep.flash_bus_space_handle = 549 rman_get_bushandle(adapter->flash); 550 } 551 552 /* Do Shared Code initialization */ 553 if (e1000_setup_init_funcs(&adapter->hw, TRUE)) { 554 device_printf(dev, "Setup of Shared code failed\n"); 555 error = ENXIO; 556 goto err_pci; 557 } 558 559 e1000_get_bus_info(&adapter->hw); 560 561 /* Set up some sysctls for the tunable interrupt delays */ 562 em_add_int_delay_sysctl(adapter, "rx_int_delay", 563 "receive interrupt delay in usecs", &adapter->rx_int_delay, 564 E1000_REGISTER(&adapter->hw, E1000_RDTR), em_rx_int_delay_dflt); 565 em_add_int_delay_sysctl(adapter, "tx_int_delay", 566 "transmit interrupt delay in usecs", &adapter->tx_int_delay, 567 E1000_REGISTER(&adapter->hw, E1000_TIDV), em_tx_int_delay_dflt); 568 if (adapter->hw.mac.type >= e1000_82540) { 569 em_add_int_delay_sysctl(adapter, "rx_abs_int_delay", 570 "receive interrupt delay limit in usecs", 571 &adapter->rx_abs_int_delay, 572 E1000_REGISTER(&adapter->hw, E1000_RADV), 573 em_rx_abs_int_delay_dflt); 574 em_add_int_delay_sysctl(adapter, "tx_abs_int_delay", 575 "transmit interrupt delay limit in usecs", 576 &adapter->tx_abs_int_delay, 577 E1000_REGISTER(&adapter->hw, E1000_TADV), 578 em_tx_abs_int_delay_dflt); 579 } 580 581 #ifndef EM_LEGACY_IRQ 582 /* Sysctls for limiting the amount of work done in the taskqueue */ 583 em_add_rx_process_limit(adapter, "rx_processing_limit", 584 "max number of rx packets to process", &adapter->rx_process_limit, 585 em_rx_process_limit); 586 #endif 587 588 /* 589 * Validate number of transmit and receive descriptors. It 590 * must not exceed hardware maximum, and must be multiple 591 * of E1000_DBA_ALIGN. 592 */ 593 if (((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN) != 0 || 594 (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) || 595 (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) || 596 (em_txd < EM_MIN_TXD)) { 597 device_printf(dev, "Using %d TX descriptors instead of %d!\n", 598 EM_DEFAULT_TXD, em_txd); 599 adapter->num_tx_desc = EM_DEFAULT_TXD; 600 } else 601 adapter->num_tx_desc = em_txd; 602 if (((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN) != 0 || 603 (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) || 604 (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) || 605 (em_rxd < EM_MIN_RXD)) { 606 device_printf(dev, "Using %d RX descriptors instead of %d!\n", 607 EM_DEFAULT_RXD, em_rxd); 608 adapter->num_rx_desc = EM_DEFAULT_RXD; 609 } else 610 adapter->num_rx_desc = em_rxd; 611 612 adapter->hw.mac.autoneg = DO_AUTO_NEG; 613 adapter->hw.phy.autoneg_wait_to_complete = FALSE; 614 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT; 615 adapter->rx_buffer_len = 2048; 616 617 e1000_init_script_state_82541(&adapter->hw, TRUE); 618 e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE); 619 620 /* Copper options */ 621 if (adapter->hw.phy.media_type == e1000_media_type_copper) { 622 adapter->hw.phy.mdix = AUTO_ALL_MODES; 623 adapter->hw.phy.disable_polarity_correction = FALSE; 624 adapter->hw.phy.ms_type = EM_MASTER_SLAVE; 625 } 626 627 /* 628 * Set the frame limits assuming 629 * standard ethernet sized frames. 630 */ 631 adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHERNET_FCS_SIZE; 632 adapter->min_frame_size = ETH_ZLEN + ETHERNET_FCS_SIZE; 633 634 /* 635 * This controls when hardware reports transmit completion 636 * status. 637 */ 638 adapter->hw.mac.report_tx_early = 1; 639 640 tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc), 641 EM_DBA_ALIGN); 642 643 /* Allocate Transmit Descriptor ring */ 644 if (em_dma_malloc(adapter, tsize, &adapter->txdma, BUS_DMA_NOWAIT)) { 645 device_printf(dev, "Unable to allocate tx_desc memory\n"); 646 error = ENOMEM; 647 goto err_tx_desc; 648 } 649 adapter->tx_desc_base = 650 (struct e1000_tx_desc *)adapter->txdma.dma_vaddr; 651 652 rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc), 653 EM_DBA_ALIGN); 654 655 /* Allocate Receive Descriptor ring */ 656 if (em_dma_malloc(adapter, rsize, &adapter->rxdma, BUS_DMA_NOWAIT)) { 657 device_printf(dev, "Unable to allocate rx_desc memory\n"); 658 error = ENOMEM; 659 goto err_rx_desc; 660 } 661 adapter->rx_desc_base = 662 (struct e1000_rx_desc *)adapter->rxdma.dma_vaddr; 663 664 /* 665 ** Start from a known state, this is 666 ** important in reading the nvm and 667 ** mac from that. 668 */ 669 e1000_reset_hw(&adapter->hw); 670 671 /* Make sure we have a good EEPROM before we read from it */ 672 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) { 673 /* 674 ** Some PCI-E parts fail the first check due to 675 ** the link being in sleep state, call it again, 676 ** if it fails a second time its a real issue. 677 */ 678 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) { 679 device_printf(dev, 680 "The EEPROM Checksum Is Not Valid\n"); 681 error = EIO; 682 goto err_hw_init; 683 } 684 } 685 686 /* Copy the permanent MAC address out of the EEPROM */ 687 if (e1000_read_mac_addr(&adapter->hw) < 0) { 688 device_printf(dev, "EEPROM read error while reading MAC" 689 " address\n"); 690 error = EIO; 691 goto err_hw_init; 692 } 693 694 if (!em_is_valid_ether_addr(adapter->hw.mac.addr)) { 695 device_printf(dev, "Invalid MAC address\n"); 696 error = EIO; 697 goto err_hw_init; 698 } 699 700 /* Initialize the hardware */ 701 if (em_hardware_init(adapter)) { 702 device_printf(dev, "Unable to initialize the hardware\n"); 703 error = EIO; 704 goto err_hw_init; 705 } 706 707 /* Allocate transmit descriptors and buffers */ 708 if (em_allocate_transmit_structures(adapter)) { 709 device_printf(dev, "Could not setup transmit structures\n"); 710 error = ENOMEM; 711 goto err_tx_struct; 712 } 713 714 /* Allocate receive descriptors and buffers */ 715 if (em_allocate_receive_structures(adapter)) { 716 device_printf(dev, "Could not setup receive structures\n"); 717 error = ENOMEM; 718 goto err_rx_struct; 719 } 720 721 /* 722 ** Do interrupt configuration 723 */ 724 if (adapter->msi > 1) /* Do MSI/X */ 725 error = em_allocate_msix(adapter); 726 else /* MSI or Legacy */ 727 error = em_allocate_legacy(adapter); 728 if (error) 729 goto err_rx_struct; 730 731 /* Setup OS specific network interface */ 732 em_setup_interface(dev, adapter); 733 734 /* Initialize statistics */ 735 em_update_stats_counters(adapter); 736 737 adapter->hw.mac.get_link_status = 1; 738 em_update_link_status(adapter); 739 740 /* Indicate SOL/IDER usage */ 741 if (e1000_check_reset_block(&adapter->hw)) 742 device_printf(dev, 743 "PHY reset is blocked due to SOL/IDER session.\n"); 744 745 /* Determine if we have to control management hardware */ 746 adapter->has_manage = e1000_enable_mng_pass_thru(&adapter->hw); 747 748 /* 749 * Setup Wake-on-Lan 750 */ 751 switch (adapter->hw.mac.type) { 752 753 case e1000_82542: 754 case e1000_82543: 755 break; 756 case e1000_82546: 757 case e1000_82546_rev_3: 758 case e1000_82571: 759 case e1000_80003es2lan: 760 if (adapter->hw.bus.func == 1) 761 e1000_read_nvm(&adapter->hw, 762 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); 763 else 764 e1000_read_nvm(&adapter->hw, 765 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); 766 eeprom_data &= EM_EEPROM_APME; 767 break; 768 default: 769 /* APME bit in EEPROM is mapped to WUC.APME */ 770 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC) & 771 E1000_WUC_APME; 772 break; 773 } 774 if (eeprom_data) 775 adapter->wol = E1000_WUFC_MAG; 776 /* 777 * We have the eeprom settings, now apply the special cases 778 * where the eeprom may be wrong or the board won't support 779 * wake on lan on a particular port 780 */ 781 device_id = pci_get_device(dev); 782 switch (device_id) { 783 case E1000_DEV_ID_82546GB_PCIE: 784 adapter->wol = 0; 785 break; 786 case E1000_DEV_ID_82546EB_FIBER: 787 case E1000_DEV_ID_82546GB_FIBER: 788 case E1000_DEV_ID_82571EB_FIBER: 789 /* Wake events only supported on port A for dual fiber 790 * regardless of eeprom setting */ 791 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) & 792 E1000_STATUS_FUNC_1) 793 adapter->wol = 0; 794 break; 795 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: 796 case E1000_DEV_ID_82571EB_QUAD_COPPER: 797 case E1000_DEV_ID_82571EB_QUAD_FIBER: 798 case E1000_DEV_ID_82571EB_QUAD_COPPER_LP: 799 /* if quad port adapter, disable WoL on all but port A */ 800 if (global_quad_port_a != 0) 801 adapter->wol = 0; 802 /* Reset for multiple quad port adapters */ 803 if (++global_quad_port_a == 4) 804 global_quad_port_a = 0; 805 break; 806 } 807 808 /* Do we need workaround for 82544 PCI-X adapter? */ 809 if (adapter->hw.bus.type == e1000_bus_type_pcix && 810 adapter->hw.mac.type == e1000_82544) 811 adapter->pcix_82544 = TRUE; 812 else 813 adapter->pcix_82544 = FALSE; 814 815 #if __FreeBSD_version >= 700029 816 /* Register for VLAN events */ 817 adapter->vlan_attach = EVENTHANDLER_REGISTER(vlan_config, 818 em_register_vlan, 0, EVENTHANDLER_PRI_FIRST); 819 adapter->vlan_detach = EVENTHANDLER_REGISTER(vlan_unconfig, 820 em_unregister_vlan, 0, EVENTHANDLER_PRI_FIRST); 821 #endif 822 823 /* Tell the stack that the interface is not active */ 824 adapter->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 825 826 INIT_DEBUGOUT("em_attach: end"); 827 828 return (0); 829 830 err_rx_struct: 831 em_free_transmit_structures(adapter); 832 err_tx_struct: 833 err_hw_init: 834 em_release_hw_control(adapter); 835 em_dma_free(adapter, &adapter->rxdma); 836 err_rx_desc: 837 em_dma_free(adapter, &adapter->txdma); 838 err_tx_desc: 839 err_pci: 840 em_free_pci_resources(adapter); 841 EM_TX_LOCK_DESTROY(adapter); 842 EM_RX_LOCK_DESTROY(adapter); 843 EM_CORE_LOCK_DESTROY(adapter); 844 845 return (error); 846 } 847 848 /********************************************************************* 849 * Device removal routine 850 * 851 * The detach entry point is called when the driver is being removed. 852 * This routine stops the adapter and deallocates all the resources 853 * that were allocated for driver operation. 854 * 855 * return 0 on success, positive on failure 856 *********************************************************************/ 857 858 static int 859 em_detach(device_t dev) 860 { 861 struct adapter *adapter = device_get_softc(dev); 862 struct ifnet *ifp = adapter->ifp; 863 864 INIT_DEBUGOUT("em_detach: begin"); 865 866 /* Make sure VLANS are not using driver */ 867 #if __FreeBSD_version >= 700000 868 if (adapter->ifp->if_vlantrunk != NULL) { 869 #else 870 if (adapter->ifp->if_nvlans != 0) { 871 #endif 872 device_printf(dev,"Vlan in use, detach first\n"); 873 return (EBUSY); 874 } 875 876 #ifdef DEVICE_POLLING 877 if (ifp->if_capenable & IFCAP_POLLING) 878 ether_poll_deregister(ifp); 879 #endif 880 881 EM_CORE_LOCK(adapter); 882 EM_TX_LOCK(adapter); 883 adapter->in_detach = 1; 884 em_stop(adapter); 885 e1000_phy_hw_reset(&adapter->hw); 886 887 em_release_manageability(adapter); 888 889 if (((adapter->hw.mac.type == e1000_82573) || 890 (adapter->hw.mac.type == e1000_82583) || 891 (adapter->hw.mac.type == e1000_ich8lan) || 892 (adapter->hw.mac.type == e1000_ich10lan) || 893 (adapter->hw.mac.type == e1000_ich9lan)) && 894 e1000_check_mng_mode(&adapter->hw)) 895 em_release_hw_control(adapter); 896 897 if (adapter->wol) { 898 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN); 899 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol); 900 em_enable_wakeup(dev); 901 } 902 903 EM_TX_UNLOCK(adapter); 904 EM_CORE_UNLOCK(adapter); 905 906 #if __FreeBSD_version >= 700029 907 /* Unregister VLAN events */ 908 if (adapter->vlan_attach != NULL) 909 EVENTHANDLER_DEREGISTER(vlan_config, adapter->vlan_attach); 910 if (adapter->vlan_detach != NULL) 911 EVENTHANDLER_DEREGISTER(vlan_unconfig, adapter->vlan_detach); 912 #endif 913 914 ether_ifdetach(adapter->ifp); 915 callout_drain(&adapter->timer); 916 callout_drain(&adapter->tx_fifo_timer); 917 918 em_free_pci_resources(adapter); 919 bus_generic_detach(dev); 920 if_free(ifp); 921 922 #if __FreeBSD_version >= 800000 923 drbr_free(adapter->br, M_DEVBUF); 924 #endif 925 em_free_transmit_structures(adapter); 926 em_free_receive_structures(adapter); 927 928 /* Free Transmit Descriptor ring */ 929 if (adapter->tx_desc_base) { 930 em_dma_free(adapter, &adapter->txdma); 931 adapter->tx_desc_base = NULL; 932 } 933 934 /* Free Receive Descriptor ring */ 935 if (adapter->rx_desc_base) { 936 em_dma_free(adapter, &adapter->rxdma); 937 adapter->rx_desc_base = NULL; 938 } 939 940 EM_TX_LOCK_DESTROY(adapter); 941 EM_RX_LOCK_DESTROY(adapter); 942 EM_CORE_LOCK_DESTROY(adapter); 943 944 return (0); 945 } 946 947 /********************************************************************* 948 * 949 * Shutdown entry point 950 * 951 **********************************************************************/ 952 953 static int 954 em_shutdown(device_t dev) 955 { 956 return em_suspend(dev); 957 } 958 959 /* 960 * Suspend/resume device methods. 961 */ 962 static int 963 em_suspend(device_t dev) 964 { 965 struct adapter *adapter = device_get_softc(dev); 966 967 EM_CORE_LOCK(adapter); 968 969 EM_TX_LOCK(adapter); 970 em_stop(adapter); 971 EM_TX_UNLOCK(adapter); 972 973 em_release_manageability(adapter); 974 975 if (((adapter->hw.mac.type == e1000_82573) || 976 (adapter->hw.mac.type == e1000_82583) || 977 (adapter->hw.mac.type == e1000_ich8lan) || 978 (adapter->hw.mac.type == e1000_ich10lan) || 979 (adapter->hw.mac.type == e1000_ich9lan)) && 980 e1000_check_mng_mode(&adapter->hw)) 981 em_release_hw_control(adapter); 982 983 if (adapter->wol) { 984 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN); 985 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol); 986 em_enable_wakeup(dev); 987 } 988 989 EM_CORE_UNLOCK(adapter); 990 991 return bus_generic_suspend(dev); 992 } 993 994 static int 995 em_resume(device_t dev) 996 { 997 struct adapter *adapter = device_get_softc(dev); 998 struct ifnet *ifp = adapter->ifp; 999 1000 EM_CORE_LOCK(adapter); 1001 em_init_locked(adapter); 1002 em_init_manageability(adapter); 1003 EM_CORE_UNLOCK(adapter); 1004 em_start(ifp); 1005 1006 return bus_generic_resume(dev); 1007 } 1008 1009 1010 /********************************************************************* 1011 * Transmit entry point 1012 * 1013 * em_start is called by the stack to initiate a transmit. 1014 * The driver will remain in this routine as long as there are 1015 * packets to transmit and transmit resources are available. 1016 * In case resources are not available stack is notified and 1017 * the packet is requeued. 1018 **********************************************************************/ 1019 1020 #if __FreeBSD_version >= 800000 1021 static int 1022 em_mq_start_locked(struct ifnet *ifp, struct mbuf *m) 1023 { 1024 struct adapter *adapter = ifp->if_softc; 1025 struct mbuf *next; 1026 int error = E1000_SUCCESS; 1027 1028 EM_TX_LOCK_ASSERT(adapter); 1029 /* To allow being called from a tasklet */ 1030 if (m == NULL) 1031 goto process; 1032 1033 if (((ifp->if_drv_flags & (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)) != 1034 IFF_DRV_RUNNING) 1035 || (!adapter->link_active)) { 1036 error = drbr_enqueue(ifp, adapter->br, m); 1037 return (error); 1038 } else if (drbr_empty(ifp, adapter->br) && 1039 (adapter->num_tx_desc_avail > EM_TX_OP_THRESHOLD)) { 1040 if (em_xmit(adapter, &m)) { 1041 if (m && (error = drbr_enqueue(ifp, adapter->br, m)) != 0) 1042 return (error); 1043 } else { 1044 /* 1045 * We've bypassed the buf ring so we need to update 1046 * ifp directly 1047 */ 1048 drbr_stats_update(ifp, m->m_pkthdr.len, m->m_flags); 1049 /* 1050 ** Send a copy of the frame to the BPF 1051 ** listener and set the watchdog on. 1052 */ 1053 ETHER_BPF_MTAP(ifp, m); 1054 adapter->watchdog_timer = EM_TX_TIMEOUT; 1055 } 1056 } else if ((error = drbr_enqueue(ifp, adapter->br, m)) != 0) 1057 return (error); 1058 1059 process: 1060 if (drbr_empty(ifp, adapter->br)) 1061 return(error); 1062 /* Process the queue */ 1063 while (TRUE) { 1064 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1065 break; 1066 next = drbr_dequeue(ifp, adapter->br); 1067 if (next == NULL) 1068 break; 1069 if (em_xmit(adapter, &next)) 1070 break; 1071 ETHER_BPF_MTAP(ifp, next); 1072 /* Set the watchdog */ 1073 adapter->watchdog_timer = EM_TX_TIMEOUT; 1074 } 1075 1076 if (adapter->num_tx_desc_avail <= EM_TX_OP_THRESHOLD) 1077 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1078 1079 return (0); 1080 } 1081 1082 /* 1083 ** Multiqueue capable stack interface, this is not 1084 ** yet truely multiqueue, but that is coming... 1085 */ 1086 static int 1087 em_mq_start(struct ifnet *ifp, struct mbuf *m) 1088 { 1089 1090 struct adapter *adapter = ifp->if_softc; 1091 int error = 0; 1092 1093 if (EM_TX_TRYLOCK(adapter)) { 1094 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1095 error = em_mq_start_locked(ifp, m); 1096 EM_TX_UNLOCK(adapter); 1097 } else 1098 error = drbr_enqueue(ifp, adapter->br, m); 1099 1100 return (error); 1101 } 1102 1103 static void 1104 em_qflush(struct ifnet *ifp) 1105 { 1106 struct mbuf *m; 1107 struct adapter *adapter = (struct adapter *)ifp->if_softc; 1108 1109 EM_TX_LOCK(adapter); 1110 while ((m = buf_ring_dequeue_sc(adapter->br)) != NULL) 1111 m_freem(m); 1112 if_qflush(ifp); 1113 EM_TX_UNLOCK(adapter); 1114 } 1115 #endif /* FreeBSD_version */ 1116 1117 static void 1118 em_start_locked(struct ifnet *ifp) 1119 { 1120 struct adapter *adapter = ifp->if_softc; 1121 struct mbuf *m_head; 1122 1123 EM_TX_LOCK_ASSERT(adapter); 1124 1125 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)) != 1126 IFF_DRV_RUNNING) 1127 return; 1128 if (!adapter->link_active) 1129 return; 1130 1131 while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) { 1132 1133 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); 1134 if (m_head == NULL) 1135 break; 1136 /* 1137 * Encapsulation can modify our pointer, and or make it 1138 * NULL on failure. In that event, we can't requeue. 1139 */ 1140 if (em_xmit(adapter, &m_head)) { 1141 if (m_head == NULL) 1142 break; 1143 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1144 IFQ_DRV_PREPEND(&ifp->if_snd, m_head); 1145 break; 1146 } 1147 1148 /* Send a copy of the frame to the BPF listener */ 1149 ETHER_BPF_MTAP(ifp, m_head); 1150 1151 /* Set timeout in case hardware has problems transmitting. */ 1152 adapter->watchdog_timer = EM_TX_TIMEOUT; 1153 } 1154 if (adapter->num_tx_desc_avail <= EM_TX_OP_THRESHOLD) 1155 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1156 1157 return; 1158 } 1159 1160 static void 1161 em_start(struct ifnet *ifp) 1162 { 1163 struct adapter *adapter = ifp->if_softc; 1164 1165 EM_TX_LOCK(adapter); 1166 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1167 em_start_locked(ifp); 1168 EM_TX_UNLOCK(adapter); 1169 } 1170 1171 /********************************************************************* 1172 * Ioctl entry point 1173 * 1174 * em_ioctl is called when the user wants to configure the 1175 * interface. 1176 * 1177 * return 0 on success, positive on failure 1178 **********************************************************************/ 1179 1180 static int 1181 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 1182 { 1183 struct adapter *adapter = ifp->if_softc; 1184 struct ifreq *ifr = (struct ifreq *)data; 1185 #ifdef INET 1186 struct ifaddr *ifa = (struct ifaddr *)data; 1187 #endif 1188 int error = 0; 1189 1190 if (adapter->in_detach) 1191 return (error); 1192 1193 switch (command) { 1194 case SIOCSIFADDR: 1195 #ifdef INET 1196 if (ifa->ifa_addr->sa_family == AF_INET) { 1197 /* 1198 * XXX 1199 * Since resetting hardware takes a very long time 1200 * and results in link renegotiation we only 1201 * initialize the hardware only when it is absolutely 1202 * required. 1203 */ 1204 ifp->if_flags |= IFF_UP; 1205 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1206 EM_CORE_LOCK(adapter); 1207 em_init_locked(adapter); 1208 EM_CORE_UNLOCK(adapter); 1209 } 1210 arp_ifinit(ifp, ifa); 1211 } else 1212 #endif 1213 error = ether_ioctl(ifp, command, data); 1214 break; 1215 case SIOCSIFMTU: 1216 { 1217 int max_frame_size; 1218 u16 eeprom_data = 0; 1219 1220 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFMTU (Set Interface MTU)"); 1221 1222 EM_CORE_LOCK(adapter); 1223 switch (adapter->hw.mac.type) { 1224 case e1000_82573: 1225 /* 1226 * 82573 only supports jumbo frames 1227 * if ASPM is disabled. 1228 */ 1229 e1000_read_nvm(&adapter->hw, 1230 NVM_INIT_3GIO_3, 1, &eeprom_data); 1231 if (eeprom_data & NVM_WORD1A_ASPM_MASK) { 1232 max_frame_size = ETHER_MAX_LEN; 1233 break; 1234 } 1235 /* Allow Jumbo frames - fall thru */ 1236 case e1000_82571: 1237 case e1000_82572: 1238 case e1000_ich9lan: 1239 case e1000_ich10lan: 1240 case e1000_82574: 1241 case e1000_80003es2lan: /* Limit Jumbo Frame size */ 1242 max_frame_size = 9234; 1243 break; 1244 /* Adapters that do not support jumbo frames */ 1245 case e1000_82542: 1246 case e1000_82583: 1247 case e1000_ich8lan: 1248 max_frame_size = ETHER_MAX_LEN; 1249 break; 1250 default: 1251 max_frame_size = MAX_JUMBO_FRAME_SIZE; 1252 } 1253 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN - 1254 ETHER_CRC_LEN) { 1255 EM_CORE_UNLOCK(adapter); 1256 error = EINVAL; 1257 break; 1258 } 1259 1260 ifp->if_mtu = ifr->ifr_mtu; 1261 adapter->max_frame_size = 1262 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 1263 em_init_locked(adapter); 1264 EM_CORE_UNLOCK(adapter); 1265 break; 1266 } 1267 case SIOCSIFFLAGS: 1268 IOCTL_DEBUGOUT("ioctl rcv'd:\ 1269 SIOCSIFFLAGS (Set Interface Flags)"); 1270 EM_CORE_LOCK(adapter); 1271 if (ifp->if_flags & IFF_UP) { 1272 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1273 if ((ifp->if_flags ^ adapter->if_flags) & 1274 (IFF_PROMISC | IFF_ALLMULTI)) { 1275 em_disable_promisc(adapter); 1276 em_set_promisc(adapter); 1277 } 1278 } else 1279 em_init_locked(adapter); 1280 } else 1281 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1282 EM_TX_LOCK(adapter); 1283 em_stop(adapter); 1284 EM_TX_UNLOCK(adapter); 1285 } 1286 adapter->if_flags = ifp->if_flags; 1287 EM_CORE_UNLOCK(adapter); 1288 break; 1289 case SIOCADDMULTI: 1290 case SIOCDELMULTI: 1291 IOCTL_DEBUGOUT("ioctl rcv'd: SIOC(ADD|DEL)MULTI"); 1292 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1293 EM_CORE_LOCK(adapter); 1294 em_disable_intr(adapter); 1295 em_set_multi(adapter); 1296 if (adapter->hw.mac.type == e1000_82542 && 1297 adapter->hw.revision_id == E1000_REVISION_2) { 1298 em_initialize_receive_unit(adapter); 1299 } 1300 #ifdef DEVICE_POLLING 1301 if (!(ifp->if_capenable & IFCAP_POLLING)) 1302 #endif 1303 em_enable_intr(adapter); 1304 EM_CORE_UNLOCK(adapter); 1305 } 1306 break; 1307 case SIOCSIFMEDIA: 1308 /* Check SOL/IDER usage */ 1309 EM_CORE_LOCK(adapter); 1310 if (e1000_check_reset_block(&adapter->hw)) { 1311 EM_CORE_UNLOCK(adapter); 1312 device_printf(adapter->dev, "Media change is" 1313 " blocked due to SOL/IDER session.\n"); 1314 break; 1315 } 1316 EM_CORE_UNLOCK(adapter); 1317 case SIOCGIFMEDIA: 1318 IOCTL_DEBUGOUT("ioctl rcv'd: \ 1319 SIOCxIFMEDIA (Get/Set Interface Media)"); 1320 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 1321 break; 1322 case SIOCSIFCAP: 1323 { 1324 int mask, reinit; 1325 1326 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFCAP (Set Capabilities)"); 1327 reinit = 0; 1328 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1329 #ifdef DEVICE_POLLING 1330 if (mask & IFCAP_POLLING) { 1331 if (ifr->ifr_reqcap & IFCAP_POLLING) { 1332 error = ether_poll_register(em_poll, ifp); 1333 if (error) 1334 return (error); 1335 EM_CORE_LOCK(adapter); 1336 em_disable_intr(adapter); 1337 ifp->if_capenable |= IFCAP_POLLING; 1338 EM_CORE_UNLOCK(adapter); 1339 } else { 1340 error = ether_poll_deregister(ifp); 1341 /* Enable interrupt even in error case */ 1342 EM_CORE_LOCK(adapter); 1343 em_enable_intr(adapter); 1344 ifp->if_capenable &= ~IFCAP_POLLING; 1345 EM_CORE_UNLOCK(adapter); 1346 } 1347 } 1348 #endif 1349 if (mask & IFCAP_HWCSUM) { 1350 ifp->if_capenable ^= IFCAP_HWCSUM; 1351 reinit = 1; 1352 } 1353 #if __FreeBSD_version >= 700000 1354 if (mask & IFCAP_TSO4) { 1355 ifp->if_capenable ^= IFCAP_TSO4; 1356 reinit = 1; 1357 } 1358 #endif 1359 1360 if (mask & IFCAP_VLAN_HWTAGGING) { 1361 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 1362 reinit = 1; 1363 } 1364 if (reinit && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 1365 em_init(adapter); 1366 #if __FreeBSD_version >= 700000 1367 VLAN_CAPABILITIES(ifp); 1368 #endif 1369 break; 1370 } 1371 1372 default: 1373 error = ether_ioctl(ifp, command, data); 1374 break; 1375 } 1376 1377 return (error); 1378 } 1379 1380 /********************************************************************* 1381 * Watchdog timer: 1382 * 1383 * This routine is called from the local timer every second. 1384 * As long as transmit descriptors are being cleaned the value 1385 * is non-zero and we do nothing. Reaching 0 indicates a tx hang 1386 * and we then reset the device. 1387 * 1388 **********************************************************************/ 1389 1390 static void 1391 em_watchdog(struct adapter *adapter) 1392 { 1393 1394 EM_CORE_LOCK_ASSERT(adapter); 1395 1396 /* 1397 ** The timer is set to 5 every time start queues a packet. 1398 ** Then txeof keeps resetting it as long as it cleans at 1399 ** least one descriptor. 1400 ** Finally, anytime all descriptors are clean the timer is 1401 ** set to 0. 1402 */ 1403 EM_TX_LOCK(adapter); 1404 if ((adapter->watchdog_timer == 0) || (--adapter->watchdog_timer)) { 1405 EM_TX_UNLOCK(adapter); 1406 return; 1407 } 1408 1409 /* If we are in this routine because of pause frames, then 1410 * don't reset the hardware. 1411 */ 1412 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) & 1413 E1000_STATUS_TXOFF) { 1414 adapter->watchdog_timer = EM_TX_TIMEOUT; 1415 EM_TX_UNLOCK(adapter); 1416 return; 1417 } 1418 1419 if (e1000_check_for_link(&adapter->hw) == 0) 1420 device_printf(adapter->dev, "watchdog timeout -- resetting\n"); 1421 adapter->ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1422 adapter->watchdog_events++; 1423 EM_TX_UNLOCK(adapter); 1424 1425 em_init_locked(adapter); 1426 } 1427 1428 /********************************************************************* 1429 * Init entry point 1430 * 1431 * This routine is used in two ways. It is used by the stack as 1432 * init entry point in network interface structure. It is also used 1433 * by the driver as a hw/sw initialization routine to get to a 1434 * consistent state. 1435 * 1436 * return 0 on success, positive on failure 1437 **********************************************************************/ 1438 1439 static void 1440 em_init_locked(struct adapter *adapter) 1441 { 1442 struct ifnet *ifp = adapter->ifp; 1443 device_t dev = adapter->dev; 1444 u32 pba; 1445 1446 INIT_DEBUGOUT("em_init: begin"); 1447 1448 EM_CORE_LOCK_ASSERT(adapter); 1449 1450 EM_TX_LOCK(adapter); 1451 em_stop(adapter); 1452 EM_TX_UNLOCK(adapter); 1453 1454 /* 1455 * Packet Buffer Allocation (PBA) 1456 * Writing PBA sets the receive portion of the buffer 1457 * the remainder is used for the transmit buffer. 1458 * 1459 * Devices before the 82547 had a Packet Buffer of 64K. 1460 * Default allocation: PBA=48K for Rx, leaving 16K for Tx. 1461 * After the 82547 the buffer was reduced to 40K. 1462 * Default allocation: PBA=30K for Rx, leaving 10K for Tx. 1463 * Note: default does not leave enough room for Jumbo Frame >10k. 1464 */ 1465 switch (adapter->hw.mac.type) { 1466 case e1000_82547: 1467 case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */ 1468 if (adapter->max_frame_size > 8192) 1469 pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */ 1470 else 1471 pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */ 1472 adapter->tx_fifo_head = 0; 1473 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT; 1474 adapter->tx_fifo_size = 1475 (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT; 1476 break; 1477 /* Total Packet Buffer on these is 48K */ 1478 case e1000_82571: 1479 case e1000_82572: 1480 case e1000_80003es2lan: 1481 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */ 1482 break; 1483 case e1000_82573: /* 82573: Total Packet Buffer is 32K */ 1484 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */ 1485 break; 1486 case e1000_82574: 1487 case e1000_82583: 1488 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */ 1489 break; 1490 case e1000_ich9lan: 1491 case e1000_ich10lan: 1492 case e1000_ich8lan: 1493 pba = E1000_PBA_8K; 1494 break; 1495 default: 1496 /* Devices before 82547 had a Packet Buffer of 64K. */ 1497 if (adapter->max_frame_size > 8192) 1498 pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */ 1499 else 1500 pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */ 1501 } 1502 1503 INIT_DEBUGOUT1("em_init: pba=%dK",pba); 1504 E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba); 1505 1506 /* Get the latest mac address, User can use a LAA */ 1507 bcopy(IF_LLADDR(adapter->ifp), adapter->hw.mac.addr, 1508 ETHER_ADDR_LEN); 1509 1510 /* Put the address into the Receive Address Array */ 1511 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 1512 1513 /* 1514 * With the 82571 adapter, RAR[0] may be overwritten 1515 * when the other port is reset, we make a duplicate 1516 * in RAR[14] for that eventuality, this assures 1517 * the interface continues to function. 1518 */ 1519 if (adapter->hw.mac.type == e1000_82571) { 1520 e1000_set_laa_state_82571(&adapter->hw, TRUE); 1521 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 1522 E1000_RAR_ENTRIES - 1); 1523 } 1524 1525 /* Initialize the hardware */ 1526 if (em_hardware_init(adapter)) { 1527 device_printf(dev, "Unable to initialize the hardware\n"); 1528 return; 1529 } 1530 em_update_link_status(adapter); 1531 1532 /* Setup VLAN support, basic and offload if available */ 1533 E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN); 1534 1535 #if __FreeBSD_version < 700029 1536 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) { 1537 u32 ctrl; 1538 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL); 1539 ctrl |= E1000_CTRL_VME; 1540 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl); 1541 } 1542 #else 1543 /* Use real VLAN Filter support */ 1544 em_setup_vlan_hw_support(adapter); 1545 #endif 1546 1547 /* Set hardware offload abilities */ 1548 ifp->if_hwassist = 0; 1549 if (adapter->hw.mac.type >= e1000_82543) { 1550 if (ifp->if_capenable & IFCAP_TXCSUM) 1551 ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP); 1552 #if __FreeBSD_version >= 700000 1553 if (ifp->if_capenable & IFCAP_TSO4) 1554 ifp->if_hwassist |= CSUM_TSO; 1555 #endif 1556 } 1557 1558 /* Configure for OS presence */ 1559 em_init_manageability(adapter); 1560 1561 /* Prepare transmit descriptors and buffers */ 1562 em_setup_transmit_structures(adapter); 1563 em_initialize_transmit_unit(adapter); 1564 1565 /* Setup Multicast table */ 1566 em_set_multi(adapter); 1567 1568 /* Prepare receive descriptors and buffers */ 1569 if (em_setup_receive_structures(adapter)) { 1570 device_printf(dev, "Could not setup receive structures\n"); 1571 EM_TX_LOCK(adapter); 1572 em_stop(adapter); 1573 EM_TX_UNLOCK(adapter); 1574 return; 1575 } 1576 em_initialize_receive_unit(adapter); 1577 1578 /* Don't lose promiscuous settings */ 1579 em_set_promisc(adapter); 1580 1581 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1582 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1583 1584 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 1585 e1000_clear_hw_cntrs_base_generic(&adapter->hw); 1586 1587 /* MSI/X configuration for 82574 */ 1588 if (adapter->hw.mac.type == e1000_82574) { 1589 int tmp; 1590 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT); 1591 tmp |= E1000_CTRL_EXT_PBA_CLR; 1592 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp); 1593 /* 1594 ** Set the IVAR - interrupt vector routing. 1595 ** Each nibble represents a vector, high bit 1596 ** is enable, other 3 bits are the MSIX table 1597 ** entry, we map RXQ0 to 0, TXQ0 to 1, and 1598 ** Link (other) to 2, hence the magic number. 1599 */ 1600 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908); 1601 } 1602 1603 #ifdef DEVICE_POLLING 1604 /* 1605 * Only enable interrupts if we are not polling, make sure 1606 * they are off otherwise. 1607 */ 1608 if (ifp->if_capenable & IFCAP_POLLING) 1609 em_disable_intr(adapter); 1610 else 1611 #endif /* DEVICE_POLLING */ 1612 em_enable_intr(adapter); 1613 1614 /* Don't reset the phy next time init gets called */ 1615 adapter->hw.phy.reset_disable = TRUE; 1616 } 1617 1618 static void 1619 em_init(void *arg) 1620 { 1621 struct adapter *adapter = arg; 1622 1623 EM_CORE_LOCK(adapter); 1624 em_init_locked(adapter); 1625 EM_CORE_UNLOCK(adapter); 1626 } 1627 1628 1629 #ifdef DEVICE_POLLING 1630 /********************************************************************* 1631 * 1632 * Legacy polling routine 1633 * 1634 *********************************************************************/ 1635 static int 1636 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) 1637 { 1638 struct adapter *adapter = ifp->if_softc; 1639 u32 reg_icr, rx_done = 0; 1640 1641 EM_CORE_LOCK(adapter); 1642 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1643 EM_CORE_UNLOCK(adapter); 1644 return (rx_done); 1645 } 1646 1647 if (cmd == POLL_AND_CHECK_STATUS) { 1648 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR); 1649 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 1650 callout_stop(&adapter->timer); 1651 adapter->hw.mac.get_link_status = 1; 1652 em_update_link_status(adapter); 1653 callout_reset(&adapter->timer, hz, 1654 em_local_timer, adapter); 1655 } 1656 } 1657 EM_CORE_UNLOCK(adapter); 1658 1659 rx_done = em_rxeof(adapter, count); 1660 1661 EM_TX_LOCK(adapter); 1662 em_txeof(adapter); 1663 #if __FreeBSD_version >= 800000 1664 if (!drbr_empty(ifp, adapter->br)) 1665 em_mq_start_locked(ifp, NULL); 1666 #else 1667 if (!IFQ_DRV_IS_EMPTY(&ifp->snd)) 1668 em_start_locked(ifp); 1669 #endif 1670 EM_TX_UNLOCK(adapter); 1671 return (rx_done); 1672 } 1673 #endif /* DEVICE_POLLING */ 1674 1675 #ifdef EM_LEGACY_IRQ 1676 /********************************************************************* 1677 * 1678 * Legacy Interrupt Service routine 1679 * 1680 *********************************************************************/ 1681 1682 static void 1683 em_intr(void *arg) 1684 { 1685 struct adapter *adapter = arg; 1686 struct ifnet *ifp = adapter->ifp; 1687 u32 reg_icr; 1688 1689 1690 if (ifp->if_capenable & IFCAP_POLLING) 1691 return; 1692 1693 EM_CORE_LOCK(adapter); 1694 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR); 1695 if (reg_icr & E1000_ICR_RXO) 1696 adapter->rx_overruns++; 1697 if ((reg_icr == 0xffffffff) || (reg_icr == 0)|| 1698 (adapter->hw.mac.type >= e1000_82571 && 1699 (reg_icr & E1000_ICR_INT_ASSERTED) == 0)) 1700 goto out; 1701 1702 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1703 goto out; 1704 1705 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 1706 callout_stop(&adapter->timer); 1707 adapter->hw.mac.get_link_status = 1; 1708 em_update_link_status(adapter); 1709 /* Deal with TX cruft when link lost */ 1710 em_tx_purge(adapter); 1711 callout_reset(&adapter->timer, hz, 1712 em_local_timer, adapter); 1713 goto out; 1714 } 1715 1716 EM_TX_LOCK(adapter); 1717 em_txeof(adapter); 1718 em_rxeof(adapter, -1); 1719 em_txeof(adapter); 1720 if (ifp->if_drv_flags & IFF_DRV_RUNNING && 1721 !IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1722 em_start_locked(ifp); 1723 EM_TX_UNLOCK(adapter); 1724 1725 out: 1726 EM_CORE_UNLOCK(adapter); 1727 return; 1728 } 1729 1730 #else /* EM_FAST_IRQ, then fast interrupt routines only */ 1731 1732 static void 1733 em_handle_link(void *context, int pending) 1734 { 1735 struct adapter *adapter = context; 1736 struct ifnet *ifp = adapter->ifp; 1737 1738 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1739 return; 1740 1741 EM_CORE_LOCK(adapter); 1742 callout_stop(&adapter->timer); 1743 em_update_link_status(adapter); 1744 /* Deal with TX cruft when link lost */ 1745 em_tx_purge(adapter); 1746 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 1747 EM_CORE_UNLOCK(adapter); 1748 } 1749 1750 1751 /* Combined RX/TX handler, used by Legacy and MSI */ 1752 static void 1753 em_handle_rxtx(void *context, int pending) 1754 { 1755 struct adapter *adapter = context; 1756 struct ifnet *ifp = adapter->ifp; 1757 1758 1759 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1760 if (em_rxeof(adapter, adapter->rx_process_limit) != 0) 1761 taskqueue_enqueue(adapter->tq, &adapter->rxtx_task); 1762 EM_TX_LOCK(adapter); 1763 em_txeof(adapter); 1764 1765 #if __FreeBSD_version >= 800000 1766 if (!drbr_empty(ifp, adapter->br)) 1767 em_mq_start_locked(ifp, NULL); 1768 #else 1769 if (!IFQ_DRV_IS_EMPTY(&ifp->snd)) 1770 em_start_locked(ifp); 1771 #endif 1772 EM_TX_UNLOCK(adapter); 1773 } 1774 1775 em_enable_intr(adapter); 1776 } 1777 1778 /********************************************************************* 1779 * 1780 * Fast Legacy/MSI Combined Interrupt Service routine 1781 * 1782 *********************************************************************/ 1783 #if __FreeBSD_version < 700000 1784 #define FILTER_STRAY 1785 #define FILTER_HANDLED 1786 static void 1787 #else 1788 static int 1789 #endif 1790 em_irq_fast(void *arg) 1791 { 1792 struct adapter *adapter = arg; 1793 struct ifnet *ifp; 1794 u32 reg_icr; 1795 1796 ifp = adapter->ifp; 1797 1798 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR); 1799 1800 /* Hot eject? */ 1801 if (reg_icr == 0xffffffff) 1802 return FILTER_STRAY; 1803 1804 /* Definitely not our interrupt. */ 1805 if (reg_icr == 0x0) 1806 return FILTER_STRAY; 1807 1808 /* 1809 * Starting with the 82571 chip, bit 31 should be used to 1810 * determine whether the interrupt belongs to us. 1811 */ 1812 if (adapter->hw.mac.type >= e1000_82571 && 1813 (reg_icr & E1000_ICR_INT_ASSERTED) == 0) 1814 return FILTER_STRAY; 1815 1816 /* 1817 * Mask interrupts until the taskqueue is finished running. This is 1818 * cheap, just assume that it is needed. This also works around the 1819 * MSI message reordering errata on certain systems. 1820 */ 1821 em_disable_intr(adapter); 1822 taskqueue_enqueue(adapter->tq, &adapter->rxtx_task); 1823 1824 /* Link status change */ 1825 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 1826 adapter->hw.mac.get_link_status = 1; 1827 taskqueue_enqueue(taskqueue_fast, &adapter->link_task); 1828 } 1829 1830 if (reg_icr & E1000_ICR_RXO) 1831 adapter->rx_overruns++; 1832 return FILTER_HANDLED; 1833 } 1834 1835 /********************************************************************* 1836 * 1837 * MSIX Interrupt Service Routines 1838 * 1839 **********************************************************************/ 1840 #define EM_MSIX_TX 0x00040000 1841 #define EM_MSIX_RX 0x00010000 1842 #define EM_MSIX_LINK 0x00100000 1843 1844 static void 1845 em_msix_tx(void *arg) 1846 { 1847 struct adapter *adapter = arg; 1848 struct ifnet *ifp = adapter->ifp; 1849 1850 ++adapter->tx_irq; 1851 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1852 EM_TX_LOCK(adapter); 1853 em_txeof(adapter); 1854 EM_TX_UNLOCK(adapter); 1855 taskqueue_enqueue(adapter->tq, &adapter->tx_task); 1856 } 1857 /* Reenable this interrupt */ 1858 E1000_WRITE_REG(&adapter->hw, E1000_IMS, EM_MSIX_TX); 1859 return; 1860 } 1861 1862 /********************************************************************* 1863 * 1864 * MSIX RX Interrupt Service routine 1865 * 1866 **********************************************************************/ 1867 1868 static void 1869 em_msix_rx(void *arg) 1870 { 1871 struct adapter *adapter = arg; 1872 struct ifnet *ifp = adapter->ifp; 1873 1874 ++adapter->rx_irq; 1875 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && 1876 (em_rxeof(adapter, adapter->rx_process_limit) != 0)) 1877 taskqueue_enqueue(adapter->tq, &adapter->rx_task); 1878 /* Reenable this interrupt */ 1879 E1000_WRITE_REG(&adapter->hw, E1000_IMS, EM_MSIX_RX); 1880 return; 1881 } 1882 1883 /********************************************************************* 1884 * 1885 * MSIX Link Fast Interrupt Service routine 1886 * 1887 **********************************************************************/ 1888 1889 static void 1890 em_msix_link(void *arg) 1891 { 1892 struct adapter *adapter = arg; 1893 u32 reg_icr; 1894 1895 ++adapter->link_irq; 1896 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR); 1897 1898 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 1899 adapter->hw.mac.get_link_status = 1; 1900 taskqueue_enqueue(taskqueue_fast, &adapter->link_task); 1901 } 1902 E1000_WRITE_REG(&adapter->hw, E1000_IMS, 1903 EM_MSIX_LINK | E1000_IMS_LSC); 1904 return; 1905 } 1906 1907 static void 1908 em_handle_rx(void *context, int pending) 1909 { 1910 struct adapter *adapter = context; 1911 struct ifnet *ifp = adapter->ifp; 1912 1913 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && 1914 (em_rxeof(adapter, adapter->rx_process_limit) != 0)) 1915 taskqueue_enqueue(adapter->tq, &adapter->rx_task); 1916 1917 } 1918 1919 static void 1920 em_handle_tx(void *context, int pending) 1921 { 1922 struct adapter *adapter = context; 1923 struct ifnet *ifp = adapter->ifp; 1924 1925 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1926 if (!EM_TX_TRYLOCK(adapter)) 1927 return; 1928 em_txeof(adapter); 1929 #if __FreeBSD_version >= 800000 1930 if (!drbr_empty(ifp, adapter->br)) 1931 em_mq_start_locked(ifp, NULL); 1932 #else 1933 if (!IFQ_DRV_IS_EMPTY(&ifp->snd)) 1934 em_start_locked(ifp); 1935 #endif 1936 EM_TX_UNLOCK(adapter); 1937 } 1938 } 1939 #endif /* EM_FAST_IRQ */ 1940 1941 /********************************************************************* 1942 * 1943 * Media Ioctl callback 1944 * 1945 * This routine is called whenever the user queries the status of 1946 * the interface using ifconfig. 1947 * 1948 **********************************************************************/ 1949 static void 1950 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 1951 { 1952 struct adapter *adapter = ifp->if_softc; 1953 u_char fiber_type = IFM_1000_SX; 1954 1955 INIT_DEBUGOUT("em_media_status: begin"); 1956 1957 EM_CORE_LOCK(adapter); 1958 em_update_link_status(adapter); 1959 1960 ifmr->ifm_status = IFM_AVALID; 1961 ifmr->ifm_active = IFM_ETHER; 1962 1963 if (!adapter->link_active) { 1964 EM_CORE_UNLOCK(adapter); 1965 return; 1966 } 1967 1968 ifmr->ifm_status |= IFM_ACTIVE; 1969 1970 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) || 1971 (adapter->hw.phy.media_type == e1000_media_type_internal_serdes)) { 1972 if (adapter->hw.mac.type == e1000_82545) 1973 fiber_type = IFM_1000_LX; 1974 ifmr->ifm_active |= fiber_type | IFM_FDX; 1975 } else { 1976 switch (adapter->link_speed) { 1977 case 10: 1978 ifmr->ifm_active |= IFM_10_T; 1979 break; 1980 case 100: 1981 ifmr->ifm_active |= IFM_100_TX; 1982 break; 1983 case 1000: 1984 ifmr->ifm_active |= IFM_1000_T; 1985 break; 1986 } 1987 if (adapter->link_duplex == FULL_DUPLEX) 1988 ifmr->ifm_active |= IFM_FDX; 1989 else 1990 ifmr->ifm_active |= IFM_HDX; 1991 } 1992 EM_CORE_UNLOCK(adapter); 1993 } 1994 1995 /********************************************************************* 1996 * 1997 * Media Ioctl callback 1998 * 1999 * This routine is called when the user changes speed/duplex using 2000 * media/mediopt option with ifconfig. 2001 * 2002 **********************************************************************/ 2003 static int 2004 em_media_change(struct ifnet *ifp) 2005 { 2006 struct adapter *adapter = ifp->if_softc; 2007 struct ifmedia *ifm = &adapter->media; 2008 2009 INIT_DEBUGOUT("em_media_change: begin"); 2010 2011 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 2012 return (EINVAL); 2013 2014 EM_CORE_LOCK(adapter); 2015 switch (IFM_SUBTYPE(ifm->ifm_media)) { 2016 case IFM_AUTO: 2017 adapter->hw.mac.autoneg = DO_AUTO_NEG; 2018 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT; 2019 break; 2020 case IFM_1000_LX: 2021 case IFM_1000_SX: 2022 case IFM_1000_T: 2023 adapter->hw.mac.autoneg = DO_AUTO_NEG; 2024 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL; 2025 break; 2026 case IFM_100_TX: 2027 adapter->hw.mac.autoneg = FALSE; 2028 adapter->hw.phy.autoneg_advertised = 0; 2029 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 2030 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL; 2031 else 2032 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF; 2033 break; 2034 case IFM_10_T: 2035 adapter->hw.mac.autoneg = FALSE; 2036 adapter->hw.phy.autoneg_advertised = 0; 2037 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 2038 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL; 2039 else 2040 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF; 2041 break; 2042 default: 2043 device_printf(adapter->dev, "Unsupported media type\n"); 2044 } 2045 2046 /* As the speed/duplex settings my have changed we need to 2047 * reset the PHY. 2048 */ 2049 adapter->hw.phy.reset_disable = FALSE; 2050 2051 em_init_locked(adapter); 2052 EM_CORE_UNLOCK(adapter); 2053 2054 return (0); 2055 } 2056 2057 /********************************************************************* 2058 * 2059 * This routine maps the mbufs to tx descriptors. 2060 * 2061 * return 0 on success, positive on failure 2062 **********************************************************************/ 2063 2064 static int 2065 em_xmit(struct adapter *adapter, struct mbuf **m_headp) 2066 { 2067 bus_dma_segment_t segs[EM_MAX_SCATTER]; 2068 bus_dmamap_t map; 2069 struct em_buffer *tx_buffer, *tx_buffer_mapped; 2070 struct e1000_tx_desc *ctxd = NULL; 2071 struct mbuf *m_head; 2072 u32 txd_upper, txd_lower, txd_used, txd_saved; 2073 int nsegs, i, j, first, last = 0; 2074 int error, do_tso, tso_desc = 0; 2075 #if __FreeBSD_version < 700000 2076 struct m_tag *mtag; 2077 #endif 2078 m_head = *m_headp; 2079 txd_upper = txd_lower = txd_used = txd_saved = 0; 2080 2081 #if __FreeBSD_version >= 700000 2082 do_tso = ((m_head->m_pkthdr.csum_flags & CSUM_TSO) != 0); 2083 #else 2084 do_tso = 0; 2085 #endif 2086 2087 /* 2088 * Force a cleanup if number of TX descriptors 2089 * available hits the threshold 2090 */ 2091 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) { 2092 em_txeof(adapter); 2093 /* Now do we at least have a minimal? */ 2094 if (adapter->num_tx_desc_avail <= EM_TX_OP_THRESHOLD) { 2095 adapter->no_tx_desc_avail1++; 2096 return (ENOBUFS); 2097 } 2098 } 2099 2100 2101 /* 2102 * TSO workaround: 2103 * If an mbuf is only header we need 2104 * to pull 4 bytes of data into it. 2105 */ 2106 if (do_tso && (m_head->m_len <= M_TSO_LEN)) { 2107 m_head = m_pullup(m_head, M_TSO_LEN + 4); 2108 *m_headp = m_head; 2109 if (m_head == NULL) 2110 return (ENOBUFS); 2111 } 2112 2113 /* 2114 * Map the packet for DMA 2115 * 2116 * Capture the first descriptor index, 2117 * this descriptor will have the index 2118 * of the EOP which is the only one that 2119 * now gets a DONE bit writeback. 2120 */ 2121 first = adapter->next_avail_tx_desc; 2122 tx_buffer = &adapter->tx_buffer_area[first]; 2123 tx_buffer_mapped = tx_buffer; 2124 map = tx_buffer->map; 2125 2126 error = bus_dmamap_load_mbuf_sg(adapter->txtag, map, 2127 *m_headp, segs, &nsegs, BUS_DMA_NOWAIT); 2128 2129 /* 2130 * There are two types of errors we can (try) to handle: 2131 * - EFBIG means the mbuf chain was too long and bus_dma ran 2132 * out of segments. Defragment the mbuf chain and try again. 2133 * - ENOMEM means bus_dma could not obtain enough bounce buffers 2134 * at this point in time. Defer sending and try again later. 2135 * All other errors, in particular EINVAL, are fatal and prevent the 2136 * mbuf chain from ever going through. Drop it and report error. 2137 */ 2138 if (error == EFBIG) { 2139 struct mbuf *m; 2140 2141 m = m_defrag(*m_headp, M_DONTWAIT); 2142 if (m == NULL) { 2143 adapter->mbuf_alloc_failed++; 2144 m_freem(*m_headp); 2145 *m_headp = NULL; 2146 return (ENOBUFS); 2147 } 2148 *m_headp = m; 2149 2150 /* Try it again */ 2151 error = bus_dmamap_load_mbuf_sg(adapter->txtag, map, 2152 *m_headp, segs, &nsegs, BUS_DMA_NOWAIT); 2153 2154 if (error) { 2155 adapter->no_tx_dma_setup++; 2156 m_freem(*m_headp); 2157 *m_headp = NULL; 2158 return (error); 2159 } 2160 } else if (error != 0) { 2161 adapter->no_tx_dma_setup++; 2162 return (error); 2163 } 2164 2165 /* 2166 * TSO Hardware workaround, if this packet is not 2167 * TSO, and is only a single descriptor long, and 2168 * it follows a TSO burst, then we need to add a 2169 * sentinel descriptor to prevent premature writeback. 2170 */ 2171 if ((do_tso == 0) && (adapter->tx_tso == TRUE)) { 2172 if (nsegs == 1) 2173 tso_desc = TRUE; 2174 adapter->tx_tso = FALSE; 2175 } 2176 2177 if (nsegs > (adapter->num_tx_desc_avail - 2)) { 2178 adapter->no_tx_desc_avail2++; 2179 bus_dmamap_unload(adapter->txtag, map); 2180 return (ENOBUFS); 2181 } 2182 m_head = *m_headp; 2183 2184 /* Do hardware assists */ 2185 #if __FreeBSD_version >= 700000 2186 if (m_head->m_pkthdr.csum_flags & CSUM_TSO) { 2187 error = em_tso_setup(adapter, m_head, &txd_upper, &txd_lower); 2188 if (error != TRUE) 2189 return (ENXIO); /* something foobar */ 2190 /* we need to make a final sentinel transmit desc */ 2191 tso_desc = TRUE; 2192 } else 2193 #endif 2194 if (m_head->m_pkthdr.csum_flags & CSUM_OFFLOAD) 2195 em_transmit_checksum_setup(adapter, m_head, 2196 &txd_upper, &txd_lower); 2197 2198 i = adapter->next_avail_tx_desc; 2199 if (adapter->pcix_82544) 2200 txd_saved = i; 2201 2202 /* Set up our transmit descriptors */ 2203 for (j = 0; j < nsegs; j++) { 2204 bus_size_t seg_len; 2205 bus_addr_t seg_addr; 2206 /* If adapter is 82544 and on PCIX bus */ 2207 if(adapter->pcix_82544) { 2208 DESC_ARRAY desc_array; 2209 u32 array_elements, counter; 2210 /* 2211 * Check the Address and Length combination and 2212 * split the data accordingly 2213 */ 2214 array_elements = em_fill_descriptors(segs[j].ds_addr, 2215 segs[j].ds_len, &desc_array); 2216 for (counter = 0; counter < array_elements; counter++) { 2217 if (txd_used == adapter->num_tx_desc_avail) { 2218 adapter->next_avail_tx_desc = txd_saved; 2219 adapter->no_tx_desc_avail2++; 2220 bus_dmamap_unload(adapter->txtag, map); 2221 return (ENOBUFS); 2222 } 2223 tx_buffer = &adapter->tx_buffer_area[i]; 2224 ctxd = &adapter->tx_desc_base[i]; 2225 ctxd->buffer_addr = htole64( 2226 desc_array.descriptor[counter].address); 2227 ctxd->lower.data = htole32( 2228 (adapter->txd_cmd | txd_lower | (u16) 2229 desc_array.descriptor[counter].length)); 2230 ctxd->upper.data = 2231 htole32((txd_upper)); 2232 last = i; 2233 if (++i == adapter->num_tx_desc) 2234 i = 0; 2235 tx_buffer->m_head = NULL; 2236 tx_buffer->next_eop = -1; 2237 txd_used++; 2238 } 2239 } else { 2240 tx_buffer = &adapter->tx_buffer_area[i]; 2241 ctxd = &adapter->tx_desc_base[i]; 2242 seg_addr = segs[j].ds_addr; 2243 seg_len = segs[j].ds_len; 2244 /* 2245 ** TSO Workaround: 2246 ** If this is the last descriptor, we want to 2247 ** split it so we have a small final sentinel 2248 */ 2249 if (tso_desc && (j == (nsegs -1)) && (seg_len > 8)) { 2250 seg_len -= 4; 2251 ctxd->buffer_addr = htole64(seg_addr); 2252 ctxd->lower.data = htole32( 2253 adapter->txd_cmd | txd_lower | seg_len); 2254 ctxd->upper.data = 2255 htole32(txd_upper); 2256 if (++i == adapter->num_tx_desc) 2257 i = 0; 2258 /* Now make the sentinel */ 2259 ++txd_used; /* using an extra txd */ 2260 ctxd = &adapter->tx_desc_base[i]; 2261 tx_buffer = &adapter->tx_buffer_area[i]; 2262 ctxd->buffer_addr = 2263 htole64(seg_addr + seg_len); 2264 ctxd->lower.data = htole32( 2265 adapter->txd_cmd | txd_lower | 4); 2266 ctxd->upper.data = 2267 htole32(txd_upper); 2268 last = i; 2269 if (++i == adapter->num_tx_desc) 2270 i = 0; 2271 } else { 2272 ctxd->buffer_addr = htole64(seg_addr); 2273 ctxd->lower.data = htole32( 2274 adapter->txd_cmd | txd_lower | seg_len); 2275 ctxd->upper.data = 2276 htole32(txd_upper); 2277 last = i; 2278 if (++i == adapter->num_tx_desc) 2279 i = 0; 2280 } 2281 tx_buffer->m_head = NULL; 2282 tx_buffer->next_eop = -1; 2283 } 2284 } 2285 2286 adapter->next_avail_tx_desc = i; 2287 if (adapter->pcix_82544) 2288 adapter->num_tx_desc_avail -= txd_used; 2289 else { 2290 adapter->num_tx_desc_avail -= nsegs; 2291 if (tso_desc) /* TSO used an extra for sentinel */ 2292 adapter->num_tx_desc_avail -= txd_used; 2293 } 2294 2295 /* 2296 ** Handle VLAN tag, this is the 2297 ** biggest difference between 2298 ** 6.x and 7 2299 */ 2300 #if __FreeBSD_version < 700000 2301 /* Find out if we are in vlan mode. */ 2302 mtag = VLAN_OUTPUT_TAG(ifp, m_head); 2303 if (mtag != NULL) { 2304 ctxd->upper.fields.special = 2305 htole16(VLAN_TAG_VALUE(mtag)); 2306 #else /* FreeBSD 7 */ 2307 if (m_head->m_flags & M_VLANTAG) { 2308 /* Set the vlan id. */ 2309 ctxd->upper.fields.special = 2310 htole16(m_head->m_pkthdr.ether_vtag); 2311 #endif 2312 /* Tell hardware to add tag */ 2313 ctxd->lower.data |= htole32(E1000_TXD_CMD_VLE); 2314 } 2315 2316 tx_buffer->m_head = m_head; 2317 tx_buffer_mapped->map = tx_buffer->map; 2318 tx_buffer->map = map; 2319 bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE); 2320 2321 /* 2322 * Last Descriptor of Packet 2323 * needs End Of Packet (EOP) 2324 * and Report Status (RS) 2325 */ 2326 ctxd->lower.data |= 2327 htole32(E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS); 2328 /* 2329 * Keep track in the first buffer which 2330 * descriptor will be written back 2331 */ 2332 tx_buffer = &adapter->tx_buffer_area[first]; 2333 tx_buffer->next_eop = last; 2334 2335 /* 2336 * Advance the Transmit Descriptor Tail (TDT), this tells the E1000 2337 * that this frame is available to transmit. 2338 */ 2339 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 2340 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2341 if (adapter->hw.mac.type == e1000_82547 && 2342 adapter->link_duplex == HALF_DUPLEX) 2343 em_82547_move_tail(adapter); 2344 else { 2345 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i); 2346 if (adapter->hw.mac.type == e1000_82547) 2347 em_82547_update_fifo_head(adapter, 2348 m_head->m_pkthdr.len); 2349 } 2350 2351 return (0); 2352 } 2353 2354 /********************************************************************* 2355 * 2356 * 82547 workaround to avoid controller hang in half-duplex environment. 2357 * The workaround is to avoid queuing a large packet that would span 2358 * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers 2359 * in this case. We do that only when FIFO is quiescent. 2360 * 2361 **********************************************************************/ 2362 static void 2363 em_82547_move_tail(void *arg) 2364 { 2365 struct adapter *adapter = arg; 2366 struct e1000_tx_desc *tx_desc; 2367 u16 hw_tdt, sw_tdt, length = 0; 2368 bool eop = 0; 2369 2370 EM_TX_LOCK_ASSERT(adapter); 2371 2372 hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0)); 2373 sw_tdt = adapter->next_avail_tx_desc; 2374 2375 while (hw_tdt != sw_tdt) { 2376 tx_desc = &adapter->tx_desc_base[hw_tdt]; 2377 length += tx_desc->lower.flags.length; 2378 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP; 2379 if (++hw_tdt == adapter->num_tx_desc) 2380 hw_tdt = 0; 2381 2382 if (eop) { 2383 if (em_82547_fifo_workaround(adapter, length)) { 2384 adapter->tx_fifo_wrk_cnt++; 2385 callout_reset(&adapter->tx_fifo_timer, 1, 2386 em_82547_move_tail, adapter); 2387 break; 2388 } 2389 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt); 2390 em_82547_update_fifo_head(adapter, length); 2391 length = 0; 2392 } 2393 } 2394 } 2395 2396 static int 2397 em_82547_fifo_workaround(struct adapter *adapter, int len) 2398 { 2399 int fifo_space, fifo_pkt_len; 2400 2401 fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR); 2402 2403 if (adapter->link_duplex == HALF_DUPLEX) { 2404 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; 2405 2406 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) { 2407 if (em_82547_tx_fifo_reset(adapter)) 2408 return (0); 2409 else 2410 return (1); 2411 } 2412 } 2413 2414 return (0); 2415 } 2416 2417 static void 2418 em_82547_update_fifo_head(struct adapter *adapter, int len) 2419 { 2420 int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR); 2421 2422 /* tx_fifo_head is always 16 byte aligned */ 2423 adapter->tx_fifo_head += fifo_pkt_len; 2424 if (adapter->tx_fifo_head >= adapter->tx_fifo_size) { 2425 adapter->tx_fifo_head -= adapter->tx_fifo_size; 2426 } 2427 } 2428 2429 2430 static int 2431 em_82547_tx_fifo_reset(struct adapter *adapter) 2432 { 2433 u32 tctl; 2434 2435 if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) == 2436 E1000_READ_REG(&adapter->hw, E1000_TDH(0))) && 2437 (E1000_READ_REG(&adapter->hw, E1000_TDFT) == 2438 E1000_READ_REG(&adapter->hw, E1000_TDFH)) && 2439 (E1000_READ_REG(&adapter->hw, E1000_TDFTS) == 2440 E1000_READ_REG(&adapter->hw, E1000_TDFHS)) && 2441 (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) { 2442 /* Disable TX unit */ 2443 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL); 2444 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, 2445 tctl & ~E1000_TCTL_EN); 2446 2447 /* Reset FIFO pointers */ 2448 E1000_WRITE_REG(&adapter->hw, E1000_TDFT, 2449 adapter->tx_head_addr); 2450 E1000_WRITE_REG(&adapter->hw, E1000_TDFH, 2451 adapter->tx_head_addr); 2452 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS, 2453 adapter->tx_head_addr); 2454 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS, 2455 adapter->tx_head_addr); 2456 2457 /* Re-enable TX unit */ 2458 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl); 2459 E1000_WRITE_FLUSH(&adapter->hw); 2460 2461 adapter->tx_fifo_head = 0; 2462 adapter->tx_fifo_reset_cnt++; 2463 2464 return (TRUE); 2465 } 2466 else { 2467 return (FALSE); 2468 } 2469 } 2470 2471 static void 2472 em_set_promisc(struct adapter *adapter) 2473 { 2474 struct ifnet *ifp = adapter->ifp; 2475 u32 reg_rctl; 2476 2477 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 2478 2479 if (ifp->if_flags & IFF_PROMISC) { 2480 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 2481 /* Turn this on if you want to see bad packets */ 2482 if (em_debug_sbp) 2483 reg_rctl |= E1000_RCTL_SBP; 2484 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 2485 } else if (ifp->if_flags & IFF_ALLMULTI) { 2486 reg_rctl |= E1000_RCTL_MPE; 2487 reg_rctl &= ~E1000_RCTL_UPE; 2488 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 2489 } 2490 } 2491 2492 static void 2493 em_disable_promisc(struct adapter *adapter) 2494 { 2495 u32 reg_rctl; 2496 2497 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 2498 2499 reg_rctl &= (~E1000_RCTL_UPE); 2500 reg_rctl &= (~E1000_RCTL_MPE); 2501 reg_rctl &= (~E1000_RCTL_SBP); 2502 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 2503 } 2504 2505 2506 /********************************************************************* 2507 * Multicast Update 2508 * 2509 * This routine is called whenever multicast address list is updated. 2510 * 2511 **********************************************************************/ 2512 2513 static void 2514 em_set_multi(struct adapter *adapter) 2515 { 2516 struct ifnet *ifp = adapter->ifp; 2517 struct ifmultiaddr *ifma; 2518 u32 reg_rctl = 0; 2519 u8 *mta; /* Multicast array memory */ 2520 int mcnt = 0; 2521 2522 IOCTL_DEBUGOUT("em_set_multi: begin"); 2523 2524 if (adapter->hw.mac.type == e1000_82542 && 2525 adapter->hw.revision_id == E1000_REVISION_2) { 2526 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 2527 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) 2528 e1000_pci_clear_mwi(&adapter->hw); 2529 reg_rctl |= E1000_RCTL_RST; 2530 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 2531 msec_delay(5); 2532 } 2533 2534 /* Allocate temporary memory to setup array */ 2535 mta = malloc(sizeof(u8) * 2536 (ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES), 2537 M_DEVBUF, M_NOWAIT | M_ZERO); 2538 if (mta == NULL) 2539 panic("em_set_multi memory failure\n"); 2540 2541 if_maddr_rlock(ifp); 2542 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 2543 if (ifma->ifma_addr->sa_family != AF_LINK) 2544 continue; 2545 2546 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) 2547 break; 2548 2549 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 2550 &mta[mcnt * ETH_ADDR_LEN], ETH_ADDR_LEN); 2551 mcnt++; 2552 } 2553 if_maddr_runlock(ifp); 2554 2555 if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) { 2556 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 2557 reg_rctl |= E1000_RCTL_MPE; 2558 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 2559 } else 2560 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt); 2561 2562 if (adapter->hw.mac.type == e1000_82542 && 2563 adapter->hw.revision_id == E1000_REVISION_2) { 2564 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 2565 reg_rctl &= ~E1000_RCTL_RST; 2566 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); 2567 msec_delay(5); 2568 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) 2569 e1000_pci_set_mwi(&adapter->hw); 2570 } 2571 free(mta, M_DEVBUF); 2572 } 2573 2574 2575 /********************************************************************* 2576 * Timer routine 2577 * 2578 * This routine checks for link status and updates statistics. 2579 * 2580 **********************************************************************/ 2581 2582 static void 2583 em_local_timer(void *arg) 2584 { 2585 struct adapter *adapter = arg; 2586 struct ifnet *ifp = adapter->ifp; 2587 2588 EM_CORE_LOCK_ASSERT(adapter); 2589 2590 taskqueue_enqueue(adapter->tq, 2591 &adapter->rxtx_task); 2592 em_update_link_status(adapter); 2593 em_update_stats_counters(adapter); 2594 2595 /* Reset LAA into RAR[0] on 82571 */ 2596 if (e1000_get_laa_state_82571(&adapter->hw) == TRUE) 2597 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 2598 2599 if (em_display_debug_stats && ifp->if_drv_flags & IFF_DRV_RUNNING) 2600 em_print_hw_stats(adapter); 2601 2602 em_smartspeed(adapter); 2603 2604 /* 2605 * Each second we check the watchdog to 2606 * protect against hardware hangs. 2607 */ 2608 em_watchdog(adapter); 2609 2610 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 2611 2612 } 2613 2614 static void 2615 em_update_link_status(struct adapter *adapter) 2616 { 2617 struct e1000_hw *hw = &adapter->hw; 2618 struct ifnet *ifp = adapter->ifp; 2619 device_t dev = adapter->dev; 2620 u32 link_check = 0; 2621 2622 /* Get the cached link value or read phy for real */ 2623 switch (hw->phy.media_type) { 2624 case e1000_media_type_copper: 2625 if (hw->mac.get_link_status) { 2626 /* Do the work to read phy */ 2627 e1000_check_for_link(hw); 2628 link_check = !hw->mac.get_link_status; 2629 if (link_check) /* ESB2 fix */ 2630 e1000_cfg_on_link_up(hw); 2631 } else 2632 link_check = TRUE; 2633 break; 2634 case e1000_media_type_fiber: 2635 e1000_check_for_link(hw); 2636 link_check = (E1000_READ_REG(hw, E1000_STATUS) & 2637 E1000_STATUS_LU); 2638 break; 2639 case e1000_media_type_internal_serdes: 2640 e1000_check_for_link(hw); 2641 link_check = adapter->hw.mac.serdes_has_link; 2642 break; 2643 default: 2644 case e1000_media_type_unknown: 2645 break; 2646 } 2647 2648 /* Now check for a transition */ 2649 if (link_check && (adapter->link_active == 0)) { 2650 e1000_get_speed_and_duplex(hw, &adapter->link_speed, 2651 &adapter->link_duplex); 2652 /* Check if we must disable SPEED_MODE bit on PCI-E */ 2653 if ((adapter->link_speed != SPEED_1000) && 2654 ((hw->mac.type == e1000_82571) || 2655 (hw->mac.type == e1000_82572))) { 2656 int tarc0; 2657 tarc0 = E1000_READ_REG(hw, E1000_TARC(0)); 2658 tarc0 &= ~SPEED_MODE_BIT; 2659 E1000_WRITE_REG(hw, E1000_TARC(0), tarc0); 2660 } 2661 if (bootverbose) 2662 device_printf(dev, "Link is up %d Mbps %s\n", 2663 adapter->link_speed, 2664 ((adapter->link_duplex == FULL_DUPLEX) ? 2665 "Full Duplex" : "Half Duplex")); 2666 adapter->link_active = 1; 2667 adapter->smartspeed = 0; 2668 ifp->if_baudrate = adapter->link_speed * 1000000; 2669 if_link_state_change(ifp, LINK_STATE_UP); 2670 } else if (!link_check && (adapter->link_active == 1)) { 2671 ifp->if_baudrate = adapter->link_speed = 0; 2672 adapter->link_duplex = 0; 2673 if (bootverbose) 2674 device_printf(dev, "Link is Down\n"); 2675 adapter->link_active = 0; 2676 /* Link down, disable watchdog */ 2677 adapter->watchdog_timer = FALSE; 2678 if_link_state_change(ifp, LINK_STATE_DOWN); 2679 } 2680 } 2681 2682 /********************************************************************* 2683 * 2684 * This routine disables all traffic on the adapter by issuing a 2685 * global reset on the MAC and deallocates TX/RX buffers. 2686 * 2687 * This routine should always be called with BOTH the CORE 2688 * and TX locks. 2689 **********************************************************************/ 2690 2691 static void 2692 em_stop(void *arg) 2693 { 2694 struct adapter *adapter = arg; 2695 struct ifnet *ifp = adapter->ifp; 2696 2697 EM_CORE_LOCK_ASSERT(adapter); 2698 EM_TX_LOCK_ASSERT(adapter); 2699 2700 INIT_DEBUGOUT("em_stop: begin"); 2701 2702 em_disable_intr(adapter); 2703 callout_stop(&adapter->timer); 2704 callout_stop(&adapter->tx_fifo_timer); 2705 2706 /* Tell the stack that the interface is no longer active */ 2707 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2708 2709 e1000_reset_hw(&adapter->hw); 2710 if (adapter->hw.mac.type >= e1000_82544) 2711 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0); 2712 } 2713 2714 2715 /********************************************************************* 2716 * 2717 * Determine hardware revision. 2718 * 2719 **********************************************************************/ 2720 static void 2721 em_identify_hardware(struct adapter *adapter) 2722 { 2723 device_t dev = adapter->dev; 2724 2725 /* Make sure our PCI config space has the necessary stuff set */ 2726 adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2); 2727 if (!((adapter->hw.bus.pci_cmd_word & PCIM_CMD_BUSMASTEREN) && 2728 (adapter->hw.bus.pci_cmd_word & PCIM_CMD_MEMEN))) { 2729 device_printf(dev, "Memory Access and/or Bus Master bits " 2730 "were not set!\n"); 2731 adapter->hw.bus.pci_cmd_word |= 2732 (PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN); 2733 pci_write_config(dev, PCIR_COMMAND, 2734 adapter->hw.bus.pci_cmd_word, 2); 2735 } 2736 2737 /* Save off the information about this board */ 2738 adapter->hw.vendor_id = pci_get_vendor(dev); 2739 adapter->hw.device_id = pci_get_device(dev); 2740 adapter->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1); 2741 adapter->hw.subsystem_vendor_id = 2742 pci_read_config(dev, PCIR_SUBVEND_0, 2); 2743 adapter->hw.subsystem_device_id = 2744 pci_read_config(dev, PCIR_SUBDEV_0, 2); 2745 2746 /* Do Shared Code Init and Setup */ 2747 if (e1000_set_mac_type(&adapter->hw)) { 2748 device_printf(dev, "Setup init failure\n"); 2749 return; 2750 } 2751 } 2752 2753 static int 2754 em_allocate_pci_resources(struct adapter *adapter) 2755 { 2756 device_t dev = adapter->dev; 2757 int val, rid, error = E1000_SUCCESS; 2758 2759 rid = PCIR_BAR(0); 2760 adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 2761 &rid, RF_ACTIVE); 2762 if (adapter->memory == NULL) { 2763 device_printf(dev, "Unable to allocate bus resource: memory\n"); 2764 return (ENXIO); 2765 } 2766 adapter->osdep.mem_bus_space_tag = 2767 rman_get_bustag(adapter->memory); 2768 adapter->osdep.mem_bus_space_handle = 2769 rman_get_bushandle(adapter->memory); 2770 adapter->hw.hw_addr = (u8 *)&adapter->osdep.mem_bus_space_handle; 2771 2772 /* Only older adapters use IO mapping */ 2773 if ((adapter->hw.mac.type > e1000_82543) && 2774 (adapter->hw.mac.type < e1000_82571)) { 2775 /* Figure our where our IO BAR is ? */ 2776 for (rid = PCIR_BAR(0); rid < PCIR_CIS;) { 2777 val = pci_read_config(dev, rid, 4); 2778 if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) { 2779 adapter->io_rid = rid; 2780 break; 2781 } 2782 rid += 4; 2783 /* check for 64bit BAR */ 2784 if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT) 2785 rid += 4; 2786 } 2787 if (rid >= PCIR_CIS) { 2788 device_printf(dev, "Unable to locate IO BAR\n"); 2789 return (ENXIO); 2790 } 2791 adapter->ioport = bus_alloc_resource_any(dev, 2792 SYS_RES_IOPORT, &adapter->io_rid, RF_ACTIVE); 2793 if (adapter->ioport == NULL) { 2794 device_printf(dev, "Unable to allocate bus resource: " 2795 "ioport\n"); 2796 return (ENXIO); 2797 } 2798 adapter->hw.io_base = 0; 2799 adapter->osdep.io_bus_space_tag = 2800 rman_get_bustag(adapter->ioport); 2801 adapter->osdep.io_bus_space_handle = 2802 rman_get_bushandle(adapter->ioport); 2803 } 2804 2805 /* 2806 ** Init the resource arrays 2807 ** used by MSIX setup 2808 */ 2809 for (int i = 0; i < 3; i++) { 2810 adapter->rid[i] = i + 1; /* MSI/X RID starts at 1 */ 2811 adapter->tag[i] = NULL; 2812 adapter->res[i] = NULL; 2813 } 2814 2815 /* 2816 * Setup MSI/X or MSI if PCI Express 2817 */ 2818 if (em_enable_msi) 2819 adapter->msi = em_setup_msix(adapter); 2820 2821 adapter->hw.back = &adapter->osdep; 2822 2823 return (error); 2824 } 2825 2826 /********************************************************************* 2827 * 2828 * Setup the Legacy or MSI Interrupt handler 2829 * 2830 **********************************************************************/ 2831 int 2832 em_allocate_legacy(struct adapter *adapter) 2833 { 2834 device_t dev = adapter->dev; 2835 int error; 2836 2837 /* Manually turn off all interrupts */ 2838 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff); 2839 2840 /* Legacy RID is 0 */ 2841 if (adapter->msi == 0) 2842 adapter->rid[0] = 0; 2843 2844 /* We allocate a single interrupt resource */ 2845 adapter->res[0] = bus_alloc_resource_any(dev, 2846 SYS_RES_IRQ, &adapter->rid[0], RF_SHAREABLE | RF_ACTIVE); 2847 if (adapter->res[0] == NULL) { 2848 device_printf(dev, "Unable to allocate bus resource: " 2849 "interrupt\n"); 2850 return (ENXIO); 2851 } 2852 2853 #ifdef EM_LEGACY_IRQ 2854 /* We do Legacy setup */ 2855 if ((error = bus_setup_intr(dev, adapter->res[0], 2856 #if __FreeBSD_version > 700000 2857 INTR_TYPE_NET | INTR_MPSAFE, NULL, em_intr, adapter, 2858 #else /* 6.X */ 2859 INTR_TYPE_NET | INTR_MPSAFE, em_intr, adapter, 2860 #endif 2861 &adapter->tag[0])) != 0) { 2862 device_printf(dev, "Failed to register interrupt handler"); 2863 return (error); 2864 } 2865 2866 #else /* FAST_IRQ */ 2867 /* 2868 * Try allocating a fast interrupt and the associated deferred 2869 * processing contexts. 2870 */ 2871 TASK_INIT(&adapter->rxtx_task, 0, em_handle_rxtx, adapter); 2872 TASK_INIT(&adapter->link_task, 0, em_handle_link, adapter); 2873 adapter->tq = taskqueue_create_fast("em_taskq", M_NOWAIT, 2874 taskqueue_thread_enqueue, &adapter->tq); 2875 taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s taskq", 2876 device_get_nameunit(adapter->dev)); 2877 #if __FreeBSD_version < 700000 2878 if ((error = bus_setup_intr(dev, adapter->res[0], 2879 INTR_TYPE_NET | INTR_FAST, em_irq_fast, adapter, 2880 #else 2881 if ((error = bus_setup_intr(dev, adapter->res[0], 2882 INTR_TYPE_NET, em_irq_fast, NULL, adapter, 2883 #endif 2884 &adapter->tag[0])) != 0) { 2885 device_printf(dev, "Failed to register fast interrupt " 2886 "handler: %d\n", error); 2887 taskqueue_free(adapter->tq); 2888 adapter->tq = NULL; 2889 return (error); 2890 } 2891 #endif /* EM_LEGACY_IRQ */ 2892 2893 return (0); 2894 } 2895 2896 /********************************************************************* 2897 * 2898 * Setup the MSIX Interrupt handlers 2899 * This is not really Multiqueue, rather 2900 * its just multiple interrupt vectors. 2901 * 2902 **********************************************************************/ 2903 int 2904 em_allocate_msix(struct adapter *adapter) 2905 { 2906 device_t dev = adapter->dev; 2907 int error; 2908 2909 /* Make sure all interrupts are disabled */ 2910 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff); 2911 2912 /* First get the resources */ 2913 for (int i = 0; i < adapter->msi; i++) { 2914 adapter->res[i] = bus_alloc_resource_any(dev, 2915 SYS_RES_IRQ, &adapter->rid[i], RF_ACTIVE); 2916 if (adapter->res[i] == NULL) { 2917 device_printf(dev, 2918 "Unable to allocate bus resource: " 2919 "MSIX Interrupt\n"); 2920 return (ENXIO); 2921 } 2922 } 2923 2924 /* 2925 * Now allocate deferred processing contexts. 2926 */ 2927 TASK_INIT(&adapter->rx_task, 0, em_handle_rx, adapter); 2928 TASK_INIT(&adapter->tx_task, 0, em_handle_tx, adapter); 2929 /* 2930 * Handle compatibility for msi case for deferral due to 2931 * trylock failure 2932 */ 2933 TASK_INIT(&adapter->rxtx_task, 0, em_handle_tx, adapter); 2934 TASK_INIT(&adapter->link_task, 0, em_handle_link, adapter); 2935 adapter->tq = taskqueue_create_fast("em_taskq", M_NOWAIT, 2936 taskqueue_thread_enqueue, &adapter->tq); 2937 taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s taskq", 2938 device_get_nameunit(adapter->dev)); 2939 2940 /* 2941 * And setup the interrupt handlers 2942 */ 2943 2944 /* First slot to RX */ 2945 if ((error = bus_setup_intr(dev, adapter->res[0], 2946 #if __FreeBSD_version > 700000 2947 INTR_TYPE_NET | INTR_MPSAFE, NULL, em_msix_rx, adapter, 2948 #else /* 6.X */ 2949 INTR_TYPE_NET | INTR_MPSAFE, em_msix_rx, adapter, 2950 #endif 2951 &adapter->tag[0])) != 0) { 2952 device_printf(dev, "Failed to register RX handler"); 2953 return (error); 2954 } 2955 2956 /* Next TX */ 2957 if ((error = bus_setup_intr(dev, adapter->res[1], 2958 #if __FreeBSD_version > 700000 2959 INTR_TYPE_NET | INTR_MPSAFE, NULL, em_msix_tx, adapter, 2960 #else /* 6.X */ 2961 INTR_TYPE_NET | INTR_MPSAFE, em_msix_tx, adapter, 2962 #endif 2963 &adapter->tag[1])) != 0) { 2964 device_printf(dev, "Failed to register TX handler"); 2965 return (error); 2966 } 2967 2968 /* And Link */ 2969 if ((error = bus_setup_intr(dev, adapter->res[2], 2970 #if __FreeBSD_version > 700000 2971 INTR_TYPE_NET | INTR_MPSAFE, NULL, em_msix_link, adapter, 2972 #else /* 6.X */ 2973 INTR_TYPE_NET | INTR_MPSAFE, em_msix_link, adapter, 2974 #endif 2975 &adapter->tag[2])) != 0) { 2976 device_printf(dev, "Failed to register TX handler"); 2977 return (error); 2978 } 2979 2980 return (0); 2981 } 2982 2983 2984 static void 2985 em_free_pci_resources(struct adapter *adapter) 2986 { 2987 device_t dev = adapter->dev; 2988 2989 /* Make sure the for loop below runs once */ 2990 if (adapter->msi == 0) 2991 adapter->msi = 1; 2992 2993 /* 2994 * First release all the interrupt resources: 2995 * notice that since these are just kept 2996 * in an array we can do the same logic 2997 * whether its MSIX or just legacy. 2998 */ 2999 for (int i = 0; i < adapter->msi; i++) { 3000 if (adapter->tag[i] != NULL) { 3001 bus_teardown_intr(dev, adapter->res[i], 3002 adapter->tag[i]); 3003 adapter->tag[i] = NULL; 3004 } 3005 if (adapter->res[i] != NULL) { 3006 bus_release_resource(dev, SYS_RES_IRQ, 3007 adapter->rid[i], adapter->res[i]); 3008 } 3009 } 3010 3011 if (adapter->msi) 3012 pci_release_msi(dev); 3013 3014 if (adapter->msix != NULL) 3015 bus_release_resource(dev, SYS_RES_MEMORY, 3016 PCIR_BAR(EM_MSIX_BAR), adapter->msix); 3017 3018 if (adapter->memory != NULL) 3019 bus_release_resource(dev, SYS_RES_MEMORY, 3020 PCIR_BAR(0), adapter->memory); 3021 3022 if (adapter->flash != NULL) 3023 bus_release_resource(dev, SYS_RES_MEMORY, 3024 EM_FLASH, adapter->flash); 3025 3026 if (adapter->ioport != NULL) 3027 bus_release_resource(dev, SYS_RES_IOPORT, 3028 adapter->io_rid, adapter->ioport); 3029 } 3030 3031 /* 3032 * Setup MSI or MSI/X 3033 */ 3034 static int 3035 em_setup_msix(struct adapter *adapter) 3036 { 3037 device_t dev = adapter->dev; 3038 int val = 0; 3039 3040 if (adapter->hw.mac.type < e1000_82571) 3041 return (0); 3042 3043 /* Setup MSI/X for Hartwell */ 3044 if (adapter->hw.mac.type == e1000_82574) { 3045 /* Map the MSIX BAR */ 3046 int rid = PCIR_BAR(EM_MSIX_BAR); 3047 adapter->msix = bus_alloc_resource_any(dev, 3048 SYS_RES_MEMORY, &rid, RF_ACTIVE); 3049 if (!adapter->msix) { 3050 /* May not be enabled */ 3051 device_printf(adapter->dev, 3052 "Unable to map MSIX table \n"); 3053 goto msi; 3054 } 3055 val = pci_msix_count(dev); 3056 /* 3057 ** 82574 can be configured for 5 but 3058 ** we limit use to 3. 3059 */ 3060 if (val > 3) val = 3; 3061 if ((val) && pci_alloc_msix(dev, &val) == 0) { 3062 device_printf(adapter->dev,"Using MSIX interrupts\n"); 3063 return (val); 3064 } 3065 } 3066 msi: 3067 val = pci_msi_count(dev); 3068 if (val == 1 && pci_alloc_msi(dev, &val) == 0) { 3069 adapter->msi = 1; 3070 device_printf(adapter->dev,"Using MSI interrupt\n"); 3071 return (val); 3072 } 3073 return (0); 3074 } 3075 3076 /********************************************************************* 3077 * 3078 * Initialize the hardware to a configuration 3079 * as specified by the adapter structure. 3080 * 3081 **********************************************************************/ 3082 static int 3083 em_hardware_init(struct adapter *adapter) 3084 { 3085 device_t dev = adapter->dev; 3086 u16 rx_buffer_size; 3087 3088 INIT_DEBUGOUT("em_hardware_init: begin"); 3089 3090 /* Issue a global reset */ 3091 e1000_reset_hw(&adapter->hw); 3092 3093 /* Get control from any management/hw control */ 3094 if (((adapter->hw.mac.type == e1000_82573) || 3095 (adapter->hw.mac.type == e1000_82583) || 3096 (adapter->hw.mac.type == e1000_ich8lan) || 3097 (adapter->hw.mac.type == e1000_ich10lan) || 3098 (adapter->hw.mac.type == e1000_ich9lan)) && 3099 e1000_check_mng_mode(&adapter->hw)) 3100 em_get_hw_control(adapter); 3101 3102 /* When hardware is reset, fifo_head is also reset */ 3103 adapter->tx_fifo_head = 0; 3104 3105 /* Set up smart power down as default off on newer adapters. */ 3106 if (!em_smart_pwr_down && (adapter->hw.mac.type == e1000_82571 || 3107 adapter->hw.mac.type == e1000_82572)) { 3108 u16 phy_tmp = 0; 3109 3110 /* Speed up time to link by disabling smart power down. */ 3111 e1000_read_phy_reg(&adapter->hw, 3112 IGP02E1000_PHY_POWER_MGMT, &phy_tmp); 3113 phy_tmp &= ~IGP02E1000_PM_SPD; 3114 e1000_write_phy_reg(&adapter->hw, 3115 IGP02E1000_PHY_POWER_MGMT, phy_tmp); 3116 } 3117 3118 /* 3119 * These parameters control the automatic generation (Tx) and 3120 * response (Rx) to Ethernet PAUSE frames. 3121 * - High water mark should allow for at least two frames to be 3122 * received after sending an XOFF. 3123 * - Low water mark works best when it is very near the high water mark. 3124 * This allows the receiver to restart by sending XON when it has 3125 * drained a bit. Here we use an arbitary value of 1500 which will 3126 * restart after one full frame is pulled from the buffer. There 3127 * could be several smaller frames in the buffer and if so they will 3128 * not trigger the XON until their total number reduces the buffer 3129 * by 1500. 3130 * - The pause time is fairly large at 1000 x 512ns = 512 usec. 3131 */ 3132 rx_buffer_size = ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 3133 0xffff) << 10 ); 3134 3135 adapter->hw.fc.high_water = rx_buffer_size - 3136 roundup2(adapter->max_frame_size, 1024); 3137 adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500; 3138 3139 if (adapter->hw.mac.type == e1000_80003es2lan) 3140 adapter->hw.fc.pause_time = 0xFFFF; 3141 else 3142 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME; 3143 adapter->hw.fc.send_xon = TRUE; 3144 3145 /* Set Flow control, use the tunable location if sane */ 3146 if ((em_fc_setting >= 0) || (em_fc_setting < 4)) 3147 adapter->hw.fc.requested_mode = em_fc_setting; 3148 else 3149 adapter->hw.fc.requested_mode = e1000_fc_none; 3150 3151 3152 if (e1000_init_hw(&adapter->hw) < 0) { 3153 device_printf(dev, "Hardware Initialization Failed\n"); 3154 return (EIO); 3155 } 3156 3157 e1000_check_for_link(&adapter->hw); 3158 3159 return (0); 3160 } 3161 3162 /********************************************************************* 3163 * 3164 * Setup networking device structure and register an interface. 3165 * 3166 **********************************************************************/ 3167 static void 3168 em_setup_interface(device_t dev, struct adapter *adapter) 3169 { 3170 struct ifnet *ifp; 3171 3172 INIT_DEBUGOUT("em_setup_interface: begin"); 3173 3174 ifp = adapter->ifp = if_alloc(IFT_ETHER); 3175 if (ifp == NULL) 3176 panic("%s: can not if_alloc()", device_get_nameunit(dev)); 3177 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 3178 ifp->if_mtu = ETHERMTU; 3179 ifp->if_init = em_init; 3180 ifp->if_softc = adapter; 3181 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 3182 ifp->if_ioctl = em_ioctl; 3183 ifp->if_start = em_start; 3184 IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 1); 3185 ifp->if_snd.ifq_drv_maxlen = adapter->num_tx_desc - 1; 3186 IFQ_SET_READY(&ifp->if_snd); 3187 3188 ether_ifattach(ifp, adapter->hw.mac.addr); 3189 3190 ifp->if_capabilities = ifp->if_capenable = 0; 3191 3192 #if __FreeBSD_version >= 800000 3193 /* Multiqueue tx functions */ 3194 ifp->if_transmit = em_mq_start; 3195 ifp->if_qflush = em_qflush; 3196 adapter->br = buf_ring_alloc(4096, M_DEVBUF, M_WAITOK, &adapter->tx_mtx); 3197 #endif 3198 if (adapter->hw.mac.type >= e1000_82543) { 3199 int version_cap; 3200 #if __FreeBSD_version < 700000 3201 version_cap = IFCAP_HWCSUM; 3202 #else 3203 version_cap = IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM; 3204 #endif 3205 ifp->if_capabilities |= version_cap; 3206 ifp->if_capenable |= version_cap; 3207 } 3208 3209 #if __FreeBSD_version >= 700000 3210 /* Identify TSO capable adapters */ 3211 if ((adapter->hw.mac.type > e1000_82544) && 3212 (adapter->hw.mac.type != e1000_82547)) 3213 ifp->if_capabilities |= IFCAP_TSO4; 3214 /* 3215 * By default only enable on PCI-E, this 3216 * can be overriden by ifconfig. 3217 */ 3218 if (adapter->hw.mac.type >= e1000_82571) 3219 ifp->if_capenable |= IFCAP_TSO4; 3220 #endif 3221 3222 /* 3223 * Tell the upper layer(s) we support long frames. 3224 */ 3225 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 3226 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 3227 ifp->if_capenable |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 3228 3229 #ifdef DEVICE_POLLING 3230 ifp->if_capabilities |= IFCAP_POLLING; 3231 #endif 3232 3233 /* 3234 * Specify the media types supported by this adapter and register 3235 * callbacks to update media and link information 3236 */ 3237 ifmedia_init(&adapter->media, IFM_IMASK, 3238 em_media_change, em_media_status); 3239 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) || 3240 (adapter->hw.phy.media_type == e1000_media_type_internal_serdes)) { 3241 u_char fiber_type = IFM_1000_SX; /* default type */ 3242 3243 if (adapter->hw.mac.type == e1000_82545) 3244 fiber_type = IFM_1000_LX; 3245 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX, 3246 0, NULL); 3247 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL); 3248 } else { 3249 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL); 3250 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX, 3251 0, NULL); 3252 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX, 3253 0, NULL); 3254 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX, 3255 0, NULL); 3256 if (adapter->hw.phy.type != e1000_phy_ife) { 3257 ifmedia_add(&adapter->media, 3258 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL); 3259 ifmedia_add(&adapter->media, 3260 IFM_ETHER | IFM_1000_T, 0, NULL); 3261 } 3262 } 3263 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 3264 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 3265 } 3266 3267 3268 /********************************************************************* 3269 * 3270 * Workaround for SmartSpeed on 82541 and 82547 controllers 3271 * 3272 **********************************************************************/ 3273 static void 3274 em_smartspeed(struct adapter *adapter) 3275 { 3276 u16 phy_tmp; 3277 3278 if (adapter->link_active || (adapter->hw.phy.type != e1000_phy_igp) || 3279 adapter->hw.mac.autoneg == 0 || 3280 (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0) 3281 return; 3282 3283 if (adapter->smartspeed == 0) { 3284 /* If Master/Slave config fault is asserted twice, 3285 * we assume back-to-back */ 3286 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); 3287 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT)) 3288 return; 3289 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); 3290 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) { 3291 e1000_read_phy_reg(&adapter->hw, 3292 PHY_1000T_CTRL, &phy_tmp); 3293 if(phy_tmp & CR_1000T_MS_ENABLE) { 3294 phy_tmp &= ~CR_1000T_MS_ENABLE; 3295 e1000_write_phy_reg(&adapter->hw, 3296 PHY_1000T_CTRL, phy_tmp); 3297 adapter->smartspeed++; 3298 if(adapter->hw.mac.autoneg && 3299 !e1000_phy_setup_autoneg(&adapter->hw) && 3300 !e1000_read_phy_reg(&adapter->hw, 3301 PHY_CONTROL, &phy_tmp)) { 3302 phy_tmp |= (MII_CR_AUTO_NEG_EN | 3303 MII_CR_RESTART_AUTO_NEG); 3304 e1000_write_phy_reg(&adapter->hw, 3305 PHY_CONTROL, phy_tmp); 3306 } 3307 } 3308 } 3309 return; 3310 } else if(adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) { 3311 /* If still no link, perhaps using 2/3 pair cable */ 3312 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp); 3313 phy_tmp |= CR_1000T_MS_ENABLE; 3314 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp); 3315 if(adapter->hw.mac.autoneg && 3316 !e1000_phy_setup_autoneg(&adapter->hw) && 3317 !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) { 3318 phy_tmp |= (MII_CR_AUTO_NEG_EN | 3319 MII_CR_RESTART_AUTO_NEG); 3320 e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp); 3321 } 3322 } 3323 /* Restart process after EM_SMARTSPEED_MAX iterations */ 3324 if(adapter->smartspeed++ == EM_SMARTSPEED_MAX) 3325 adapter->smartspeed = 0; 3326 } 3327 3328 3329 /* 3330 * Manage DMA'able memory. 3331 */ 3332 static void 3333 em_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 3334 { 3335 if (error) 3336 return; 3337 *(bus_addr_t *) arg = segs[0].ds_addr; 3338 } 3339 3340 static int 3341 em_dma_malloc(struct adapter *adapter, bus_size_t size, 3342 struct em_dma_alloc *dma, int mapflags) 3343 { 3344 int error; 3345 3346 #if __FreeBSD_version >= 700000 3347 error = bus_dma_tag_create(bus_get_dma_tag(adapter->dev), /* parent */ 3348 #else 3349 error = bus_dma_tag_create(NULL, /* parent */ 3350 #endif 3351 EM_DBA_ALIGN, 0, /* alignment, bounds */ 3352 BUS_SPACE_MAXADDR, /* lowaddr */ 3353 BUS_SPACE_MAXADDR, /* highaddr */ 3354 NULL, NULL, /* filter, filterarg */ 3355 size, /* maxsize */ 3356 1, /* nsegments */ 3357 size, /* maxsegsize */ 3358 0, /* flags */ 3359 NULL, /* lockfunc */ 3360 NULL, /* lockarg */ 3361 &dma->dma_tag); 3362 if (error) { 3363 device_printf(adapter->dev, 3364 "%s: bus_dma_tag_create failed: %d\n", 3365 __func__, error); 3366 goto fail_0; 3367 } 3368 3369 error = bus_dmamem_alloc(dma->dma_tag, (void**) &dma->dma_vaddr, 3370 BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dma->dma_map); 3371 if (error) { 3372 device_printf(adapter->dev, 3373 "%s: bus_dmamem_alloc(%ju) failed: %d\n", 3374 __func__, (uintmax_t)size, error); 3375 goto fail_2; 3376 } 3377 3378 dma->dma_paddr = 0; 3379 error = bus_dmamap_load(dma->dma_tag, dma->dma_map, dma->dma_vaddr, 3380 size, em_dmamap_cb, &dma->dma_paddr, mapflags | BUS_DMA_NOWAIT); 3381 if (error || dma->dma_paddr == 0) { 3382 device_printf(adapter->dev, 3383 "%s: bus_dmamap_load failed: %d\n", 3384 __func__, error); 3385 goto fail_3; 3386 } 3387 3388 return (0); 3389 3390 fail_3: 3391 bus_dmamap_unload(dma->dma_tag, dma->dma_map); 3392 fail_2: 3393 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map); 3394 bus_dma_tag_destroy(dma->dma_tag); 3395 fail_0: 3396 dma->dma_map = NULL; 3397 dma->dma_tag = NULL; 3398 3399 return (error); 3400 } 3401 3402 static void 3403 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma) 3404 { 3405 if (dma->dma_tag == NULL) 3406 return; 3407 if (dma->dma_map != NULL) { 3408 bus_dmamap_sync(dma->dma_tag, dma->dma_map, 3409 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 3410 bus_dmamap_unload(dma->dma_tag, dma->dma_map); 3411 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map); 3412 dma->dma_map = NULL; 3413 } 3414 bus_dma_tag_destroy(dma->dma_tag); 3415 dma->dma_tag = NULL; 3416 } 3417 3418 3419 /********************************************************************* 3420 * 3421 * Allocate memory for tx_buffer structures. The tx_buffer stores all 3422 * the information needed to transmit a packet on the wire. 3423 * 3424 **********************************************************************/ 3425 static int 3426 em_allocate_transmit_structures(struct adapter *adapter) 3427 { 3428 device_t dev = adapter->dev; 3429 struct em_buffer *tx_buffer; 3430 int error; 3431 3432 /* 3433 * Create DMA tags for tx descriptors 3434 */ 3435 #if __FreeBSD_version >= 700000 3436 if ((error = bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 3437 #else 3438 if ((error = bus_dma_tag_create(NULL, /* parent */ 3439 #endif 3440 1, 0, /* alignment, bounds */ 3441 BUS_SPACE_MAXADDR, /* lowaddr */ 3442 BUS_SPACE_MAXADDR, /* highaddr */ 3443 NULL, NULL, /* filter, filterarg */ 3444 EM_TSO_SIZE, /* maxsize */ 3445 EM_MAX_SCATTER, /* nsegments */ 3446 EM_TSO_SEG_SIZE, /* maxsegsize */ 3447 0, /* flags */ 3448 NULL, /* lockfunc */ 3449 NULL, /* lockarg */ 3450 &adapter->txtag)) != 0) { 3451 device_printf(dev, "Unable to allocate TX DMA tag\n"); 3452 goto fail; 3453 } 3454 3455 adapter->tx_buffer_area = malloc(sizeof(struct em_buffer) * 3456 adapter->num_tx_desc, M_DEVBUF, M_NOWAIT | M_ZERO); 3457 if (adapter->tx_buffer_area == NULL) { 3458 device_printf(dev, "Unable to allocate tx_buffer memory\n"); 3459 error = ENOMEM; 3460 goto fail; 3461 } 3462 3463 /* Create the descriptor buffer dma maps */ 3464 for (int i = 0; i < adapter->num_tx_desc; i++) { 3465 tx_buffer = &adapter->tx_buffer_area[i]; 3466 error = bus_dmamap_create(adapter->txtag, 0, &tx_buffer->map); 3467 if (error != 0) { 3468 device_printf(dev, "Unable to create TX DMA map\n"); 3469 goto fail; 3470 } 3471 tx_buffer->next_eop = -1; 3472 } 3473 3474 return (0); 3475 fail: 3476 em_free_transmit_structures(adapter); 3477 return (error); 3478 } 3479 3480 /********************************************************************* 3481 * 3482 * (Re)Initialize transmit structures. 3483 * 3484 **********************************************************************/ 3485 static void 3486 em_setup_transmit_structures(struct adapter *adapter) 3487 { 3488 struct em_buffer *tx_buffer; 3489 3490 /* Clear the old ring contents */ 3491 bzero(adapter->tx_desc_base, 3492 (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc); 3493 3494 /* Free any existing TX buffers */ 3495 for (int i = 0; i < adapter->num_tx_desc; i++, tx_buffer++) { 3496 tx_buffer = &adapter->tx_buffer_area[i]; 3497 bus_dmamap_sync(adapter->txtag, tx_buffer->map, 3498 BUS_DMASYNC_POSTWRITE); 3499 bus_dmamap_unload(adapter->txtag, tx_buffer->map); 3500 m_freem(tx_buffer->m_head); 3501 tx_buffer->m_head = NULL; 3502 tx_buffer->next_eop = -1; 3503 } 3504 3505 /* Reset state */ 3506 adapter->next_avail_tx_desc = 0; 3507 adapter->next_tx_to_clean = 0; 3508 adapter->num_tx_desc_avail = adapter->num_tx_desc; 3509 3510 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 3511 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 3512 3513 return; 3514 } 3515 3516 /********************************************************************* 3517 * 3518 * Enable transmit unit. 3519 * 3520 **********************************************************************/ 3521 static void 3522 em_initialize_transmit_unit(struct adapter *adapter) 3523 { 3524 u32 tctl, tarc, tipg = 0; 3525 u64 bus_addr; 3526 3527 INIT_DEBUGOUT("em_initialize_transmit_unit: begin"); 3528 /* Setup the Base and Length of the Tx Descriptor Ring */ 3529 bus_addr = adapter->txdma.dma_paddr; 3530 E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0), 3531 adapter->num_tx_desc * sizeof(struct e1000_tx_desc)); 3532 E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0), 3533 (u32)(bus_addr >> 32)); 3534 E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0), 3535 (u32)bus_addr); 3536 /* Setup the HW Tx Head and Tail descriptor pointers */ 3537 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0); 3538 E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0); 3539 3540 HW_DEBUGOUT2("Base = %x, Length = %x\n", 3541 E1000_READ_REG(&adapter->hw, E1000_TDBAL(0)), 3542 E1000_READ_REG(&adapter->hw, E1000_TDLEN(0))); 3543 3544 /* Set the default values for the Tx Inter Packet Gap timer */ 3545 switch (adapter->hw.mac.type) { 3546 case e1000_82542: 3547 tipg = DEFAULT_82542_TIPG_IPGT; 3548 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 3549 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 3550 break; 3551 case e1000_80003es2lan: 3552 tipg = DEFAULT_82543_TIPG_IPGR1; 3553 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 << 3554 E1000_TIPG_IPGR2_SHIFT; 3555 break; 3556 default: 3557 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) || 3558 (adapter->hw.phy.media_type == 3559 e1000_media_type_internal_serdes)) 3560 tipg = DEFAULT_82543_TIPG_IPGT_FIBER; 3561 else 3562 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; 3563 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 3564 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 3565 } 3566 3567 E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg); 3568 E1000_WRITE_REG(&adapter->hw, E1000_TIDV, adapter->tx_int_delay.value); 3569 if(adapter->hw.mac.type >= e1000_82540) 3570 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 3571 adapter->tx_abs_int_delay.value); 3572 3573 if ((adapter->hw.mac.type == e1000_82571) || 3574 (adapter->hw.mac.type == e1000_82572)) { 3575 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0)); 3576 tarc |= SPEED_MODE_BIT; 3577 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc); 3578 } else if (adapter->hw.mac.type == e1000_80003es2lan) { 3579 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0)); 3580 tarc |= 1; 3581 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc); 3582 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1)); 3583 tarc |= 1; 3584 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc); 3585 } 3586 3587 /* Program the Transmit Control Register */ 3588 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL); 3589 tctl &= ~E1000_TCTL_CT; 3590 tctl |= (E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN | 3591 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT)); 3592 3593 if (adapter->hw.mac.type >= e1000_82571) 3594 tctl |= E1000_TCTL_MULR; 3595 3596 /* This write will effectively turn on the transmit unit. */ 3597 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl); 3598 3599 /* Setup Transmit Descriptor Base Settings */ 3600 adapter->txd_cmd = E1000_TXD_CMD_IFCS; 3601 3602 if (adapter->tx_int_delay.value > 0) 3603 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 3604 } 3605 3606 /********************************************************************* 3607 * 3608 * Free all transmit related data structures. 3609 * 3610 **********************************************************************/ 3611 static void 3612 em_free_transmit_structures(struct adapter *adapter) 3613 { 3614 struct em_buffer *tx_buffer; 3615 3616 INIT_DEBUGOUT("free_transmit_structures: begin"); 3617 3618 if (adapter->tx_buffer_area != NULL) { 3619 for (int i = 0; i < adapter->num_tx_desc; i++) { 3620 tx_buffer = &adapter->tx_buffer_area[i]; 3621 if (tx_buffer->m_head != NULL) { 3622 bus_dmamap_sync(adapter->txtag, tx_buffer->map, 3623 BUS_DMASYNC_POSTWRITE); 3624 bus_dmamap_unload(adapter->txtag, 3625 tx_buffer->map); 3626 m_freem(tx_buffer->m_head); 3627 tx_buffer->m_head = NULL; 3628 } else if (tx_buffer->map != NULL) 3629 bus_dmamap_unload(adapter->txtag, 3630 tx_buffer->map); 3631 if (tx_buffer->map != NULL) { 3632 bus_dmamap_destroy(adapter->txtag, 3633 tx_buffer->map); 3634 tx_buffer->map = NULL; 3635 } 3636 } 3637 } 3638 if (adapter->tx_buffer_area != NULL) { 3639 free(adapter->tx_buffer_area, M_DEVBUF); 3640 adapter->tx_buffer_area = NULL; 3641 } 3642 if (adapter->txtag != NULL) { 3643 bus_dma_tag_destroy(adapter->txtag); 3644 adapter->txtag = NULL; 3645 } 3646 #if __FreeBSD_version >= 800000 3647 buf_ring_free(adapter->br, M_DEVBUF); 3648 #endif 3649 } 3650 3651 /********************************************************************* 3652 * 3653 * The offload context needs to be set when we transfer the first 3654 * packet of a particular protocol (TCP/UDP). This routine has been 3655 * enhanced to deal with inserted VLAN headers, and IPV6 (not complete) 3656 * 3657 * Added back the old method of keeping the current context type 3658 * and not setting if unnecessary, as this is reported to be a 3659 * big performance win. -jfv 3660 **********************************************************************/ 3661 static void 3662 em_transmit_checksum_setup(struct adapter *adapter, struct mbuf *mp, 3663 u32 *txd_upper, u32 *txd_lower) 3664 { 3665 struct e1000_context_desc *TXD = NULL; 3666 struct em_buffer *tx_buffer; 3667 struct ether_vlan_header *eh; 3668 struct ip *ip = NULL; 3669 struct ip6_hdr *ip6; 3670 int curr_txd, ehdrlen; 3671 u32 cmd, hdr_len, ip_hlen; 3672 u16 etype; 3673 u8 ipproto; 3674 3675 3676 cmd = hdr_len = ipproto = 0; 3677 curr_txd = adapter->next_avail_tx_desc; 3678 3679 /* 3680 * Determine where frame payload starts. 3681 * Jump over vlan headers if already present, 3682 * helpful for QinQ too. 3683 */ 3684 eh = mtod(mp, struct ether_vlan_header *); 3685 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) { 3686 etype = ntohs(eh->evl_proto); 3687 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN; 3688 } else { 3689 etype = ntohs(eh->evl_encap_proto); 3690 ehdrlen = ETHER_HDR_LEN; 3691 } 3692 3693 /* 3694 * We only support TCP/UDP for IPv4 and IPv6 for the moment. 3695 * TODO: Support SCTP too when it hits the tree. 3696 */ 3697 switch (etype) { 3698 case ETHERTYPE_IP: 3699 ip = (struct ip *)(mp->m_data + ehdrlen); 3700 ip_hlen = ip->ip_hl << 2; 3701 3702 /* Setup of IP header checksum. */ 3703 if (mp->m_pkthdr.csum_flags & CSUM_IP) { 3704 /* 3705 * Start offset for header checksum calculation. 3706 * End offset for header checksum calculation. 3707 * Offset of place to put the checksum. 3708 */ 3709 TXD = (struct e1000_context_desc *) 3710 &adapter->tx_desc_base[curr_txd]; 3711 TXD->lower_setup.ip_fields.ipcss = ehdrlen; 3712 TXD->lower_setup.ip_fields.ipcse = 3713 htole16(ehdrlen + ip_hlen); 3714 TXD->lower_setup.ip_fields.ipcso = 3715 ehdrlen + offsetof(struct ip, ip_sum); 3716 cmd |= E1000_TXD_CMD_IP; 3717 *txd_upper |= E1000_TXD_POPTS_IXSM << 8; 3718 } 3719 3720 if (mp->m_len < ehdrlen + ip_hlen) 3721 return; /* failure */ 3722 3723 hdr_len = ehdrlen + ip_hlen; 3724 ipproto = ip->ip_p; 3725 3726 break; 3727 case ETHERTYPE_IPV6: 3728 ip6 = (struct ip6_hdr *)(mp->m_data + ehdrlen); 3729 ip_hlen = sizeof(struct ip6_hdr); /* XXX: No header stacking. */ 3730 3731 if (mp->m_len < ehdrlen + ip_hlen) 3732 return; /* failure */ 3733 3734 /* IPv6 doesn't have a header checksum. */ 3735 3736 hdr_len = ehdrlen + ip_hlen; 3737 ipproto = ip6->ip6_nxt; 3738 3739 break; 3740 default: 3741 *txd_upper = 0; 3742 *txd_lower = 0; 3743 return; 3744 } 3745 3746 switch (ipproto) { 3747 case IPPROTO_TCP: 3748 if (mp->m_pkthdr.csum_flags & CSUM_TCP) { 3749 *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 3750 *txd_upper |= E1000_TXD_POPTS_TXSM << 8; 3751 /* no need for context if already set */ 3752 if (adapter->last_hw_offload == CSUM_TCP) 3753 return; 3754 adapter->last_hw_offload = CSUM_TCP; 3755 /* 3756 * Start offset for payload checksum calculation. 3757 * End offset for payload checksum calculation. 3758 * Offset of place to put the checksum. 3759 */ 3760 TXD = (struct e1000_context_desc *) 3761 &adapter->tx_desc_base[curr_txd]; 3762 TXD->upper_setup.tcp_fields.tucss = hdr_len; 3763 TXD->upper_setup.tcp_fields.tucse = htole16(0); 3764 TXD->upper_setup.tcp_fields.tucso = 3765 hdr_len + offsetof(struct tcphdr, th_sum); 3766 cmd |= E1000_TXD_CMD_TCP; 3767 } 3768 break; 3769 case IPPROTO_UDP: 3770 { 3771 if (mp->m_pkthdr.csum_flags & CSUM_UDP) { 3772 *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 3773 *txd_upper |= E1000_TXD_POPTS_TXSM << 8; 3774 /* no need for context if already set */ 3775 if (adapter->last_hw_offload == CSUM_UDP) 3776 return; 3777 adapter->last_hw_offload = CSUM_UDP; 3778 /* 3779 * Start offset for header checksum calculation. 3780 * End offset for header checksum calculation. 3781 * Offset of place to put the checksum. 3782 */ 3783 TXD = (struct e1000_context_desc *) 3784 &adapter->tx_desc_base[curr_txd]; 3785 TXD->upper_setup.tcp_fields.tucss = hdr_len; 3786 TXD->upper_setup.tcp_fields.tucse = htole16(0); 3787 TXD->upper_setup.tcp_fields.tucso = 3788 hdr_len + offsetof(struct udphdr, uh_sum); 3789 } 3790 /* Fall Thru */ 3791 } 3792 default: 3793 break; 3794 } 3795 3796 TXD->tcp_seg_setup.data = htole32(0); 3797 TXD->cmd_and_length = 3798 htole32(adapter->txd_cmd | E1000_TXD_CMD_DEXT | cmd); 3799 tx_buffer = &adapter->tx_buffer_area[curr_txd]; 3800 tx_buffer->m_head = NULL; 3801 tx_buffer->next_eop = -1; 3802 3803 if (++curr_txd == adapter->num_tx_desc) 3804 curr_txd = 0; 3805 3806 adapter->num_tx_desc_avail--; 3807 adapter->next_avail_tx_desc = curr_txd; 3808 } 3809 3810 3811 #if __FreeBSD_version >= 700000 3812 /********************************************************************** 3813 * 3814 * Setup work for hardware segmentation offload (TSO) 3815 * 3816 **********************************************************************/ 3817 static bool 3818 em_tso_setup(struct adapter *adapter, struct mbuf *mp, u32 *txd_upper, 3819 u32 *txd_lower) 3820 { 3821 struct e1000_context_desc *TXD; 3822 struct em_buffer *tx_buffer; 3823 struct ether_vlan_header *eh; 3824 struct ip *ip; 3825 struct ip6_hdr *ip6; 3826 struct tcphdr *th; 3827 int curr_txd, ehdrlen, hdr_len, ip_hlen, isip6; 3828 u16 etype; 3829 3830 /* 3831 * This function could/should be extended to support IP/IPv6 3832 * fragmentation as well. But as they say, one step at a time. 3833 */ 3834 3835 /* 3836 * Determine where frame payload starts. 3837 * Jump over vlan headers if already present, 3838 * helpful for QinQ too. 3839 */ 3840 eh = mtod(mp, struct ether_vlan_header *); 3841 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) { 3842 etype = ntohs(eh->evl_proto); 3843 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN; 3844 } else { 3845 etype = ntohs(eh->evl_encap_proto); 3846 ehdrlen = ETHER_HDR_LEN; 3847 } 3848 3849 /* Ensure we have at least the IP+TCP header in the first mbuf. */ 3850 if (mp->m_len < ehdrlen + sizeof(struct ip) + sizeof(struct tcphdr)) 3851 return FALSE; /* -1 */ 3852 3853 /* 3854 * We only support TCP for IPv4 and IPv6 (notyet) for the moment. 3855 * TODO: Support SCTP too when it hits the tree. 3856 */ 3857 switch (etype) { 3858 case ETHERTYPE_IP: 3859 isip6 = 0; 3860 ip = (struct ip *)(mp->m_data + ehdrlen); 3861 if (ip->ip_p != IPPROTO_TCP) 3862 return FALSE; /* 0 */ 3863 ip->ip_len = 0; 3864 ip->ip_sum = 0; 3865 ip_hlen = ip->ip_hl << 2; 3866 if (mp->m_len < ehdrlen + ip_hlen + sizeof(struct tcphdr)) 3867 return FALSE; /* -1 */ 3868 th = (struct tcphdr *)((caddr_t)ip + ip_hlen); 3869 #if 1 3870 th->th_sum = in_pseudo(ip->ip_src.s_addr, 3871 ip->ip_dst.s_addr, htons(IPPROTO_TCP)); 3872 #else 3873 th->th_sum = mp->m_pkthdr.csum_data; 3874 #endif 3875 break; 3876 case ETHERTYPE_IPV6: 3877 isip6 = 1; 3878 return FALSE; /* Not supported yet. */ 3879 ip6 = (struct ip6_hdr *)(mp->m_data + ehdrlen); 3880 if (ip6->ip6_nxt != IPPROTO_TCP) 3881 return FALSE; /* 0 */ 3882 ip6->ip6_plen = 0; 3883 ip_hlen = sizeof(struct ip6_hdr); /* XXX: no header stacking. */ 3884 if (mp->m_len < ehdrlen + ip_hlen + sizeof(struct tcphdr)) 3885 return FALSE; /* -1 */ 3886 th = (struct tcphdr *)((caddr_t)ip6 + ip_hlen); 3887 #if 0 3888 th->th_sum = in6_pseudo(ip6->ip6_src, ip->ip6_dst, 3889 htons(IPPROTO_TCP)); /* XXX: function notyet. */ 3890 #else 3891 th->th_sum = mp->m_pkthdr.csum_data; 3892 #endif 3893 break; 3894 default: 3895 return FALSE; 3896 } 3897 hdr_len = ehdrlen + ip_hlen + (th->th_off << 2); 3898 3899 *txd_lower = (E1000_TXD_CMD_DEXT | /* Extended descr type */ 3900 E1000_TXD_DTYP_D | /* Data descr type */ 3901 E1000_TXD_CMD_TSE); /* Do TSE on this packet */ 3902 3903 /* IP and/or TCP header checksum calculation and insertion. */ 3904 *txd_upper = ((isip6 ? 0 : E1000_TXD_POPTS_IXSM) | 3905 E1000_TXD_POPTS_TXSM) << 8; 3906 3907 curr_txd = adapter->next_avail_tx_desc; 3908 tx_buffer = &adapter->tx_buffer_area[curr_txd]; 3909 TXD = (struct e1000_context_desc *) &adapter->tx_desc_base[curr_txd]; 3910 3911 /* IPv6 doesn't have a header checksum. */ 3912 if (!isip6) { 3913 /* 3914 * Start offset for header checksum calculation. 3915 * End offset for header checksum calculation. 3916 * Offset of place put the checksum. 3917 */ 3918 TXD->lower_setup.ip_fields.ipcss = ehdrlen; 3919 TXD->lower_setup.ip_fields.ipcse = 3920 htole16(ehdrlen + ip_hlen - 1); 3921 TXD->lower_setup.ip_fields.ipcso = 3922 ehdrlen + offsetof(struct ip, ip_sum); 3923 } 3924 /* 3925 * Start offset for payload checksum calculation. 3926 * End offset for payload checksum calculation. 3927 * Offset of place to put the checksum. 3928 */ 3929 TXD->upper_setup.tcp_fields.tucss = 3930 ehdrlen + ip_hlen; 3931 TXD->upper_setup.tcp_fields.tucse = 0; 3932 TXD->upper_setup.tcp_fields.tucso = 3933 ehdrlen + ip_hlen + offsetof(struct tcphdr, th_sum); 3934 /* 3935 * Payload size per packet w/o any headers. 3936 * Length of all headers up to payload. 3937 */ 3938 TXD->tcp_seg_setup.fields.mss = htole16(mp->m_pkthdr.tso_segsz); 3939 TXD->tcp_seg_setup.fields.hdr_len = hdr_len; 3940 3941 TXD->cmd_and_length = htole32(adapter->txd_cmd | 3942 E1000_TXD_CMD_DEXT | /* Extended descr */ 3943 E1000_TXD_CMD_TSE | /* TSE context */ 3944 (isip6 ? 0 : E1000_TXD_CMD_IP) | /* Do IP csum */ 3945 E1000_TXD_CMD_TCP | /* Do TCP checksum */ 3946 (mp->m_pkthdr.len - (hdr_len))); /* Total len */ 3947 3948 tx_buffer->m_head = NULL; 3949 tx_buffer->next_eop = -1; 3950 3951 if (++curr_txd == adapter->num_tx_desc) 3952 curr_txd = 0; 3953 3954 adapter->num_tx_desc_avail--; 3955 adapter->next_avail_tx_desc = curr_txd; 3956 adapter->tx_tso = TRUE; 3957 3958 return TRUE; 3959 } 3960 3961 #endif /* __FreeBSD_version >= 700000 */ 3962 3963 /********************************************************************** 3964 * 3965 * Examine each tx_buffer in the used queue. If the hardware is done 3966 * processing the packet then free associated resources. The 3967 * tx_buffer is put back on the free queue. 3968 * 3969 **********************************************************************/ 3970 static void 3971 em_txeof(struct adapter *adapter) 3972 { 3973 int first, last, done, num_avail; 3974 u32 cleaned = 0; 3975 struct em_buffer *tx_buffer; 3976 struct e1000_tx_desc *tx_desc, *eop_desc; 3977 struct ifnet *ifp = adapter->ifp; 3978 3979 EM_TX_LOCK_ASSERT(adapter); 3980 3981 if (adapter->num_tx_desc_avail == adapter->num_tx_desc) 3982 return; 3983 3984 num_avail = adapter->num_tx_desc_avail; 3985 first = adapter->next_tx_to_clean; 3986 tx_desc = &adapter->tx_desc_base[first]; 3987 tx_buffer = &adapter->tx_buffer_area[first]; 3988 last = tx_buffer->next_eop; 3989 eop_desc = &adapter->tx_desc_base[last]; 3990 3991 /* 3992 * What this does is get the index of the 3993 * first descriptor AFTER the EOP of the 3994 * first packet, that way we can do the 3995 * simple comparison on the inner while loop. 3996 */ 3997 if (++last == adapter->num_tx_desc) 3998 last = 0; 3999 done = last; 4000 4001 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 4002 BUS_DMASYNC_POSTREAD); 4003 4004 while (eop_desc->upper.fields.status & E1000_TXD_STAT_DD) { 4005 /* We clean the range of the packet */ 4006 while (first != done) { 4007 tx_desc->upper.data = 0; 4008 tx_desc->lower.data = 0; 4009 tx_desc->buffer_addr = 0; 4010 ++num_avail; ++cleaned; 4011 4012 if (tx_buffer->m_head) { 4013 ifp->if_opackets++; 4014 bus_dmamap_sync(adapter->txtag, 4015 tx_buffer->map, 4016 BUS_DMASYNC_POSTWRITE); 4017 bus_dmamap_unload(adapter->txtag, 4018 tx_buffer->map); 4019 4020 m_freem(tx_buffer->m_head); 4021 tx_buffer->m_head = NULL; 4022 } 4023 tx_buffer->next_eop = -1; 4024 4025 if (++first == adapter->num_tx_desc) 4026 first = 0; 4027 4028 tx_buffer = &adapter->tx_buffer_area[first]; 4029 tx_desc = &adapter->tx_desc_base[first]; 4030 } 4031 /* See if we can continue to the next packet */ 4032 last = tx_buffer->next_eop; 4033 if (last != -1) { 4034 eop_desc = &adapter->tx_desc_base[last]; 4035 /* Get new done point */ 4036 if (++last == adapter->num_tx_desc) last = 0; 4037 done = last; 4038 } else 4039 break; 4040 } 4041 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 4042 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 4043 4044 adapter->next_tx_to_clean = first; 4045 4046 /* 4047 * If we have enough room, clear IFF_DRV_OACTIVE to 4048 * tell the stack that it is OK to send packets. 4049 * If there are no pending descriptors, clear the timeout. 4050 */ 4051 if (num_avail > EM_TX_CLEANUP_THRESHOLD) { 4052 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 4053 if (num_avail == adapter->num_tx_desc) { 4054 adapter->watchdog_timer = 0; 4055 adapter->num_tx_desc_avail = num_avail; 4056 return; 4057 } 4058 } 4059 4060 /* If any descriptors cleaned, reset the watchdog */ 4061 if (cleaned) 4062 adapter->watchdog_timer = EM_TX_TIMEOUT; 4063 adapter->num_tx_desc_avail = num_avail; 4064 return; 4065 } 4066 4067 /********************************************************************* 4068 * 4069 * When Link is lost sometimes there is work still in the TX ring 4070 * which will result in a watchdog, rather than allow that do an 4071 * attempted cleanup and then reinit here. Note that this has been 4072 * seens mostly with fiber adapters. 4073 * 4074 **********************************************************************/ 4075 static void 4076 em_tx_purge(struct adapter *adapter) 4077 { 4078 if ((!adapter->link_active) && (adapter->watchdog_timer)) { 4079 EM_TX_LOCK(adapter); 4080 em_txeof(adapter); 4081 EM_TX_UNLOCK(adapter); 4082 if (adapter->watchdog_timer) { /* Still not clean? */ 4083 adapter->watchdog_timer = 0; 4084 em_init_locked(adapter); 4085 } 4086 } 4087 } 4088 4089 /********************************************************************* 4090 * 4091 * Get a buffer from system mbuf buffer pool. 4092 * 4093 **********************************************************************/ 4094 static int 4095 em_get_buf(struct adapter *adapter, int i) 4096 { 4097 struct mbuf *m; 4098 bus_dma_segment_t segs[1]; 4099 bus_dmamap_t map; 4100 struct em_buffer *rx_buffer; 4101 int error, nsegs; 4102 4103 m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 4104 if (m == NULL) { 4105 adapter->mbuf_cluster_failed++; 4106 return (ENOBUFS); 4107 } 4108 m->m_len = m->m_pkthdr.len = MCLBYTES; 4109 4110 if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN)) 4111 m_adj(m, ETHER_ALIGN); 4112 4113 /* 4114 * Using memory from the mbuf cluster pool, invoke the 4115 * bus_dma machinery to arrange the memory mapping. 4116 */ 4117 error = bus_dmamap_load_mbuf_sg(adapter->rxtag, 4118 adapter->rx_sparemap, m, segs, &nsegs, BUS_DMA_NOWAIT); 4119 if (error != 0) { 4120 m_free(m); 4121 return (error); 4122 } 4123 4124 /* If nsegs is wrong then the stack is corrupt. */ 4125 KASSERT(nsegs == 1, ("Too many segments returned!")); 4126 4127 rx_buffer = &adapter->rx_buffer_area[i]; 4128 if (rx_buffer->m_head != NULL) 4129 bus_dmamap_unload(adapter->rxtag, rx_buffer->map); 4130 4131 map = rx_buffer->map; 4132 rx_buffer->map = adapter->rx_sparemap; 4133 adapter->rx_sparemap = map; 4134 bus_dmamap_sync(adapter->rxtag, rx_buffer->map, BUS_DMASYNC_PREREAD); 4135 rx_buffer->m_head = m; 4136 4137 adapter->rx_desc_base[i].buffer_addr = htole64(segs[0].ds_addr); 4138 return (0); 4139 } 4140 4141 /********************************************************************* 4142 * 4143 * Allocate memory for rx_buffer structures. Since we use one 4144 * rx_buffer per received packet, the maximum number of rx_buffer's 4145 * that we'll need is equal to the number of receive descriptors 4146 * that we've allocated. 4147 * 4148 **********************************************************************/ 4149 static int 4150 em_allocate_receive_structures(struct adapter *adapter) 4151 { 4152 device_t dev = adapter->dev; 4153 struct em_buffer *rx_buffer; 4154 int i, error; 4155 4156 adapter->rx_buffer_area = malloc(sizeof(struct em_buffer) * 4157 adapter->num_rx_desc, M_DEVBUF, M_NOWAIT | M_ZERO); 4158 if (adapter->rx_buffer_area == NULL) { 4159 device_printf(dev, "Unable to allocate rx_buffer memory\n"); 4160 return (ENOMEM); 4161 } 4162 4163 #if __FreeBSD_version >= 700000 4164 error = bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 4165 #else 4166 error = bus_dma_tag_create(NULL, /* parent */ 4167 #endif 4168 1, 0, /* alignment, bounds */ 4169 BUS_SPACE_MAXADDR, /* lowaddr */ 4170 BUS_SPACE_MAXADDR, /* highaddr */ 4171 NULL, NULL, /* filter, filterarg */ 4172 MCLBYTES, /* maxsize */ 4173 1, /* nsegments */ 4174 MCLBYTES, /* maxsegsize */ 4175 0, /* flags */ 4176 NULL, /* lockfunc */ 4177 NULL, /* lockarg */ 4178 &adapter->rxtag); 4179 if (error) { 4180 device_printf(dev, "%s: bus_dma_tag_create failed %d\n", 4181 __func__, error); 4182 goto fail; 4183 } 4184 4185 /* Create the spare map (used by getbuf) */ 4186 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_NOWAIT, 4187 &adapter->rx_sparemap); 4188 if (error) { 4189 device_printf(dev, "%s: bus_dmamap_create failed: %d\n", 4190 __func__, error); 4191 goto fail; 4192 } 4193 4194 rx_buffer = adapter->rx_buffer_area; 4195 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) { 4196 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_NOWAIT, 4197 &rx_buffer->map); 4198 if (error) { 4199 device_printf(dev, "%s: bus_dmamap_create failed: %d\n", 4200 __func__, error); 4201 goto fail; 4202 } 4203 } 4204 4205 return (0); 4206 4207 fail: 4208 em_free_receive_structures(adapter); 4209 return (error); 4210 } 4211 4212 /********************************************************************* 4213 * 4214 * (Re)initialize receive structures. 4215 * 4216 **********************************************************************/ 4217 static int 4218 em_setup_receive_structures(struct adapter *adapter) 4219 { 4220 struct em_buffer *rx_buffer; 4221 int i, error; 4222 4223 /* Reset descriptor ring */ 4224 bzero(adapter->rx_desc_base, 4225 (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc); 4226 4227 /* Free current RX buffers. */ 4228 rx_buffer = adapter->rx_buffer_area; 4229 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) { 4230 if (rx_buffer->m_head != NULL) { 4231 bus_dmamap_sync(adapter->rxtag, rx_buffer->map, 4232 BUS_DMASYNC_POSTREAD); 4233 bus_dmamap_unload(adapter->rxtag, rx_buffer->map); 4234 m_freem(rx_buffer->m_head); 4235 rx_buffer->m_head = NULL; 4236 } 4237 } 4238 4239 /* Allocate new ones. */ 4240 for (i = 0; i < adapter->num_rx_desc; i++) { 4241 error = em_get_buf(adapter, i); 4242 if (error) 4243 return (error); 4244 } 4245 4246 /* Setup our descriptor pointers */ 4247 adapter->next_rx_desc_to_check = 0; 4248 bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map, 4249 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 4250 4251 return (0); 4252 } 4253 4254 /********************************************************************* 4255 * 4256 * Enable receive unit. 4257 * 4258 **********************************************************************/ 4259 #define MAX_INTS_PER_SEC 8000 4260 #define DEFAULT_ITR 1000000000/(MAX_INTS_PER_SEC * 256) 4261 4262 static void 4263 em_initialize_receive_unit(struct adapter *adapter) 4264 { 4265 struct ifnet *ifp = adapter->ifp; 4266 u64 bus_addr; 4267 u32 rctl, rxcsum; 4268 4269 INIT_DEBUGOUT("em_initialize_receive_unit: begin"); 4270 4271 /* 4272 * Make sure receives are disabled while setting 4273 * up the descriptor ring 4274 */ 4275 rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); 4276 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN); 4277 4278 if (adapter->hw.mac.type >= e1000_82540) { 4279 E1000_WRITE_REG(&adapter->hw, E1000_RADV, 4280 adapter->rx_abs_int_delay.value); 4281 /* 4282 * Set the interrupt throttling rate. Value is calculated 4283 * as DEFAULT_ITR = 1/(MAX_INTS_PER_SEC * 256ns) 4284 */ 4285 E1000_WRITE_REG(&adapter->hw, E1000_ITR, DEFAULT_ITR); 4286 } 4287 4288 /* 4289 ** When using MSIX interrupts we need to throttle 4290 ** using the EITR register (82574 only) 4291 */ 4292 if (adapter->msix) 4293 for (int i = 0; i < 4; i++) 4294 E1000_WRITE_REG(&adapter->hw, 4295 E1000_EITR_82574(i), DEFAULT_ITR); 4296 4297 /* Disable accelerated ackknowledge */ 4298 if (adapter->hw.mac.type == e1000_82574) 4299 E1000_WRITE_REG(&adapter->hw, 4300 E1000_RFCTL, E1000_RFCTL_ACK_DIS); 4301 4302 /* Setup the Base and Length of the Rx Descriptor Ring */ 4303 bus_addr = adapter->rxdma.dma_paddr; 4304 E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0), 4305 adapter->num_rx_desc * sizeof(struct e1000_rx_desc)); 4306 E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0), 4307 (u32)(bus_addr >> 32)); 4308 E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0), 4309 (u32)bus_addr); 4310 4311 /* Setup the Receive Control Register */ 4312 rctl &= ~(3 << E1000_RCTL_MO_SHIFT); 4313 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO | 4314 E1000_RCTL_RDMTS_HALF | 4315 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); 4316 4317 /* Make sure VLAN Filters are off */ 4318 rctl &= ~E1000_RCTL_VFE; 4319 4320 if (e1000_tbi_sbp_enabled_82543(&adapter->hw)) 4321 rctl |= E1000_RCTL_SBP; 4322 else 4323 rctl &= ~E1000_RCTL_SBP; 4324 4325 switch (adapter->rx_buffer_len) { 4326 default: 4327 case 2048: 4328 rctl |= E1000_RCTL_SZ_2048; 4329 break; 4330 case 4096: 4331 rctl |= E1000_RCTL_SZ_4096 | 4332 E1000_RCTL_BSEX | E1000_RCTL_LPE; 4333 break; 4334 case 8192: 4335 rctl |= E1000_RCTL_SZ_8192 | 4336 E1000_RCTL_BSEX | E1000_RCTL_LPE; 4337 break; 4338 case 16384: 4339 rctl |= E1000_RCTL_SZ_16384 | 4340 E1000_RCTL_BSEX | E1000_RCTL_LPE; 4341 break; 4342 } 4343 4344 if (ifp->if_mtu > ETHERMTU) 4345 rctl |= E1000_RCTL_LPE; 4346 else 4347 rctl &= ~E1000_RCTL_LPE; 4348 4349 /* Enable 82543 Receive Checksum Offload for TCP and UDP */ 4350 if ((adapter->hw.mac.type >= e1000_82543) && 4351 (ifp->if_capenable & IFCAP_RXCSUM)) { 4352 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM); 4353 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL); 4354 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum); 4355 } 4356 4357 /* 4358 ** XXX TEMPORARY WORKAROUND: on some systems with 82573 4359 ** long latencies are observed, like Lenovo X60. This 4360 ** change eliminates the problem, but since having positive 4361 ** values in RDTR is a known source of problems on other 4362 ** platforms another solution is being sought. 4363 */ 4364 if (adapter->hw.mac.type == e1000_82573) 4365 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, 0x20); 4366 4367 /* Enable Receives */ 4368 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl); 4369 4370 /* 4371 * Setup the HW Rx Head and 4372 * Tail Descriptor Pointers 4373 */ 4374 E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0); 4375 E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1); 4376 4377 return; 4378 } 4379 4380 /********************************************************************* 4381 * 4382 * Free receive related data structures. 4383 * 4384 **********************************************************************/ 4385 static void 4386 em_free_receive_structures(struct adapter *adapter) 4387 { 4388 struct em_buffer *rx_buffer; 4389 int i; 4390 4391 INIT_DEBUGOUT("free_receive_structures: begin"); 4392 4393 if (adapter->rx_sparemap) { 4394 bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap); 4395 adapter->rx_sparemap = NULL; 4396 } 4397 4398 /* Cleanup any existing buffers */ 4399 if (adapter->rx_buffer_area != NULL) { 4400 rx_buffer = adapter->rx_buffer_area; 4401 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) { 4402 if (rx_buffer->m_head != NULL) { 4403 bus_dmamap_sync(adapter->rxtag, rx_buffer->map, 4404 BUS_DMASYNC_POSTREAD); 4405 bus_dmamap_unload(adapter->rxtag, 4406 rx_buffer->map); 4407 m_freem(rx_buffer->m_head); 4408 rx_buffer->m_head = NULL; 4409 } else if (rx_buffer->map != NULL) 4410 bus_dmamap_unload(adapter->rxtag, 4411 rx_buffer->map); 4412 if (rx_buffer->map != NULL) { 4413 bus_dmamap_destroy(adapter->rxtag, 4414 rx_buffer->map); 4415 rx_buffer->map = NULL; 4416 } 4417 } 4418 } 4419 4420 if (adapter->rx_buffer_area != NULL) { 4421 free(adapter->rx_buffer_area, M_DEVBUF); 4422 adapter->rx_buffer_area = NULL; 4423 } 4424 4425 if (adapter->rxtag != NULL) { 4426 bus_dma_tag_destroy(adapter->rxtag); 4427 adapter->rxtag = NULL; 4428 } 4429 } 4430 4431 /********************************************************************* 4432 * 4433 * This routine executes in interrupt context. It replenishes 4434 * the mbufs in the descriptor and sends data which has been 4435 * dma'ed into host memory to upper layer. 4436 * 4437 * We loop at most count times if count is > 0, or until done if 4438 * count < 0. 4439 * 4440 * For polling we also now return the number of cleaned packets 4441 *********************************************************************/ 4442 static int 4443 em_rxeof(struct adapter *adapter, int count) 4444 { 4445 struct ifnet *ifp = adapter->ifp;; 4446 struct mbuf *mp; 4447 u8 status, accept_frame = 0, eop = 0; 4448 u16 len, desc_len, prev_len_adj; 4449 int i, rx_sent = 0; 4450 struct e1000_rx_desc *current_desc; 4451 4452 EM_RX_LOCK(adapter); 4453 i = adapter->next_rx_desc_to_check; 4454 current_desc = &adapter->rx_desc_base[i]; 4455 bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map, 4456 BUS_DMASYNC_POSTREAD); 4457 4458 if (!((current_desc->status) & E1000_RXD_STAT_DD)) { 4459 EM_RX_UNLOCK(adapter); 4460 return (rx_sent); 4461 } 4462 4463 while ((current_desc->status & E1000_RXD_STAT_DD) && 4464 (count != 0) && 4465 (ifp->if_drv_flags & IFF_DRV_RUNNING)) { 4466 struct mbuf *m = NULL; 4467 4468 mp = adapter->rx_buffer_area[i].m_head; 4469 /* 4470 * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT 4471 * needs to access the last received byte in the mbuf. 4472 */ 4473 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map, 4474 BUS_DMASYNC_POSTREAD); 4475 4476 accept_frame = 1; 4477 prev_len_adj = 0; 4478 desc_len = le16toh(current_desc->length); 4479 status = current_desc->status; 4480 if (status & E1000_RXD_STAT_EOP) { 4481 count--; 4482 eop = 1; 4483 if (desc_len < ETHER_CRC_LEN) { 4484 len = 0; 4485 prev_len_adj = ETHER_CRC_LEN - desc_len; 4486 } else 4487 len = desc_len - ETHER_CRC_LEN; 4488 } else { 4489 eop = 0; 4490 len = desc_len; 4491 } 4492 4493 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) { 4494 u8 last_byte; 4495 u32 pkt_len = desc_len; 4496 4497 if (adapter->fmp != NULL) 4498 pkt_len += adapter->fmp->m_pkthdr.len; 4499 4500 last_byte = *(mtod(mp, caddr_t) + desc_len - 1); 4501 if (TBI_ACCEPT(&adapter->hw, status, 4502 current_desc->errors, pkt_len, last_byte, 4503 adapter->min_frame_size, adapter->max_frame_size)) { 4504 e1000_tbi_adjust_stats_82543(&adapter->hw, 4505 &adapter->stats, pkt_len, 4506 adapter->hw.mac.addr, 4507 adapter->max_frame_size); 4508 if (len > 0) 4509 len--; 4510 } else 4511 accept_frame = 0; 4512 } 4513 4514 if (accept_frame) { 4515 if (em_get_buf(adapter, i) != 0) { 4516 ifp->if_iqdrops++; 4517 goto discard; 4518 } 4519 4520 /* Assign correct length to the current fragment */ 4521 mp->m_len = len; 4522 4523 if (adapter->fmp == NULL) { 4524 mp->m_pkthdr.len = len; 4525 adapter->fmp = mp; /* Store the first mbuf */ 4526 adapter->lmp = mp; 4527 } else { 4528 /* Chain mbuf's together */ 4529 mp->m_flags &= ~M_PKTHDR; 4530 /* 4531 * Adjust length of previous mbuf in chain if 4532 * we received less than 4 bytes in the last 4533 * descriptor. 4534 */ 4535 if (prev_len_adj > 0) { 4536 adapter->lmp->m_len -= prev_len_adj; 4537 adapter->fmp->m_pkthdr.len -= 4538 prev_len_adj; 4539 } 4540 adapter->lmp->m_next = mp; 4541 adapter->lmp = adapter->lmp->m_next; 4542 adapter->fmp->m_pkthdr.len += len; 4543 } 4544 4545 if (eop) { 4546 adapter->fmp->m_pkthdr.rcvif = ifp; 4547 ifp->if_ipackets++; 4548 em_receive_checksum(adapter, current_desc, 4549 adapter->fmp); 4550 #ifndef __NO_STRICT_ALIGNMENT 4551 if (adapter->max_frame_size > 4552 (MCLBYTES - ETHER_ALIGN) && 4553 em_fixup_rx(adapter) != 0) 4554 goto skip; 4555 #endif 4556 if (status & E1000_RXD_STAT_VP) { 4557 #if __FreeBSD_version < 700000 4558 VLAN_INPUT_TAG_NEW(ifp, adapter->fmp, 4559 (le16toh(current_desc->special) & 4560 E1000_RXD_SPC_VLAN_MASK)); 4561 #else 4562 adapter->fmp->m_pkthdr.ether_vtag = 4563 (le16toh(current_desc->special) & 4564 E1000_RXD_SPC_VLAN_MASK); 4565 adapter->fmp->m_flags |= M_VLANTAG; 4566 #endif 4567 } 4568 #ifndef __NO_STRICT_ALIGNMENT 4569 skip: 4570 #endif 4571 m = adapter->fmp; 4572 adapter->fmp = NULL; 4573 adapter->lmp = NULL; 4574 } 4575 } else { 4576 ifp->if_ierrors++; 4577 discard: 4578 /* Reuse loaded DMA map and just update mbuf chain */ 4579 mp = adapter->rx_buffer_area[i].m_head; 4580 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 4581 mp->m_data = mp->m_ext.ext_buf; 4582 mp->m_next = NULL; 4583 if (adapter->max_frame_size <= 4584 (MCLBYTES - ETHER_ALIGN)) 4585 m_adj(mp, ETHER_ALIGN); 4586 if (adapter->fmp != NULL) { 4587 m_freem(adapter->fmp); 4588 adapter->fmp = NULL; 4589 adapter->lmp = NULL; 4590 } 4591 m = NULL; 4592 } 4593 4594 /* Zero out the receive descriptors status. */ 4595 current_desc->status = 0; 4596 bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map, 4597 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 4598 4599 /* Advance our pointers to the next descriptor. */ 4600 if (++i == adapter->num_rx_desc) 4601 i = 0; 4602 /* Call into the stack */ 4603 if (m != NULL) { 4604 adapter->next_rx_desc_to_check = i; 4605 EM_RX_UNLOCK(adapter); 4606 (*ifp->if_input)(ifp, m); 4607 EM_RX_LOCK(adapter); 4608 rx_sent++; 4609 i = adapter->next_rx_desc_to_check; 4610 } 4611 current_desc = &adapter->rx_desc_base[i]; 4612 } 4613 adapter->next_rx_desc_to_check = i; 4614 4615 /* Advance the E1000's Receive Queue #0 "Tail Pointer". */ 4616 if (--i < 0) 4617 i = adapter->num_rx_desc - 1; 4618 E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i); 4619 EM_RX_UNLOCK(adapter); 4620 return (rx_sent); 4621 } 4622 4623 #ifndef __NO_STRICT_ALIGNMENT 4624 /* 4625 * When jumbo frames are enabled we should realign entire payload on 4626 * architecures with strict alignment. This is serious design mistake of 8254x 4627 * as it nullifies DMA operations. 8254x just allows RX buffer size to be 4628 * 2048/4096/8192/16384. What we really want is 2048 - ETHER_ALIGN to align its 4629 * payload. On architecures without strict alignment restrictions 8254x still 4630 * performs unaligned memory access which would reduce the performance too. 4631 * To avoid copying over an entire frame to align, we allocate a new mbuf and 4632 * copy ethernet header to the new mbuf. The new mbuf is prepended into the 4633 * existing mbuf chain. 4634 * 4635 * Be aware, best performance of the 8254x is achived only when jumbo frame is 4636 * not used at all on architectures with strict alignment. 4637 */ 4638 static int 4639 em_fixup_rx(struct adapter *adapter) 4640 { 4641 struct mbuf *m, *n; 4642 int error; 4643 4644 error = 0; 4645 m = adapter->fmp; 4646 if (m->m_len <= (MCLBYTES - ETHER_HDR_LEN)) { 4647 bcopy(m->m_data, m->m_data + ETHER_HDR_LEN, m->m_len); 4648 m->m_data += ETHER_HDR_LEN; 4649 } else { 4650 MGETHDR(n, M_DONTWAIT, MT_DATA); 4651 if (n != NULL) { 4652 bcopy(m->m_data, n->m_data, ETHER_HDR_LEN); 4653 m->m_data += ETHER_HDR_LEN; 4654 m->m_len -= ETHER_HDR_LEN; 4655 n->m_len = ETHER_HDR_LEN; 4656 M_MOVE_PKTHDR(n, m); 4657 n->m_next = m; 4658 adapter->fmp = n; 4659 } else { 4660 adapter->dropped_pkts++; 4661 m_freem(adapter->fmp); 4662 adapter->fmp = NULL; 4663 error = ENOMEM; 4664 } 4665 } 4666 4667 return (error); 4668 } 4669 #endif 4670 4671 /********************************************************************* 4672 * 4673 * Verify that the hardware indicated that the checksum is valid. 4674 * Inform the stack about the status of checksum so that stack 4675 * doesn't spend time verifying the checksum. 4676 * 4677 *********************************************************************/ 4678 static void 4679 em_receive_checksum(struct adapter *adapter, 4680 struct e1000_rx_desc *rx_desc, struct mbuf *mp) 4681 { 4682 /* 82543 or newer only */ 4683 if ((adapter->hw.mac.type < e1000_82543) || 4684 /* Ignore Checksum bit is set */ 4685 (rx_desc->status & E1000_RXD_STAT_IXSM)) { 4686 mp->m_pkthdr.csum_flags = 0; 4687 return; 4688 } 4689 4690 if (rx_desc->status & E1000_RXD_STAT_IPCS) { 4691 /* Did it pass? */ 4692 if (!(rx_desc->errors & E1000_RXD_ERR_IPE)) { 4693 /* IP Checksum Good */ 4694 mp->m_pkthdr.csum_flags = CSUM_IP_CHECKED; 4695 mp->m_pkthdr.csum_flags |= CSUM_IP_VALID; 4696 4697 } else { 4698 mp->m_pkthdr.csum_flags = 0; 4699 } 4700 } 4701 4702 if (rx_desc->status & E1000_RXD_STAT_TCPCS) { 4703 /* Did it pass? */ 4704 if (!(rx_desc->errors & E1000_RXD_ERR_TCPE)) { 4705 mp->m_pkthdr.csum_flags |= 4706 (CSUM_DATA_VALID | CSUM_PSEUDO_HDR); 4707 mp->m_pkthdr.csum_data = htons(0xffff); 4708 } 4709 } 4710 } 4711 4712 #if __FreeBSD_version >= 700029 4713 /* 4714 * This routine is run via an vlan 4715 * config EVENT 4716 */ 4717 static void 4718 em_register_vlan(void *unused, struct ifnet *ifp, u16 vtag) 4719 { 4720 struct adapter *adapter = ifp->if_softc; 4721 u32 index, bit; 4722 4723 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 4724 return; 4725 4726 index = (vtag >> 5) & 0x7F; 4727 bit = vtag & 0x1F; 4728 em_shadow_vfta[index] |= (1 << bit); 4729 ++adapter->num_vlans; 4730 /* Re-init to load the changes */ 4731 em_init(adapter); 4732 } 4733 4734 /* 4735 * This routine is run via an vlan 4736 * unconfig EVENT 4737 */ 4738 static void 4739 em_unregister_vlan(void *unused, struct ifnet *ifp, u16 vtag) 4740 { 4741 struct adapter *adapter = ifp->if_softc; 4742 u32 index, bit; 4743 4744 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 4745 return; 4746 4747 index = (vtag >> 5) & 0x7F; 4748 bit = vtag & 0x1F; 4749 em_shadow_vfta[index] &= ~(1 << bit); 4750 --adapter->num_vlans; 4751 /* Re-init to load the changes */ 4752 em_init(adapter); 4753 } 4754 4755 static void 4756 em_setup_vlan_hw_support(struct adapter *adapter) 4757 { 4758 struct e1000_hw *hw = &adapter->hw; 4759 u32 reg; 4760 4761 /* 4762 ** We get here thru init_locked, meaning 4763 ** a soft reset, this has already cleared 4764 ** the VFTA and other state, so if there 4765 ** have been no vlan's registered do nothing. 4766 */ 4767 if (adapter->num_vlans == 0) 4768 return; 4769 4770 /* 4771 ** A soft reset zero's out the VFTA, so 4772 ** we need to repopulate it now. 4773 */ 4774 for (int i = 0; i < EM_VFTA_SIZE; i++) 4775 if (em_shadow_vfta[i] != 0) 4776 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, 4777 i, em_shadow_vfta[i]); 4778 4779 reg = E1000_READ_REG(hw, E1000_CTRL); 4780 reg |= E1000_CTRL_VME; 4781 E1000_WRITE_REG(hw, E1000_CTRL, reg); 4782 4783 /* Enable the Filter Table */ 4784 reg = E1000_READ_REG(hw, E1000_RCTL); 4785 reg &= ~E1000_RCTL_CFIEN; 4786 reg |= E1000_RCTL_VFE; 4787 E1000_WRITE_REG(hw, E1000_RCTL, reg); 4788 4789 /* Update the frame size */ 4790 E1000_WRITE_REG(&adapter->hw, E1000_RLPML, 4791 adapter->max_frame_size + VLAN_TAG_SIZE); 4792 } 4793 #endif 4794 4795 static void 4796 em_enable_intr(struct adapter *adapter) 4797 { 4798 struct e1000_hw *hw = &adapter->hw; 4799 u32 ims_mask = IMS_ENABLE_MASK; 4800 4801 if (adapter->msix) { 4802 E1000_WRITE_REG(hw, EM_EIAC, EM_MSIX_MASK); 4803 ims_mask |= EM_MSIX_MASK; 4804 } 4805 E1000_WRITE_REG(hw, E1000_IMS, ims_mask); 4806 } 4807 4808 static void 4809 em_disable_intr(struct adapter *adapter) 4810 { 4811 struct e1000_hw *hw = &adapter->hw; 4812 4813 if (adapter->msix) 4814 E1000_WRITE_REG(hw, EM_EIAC, 0); 4815 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff); 4816 } 4817 4818 /* 4819 * Bit of a misnomer, what this really means is 4820 * to enable OS management of the system... aka 4821 * to disable special hardware management features 4822 */ 4823 static void 4824 em_init_manageability(struct adapter *adapter) 4825 { 4826 /* A shared code workaround */ 4827 #define E1000_82542_MANC2H E1000_MANC2H 4828 if (adapter->has_manage) { 4829 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H); 4830 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC); 4831 4832 /* disable hardware interception of ARP */ 4833 manc &= ~(E1000_MANC_ARP_EN); 4834 4835 /* enable receiving management packets to the host */ 4836 if (adapter->hw.mac.type >= e1000_82571) { 4837 manc |= E1000_MANC_EN_MNG2HOST; 4838 #define E1000_MNG2HOST_PORT_623 (1 << 5) 4839 #define E1000_MNG2HOST_PORT_664 (1 << 6) 4840 manc2h |= E1000_MNG2HOST_PORT_623; 4841 manc2h |= E1000_MNG2HOST_PORT_664; 4842 E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h); 4843 } 4844 4845 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc); 4846 } 4847 } 4848 4849 /* 4850 * Give control back to hardware management 4851 * controller if there is one. 4852 */ 4853 static void 4854 em_release_manageability(struct adapter *adapter) 4855 { 4856 if (adapter->has_manage) { 4857 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC); 4858 4859 /* re-enable hardware interception of ARP */ 4860 manc |= E1000_MANC_ARP_EN; 4861 4862 if (adapter->hw.mac.type >= e1000_82571) 4863 manc &= ~E1000_MANC_EN_MNG2HOST; 4864 4865 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc); 4866 } 4867 } 4868 4869 /* 4870 * em_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit. 4871 * For ASF and Pass Through versions of f/w this means that 4872 * the driver is loaded. For AMT version (only with 82573) 4873 * of the f/w this means that the network i/f is open. 4874 * 4875 */ 4876 static void 4877 em_get_hw_control(struct adapter *adapter) 4878 { 4879 u32 ctrl_ext, swsm; 4880 4881 /* Let firmware know the driver has taken over */ 4882 switch (adapter->hw.mac.type) { 4883 case e1000_82573: 4884 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM); 4885 E1000_WRITE_REG(&adapter->hw, E1000_SWSM, 4886 swsm | E1000_SWSM_DRV_LOAD); 4887 break; 4888 case e1000_82571: 4889 case e1000_82572: 4890 case e1000_80003es2lan: 4891 case e1000_ich8lan: 4892 case e1000_ich9lan: 4893 case e1000_ich10lan: 4894 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT); 4895 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, 4896 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); 4897 break; 4898 default: 4899 break; 4900 } 4901 } 4902 4903 /* 4904 * em_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit. 4905 * For ASF and Pass Through versions of f/w this means that the 4906 * driver is no longer loaded. For AMT version (only with 82573) i 4907 * of the f/w this means that the network i/f is closed. 4908 * 4909 */ 4910 static void 4911 em_release_hw_control(struct adapter *adapter) 4912 { 4913 u32 ctrl_ext, swsm; 4914 4915 /* Let firmware taken over control of h/w */ 4916 switch (adapter->hw.mac.type) { 4917 case e1000_82573: 4918 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM); 4919 E1000_WRITE_REG(&adapter->hw, E1000_SWSM, 4920 swsm & ~E1000_SWSM_DRV_LOAD); 4921 break; 4922 case e1000_82571: 4923 case e1000_82572: 4924 case e1000_80003es2lan: 4925 case e1000_ich8lan: 4926 case e1000_ich9lan: 4927 case e1000_ich10lan: 4928 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT); 4929 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, 4930 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); 4931 break; 4932 default: 4933 break; 4934 4935 } 4936 } 4937 4938 static int 4939 em_is_valid_ether_addr(u8 *addr) 4940 { 4941 char zero_addr[6] = { 0, 0, 0, 0, 0, 0 }; 4942 4943 if ((addr[0] & 1) || (!bcmp(addr, zero_addr, ETHER_ADDR_LEN))) { 4944 return (FALSE); 4945 } 4946 4947 return (TRUE); 4948 } 4949 4950 /* 4951 * Enable PCI Wake On Lan capability 4952 */ 4953 void 4954 em_enable_wakeup(device_t dev) 4955 { 4956 u16 cap, status; 4957 u8 id; 4958 4959 /* First find the capabilities pointer*/ 4960 cap = pci_read_config(dev, PCIR_CAP_PTR, 2); 4961 /* Read the PM Capabilities */ 4962 id = pci_read_config(dev, cap, 1); 4963 if (id != PCIY_PMG) /* Something wrong */ 4964 return; 4965 /* OK, we have the power capabilities, so 4966 now get the status register */ 4967 cap += PCIR_POWER_STATUS; 4968 status = pci_read_config(dev, cap, 2); 4969 status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE; 4970 pci_write_config(dev, cap, status, 2); 4971 return; 4972 } 4973 4974 4975 /********************************************************************* 4976 * 82544 Coexistence issue workaround. 4977 * There are 2 issues. 4978 * 1. Transmit Hang issue. 4979 * To detect this issue, following equation can be used... 4980 * SIZE[3:0] + ADDR[2:0] = SUM[3:0]. 4981 * If SUM[3:0] is in between 1 to 4, we will have this issue. 4982 * 4983 * 2. DAC issue. 4984 * To detect this issue, following equation can be used... 4985 * SIZE[3:0] + ADDR[2:0] = SUM[3:0]. 4986 * If SUM[3:0] is in between 9 to c, we will have this issue. 4987 * 4988 * 4989 * WORKAROUND: 4990 * Make sure we do not have ending address 4991 * as 1,2,3,4(Hang) or 9,a,b,c (DAC) 4992 * 4993 *************************************************************************/ 4994 static u32 4995 em_fill_descriptors (bus_addr_t address, u32 length, 4996 PDESC_ARRAY desc_array) 4997 { 4998 u32 safe_terminator; 4999 5000 /* Since issue is sensitive to length and address.*/ 5001 /* Let us first check the address...*/ 5002 if (length <= 4) { 5003 desc_array->descriptor[0].address = address; 5004 desc_array->descriptor[0].length = length; 5005 desc_array->elements = 1; 5006 return (desc_array->elements); 5007 } 5008 safe_terminator = (u32)((((u32)address & 0x7) + 5009 (length & 0xF)) & 0xF); 5010 /* if it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */ 5011 if (safe_terminator == 0 || 5012 (safe_terminator > 4 && 5013 safe_terminator < 9) || 5014 (safe_terminator > 0xC && 5015 safe_terminator <= 0xF)) { 5016 desc_array->descriptor[0].address = address; 5017 desc_array->descriptor[0].length = length; 5018 desc_array->elements = 1; 5019 return (desc_array->elements); 5020 } 5021 5022 desc_array->descriptor[0].address = address; 5023 desc_array->descriptor[0].length = length - 4; 5024 desc_array->descriptor[1].address = address + (length - 4); 5025 desc_array->descriptor[1].length = 4; 5026 desc_array->elements = 2; 5027 return (desc_array->elements); 5028 } 5029 5030 /********************************************************************** 5031 * 5032 * Update the board statistics counters. 5033 * 5034 **********************************************************************/ 5035 static void 5036 em_update_stats_counters(struct adapter *adapter) 5037 { 5038 struct ifnet *ifp; 5039 5040 if(adapter->hw.phy.media_type == e1000_media_type_copper || 5041 (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) { 5042 adapter->stats.symerrs += E1000_READ_REG(&adapter->hw, E1000_SYMERRS); 5043 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC); 5044 } 5045 adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS); 5046 adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC); 5047 adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC); 5048 adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL); 5049 5050 adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC); 5051 adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL); 5052 adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC); 5053 adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC); 5054 adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC); 5055 adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC); 5056 adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC); 5057 adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC); 5058 adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC); 5059 adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC); 5060 adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64); 5061 adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127); 5062 adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255); 5063 adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511); 5064 adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023); 5065 adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522); 5066 adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC); 5067 adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC); 5068 adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC); 5069 adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC); 5070 5071 /* For the 64-bit byte counters the low dword must be read first. */ 5072 /* Both registers clear on the read of the high dword */ 5073 5074 adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH); 5075 adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH); 5076 5077 adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC); 5078 adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC); 5079 adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC); 5080 adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC); 5081 adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC); 5082 5083 adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH); 5084 adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH); 5085 5086 adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR); 5087 adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT); 5088 adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64); 5089 adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127); 5090 adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255); 5091 adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511); 5092 adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023); 5093 adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522); 5094 adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC); 5095 adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC); 5096 5097 if (adapter->hw.mac.type >= e1000_82543) { 5098 adapter->stats.algnerrc += 5099 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC); 5100 adapter->stats.rxerrc += 5101 E1000_READ_REG(&adapter->hw, E1000_RXERRC); 5102 adapter->stats.tncrs += 5103 E1000_READ_REG(&adapter->hw, E1000_TNCRS); 5104 adapter->stats.cexterr += 5105 E1000_READ_REG(&adapter->hw, E1000_CEXTERR); 5106 adapter->stats.tsctc += 5107 E1000_READ_REG(&adapter->hw, E1000_TSCTC); 5108 adapter->stats.tsctfc += 5109 E1000_READ_REG(&adapter->hw, E1000_TSCTFC); 5110 } 5111 ifp = adapter->ifp; 5112 5113 ifp->if_collisions = adapter->stats.colc; 5114 5115 /* Rx Errors */ 5116 ifp->if_ierrors = adapter->dropped_pkts + adapter->stats.rxerrc + 5117 adapter->stats.crcerrs + adapter->stats.algnerrc + 5118 adapter->stats.ruc + adapter->stats.roc + 5119 adapter->stats.mpc + adapter->stats.cexterr; 5120 5121 /* Tx Errors */ 5122 ifp->if_oerrors = adapter->stats.ecol + 5123 adapter->stats.latecol + adapter->watchdog_events; 5124 } 5125 5126 5127 /********************************************************************** 5128 * 5129 * This routine is called only when em_display_debug_stats is enabled. 5130 * This routine provides a way to take a look at important statistics 5131 * maintained by the driver and hardware. 5132 * 5133 **********************************************************************/ 5134 static void 5135 em_print_debug_info(struct adapter *adapter) 5136 { 5137 device_t dev = adapter->dev; 5138 u8 *hw_addr = adapter->hw.hw_addr; 5139 5140 device_printf(dev, "Adapter hardware address = %p \n", hw_addr); 5141 device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n", 5142 E1000_READ_REG(&adapter->hw, E1000_CTRL), 5143 E1000_READ_REG(&adapter->hw, E1000_RCTL)); 5144 device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n", 5145 ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\ 5146 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) ); 5147 device_printf(dev, "Flow control watermarks high = %d low = %d\n", 5148 adapter->hw.fc.high_water, 5149 adapter->hw.fc.low_water); 5150 device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n", 5151 E1000_READ_REG(&adapter->hw, E1000_TIDV), 5152 E1000_READ_REG(&adapter->hw, E1000_TADV)); 5153 device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n", 5154 E1000_READ_REG(&adapter->hw, E1000_RDTR), 5155 E1000_READ_REG(&adapter->hw, E1000_RADV)); 5156 device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n", 5157 (long long)adapter->tx_fifo_wrk_cnt, 5158 (long long)adapter->tx_fifo_reset_cnt); 5159 device_printf(dev, "hw tdh = %d, hw tdt = %d\n", 5160 E1000_READ_REG(&adapter->hw, E1000_TDH(0)), 5161 E1000_READ_REG(&adapter->hw, E1000_TDT(0))); 5162 device_printf(dev, "hw rdh = %d, hw rdt = %d\n", 5163 E1000_READ_REG(&adapter->hw, E1000_RDH(0)), 5164 E1000_READ_REG(&adapter->hw, E1000_RDT(0))); 5165 device_printf(dev, "Num Tx descriptors avail = %d\n", 5166 adapter->num_tx_desc_avail); 5167 device_printf(dev, "Tx Descriptors not avail1 = %ld\n", 5168 adapter->no_tx_desc_avail1); 5169 device_printf(dev, "Tx Descriptors not avail2 = %ld\n", 5170 adapter->no_tx_desc_avail2); 5171 device_printf(dev, "Std mbuf failed = %ld\n", 5172 adapter->mbuf_alloc_failed); 5173 device_printf(dev, "Std mbuf cluster failed = %ld\n", 5174 adapter->mbuf_cluster_failed); 5175 device_printf(dev, "Driver dropped packets = %ld\n", 5176 adapter->dropped_pkts); 5177 device_printf(dev, "Driver tx dma failure in encap = %ld\n", 5178 adapter->no_tx_dma_setup); 5179 } 5180 5181 static void 5182 em_print_hw_stats(struct adapter *adapter) 5183 { 5184 device_t dev = adapter->dev; 5185 5186 device_printf(dev, "Excessive collisions = %lld\n", 5187 (long long)adapter->stats.ecol); 5188 #if (DEBUG_HW > 0) /* Dont output these errors normally */ 5189 device_printf(dev, "Symbol errors = %lld\n", 5190 (long long)adapter->stats.symerrs); 5191 #endif 5192 device_printf(dev, "Sequence errors = %lld\n", 5193 (long long)adapter->stats.sec); 5194 device_printf(dev, "Defer count = %lld\n", 5195 (long long)adapter->stats.dc); 5196 device_printf(dev, "Missed Packets = %lld\n", 5197 (long long)adapter->stats.mpc); 5198 device_printf(dev, "Receive No Buffers = %lld\n", 5199 (long long)adapter->stats.rnbc); 5200 /* RLEC is inaccurate on some hardware, calculate our own. */ 5201 device_printf(dev, "Receive Length Errors = %lld\n", 5202 ((long long)adapter->stats.roc + (long long)adapter->stats.ruc)); 5203 device_printf(dev, "Receive errors = %lld\n", 5204 (long long)adapter->stats.rxerrc); 5205 device_printf(dev, "Crc errors = %lld\n", 5206 (long long)adapter->stats.crcerrs); 5207 device_printf(dev, "Alignment errors = %lld\n", 5208 (long long)adapter->stats.algnerrc); 5209 device_printf(dev, "Collision/Carrier extension errors = %lld\n", 5210 (long long)adapter->stats.cexterr); 5211 device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns); 5212 device_printf(dev, "watchdog timeouts = %ld\n", 5213 adapter->watchdog_events); 5214 device_printf(dev, "RX MSIX IRQ = %ld TX MSIX IRQ = %ld" 5215 " LINK MSIX IRQ = %ld\n", adapter->rx_irq, 5216 adapter->tx_irq , adapter->link_irq); 5217 device_printf(dev, "XON Rcvd = %lld\n", 5218 (long long)adapter->stats.xonrxc); 5219 device_printf(dev, "XON Xmtd = %lld\n", 5220 (long long)adapter->stats.xontxc); 5221 device_printf(dev, "XOFF Rcvd = %lld\n", 5222 (long long)adapter->stats.xoffrxc); 5223 device_printf(dev, "XOFF Xmtd = %lld\n", 5224 (long long)adapter->stats.xofftxc); 5225 device_printf(dev, "Good Packets Rcvd = %lld\n", 5226 (long long)adapter->stats.gprc); 5227 device_printf(dev, "Good Packets Xmtd = %lld\n", 5228 (long long)adapter->stats.gptc); 5229 device_printf(dev, "TSO Contexts Xmtd = %lld\n", 5230 (long long)adapter->stats.tsctc); 5231 device_printf(dev, "TSO Contexts Failed = %lld\n", 5232 (long long)adapter->stats.tsctfc); 5233 } 5234 5235 /********************************************************************** 5236 * 5237 * This routine provides a way to dump out the adapter eeprom, 5238 * often a useful debug/service tool. This only dumps the first 5239 * 32 words, stuff that matters is in that extent. 5240 * 5241 **********************************************************************/ 5242 static void 5243 em_print_nvm_info(struct adapter *adapter) 5244 { 5245 u16 eeprom_data; 5246 int i, j, row = 0; 5247 5248 /* Its a bit crude, but it gets the job done */ 5249 printf("\nInterface EEPROM Dump:\n"); 5250 printf("Offset\n0x0000 "); 5251 for (i = 0, j = 0; i < 32; i++, j++) { 5252 if (j == 8) { /* Make the offset block */ 5253 j = 0; ++row; 5254 printf("\n0x00%x0 ",row); 5255 } 5256 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data); 5257 printf("%04x ", eeprom_data); 5258 } 5259 printf("\n"); 5260 } 5261 5262 static int 5263 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS) 5264 { 5265 struct adapter *adapter; 5266 int error; 5267 int result; 5268 5269 result = -1; 5270 error = sysctl_handle_int(oidp, &result, 0, req); 5271 5272 if (error || !req->newptr) 5273 return (error); 5274 5275 if (result == 1) { 5276 adapter = (struct adapter *)arg1; 5277 em_print_debug_info(adapter); 5278 } 5279 /* 5280 * This value will cause a hex dump of the 5281 * first 32 16-bit words of the EEPROM to 5282 * the screen. 5283 */ 5284 if (result == 2) { 5285 adapter = (struct adapter *)arg1; 5286 em_print_nvm_info(adapter); 5287 } 5288 5289 return (error); 5290 } 5291 5292 5293 static int 5294 em_sysctl_stats(SYSCTL_HANDLER_ARGS) 5295 { 5296 struct adapter *adapter; 5297 int error; 5298 int result; 5299 5300 result = -1; 5301 error = sysctl_handle_int(oidp, &result, 0, req); 5302 5303 if (error || !req->newptr) 5304 return (error); 5305 5306 if (result == 1) { 5307 adapter = (struct adapter *)arg1; 5308 em_print_hw_stats(adapter); 5309 } 5310 5311 return (error); 5312 } 5313 5314 static int 5315 em_sysctl_int_delay(SYSCTL_HANDLER_ARGS) 5316 { 5317 struct em_int_delay_info *info; 5318 struct adapter *adapter; 5319 u32 regval; 5320 int error; 5321 int usecs; 5322 int ticks; 5323 5324 info = (struct em_int_delay_info *)arg1; 5325 usecs = info->value; 5326 error = sysctl_handle_int(oidp, &usecs, 0, req); 5327 if (error != 0 || req->newptr == NULL) 5328 return (error); 5329 if (usecs < 0 || usecs > EM_TICKS_TO_USECS(65535)) 5330 return (EINVAL); 5331 info->value = usecs; 5332 ticks = EM_USECS_TO_TICKS(usecs); 5333 5334 adapter = info->adapter; 5335 5336 EM_CORE_LOCK(adapter); 5337 regval = E1000_READ_OFFSET(&adapter->hw, info->offset); 5338 regval = (regval & ~0xffff) | (ticks & 0xffff); 5339 /* Handle a few special cases. */ 5340 switch (info->offset) { 5341 case E1000_RDTR: 5342 break; 5343 case E1000_TIDV: 5344 if (ticks == 0) { 5345 adapter->txd_cmd &= ~E1000_TXD_CMD_IDE; 5346 /* Don't write 0 into the TIDV register. */ 5347 regval++; 5348 } else 5349 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 5350 break; 5351 } 5352 E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval); 5353 EM_CORE_UNLOCK(adapter); 5354 return (0); 5355 } 5356 5357 static void 5358 em_add_int_delay_sysctl(struct adapter *adapter, const char *name, 5359 const char *description, struct em_int_delay_info *info, 5360 int offset, int value) 5361 { 5362 info->adapter = adapter; 5363 info->offset = offset; 5364 info->value = value; 5365 SYSCTL_ADD_PROC(device_get_sysctl_ctx(adapter->dev), 5366 SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)), 5367 OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW, 5368 info, 0, em_sysctl_int_delay, "I", description); 5369 } 5370 5371 #ifndef EM_LEGACY_IRQ 5372 static void 5373 em_add_rx_process_limit(struct adapter *adapter, const char *name, 5374 const char *description, int *limit, int value) 5375 { 5376 *limit = value; 5377 SYSCTL_ADD_INT(device_get_sysctl_ctx(adapter->dev), 5378 SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)), 5379 OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW, limit, value, description); 5380 } 5381 #endif 5382 5383 5384