xref: /freebsd/sys/dev/e1000/e1000_80003es2lan.h (revision 8cfa0ad26610f9c23d9b90cc27591a988f79aa94)
18cfa0ad2SJack F Vogel /*******************************************************************************
28cfa0ad2SJack F Vogel 
38cfa0ad2SJack F Vogel   Copyright (c) 2001-2008, Intel Corporation
48cfa0ad2SJack F Vogel   All rights reserved.
58cfa0ad2SJack F Vogel 
68cfa0ad2SJack F Vogel   Redistribution and use in source and binary forms, with or without
78cfa0ad2SJack F Vogel   modification, are permitted provided that the following conditions are met:
88cfa0ad2SJack F Vogel 
98cfa0ad2SJack F Vogel    1. Redistributions of source code must retain the above copyright notice,
108cfa0ad2SJack F Vogel       this list of conditions and the following disclaimer.
118cfa0ad2SJack F Vogel 
128cfa0ad2SJack F Vogel    2. Redistributions in binary form must reproduce the above copyright
138cfa0ad2SJack F Vogel       notice, this list of conditions and the following disclaimer in the
148cfa0ad2SJack F Vogel       documentation and/or other materials provided with the distribution.
158cfa0ad2SJack F Vogel 
168cfa0ad2SJack F Vogel    3. Neither the name of the Intel Corporation nor the names of its
178cfa0ad2SJack F Vogel       contributors may be used to endorse or promote products derived from
188cfa0ad2SJack F Vogel       this software without specific prior written permission.
198cfa0ad2SJack F Vogel 
208cfa0ad2SJack F Vogel   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
218cfa0ad2SJack F Vogel   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
228cfa0ad2SJack F Vogel   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
238cfa0ad2SJack F Vogel   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
248cfa0ad2SJack F Vogel   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
258cfa0ad2SJack F Vogel   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
268cfa0ad2SJack F Vogel   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
278cfa0ad2SJack F Vogel   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
288cfa0ad2SJack F Vogel   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
298cfa0ad2SJack F Vogel   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
308cfa0ad2SJack F Vogel   POSSIBILITY OF SUCH DAMAGE.
318cfa0ad2SJack F Vogel 
328cfa0ad2SJack F Vogel *******************************************************************************/
338cfa0ad2SJack F Vogel /* $FreeBSD$ */
348cfa0ad2SJack F Vogel 
358cfa0ad2SJack F Vogel 
368cfa0ad2SJack F Vogel #ifndef _E1000_80003ES2LAN_H_
378cfa0ad2SJack F Vogel #define _E1000_80003ES2LAN_H_
388cfa0ad2SJack F Vogel 
398cfa0ad2SJack F Vogel #define E1000_KMRNCTRLSTA_OFFSET_FIFO_CTRL       0x00
408cfa0ad2SJack F Vogel #define E1000_KMRNCTRLSTA_OFFSET_INB_CTRL        0x02
418cfa0ad2SJack F Vogel #define E1000_KMRNCTRLSTA_OFFSET_HD_CTRL         0x10
428cfa0ad2SJack F Vogel #define E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE  0x1F
438cfa0ad2SJack F Vogel 
448cfa0ad2SJack F Vogel #define E1000_KMRNCTRLSTA_FIFO_CTRL_RX_BYPASS    0x0008
458cfa0ad2SJack F Vogel #define E1000_KMRNCTRLSTA_FIFO_CTRL_TX_BYPASS    0x0800
468cfa0ad2SJack F Vogel #define E1000_KMRNCTRLSTA_INB_CTRL_DIS_PADDING   0x0010
478cfa0ad2SJack F Vogel 
488cfa0ad2SJack F Vogel #define E1000_KMRNCTRLSTA_HD_CTRL_10_100_DEFAULT 0x0004
498cfa0ad2SJack F Vogel #define E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT   0x0000
508cfa0ad2SJack F Vogel #define E1000_KMRNCTRLSTA_OPMODE_E_IDLE          0x2000
518cfa0ad2SJack F Vogel 
528cfa0ad2SJack F Vogel #define E1000_TCTL_EXT_GCEX_MASK 0x000FFC00 /* Gigabit Carry Extend Padding */
538cfa0ad2SJack F Vogel #define DEFAULT_TCTL_EXT_GCEX_80003ES2LAN        0x00010000
548cfa0ad2SJack F Vogel 
558cfa0ad2SJack F Vogel #define DEFAULT_TIPG_IPGT_1000_80003ES2LAN       0x8
568cfa0ad2SJack F Vogel #define DEFAULT_TIPG_IPGT_10_100_80003ES2LAN     0x9
578cfa0ad2SJack F Vogel 
588cfa0ad2SJack F Vogel /* GG82563 PHY Specific Status Register (Page 0, Register 16 */
598cfa0ad2SJack F Vogel #define GG82563_PSCR_POLARITY_REVERSAL_DISABLE  0x0002 /* 1=Reversal Disabled */
608cfa0ad2SJack F Vogel #define GG82563_PSCR_CROSSOVER_MODE_MASK        0x0060
618cfa0ad2SJack F Vogel #define GG82563_PSCR_CROSSOVER_MODE_MDI         0x0000 /* 00=Manual MDI */
628cfa0ad2SJack F Vogel #define GG82563_PSCR_CROSSOVER_MODE_MDIX        0x0020 /* 01=Manual MDIX */
638cfa0ad2SJack F Vogel #define GG82563_PSCR_CROSSOVER_MODE_AUTO        0x0060 /* 11=Auto crossover */
648cfa0ad2SJack F Vogel 
658cfa0ad2SJack F Vogel /* PHY Specific Control Register 2 (Page 0, Register 26) */
668cfa0ad2SJack F Vogel #define GG82563_PSCR2_REVERSE_AUTO_NEG          0x2000
678cfa0ad2SJack F Vogel                                                /* 1=Reverse Auto-Negotiation */
688cfa0ad2SJack F Vogel 
698cfa0ad2SJack F Vogel /* MAC Specific Control Register (Page 2, Register 21) */
708cfa0ad2SJack F Vogel /* Tx clock speed for Link Down and 1000BASE-T for the following speeds */
718cfa0ad2SJack F Vogel #define GG82563_MSCR_TX_CLK_MASK                0x0007
728cfa0ad2SJack F Vogel #define GG82563_MSCR_TX_CLK_10MBPS_2_5          0x0004
738cfa0ad2SJack F Vogel #define GG82563_MSCR_TX_CLK_100MBPS_25          0x0005
748cfa0ad2SJack F Vogel #define GG82563_MSCR_TX_CLK_1000MBPS_2_5        0x0006
758cfa0ad2SJack F Vogel #define GG82563_MSCR_TX_CLK_1000MBPS_25         0x0007
768cfa0ad2SJack F Vogel 
778cfa0ad2SJack F Vogel #define GG82563_MSCR_ASSERT_CRS_ON_TX           0x0010 /* 1=Assert */
788cfa0ad2SJack F Vogel 
798cfa0ad2SJack F Vogel /* DSP Distance Register (Page 5, Register 26) */
808cfa0ad2SJack F Vogel /*
818cfa0ad2SJack F Vogel  * 0 = <50M
828cfa0ad2SJack F Vogel  * 1 = 50-80M
838cfa0ad2SJack F Vogel  * 2 = 80-100M
848cfa0ad2SJack F Vogel  * 3 = 110-140M
858cfa0ad2SJack F Vogel  * 4 = >140M
868cfa0ad2SJack F Vogel  */
878cfa0ad2SJack F Vogel #define GG82563_DSPD_CABLE_LENGTH               0x0007
888cfa0ad2SJack F Vogel 
898cfa0ad2SJack F Vogel /* Kumeran Mode Control Register (Page 193, Register 16) */
908cfa0ad2SJack F Vogel #define GG82563_KMCR_PASS_FALSE_CARRIER         0x0800
918cfa0ad2SJack F Vogel 
928cfa0ad2SJack F Vogel /* Max number of times Kumeran read/write should be validated */
938cfa0ad2SJack F Vogel #define GG82563_MAX_KMRN_RETRY                  0x5
948cfa0ad2SJack F Vogel 
958cfa0ad2SJack F Vogel /* Power Management Control Register (Page 193, Register 20) */
968cfa0ad2SJack F Vogel #define GG82563_PMCR_ENABLE_ELECTRICAL_IDLE     0x0001
978cfa0ad2SJack F Vogel                                           /* 1=Enable SERDES Electrical Idle */
988cfa0ad2SJack F Vogel 
998cfa0ad2SJack F Vogel /* In-Band Control Register (Page 194, Register 18) */
1008cfa0ad2SJack F Vogel #define GG82563_ICR_DIS_PADDING                 0x0010 /* Disable Padding */
1018cfa0ad2SJack F Vogel 
1028cfa0ad2SJack F Vogel #endif
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