1 /*- 2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> 3 * 4 * This software was developed by SRI International and the University of 5 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 6 * ("CTSRD"), as part of the DARPA CRASH research programme. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #ifndef __DWC1000_DMA_H__ 31 #define __DWC1000_DMA_H__ 32 33 /* 34 * A hardware buffer descriptor. Rx and Tx buffers have the same descriptor 35 * layout, but the bits in the fields have different meanings. 36 */ 37 struct dwc_hwdesc 38 { 39 uint32_t desc0; 40 uint32_t desc1; 41 uint32_t addr1; /* ptr to first buffer data */ 42 uint32_t addr2; /* ptr to next descriptor / second buffer data*/ 43 }; 44 45 int dma1000_init(struct dwc_softc *sc); 46 void dma1000_free(struct dwc_softc *sc); 47 void dma1000_start(struct dwc_softc *sc); 48 void dma1000_stop(struct dwc_softc *sc); 49 int dma1000_reset(struct dwc_softc *sc); 50 int dma1000_setup_txbuf(struct dwc_softc *sc, int idx, struct mbuf **mp); 51 void dma1000_txfinish_locked(struct dwc_softc *sc); 52 void dma1000_rxfinish_locked(struct dwc_softc *sc); 53 void dma1000_txstart(struct dwc_softc *sc); 54 int dma1000_intr(struct dwc_softc *sc); 55 56 #endif /* __DWC1000_DMA_H__ */ 57