xref: /freebsd/sys/dev/dwc/dwc1000_core.h (revision 783d3ff6d7fae619db8a7990b8a6387de0c677b5)
1 /*-
2  * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
3  *
4  * This software was developed by SRI International and the University of
5  * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
6  * ("CTSRD"), as part of the DARPA CRASH research programme.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  */
29 
30 #ifndef	__DWC1000_CORE_H__
31 #define	 __DWC1000_CORE_H__
32 
33 int dwc1000_miibus_read_reg(device_t dev, int phy, int reg);
34 int dwc1000_miibus_write_reg(device_t dev, int phy, int reg, int val);
35 void dwc1000_miibus_statchg(device_t dev);
36 void dwc1000_core_setup(struct dwc_softc *sc);
37 int dwc1000_core_reset(struct dwc_softc *sc);
38 void dwc1000_enable_mac(struct dwc_softc *sc, bool enable);
39 void dwc1000_enable_csum_offload(struct dwc_softc *sc);
40 void dwc1000_setup_rxfilter(struct dwc_softc *sc);
41 void dwc1000_get_hwaddr(struct dwc_softc *sc, uint8_t *hwaddr);
42 void dwc1000_harvest_stats(struct dwc_softc *sc);
43 void dwc1000_intr(struct dwc_softc *softc);
44 void dwc1000_intr_disable(struct dwc_softc *sc);
45 
46 #endif	/* __DWC1000_CORE_H__ */
47