1 /*- 2 * Copyright 2003 Eric Anholt. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 21 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <sys/cdefs.h> 25 __FBSDID("$FreeBSD$"); 26 27 /** 28 * \file drm_pci.h 29 * \brief PCI consistent, DMA-accessible memory allocation. 30 * 31 * \author Eric Anholt <anholt@FreeBSD.org> 32 */ 33 34 #include <dev/drm2/drmP.h> 35 36 /**********************************************************************/ 37 /** \name PCI memory */ 38 /*@{*/ 39 40 static void 41 drm_pci_busdma_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 42 { 43 drm_dma_handle_t *dmah = arg; 44 45 if (error != 0) 46 return; 47 48 KASSERT(nsegs == 1, ("drm_pci_busdma_callback: bad dma segment count")); 49 dmah->busaddr = segs[0].ds_addr; 50 } 51 52 /** 53 * \brief Allocate a physically contiguous DMA-accessible consistent 54 * memory block. 55 */ 56 drm_dma_handle_t * 57 drm_pci_alloc(struct drm_device *dev, size_t size, 58 size_t align, dma_addr_t maxaddr) 59 { 60 drm_dma_handle_t *dmah; 61 int ret; 62 63 /* Need power-of-two alignment, so fail the allocation if it isn't. */ 64 if ((align & (align - 1)) != 0) { 65 DRM_ERROR("drm_pci_alloc with non-power-of-two alignment %d\n", 66 (int)align); 67 return NULL; 68 } 69 70 dmah = malloc(sizeof(drm_dma_handle_t), DRM_MEM_DMA, M_ZERO | M_NOWAIT); 71 if (dmah == NULL) 72 return NULL; 73 74 /* Make sure we aren't holding mutexes here */ 75 mtx_assert(&dev->dma_lock, MA_NOTOWNED); 76 if (mtx_owned(&dev->dma_lock)) 77 DRM_ERROR("called while holding dma_lock\n"); 78 79 ret = bus_dma_tag_create( 80 bus_get_dma_tag(dev->device), /* parent */ 81 align, 0, /* align, boundary */ 82 maxaddr, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */ 83 NULL, NULL, /* filtfunc, filtfuncargs */ 84 size, 1, size, /* maxsize, nsegs, maxsegsize */ 85 0, NULL, NULL, /* flags, lockfunc, lockfuncargs */ 86 &dmah->tag); 87 if (ret != 0) { 88 free(dmah, DRM_MEM_DMA); 89 return NULL; 90 } 91 92 ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr, 93 BUS_DMA_WAITOK | BUS_DMA_ZERO | BUS_DMA_NOCACHE, &dmah->map); 94 if (ret != 0) { 95 bus_dma_tag_destroy(dmah->tag); 96 free(dmah, DRM_MEM_DMA); 97 return NULL; 98 } 99 100 ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr, size, 101 drm_pci_busdma_callback, dmah, BUS_DMA_NOWAIT); 102 if (ret != 0) { 103 bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map); 104 bus_dma_tag_destroy(dmah->tag); 105 free(dmah, DRM_MEM_DMA); 106 return NULL; 107 } 108 109 return dmah; 110 } 111 112 /** 113 * \brief Free a DMA-accessible consistent memory block. 114 */ 115 void 116 drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah) 117 { 118 if (dmah == NULL) 119 return; 120 121 bus_dmamap_unload(dmah->tag, dmah->map); 122 bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map); 123 bus_dma_tag_destroy(dmah->tag); 124 125 free(dmah, DRM_MEM_DMA); 126 } 127 128 /*@}*/ 129 130 int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask) 131 { 132 device_t root; 133 int pos; 134 u32 lnkcap = 0, lnkcap2 = 0; 135 136 *mask = 0; 137 if (!drm_device_is_pcie(dev)) 138 return -EINVAL; 139 140 root = 141 device_get_parent( /* pcib */ 142 device_get_parent( /* `-- pci */ 143 device_get_parent( /* `-- vgapci */ 144 dev->device))); /* `-- drmn */ 145 146 pos = 0; 147 pci_find_cap(root, PCIY_EXPRESS, &pos); 148 if (!pos) 149 return -EINVAL; 150 151 /* we've been informed via and serverworks don't make the cut */ 152 if (pci_get_vendor(root) == PCI_VENDOR_ID_VIA || 153 pci_get_vendor(root) == PCI_VENDOR_ID_SERVERWORKS) 154 return -EINVAL; 155 156 lnkcap = pci_read_config(root, pos + PCIER_LINK_CAP, 4); 157 lnkcap2 = pci_read_config(root, pos + PCIER_LINK_CAP2, 4); 158 159 lnkcap &= PCIEM_LINK_CAP_MAX_SPEED; 160 lnkcap2 &= 0xfe; 161 162 #define PCI_EXP_LNKCAP2_SLS_2_5GB 0x02 /* Supported Link Speed 2.5GT/s */ 163 #define PCI_EXP_LNKCAP2_SLS_5_0GB 0x04 /* Supported Link Speed 5.0GT/s */ 164 #define PCI_EXP_LNKCAP2_SLS_8_0GB 0x08 /* Supported Link Speed 8.0GT/s */ 165 166 if (lnkcap2) { /* PCIE GEN 3.0 */ 167 if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB) 168 *mask |= DRM_PCIE_SPEED_25; 169 if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB) 170 *mask |= DRM_PCIE_SPEED_50; 171 if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB) 172 *mask |= DRM_PCIE_SPEED_80; 173 } else { 174 if (lnkcap & 1) 175 *mask |= DRM_PCIE_SPEED_25; 176 if (lnkcap & 2) 177 *mask |= DRM_PCIE_SPEED_50; 178 } 179 180 DRM_INFO("probing gen 2 caps for device %x:%x = %x/%x\n", pci_get_vendor(root), pci_get_device(root), lnkcap, lnkcap2); 181 return 0; 182 } 183