xref: /freebsd/sys/dev/drm2/drm_modes.c (revision 40a8ac8f62b535d30349faf28cf47106b7041b83)
1 /*
2  * Copyright © 1997-2003 by The XFree86 Project, Inc.
3  * Copyright © 2007 Dave Airlie
4  * Copyright © 2007-2008 Intel Corporation
5  *   Jesse Barnes <jesse.barnes@intel.com>
6  * Copyright 2005-2006 Luc Verhaegen
7  * Copyright (c) 2001, Andy Ritger  aritger@nvidia.com
8  *
9  * Permission is hereby granted, free of charge, to any person obtaining a
10  * copy of this software and associated documentation files (the "Software"),
11  * to deal in the Software without restriction, including without limitation
12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13  * and/or sell copies of the Software, and to permit persons to whom the
14  * Software is furnished to do so, subject to the following conditions:
15  *
16  * The above copyright notice and this permission notice shall be included in
17  * all copies or substantial portions of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
22  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25  * OTHER DEALINGS IN THE SOFTWARE.
26  *
27  * Except as contained in this notice, the name of the copyright holder(s)
28  * and author(s) shall not be used in advertising or otherwise to promote
29  * the sale, use or other dealings in this Software without prior written
30  * authorization from the copyright holder(s) and author(s).
31  */
32 
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
35 
36 #include <dev/drm2/drmP.h>
37 #include <dev/drm2/drm.h>
38 #include <dev/drm2/drm_crtc.h>
39 
40 #define	KHZ2PICOS(a)	(1000000000UL/(a))
41 
42 /**
43  * drm_mode_debug_printmodeline - debug print a mode
44  * @dev: DRM device
45  * @mode: mode to print
46  *
47  * LOCKING:
48  * None.
49  *
50  * Describe @mode using DRM_DEBUG.
51  */
52 void drm_mode_debug_printmodeline(struct drm_display_mode *mode)
53 {
54 	DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
55 			"0x%x 0x%x\n",
56 		mode->base.id, mode->name, mode->vrefresh, mode->clock,
57 		mode->hdisplay, mode->hsync_start,
58 		mode->hsync_end, mode->htotal,
59 		mode->vdisplay, mode->vsync_start,
60 		mode->vsync_end, mode->vtotal, mode->type, mode->flags);
61 }
62 
63 /**
64  * drm_cvt_mode -create a modeline based on CVT algorithm
65  * @dev: DRM device
66  * @hdisplay: hdisplay size
67  * @vdisplay: vdisplay size
68  * @vrefresh  : vrefresh rate
69  * @reduced : Whether the GTF calculation is simplified
70  * @interlaced:Whether the interlace is supported
71  *
72  * LOCKING:
73  * none.
74  *
75  * return the modeline based on CVT algorithm
76  *
77  * This function is called to generate the modeline based on CVT algorithm
78  * according to the hdisplay, vdisplay, vrefresh.
79  * It is based from the VESA(TM) Coordinated Video Timing Generator by
80  * Graham Loveridge April 9, 2003 available at
81  * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
82  *
83  * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
84  * What I have done is to translate it by using integer calculation.
85  */
86 #define HV_FACTOR			1000
87 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
88 				      int vdisplay, int vrefresh,
89 				      bool reduced, bool interlaced, bool margins)
90 {
91 	/* 1) top/bottom margin size (% of height) - default: 1.8, */
92 #define	CVT_MARGIN_PERCENTAGE		18
93 	/* 2) character cell horizontal granularity (pixels) - default 8 */
94 #define	CVT_H_GRANULARITY		8
95 	/* 3) Minimum vertical porch (lines) - default 3 */
96 #define	CVT_MIN_V_PORCH			3
97 	/* 4) Minimum number of vertical back porch lines - default 6 */
98 #define	CVT_MIN_V_BPORCH		6
99 	/* Pixel Clock step (kHz) */
100 #define CVT_CLOCK_STEP			250
101 	struct drm_display_mode *drm_mode;
102 	unsigned int vfieldrate, hperiod;
103 	int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
104 	int interlace;
105 
106 	/* allocate the drm_display_mode structure. If failure, we will
107 	 * return directly
108 	 */
109 	drm_mode = drm_mode_create(dev);
110 	if (!drm_mode)
111 		return NULL;
112 
113 	/* the CVT default refresh rate is 60Hz */
114 	if (!vrefresh)
115 		vrefresh = 60;
116 
117 	/* the required field fresh rate */
118 	if (interlaced)
119 		vfieldrate = vrefresh * 2;
120 	else
121 		vfieldrate = vrefresh;
122 
123 	/* horizontal pixels */
124 	hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
125 
126 	/* determine the left&right borders */
127 	hmargin = 0;
128 	if (margins) {
129 		hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
130 		hmargin -= hmargin % CVT_H_GRANULARITY;
131 	}
132 	/* find the total active pixels */
133 	drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
134 
135 	/* find the number of lines per field */
136 	if (interlaced)
137 		vdisplay_rnd = vdisplay / 2;
138 	else
139 		vdisplay_rnd = vdisplay;
140 
141 	/* find the top & bottom borders */
142 	vmargin = 0;
143 	if (margins)
144 		vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
145 
146 	drm_mode->vdisplay = vdisplay + 2 * vmargin;
147 
148 	/* Interlaced */
149 	if (interlaced)
150 		interlace = 1;
151 	else
152 		interlace = 0;
153 
154 	/* Determine VSync Width from aspect ratio */
155 	if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
156 		vsync = 4;
157 	else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
158 		vsync = 5;
159 	else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
160 		vsync = 6;
161 	else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
162 		vsync = 7;
163 	else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
164 		vsync = 7;
165 	else /* custom */
166 		vsync = 10;
167 
168 	if (!reduced) {
169 		/* simplify the GTF calculation */
170 		/* 4) Minimum time of vertical sync + back porch interval (µs)
171 		 * default 550.0
172 		 */
173 		int tmp1, tmp2;
174 #define CVT_MIN_VSYNC_BP	550
175 		/* 3) Nominal HSync width (% of line period) - default 8 */
176 #define CVT_HSYNC_PERCENTAGE	8
177 		unsigned int hblank_percentage;
178 		int vsyncandback_porch, vback_porch, hblank;
179 
180 		/* estimated the horizontal period */
181 		tmp1 = HV_FACTOR * 1000000  -
182 				CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
183 		tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
184 				interlace;
185 		hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
186 
187 		tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
188 		/* 9. Find number of lines in sync + backporch */
189 		if (tmp1 < (vsync + CVT_MIN_V_PORCH))
190 			vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
191 		else
192 			vsyncandback_porch = tmp1;
193 		/* 10. Find number of lines in back porch */
194 		vback_porch = vsyncandback_porch - vsync;
195 		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
196 				vsyncandback_porch + CVT_MIN_V_PORCH;
197 		/* 5) Definition of Horizontal blanking time limitation */
198 		/* Gradient (%/kHz) - default 600 */
199 #define CVT_M_FACTOR	600
200 		/* Offset (%) - default 40 */
201 #define CVT_C_FACTOR	40
202 		/* Blanking time scaling factor - default 128 */
203 #define CVT_K_FACTOR	128
204 		/* Scaling factor weighting - default 20 */
205 #define CVT_J_FACTOR	20
206 #define CVT_M_PRIME	(CVT_M_FACTOR * CVT_K_FACTOR / 256)
207 #define CVT_C_PRIME	((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
208 			 CVT_J_FACTOR)
209 		/* 12. Find ideal blanking duty cycle from formula */
210 		hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
211 					hperiod / 1000;
212 		/* 13. Blanking time */
213 		if (hblank_percentage < 20 * HV_FACTOR)
214 			hblank_percentage = 20 * HV_FACTOR;
215 		hblank = drm_mode->hdisplay * hblank_percentage /
216 			 (100 * HV_FACTOR - hblank_percentage);
217 		hblank -= hblank % (2 * CVT_H_GRANULARITY);
218 		/* 14. find the total pixes per line */
219 		drm_mode->htotal = drm_mode->hdisplay + hblank;
220 		drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
221 		drm_mode->hsync_start = drm_mode->hsync_end -
222 			(drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
223 		drm_mode->hsync_start += CVT_H_GRANULARITY -
224 			drm_mode->hsync_start % CVT_H_GRANULARITY;
225 		/* fill the Vsync values */
226 		drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
227 		drm_mode->vsync_end = drm_mode->vsync_start + vsync;
228 	} else {
229 		/* Reduced blanking */
230 		/* Minimum vertical blanking interval time (µs)- default 460 */
231 #define CVT_RB_MIN_VBLANK	460
232 		/* Fixed number of clocks for horizontal sync */
233 #define CVT_RB_H_SYNC		32
234 		/* Fixed number of clocks for horizontal blanking */
235 #define CVT_RB_H_BLANK		160
236 		/* Fixed number of lines for vertical front porch - default 3*/
237 #define CVT_RB_VFPORCH		3
238 		int vbilines;
239 		int tmp1, tmp2;
240 		/* 8. Estimate Horizontal period. */
241 		tmp1 = HV_FACTOR * 1000000 -
242 			CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
243 		tmp2 = vdisplay_rnd + 2 * vmargin;
244 		hperiod = tmp1 / (tmp2 * vfieldrate);
245 		/* 9. Find number of lines in vertical blanking */
246 		vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
247 		/* 10. Check if vertical blanking is sufficient */
248 		if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
249 			vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
250 		/* 11. Find total number of lines in vertical field */
251 		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
252 		/* 12. Find total number of pixels in a line */
253 		drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
254 		/* Fill in HSync values */
255 		drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
256 		drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
257 		/* Fill in VSync values */
258 		drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
259 		drm_mode->vsync_end = drm_mode->vsync_start + vsync;
260 	}
261 	/* 15/13. Find pixel clock frequency (kHz for xf86) */
262 	drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
263 	drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
264 	/* 18/16. Find actual vertical frame frequency */
265 	/* ignore - just set the mode flag for interlaced */
266 	if (interlaced) {
267 		drm_mode->vtotal *= 2;
268 		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
269 	}
270 	/* Fill the mode line name */
271 	drm_mode_set_name(drm_mode);
272 	if (reduced)
273 		drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
274 					DRM_MODE_FLAG_NVSYNC);
275 	else
276 		drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
277 					DRM_MODE_FLAG_NHSYNC);
278 
279 	return drm_mode;
280 }
281 
282 /**
283  * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
284  *
285  * @dev		:drm device
286  * @hdisplay	:hdisplay size
287  * @vdisplay	:vdisplay size
288  * @vrefresh	:vrefresh rate.
289  * @interlaced	:whether the interlace is supported
290  * @margins	:desired margin size
291  * @GTF_[MCKJ]  :extended GTF formula parameters
292  *
293  * LOCKING.
294  * none.
295  *
296  * return the modeline based on full GTF algorithm.
297  *
298  * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
299  * in here multiplied by two.  For a C of 40, pass in 80.
300  */
301 struct drm_display_mode *
302 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
303 		     int vrefresh, bool interlaced, int margins,
304 		     int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
305 {	/* 1) top/bottom margin size (% of height) - default: 1.8, */
306 #define	GTF_MARGIN_PERCENTAGE		18
307 	/* 2) character cell horizontal granularity (pixels) - default 8 */
308 #define	GTF_CELL_GRAN			8
309 	/* 3) Minimum vertical porch (lines) - default 3 */
310 #define	GTF_MIN_V_PORCH			1
311 	/* width of vsync in lines */
312 #define V_SYNC_RQD			3
313 	/* width of hsync as % of total line */
314 #define H_SYNC_PERCENT			8
315 	/* min time of vsync + back porch (microsec) */
316 #define MIN_VSYNC_PLUS_BP		550
317 	/* C' and M' are part of the Blanking Duty Cycle computation */
318 #define GTF_C_PRIME	((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
319 #define GTF_M_PRIME	(GTF_K * GTF_M / 256)
320 	struct drm_display_mode *drm_mode;
321 	unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
322 	int top_margin, bottom_margin;
323 	int interlace;
324 	unsigned int hfreq_est;
325 	int vsync_plus_bp, vback_porch;
326 	unsigned int vtotal_lines, vfieldrate_est, hperiod;
327 	unsigned int vfield_rate, vframe_rate;
328 	int left_margin, right_margin;
329 	unsigned int total_active_pixels, ideal_duty_cycle;
330 	unsigned int hblank, total_pixels, pixel_freq;
331 	int hsync, hfront_porch, vodd_front_porch_lines;
332 	unsigned int tmp1, tmp2;
333 
334 	drm_mode = drm_mode_create(dev);
335 	if (!drm_mode)
336 		return NULL;
337 
338 	/* 1. In order to give correct results, the number of horizontal
339 	 * pixels requested is first processed to ensure that it is divisible
340 	 * by the character size, by rounding it to the nearest character
341 	 * cell boundary:
342 	 */
343 	hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
344 	hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
345 
346 	/* 2. If interlace is requested, the number of vertical lines assumed
347 	 * by the calculation must be halved, as the computation calculates
348 	 * the number of vertical lines per field.
349 	 */
350 	if (interlaced)
351 		vdisplay_rnd = vdisplay / 2;
352 	else
353 		vdisplay_rnd = vdisplay;
354 
355 	/* 3. Find the frame rate required: */
356 	if (interlaced)
357 		vfieldrate_rqd = vrefresh * 2;
358 	else
359 		vfieldrate_rqd = vrefresh;
360 
361 	/* 4. Find number of lines in Top margin: */
362 	top_margin = 0;
363 	if (margins)
364 		top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
365 				1000;
366 	/* 5. Find number of lines in bottom margin: */
367 	bottom_margin = top_margin;
368 
369 	/* 6. If interlace is required, then set variable interlace: */
370 	if (interlaced)
371 		interlace = 1;
372 	else
373 		interlace = 0;
374 
375 	/* 7. Estimate the Horizontal frequency */
376 	{
377 		tmp1 = (1000000  - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
378 		tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
379 				2 + interlace;
380 		hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
381 	}
382 
383 	/* 8. Find the number of lines in V sync + back porch */
384 	/* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
385 	vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
386 	vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
387 	/*  9. Find the number of lines in V back porch alone: */
388 	vback_porch = vsync_plus_bp - V_SYNC_RQD;
389 	/*  10. Find the total number of lines in Vertical field period: */
390 	vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
391 			vsync_plus_bp + GTF_MIN_V_PORCH;
392 	/*  11. Estimate the Vertical field frequency: */
393 	vfieldrate_est = hfreq_est / vtotal_lines;
394 	/*  12. Find the actual horizontal period: */
395 	hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
396 
397 	/*  13. Find the actual Vertical field frequency: */
398 	vfield_rate = hfreq_est / vtotal_lines;
399 	/*  14. Find the Vertical frame frequency: */
400 	if (interlaced)
401 		vframe_rate = vfield_rate / 2;
402 	else
403 		vframe_rate = vfield_rate;
404 	/*  15. Find number of pixels in left margin: */
405 	if (margins)
406 		left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
407 				1000;
408 	else
409 		left_margin = 0;
410 
411 	/* 16.Find number of pixels in right margin: */
412 	right_margin = left_margin;
413 	/* 17.Find total number of active pixels in image and left and right */
414 	total_active_pixels = hdisplay_rnd + left_margin + right_margin;
415 	/* 18.Find the ideal blanking duty cycle from blanking duty cycle */
416 	ideal_duty_cycle = GTF_C_PRIME * 1000 -
417 				(GTF_M_PRIME * 1000000 / hfreq_est);
418 	/* 19.Find the number of pixels in the blanking time to the nearest
419 	 * double character cell: */
420 	hblank = total_active_pixels * ideal_duty_cycle /
421 			(100000 - ideal_duty_cycle);
422 	hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
423 	hblank = hblank * 2 * GTF_CELL_GRAN;
424 	/* 20.Find total number of pixels: */
425 	total_pixels = total_active_pixels + hblank;
426 	/* 21.Find pixel clock frequency: */
427 	pixel_freq = total_pixels * hfreq_est / 1000;
428 	/* Stage 1 computations are now complete; I should really pass
429 	 * the results to another function and do the Stage 2 computations,
430 	 * but I only need a few more values so I'll just append the
431 	 * computations here for now */
432 	/* 17. Find the number of pixels in the horizontal sync period: */
433 	hsync = H_SYNC_PERCENT * total_pixels / 100;
434 	hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
435 	hsync = hsync * GTF_CELL_GRAN;
436 	/* 18. Find the number of pixels in horizontal front porch period */
437 	hfront_porch = hblank / 2 - hsync;
438 	/*  36. Find the number of lines in the odd front porch period: */
439 	vodd_front_porch_lines = GTF_MIN_V_PORCH ;
440 
441 	/* finally, pack the results in the mode struct */
442 	drm_mode->hdisplay = hdisplay_rnd;
443 	drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
444 	drm_mode->hsync_end = drm_mode->hsync_start + hsync;
445 	drm_mode->htotal = total_pixels;
446 	drm_mode->vdisplay = vdisplay_rnd;
447 	drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
448 	drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
449 	drm_mode->vtotal = vtotal_lines;
450 
451 	drm_mode->clock = pixel_freq;
452 
453 	if (interlaced) {
454 		drm_mode->vtotal *= 2;
455 		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
456 	}
457 
458 	drm_mode_set_name(drm_mode);
459 	if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
460 		drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
461 	else
462 		drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
463 
464 	return drm_mode;
465 }
466 
467 /**
468  * drm_gtf_mode - create the modeline based on GTF algorithm
469  *
470  * @dev		:drm device
471  * @hdisplay	:hdisplay size
472  * @vdisplay	:vdisplay size
473  * @vrefresh	:vrefresh rate.
474  * @interlaced	:whether the interlace is supported
475  * @margins	:whether the margin is supported
476  *
477  * LOCKING.
478  * none.
479  *
480  * return the modeline based on GTF algorithm
481  *
482  * This function is to create the modeline based on the GTF algorithm.
483  * Generalized Timing Formula is derived from:
484  *	GTF Spreadsheet by Andy Morrish (1/5/97)
485  *	available at http://www.vesa.org
486  *
487  * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
488  * What I have done is to translate it by using integer calculation.
489  * I also refer to the function of fb_get_mode in the file of
490  * drivers/video/fbmon.c
491  *
492  * Standard GTF parameters:
493  * M = 600
494  * C = 40
495  * K = 128
496  * J = 20
497  */
498 struct drm_display_mode *
499 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
500 	     bool lace, int margins)
501 {
502 	return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace,
503 				    margins, 600, 40 * 2, 128, 20 * 2);
504 }
505 
506 /**
507  * drm_mode_set_name - set the name on a mode
508  * @mode: name will be set in this mode
509  *
510  * LOCKING:
511  * None.
512  *
513  * Set the name of @mode to a standard format.
514  */
515 void drm_mode_set_name(struct drm_display_mode *mode)
516 {
517 	bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
518 
519 	snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
520 		 mode->hdisplay, mode->vdisplay,
521 		 interlaced ? "i" : "");
522 }
523 
524 /**
525  * drm_mode_list_concat - move modes from one list to another
526  * @head: source list
527  * @new: dst list
528  *
529  * LOCKING:
530  * Caller must ensure both lists are locked.
531  *
532  * Move all the modes from @head to @new.
533  */
534 void drm_mode_list_concat(struct list_head *head, struct list_head *new)
535 {
536 
537 	struct list_head *entry, *tmp;
538 
539 	list_for_each_safe(entry, tmp, head) {
540 		list_move_tail(entry, new);
541 	}
542 }
543 
544 /**
545  * drm_mode_width - get the width of a mode
546  * @mode: mode
547  *
548  * LOCKING:
549  * None.
550  *
551  * Return @mode's width (hdisplay) value.
552  *
553  * FIXME: is this needed?
554  *
555  * RETURNS:
556  * @mode->hdisplay
557  */
558 int drm_mode_width(struct drm_display_mode *mode)
559 {
560 	return mode->hdisplay;
561 
562 }
563 
564 /**
565  * drm_mode_height - get the height of a mode
566  * @mode: mode
567  *
568  * LOCKING:
569  * None.
570  *
571  * Return @mode's height (vdisplay) value.
572  *
573  * FIXME: is this needed?
574  *
575  * RETURNS:
576  * @mode->vdisplay
577  */
578 int drm_mode_height(struct drm_display_mode *mode)
579 {
580 	return mode->vdisplay;
581 }
582 
583 /** drm_mode_hsync - get the hsync of a mode
584  * @mode: mode
585  *
586  * LOCKING:
587  * None.
588  *
589  * Return @modes's hsync rate in kHz, rounded to the nearest int.
590  */
591 int drm_mode_hsync(const struct drm_display_mode *mode)
592 {
593 	unsigned int calc_val;
594 
595 	if (mode->hsync)
596 		return mode->hsync;
597 
598 	if (mode->htotal < 0)
599 		return 0;
600 
601 	calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
602 	calc_val += 500;				/* round to 1000Hz */
603 	calc_val /= 1000;				/* truncate to kHz */
604 
605 	return calc_val;
606 }
607 
608 /**
609  * drm_mode_vrefresh - get the vrefresh of a mode
610  * @mode: mode
611  *
612  * LOCKING:
613  * None.
614  *
615  * Return @mode's vrefresh rate in Hz or calculate it if necessary.
616  *
617  * FIXME: why is this needed?  shouldn't vrefresh be set already?
618  *
619  * RETURNS:
620  * Vertical refresh rate. It will be the result of actual value plus 0.5.
621  * If it is 70.288, it will return 70Hz.
622  * If it is 59.6, it will return 60Hz.
623  */
624 int drm_mode_vrefresh(const struct drm_display_mode *mode)
625 {
626 	int refresh = 0;
627 	unsigned int calc_val;
628 
629 	if (mode->vrefresh > 0)
630 		refresh = mode->vrefresh;
631 	else if (mode->htotal > 0 && mode->vtotal > 0) {
632 		int vtotal;
633 		vtotal = mode->vtotal;
634 		/* work out vrefresh the value will be x1000 */
635 		calc_val = (mode->clock * 1000);
636 		calc_val /= mode->htotal;
637 		refresh = (calc_val + vtotal / 2) / vtotal;
638 
639 		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
640 			refresh *= 2;
641 		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
642 			refresh /= 2;
643 		if (mode->vscan > 1)
644 			refresh /= mode->vscan;
645 	}
646 	return refresh;
647 }
648 
649 /**
650  * drm_mode_set_crtcinfo - set CRTC modesetting parameters
651  * @p: mode
652  * @adjust_flags: unused? (FIXME)
653  *
654  * LOCKING:
655  * None.
656  *
657  * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
658  */
659 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
660 {
661 	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
662 		return;
663 
664 	p->crtc_hdisplay = p->hdisplay;
665 	p->crtc_hsync_start = p->hsync_start;
666 	p->crtc_hsync_end = p->hsync_end;
667 	p->crtc_htotal = p->htotal;
668 	p->crtc_hskew = p->hskew;
669 	p->crtc_vdisplay = p->vdisplay;
670 	p->crtc_vsync_start = p->vsync_start;
671 	p->crtc_vsync_end = p->vsync_end;
672 	p->crtc_vtotal = p->vtotal;
673 
674 	if (p->flags & DRM_MODE_FLAG_INTERLACE) {
675 		if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
676 			p->crtc_vdisplay /= 2;
677 			p->crtc_vsync_start /= 2;
678 			p->crtc_vsync_end /= 2;
679 			p->crtc_vtotal /= 2;
680 		}
681 
682 		p->crtc_vtotal |= 1;
683 	}
684 
685 	if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
686 		p->crtc_vdisplay *= 2;
687 		p->crtc_vsync_start *= 2;
688 		p->crtc_vsync_end *= 2;
689 		p->crtc_vtotal *= 2;
690 	}
691 
692 	if (p->vscan > 1) {
693 		p->crtc_vdisplay *= p->vscan;
694 		p->crtc_vsync_start *= p->vscan;
695 		p->crtc_vsync_end *= p->vscan;
696 		p->crtc_vtotal *= p->vscan;
697 	}
698 
699 	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
700 	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
701 	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
702 	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
703 
704 	p->crtc_hadjusted = false;
705 	p->crtc_vadjusted = false;
706 }
707 
708 
709 /**
710  * drm_mode_duplicate - allocate and duplicate an existing mode
711  * @m: mode to duplicate
712  *
713  * LOCKING:
714  * None.
715  *
716  * Just allocate a new mode, copy the existing mode into it, and return
717  * a pointer to it.  Used to create new instances of established modes.
718  */
719 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
720 					    const struct drm_display_mode *mode)
721 {
722 	struct drm_display_mode *nmode;
723 	int new_id;
724 
725 	nmode = drm_mode_create(dev);
726 	if (!nmode)
727 		return NULL;
728 
729 	new_id = nmode->base.id;
730 	*nmode = *mode;
731 	nmode->base.id = new_id;
732 	INIT_LIST_HEAD(&nmode->head);
733 	return nmode;
734 }
735 
736 /**
737  * drm_mode_equal - test modes for equality
738  * @mode1: first mode
739  * @mode2: second mode
740  *
741  * LOCKING:
742  * None.
743  *
744  * Check to see if @mode1 and @mode2 are equivalent.
745  *
746  * RETURNS:
747  * true if the modes are equal, false otherwise.
748  */
749 bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2)
750 {
751 	/* do clock check convert to PICOS so fb modes get matched
752 	 * the same */
753 	if (mode1->clock && mode2->clock) {
754 		if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
755 			return false;
756 	} else if (mode1->clock != mode2->clock)
757 		return false;
758 
759 	if (mode1->hdisplay == mode2->hdisplay &&
760 	    mode1->hsync_start == mode2->hsync_start &&
761 	    mode1->hsync_end == mode2->hsync_end &&
762 	    mode1->htotal == mode2->htotal &&
763 	    mode1->hskew == mode2->hskew &&
764 	    mode1->vdisplay == mode2->vdisplay &&
765 	    mode1->vsync_start == mode2->vsync_start &&
766 	    mode1->vsync_end == mode2->vsync_end &&
767 	    mode1->vtotal == mode2->vtotal &&
768 	    mode1->vscan == mode2->vscan &&
769 	    mode1->flags == mode2->flags)
770 		return true;
771 
772 	return false;
773 }
774 
775 /**
776  * drm_mode_validate_size - make sure modes adhere to size constraints
777  * @dev: DRM device
778  * @mode_list: list of modes to check
779  * @maxX: maximum width
780  * @maxY: maximum height
781  * @maxPitch: max pitch
782  *
783  * LOCKING:
784  * Caller must hold a lock protecting @mode_list.
785  *
786  * The DRM device (@dev) has size and pitch limits.  Here we validate the
787  * modes we probed for @dev against those limits and set their status as
788  * necessary.
789  */
790 void drm_mode_validate_size(struct drm_device *dev,
791 			    struct list_head *mode_list,
792 			    int maxX, int maxY, int maxPitch)
793 {
794 	struct drm_display_mode *mode;
795 
796 	list_for_each_entry(mode, mode_list, head) {
797 		if (maxPitch > 0 && mode->hdisplay > maxPitch)
798 			mode->status = MODE_BAD_WIDTH;
799 
800 		if (maxX > 0 && mode->hdisplay > maxX)
801 			mode->status = MODE_VIRTUAL_X;
802 
803 		if (maxY > 0 && mode->vdisplay > maxY)
804 			mode->status = MODE_VIRTUAL_Y;
805 	}
806 }
807 
808 /**
809  * drm_mode_validate_clocks - validate modes against clock limits
810  * @dev: DRM device
811  * @mode_list: list of modes to check
812  * @min: minimum clock rate array
813  * @max: maximum clock rate array
814  * @n_ranges: number of clock ranges (size of arrays)
815  *
816  * LOCKING:
817  * Caller must hold a lock protecting @mode_list.
818  *
819  * Some code may need to check a mode list against the clock limits of the
820  * device in question.  This function walks the mode list, testing to make
821  * sure each mode falls within a given range (defined by @min and @max
822  * arrays) and sets @mode->status as needed.
823  */
824 void drm_mode_validate_clocks(struct drm_device *dev,
825 			      struct list_head *mode_list,
826 			      int *min, int *max, int n_ranges)
827 {
828 	struct drm_display_mode *mode;
829 	int i;
830 
831 	list_for_each_entry(mode, mode_list, head) {
832 		bool good = false;
833 		for (i = 0; i < n_ranges; i++) {
834 			if (mode->clock >= min[i] && mode->clock <= max[i]) {
835 				good = true;
836 				break;
837 			}
838 		}
839 		if (!good)
840 			mode->status = MODE_CLOCK_RANGE;
841 	}
842 }
843 
844 /**
845  * drm_mode_prune_invalid - remove invalid modes from mode list
846  * @dev: DRM device
847  * @mode_list: list of modes to check
848  * @verbose: be verbose about it
849  *
850  * LOCKING:
851  * Caller must hold a lock protecting @mode_list.
852  *
853  * Once mode list generation is complete, a caller can use this routine to
854  * remove invalid modes from a mode list.  If any of the modes have a
855  * status other than %MODE_OK, they are removed from @mode_list and freed.
856  */
857 void drm_mode_prune_invalid(struct drm_device *dev,
858 			    struct list_head *mode_list, bool verbose)
859 {
860 	struct drm_display_mode *mode, *t;
861 
862 	list_for_each_entry_safe(mode, t, mode_list, head) {
863 		if (mode->status != MODE_OK) {
864 			list_del(&mode->head);
865 			if (verbose) {
866 				drm_mode_debug_printmodeline(mode);
867 				DRM_DEBUG_KMS("Not using %s mode %d\n",
868 					mode->name, mode->status);
869 			}
870 			drm_mode_destroy(dev, mode);
871 		}
872 	}
873 }
874 
875 /**
876  * drm_mode_compare - compare modes for favorability
877  * @priv: unused
878  * @lh_a: list_head for first mode
879  * @lh_b: list_head for second mode
880  *
881  * LOCKING:
882  * None.
883  *
884  * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
885  * which is better.
886  *
887  * RETURNS:
888  * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
889  * positive if @lh_b is better than @lh_a.
890  */
891 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
892 {
893 	struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
894 	struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
895 	int diff;
896 
897 	diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
898 		((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
899 	if (diff)
900 		return diff;
901 	diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
902 	if (diff)
903 		return diff;
904 	diff = b->clock - a->clock;
905 	return diff;
906 }
907 
908 /**
909  * drm_mode_sort - sort mode list
910  * @mode_list: list to sort
911  *
912  * LOCKING:
913  * Caller must hold a lock protecting @mode_list.
914  *
915  * Sort @mode_list by favorability, putting good modes first.
916  */
917 void drm_mode_sort(struct list_head *mode_list)
918 {
919 	drm_list_sort(NULL, mode_list, drm_mode_compare);
920 }
921 
922 /**
923  * drm_mode_connector_list_update - update the mode list for the connector
924  * @connector: the connector to update
925  *
926  * LOCKING:
927  * Caller must hold a lock protecting @mode_list.
928  *
929  * This moves the modes from the @connector probed_modes list
930  * to the actual mode list. It compares the probed mode against the current
931  * list and only adds different modes. All modes unverified after this point
932  * will be removed by the prune invalid modes.
933  */
934 void drm_mode_connector_list_update(struct drm_connector *connector)
935 {
936 	struct drm_display_mode *mode;
937 	struct drm_display_mode *pmode, *pt;
938 	int found_it;
939 
940 	list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
941 				 head) {
942 		found_it = 0;
943 		/* go through current modes checking for the new probed mode */
944 		list_for_each_entry(mode, &connector->modes, head) {
945 			if (drm_mode_equal(pmode, mode)) {
946 				found_it = 1;
947 				/* if equal delete the probed mode */
948 				mode->status = pmode->status;
949 				/* Merge type bits together */
950 				mode->type |= pmode->type;
951 				list_del(&pmode->head);
952 				drm_mode_destroy(connector->dev, pmode);
953 				break;
954 			}
955 		}
956 
957 		if (!found_it) {
958 			list_move_tail(&pmode->head, &connector->modes);
959 		}
960 	}
961 }
962 
963 /**
964  * drm_mode_parse_command_line_for_connector - parse command line for connector
965  * @mode_option - per connector mode option
966  * @connector - connector to parse line for
967  *
968  * This parses the connector specific then generic command lines for
969  * modes and options to configure the connector.
970  *
971  * This uses the same parameters as the fb modedb.c, except for extra
972  *	<xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
973  *
974  * enable/enable Digital/disable bit at the end
975  */
976 bool drm_mode_parse_command_line_for_connector(const char *mode_option,
977 					       struct drm_connector *connector,
978 					       struct drm_cmdline_mode *mode)
979 {
980 	const char *name;
981 	unsigned int namelen;
982 	bool res_specified = false, bpp_specified = false, refresh_specified = false;
983 	unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
984 	bool yres_specified = false, cvt = false, rb = false;
985 	bool interlace = false, margins = false, was_digit = false;
986 	int i;
987 	enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
988 
989 #ifdef XXX_CONFIG_FB
990 	if (!mode_option)
991 		mode_option = fb_mode_option;
992 #endif
993 
994 	if (!mode_option) {
995 		mode->specified = false;
996 		return false;
997 	}
998 
999 	name = mode_option;
1000 	namelen = strlen(name);
1001 	for (i = namelen-1; i >= 0; i--) {
1002 		switch (name[i]) {
1003 		case '@':
1004 			if (!refresh_specified && !bpp_specified &&
1005 			    !yres_specified && !cvt && !rb && was_digit) {
1006 				refresh = strtol(&name[i+1], NULL, 10);
1007 				refresh_specified = true;
1008 				was_digit = false;
1009 			} else
1010 				goto done;
1011 			break;
1012 		case '-':
1013 			if (!bpp_specified && !yres_specified && !cvt &&
1014 			    !rb && was_digit) {
1015 				bpp = strtol(&name[i+1], NULL, 10);
1016 				bpp_specified = true;
1017 				was_digit = false;
1018 			} else
1019 				goto done;
1020 			break;
1021 		case 'x':
1022 			if (!yres_specified && was_digit) {
1023 				yres = strtol(&name[i+1], NULL, 10);
1024 				yres_specified = true;
1025 				was_digit = false;
1026 			} else
1027 				goto done;
1028 		case '0' ... '9':
1029 			was_digit = true;
1030 			break;
1031 		case 'M':
1032 			if (yres_specified || cvt || was_digit)
1033 				goto done;
1034 			cvt = true;
1035 			break;
1036 		case 'R':
1037 			if (yres_specified || cvt || rb || was_digit)
1038 				goto done;
1039 			rb = true;
1040 			break;
1041 		case 'm':
1042 			if (cvt || yres_specified || was_digit)
1043 				goto done;
1044 			margins = true;
1045 			break;
1046 		case 'i':
1047 			if (cvt || yres_specified || was_digit)
1048 				goto done;
1049 			interlace = true;
1050 			break;
1051 		case 'e':
1052 			if (yres_specified || bpp_specified || refresh_specified ||
1053 			    was_digit || (force != DRM_FORCE_UNSPECIFIED))
1054 				goto done;
1055 
1056 			force = DRM_FORCE_ON;
1057 			break;
1058 		case 'D':
1059 			if (yres_specified || bpp_specified || refresh_specified ||
1060 			    was_digit || (force != DRM_FORCE_UNSPECIFIED))
1061 				goto done;
1062 
1063 			if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1064 			    (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1065 				force = DRM_FORCE_ON;
1066 			else
1067 				force = DRM_FORCE_ON_DIGITAL;
1068 			break;
1069 		case 'd':
1070 			if (yres_specified || bpp_specified || refresh_specified ||
1071 			    was_digit || (force != DRM_FORCE_UNSPECIFIED))
1072 				goto done;
1073 
1074 			force = DRM_FORCE_OFF;
1075 			break;
1076 		default:
1077 			goto done;
1078 		}
1079 	}
1080 
1081 	if (i < 0 && yres_specified) {
1082 		char *ch;
1083 		xres = strtol(name, &ch, 10);
1084 		if ((ch != NULL) && (*ch == 'x'))
1085 			res_specified = true;
1086 		else
1087 			i = ch - name;
1088 	} else if (!yres_specified && was_digit) {
1089 		/* catch mode that begins with digits but has no 'x' */
1090 		i = 0;
1091 	}
1092 done:
1093 	if (i >= 0) {
1094 		printf("parse error at position %i in video mode '%s'\n",
1095 			i, name);
1096 		mode->specified = false;
1097 		return false;
1098 	}
1099 
1100 	if (res_specified) {
1101 		mode->specified = true;
1102 		mode->xres = xres;
1103 		mode->yres = yres;
1104 	}
1105 
1106 	if (refresh_specified) {
1107 		mode->refresh_specified = true;
1108 		mode->refresh = refresh;
1109 	}
1110 
1111 	if (bpp_specified) {
1112 		mode->bpp_specified = true;
1113 		mode->bpp = bpp;
1114 	}
1115 	mode->rb = rb;
1116 	mode->cvt = cvt;
1117 	mode->interlace = interlace;
1118 	mode->margins = margins;
1119 	mode->force = force;
1120 
1121 	return true;
1122 }
1123 
1124 struct drm_display_mode *
1125 drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1126 				  struct drm_cmdline_mode *cmd)
1127 {
1128 	struct drm_display_mode *mode;
1129 
1130 	if (cmd->cvt)
1131 		mode = drm_cvt_mode(dev,
1132 				    cmd->xres, cmd->yres,
1133 				    cmd->refresh_specified ? cmd->refresh : 60,
1134 				    cmd->rb, cmd->interlace,
1135 				    cmd->margins);
1136 	else
1137 		mode = drm_gtf_mode(dev,
1138 				    cmd->xres, cmd->yres,
1139 				    cmd->refresh_specified ? cmd->refresh : 60,
1140 				    cmd->interlace,
1141 				    cmd->margins);
1142 	if (!mode)
1143 		return NULL;
1144 
1145 	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1146 	return mode;
1147 }
1148