xref: /freebsd/sys/dev/drm2/drm_edid.c (revision 87c1627502a5dde91e5284118eec8682b60f27a2)
1 /*
2  * Copyright (c) 2006 Luc Verhaegen (quirks list)
3  * Copyright (c) 2007-2008 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  * Copyright 2010 Red Hat, Inc.
6  *
7  * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8  * FB layer.
9  *   Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10  *
11  * Permission is hereby granted, free of charge, to any person obtaining a
12  * copy of this software and associated documentation files (the "Software"),
13  * to deal in the Software without restriction, including without limitation
14  * the rights to use, copy, modify, merge, publish, distribute, sub license,
15  * and/or sell copies of the Software, and to permit persons to whom the
16  * Software is furnished to do so, subject to the following conditions:
17  *
18  * The above copyright notice and this permission notice (including the
19  * next paragraph) shall be included in all copies or substantial portions
20  * of the Software.
21  *
22  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28  * DEALINGS IN THE SOFTWARE.
29  */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 #include <dev/drm2/drmP.h>
35 #include <dev/drm2/drm_edid.h>
36 #include <dev/drm2/drm_edid_modes.h>
37 #include <dev/iicbus/iic.h>
38 #include <dev/iicbus/iiconf.h>
39 #include "iicbus_if.h"
40 
41 #define version_greater(edid, maj, min) \
42 	(((edid)->version > (maj)) || \
43 	 ((edid)->version == (maj) && (edid)->revision > (min)))
44 
45 #define EDID_EST_TIMINGS 16
46 #define EDID_STD_TIMINGS 8
47 #define EDID_DETAILED_TIMINGS 4
48 
49 /*
50  * EDID blocks out in the wild have a variety of bugs, try to collect
51  * them here (note that userspace may work around broken monitors first,
52  * but fixes should make their way here so that the kernel "just works"
53  * on as many displays as possible).
54  */
55 
56 /* First detailed mode wrong, use largest 60Hz mode */
57 #define EDID_QUIRK_PREFER_LARGE_60		(1 << 0)
58 /* Reported 135MHz pixel clock is too high, needs adjustment */
59 #define EDID_QUIRK_135_CLOCK_TOO_HIGH		(1 << 1)
60 /* Prefer the largest mode at 75 Hz */
61 #define EDID_QUIRK_PREFER_LARGE_75		(1 << 2)
62 /* Detail timing is in cm not mm */
63 #define EDID_QUIRK_DETAILED_IN_CM		(1 << 3)
64 /* Detailed timing descriptors have bogus size values, so just take the
65  * maximum size and use that.
66  */
67 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE	(1 << 4)
68 /* Monitor forgot to set the first detailed is preferred bit. */
69 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED	(1 << 5)
70 /* use +hsync +vsync for detailed mode */
71 #define EDID_QUIRK_DETAILED_SYNC_PP		(1 << 6)
72 
73 struct detailed_mode_closure {
74 	struct drm_connector *connector;
75 	struct edid *edid;
76 	bool preferred;
77 	u32 quirks;
78 	int modes;
79 };
80 
81 #define LEVEL_DMT	0
82 #define LEVEL_GTF	1
83 #define LEVEL_GTF2	2
84 #define LEVEL_CVT	3
85 
86 static struct edid_quirk {
87 	char *vendor;
88 	int product_id;
89 	u32 quirks;
90 } edid_quirk_list[] = {
91 	/* Acer AL1706 */
92 	{ "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
93 	/* Acer F51 */
94 	{ "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
95 	/* Unknown Acer */
96 	{ "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
97 
98 	/* Belinea 10 15 55 */
99 	{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
100 	{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
101 
102 	/* Envision Peripherals, Inc. EN-7100e */
103 	{ "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
104 	/* Envision EN2028 */
105 	{ "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
106 
107 	/* Funai Electronics PM36B */
108 	{ "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
109 	  EDID_QUIRK_DETAILED_IN_CM },
110 
111 	/* LG Philips LCD LP154W01-A5 */
112 	{ "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
113 	{ "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
114 
115 	/* Philips 107p5 CRT */
116 	{ "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
117 
118 	/* Proview AY765C */
119 	{ "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
120 
121 	/* Samsung SyncMaster 205BW.  Note: irony */
122 	{ "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
123 	/* Samsung SyncMaster 22[5-6]BW */
124 	{ "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
125 	{ "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
126 };
127 
128 /*** DDC fetch and block validation ***/
129 
130 static const u8 edid_header[] = {
131 	0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
132 };
133 
134  /*
135  * Sanity check the header of the base EDID block.  Return 8 if the header
136  * is perfect, down to 0 if it's totally wrong.
137  */
138 int drm_edid_header_is_valid(const u8 *raw_edid)
139 {
140 	int i, score = 0;
141 
142 	for (i = 0; i < sizeof(edid_header); i++)
143 		if (raw_edid[i] == edid_header[i])
144 			score++;
145 
146 	return score;
147 }
148 
149 /*
150  * Sanity check the EDID block (base or extension).  Return 0 if the block
151  * doesn't check out, or 1 if it's valid.
152  */
153 static bool
154 drm_edid_block_valid(u8 *raw_edid)
155 {
156 	int i;
157 	u8 csum = 0;
158 	struct edid *edid = (struct edid *)raw_edid;
159 
160 	if (raw_edid[0] == 0x00) {
161 		int score = drm_edid_header_is_valid(raw_edid);
162 		if (score == 8) ;
163 		else if (score >= 6) {
164 			DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
165 			memcpy(raw_edid, edid_header, sizeof(edid_header));
166 		} else {
167 			goto bad;
168 		}
169 	}
170 
171 	for (i = 0; i < EDID_LENGTH; i++)
172 		csum += raw_edid[i];
173 	if (csum) {
174 		DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
175 
176 		/* allow CEA to slide through, switches mangle this */
177 		if (raw_edid[0] != 0x02)
178 			goto bad;
179 	}
180 
181 	/* per-block-type checks */
182 	switch (raw_edid[0]) {
183 	case 0: /* base */
184 		if (edid->version != 1) {
185 			DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
186 			goto bad;
187 		}
188 
189 		if (edid->revision > 4)
190 			DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
191 		break;
192 
193 	default:
194 		break;
195 	}
196 
197 	return 1;
198 
199 bad:
200 	if (raw_edid) {
201 		DRM_DEBUG_KMS("Raw EDID:\n");
202 		if ((drm_debug_flag & DRM_DEBUGBITS_KMS) != 0) {
203 			for (i = 0; i < EDID_LENGTH; ) {
204 				printf("%02x", raw_edid[i]);
205 				i++;
206 				if (i % 16 == 0 || i == EDID_LENGTH)
207 					printf("\n");
208 				else if (i % 8 == 0)
209 					printf("  ");
210 				else
211 					printf(" ");
212 			}
213 		}
214 	}
215 	return 0;
216 }
217 
218 /**
219  * drm_edid_is_valid - sanity check EDID data
220  * @edid: EDID data
221  *
222  * Sanity-check an entire EDID record (including extensions)
223  */
224 bool drm_edid_is_valid(struct edid *edid)
225 {
226 	int i;
227 	u8 *raw = (u8 *)edid;
228 
229 	if (!edid)
230 		return false;
231 
232 	for (i = 0; i <= edid->extensions; i++)
233 		if (!drm_edid_block_valid(raw + i * EDID_LENGTH))
234 			return false;
235 
236 	return true;
237 }
238 
239 #define DDC_ADDR 0x50
240 #define DDC_SEGMENT_ADDR 0x30
241 /**
242  * Get EDID information via I2C.
243  *
244  * \param adapter : i2c device adaptor
245  * \param buf     : EDID data buffer to be filled
246  * \param len     : EDID data buffer length
247  * \return 0 on success or -1 on failure.
248  *
249  * Try to fetch EDID information by calling i2c driver function.
250  */
251 static int
252 drm_do_probe_ddc_edid(device_t adapter, unsigned char *buf,
253 		      int block, int len)
254 {
255 	unsigned char start = block * EDID_LENGTH;
256 	int ret, retries = 5;
257 
258 	/* The core i2c driver will automatically retry the transfer if the
259 	 * adapter reports EAGAIN. However, we find that bit-banging transfers
260 	 * are susceptible to errors under a heavily loaded machine and
261 	 * generate spurious NAKs and timeouts. Retrying the transfer
262 	 * of the individual block a few times seems to overcome this.
263 	 */
264 	do {
265 		struct iic_msg msgs[] = {
266 			{
267 				.slave	= DDC_ADDR << 1,
268 				.flags	= IIC_M_WR,
269 				.len	= 1,
270 				.buf	= &start,
271 			}, {
272 				.slave	= DDC_ADDR << 1,
273 				.flags	= IIC_M_RD,
274 				.len	= len,
275 				.buf	= buf,
276 			}
277 		};
278 		ret = iicbus_transfer(adapter, msgs, 2);
279 		if (ret != 0)
280 			DRM_DEBUG_KMS("iicbus_transfer countdown %d error %d\n",
281 			    retries, ret);
282 	} while (ret != 0 && --retries);
283 
284 	return (ret == 0 ? 0 : -1);
285 }
286 
287 static bool drm_edid_is_zero(u8 *in_edid, int length)
288 {
289 	int i;
290 	u32 *raw_edid = (u32 *)in_edid;
291 
292 	for (i = 0; i < length / 4; i++)
293 		if (*(raw_edid + i) != 0)
294 			return false;
295 	return true;
296 }
297 
298 static u8 *
299 drm_do_get_edid(struct drm_connector *connector, device_t adapter)
300 {
301 	int i, j = 0, valid_extensions = 0;
302 	u8 *block, *new;
303 
304 	block = malloc(EDID_LENGTH, DRM_MEM_KMS, M_WAITOK | M_ZERO);
305 
306 	/* base block fetch */
307 	for (i = 0; i < 4; i++) {
308 		if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
309 			goto out;
310 		if (drm_edid_block_valid(block))
311 			break;
312 		if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
313 			connector->null_edid_counter++;
314 			goto carp;
315 		}
316 	}
317 	if (i == 4)
318 		goto carp;
319 
320 	/* if there's no extensions, we're done */
321 	if (block[0x7e] == 0)
322 		return block;
323 
324 	new = reallocf(block, (block[0x7e] + 1) * EDID_LENGTH, DRM_MEM_KMS,
325 	    M_WAITOK);
326 	block = new;
327 
328 	for (j = 1; j <= block[0x7e]; j++) {
329 		for (i = 0; i < 4; i++) {
330 			if (drm_do_probe_ddc_edid(adapter,
331 				  block + (valid_extensions + 1) * EDID_LENGTH,
332 				  j, EDID_LENGTH))
333 				goto out;
334 			if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH)) {
335 				valid_extensions++;
336 				break;
337 			}
338 		}
339 		if (i == 4)
340 			DRM_DEBUG_KMS("%s: Ignoring invalid EDID block %d.\n",
341 			     drm_get_connector_name(connector), j);
342 	}
343 
344 	if (valid_extensions != block[0x7e]) {
345 		block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
346 		block[0x7e] = valid_extensions;
347 		new = reallocf(block, (valid_extensions + 1) * EDID_LENGTH,
348 		    DRM_MEM_KMS, M_WAITOK);
349 		block = new;
350 	}
351 
352 	DRM_DEBUG_KMS("got EDID from %s\n", drm_get_connector_name(connector));
353 	return block;
354 
355 carp:
356 	DRM_ERROR("%s: EDID block %d invalid.\n",
357 	    drm_get_connector_name(connector), j);
358 
359 out:
360 	free(block, DRM_MEM_KMS);
361 	return NULL;
362 }
363 
364 /**
365  * Probe DDC presence.
366  *
367  * \param adapter : i2c device adaptor
368  * \return 1 on success
369  */
370 static bool
371 drm_probe_ddc(device_t adapter)
372 {
373 	unsigned char out;
374 
375 	return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
376 }
377 
378 /**
379  * drm_get_edid - get EDID data, if available
380  * @connector: connector we're probing
381  * @adapter: i2c adapter to use for DDC
382  *
383  * Poke the given i2c channel to grab EDID data if possible.  If found,
384  * attach it to the connector.
385  *
386  * Return edid data or NULL if we couldn't find any.
387  */
388 struct edid *drm_get_edid(struct drm_connector *connector,
389 			  device_t adapter)
390 {
391 	struct edid *edid = NULL;
392 
393 	if (drm_probe_ddc(adapter))
394 		edid = (struct edid *)drm_do_get_edid(connector, adapter);
395 
396 	connector->display_info.raw_edid = (char *)edid;
397 
398 	return edid;
399 
400 }
401 
402 /*** EDID parsing ***/
403 
404 /**
405  * edid_vendor - match a string against EDID's obfuscated vendor field
406  * @edid: EDID to match
407  * @vendor: vendor string
408  *
409  * Returns true if @vendor is in @edid, false otherwise
410  */
411 static bool edid_vendor(struct edid *edid, char *vendor)
412 {
413 	char edid_vendor[3];
414 
415 	edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
416 	edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
417 			  ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
418 	edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
419 
420 	return !strncmp(edid_vendor, vendor, 3);
421 }
422 
423 /**
424  * edid_get_quirks - return quirk flags for a given EDID
425  * @edid: EDID to process
426  *
427  * This tells subsequent routines what fixes they need to apply.
428  */
429 static u32 edid_get_quirks(struct edid *edid)
430 {
431 	struct edid_quirk *quirk;
432 	int i;
433 
434 	for (i = 0; i < DRM_ARRAY_SIZE(edid_quirk_list); i++) {
435 		quirk = &edid_quirk_list[i];
436 
437 		if (edid_vendor(edid, quirk->vendor) &&
438 		    (EDID_PRODUCT_ID(edid) == quirk->product_id))
439 			return quirk->quirks;
440 	}
441 
442 	return 0;
443 }
444 
445 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
446 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
447 
448 /**
449  * edid_fixup_preferred - set preferred modes based on quirk list
450  * @connector: has mode list to fix up
451  * @quirks: quirks list
452  *
453  * Walk the mode list for @connector, clearing the preferred status
454  * on existing modes and setting it anew for the right mode ala @quirks.
455  */
456 static void edid_fixup_preferred(struct drm_connector *connector,
457 				 u32 quirks)
458 {
459 	struct drm_display_mode *t, *cur_mode, *preferred_mode;
460 	int target_refresh = 0;
461 
462 	if (list_empty(&connector->probed_modes))
463 		return;
464 
465 	if (quirks & EDID_QUIRK_PREFER_LARGE_60)
466 		target_refresh = 60;
467 	if (quirks & EDID_QUIRK_PREFER_LARGE_75)
468 		target_refresh = 75;
469 
470 	preferred_mode = list_first_entry(&connector->probed_modes,
471 					  struct drm_display_mode, head);
472 
473 	list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
474 		cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
475 
476 		if (cur_mode == preferred_mode)
477 			continue;
478 
479 		/* Largest mode is preferred */
480 		if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
481 			preferred_mode = cur_mode;
482 
483 		/* At a given size, try to get closest to target refresh */
484 		if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
485 		    MODE_REFRESH_DIFF(cur_mode, target_refresh) <
486 		    MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
487 			preferred_mode = cur_mode;
488 		}
489 	}
490 
491 	preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
492 }
493 
494 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
495 					   int hsize, int vsize, int fresh)
496 {
497 	struct drm_display_mode *mode = NULL;
498 	int i;
499 
500 	for (i = 0; i < drm_num_dmt_modes; i++) {
501 		struct drm_display_mode *ptr = &drm_dmt_modes[i];
502 		if (hsize == ptr->hdisplay &&
503 			vsize == ptr->vdisplay &&
504 			fresh == drm_mode_vrefresh(ptr)) {
505 			/* get the expected default mode */
506 			mode = drm_mode_duplicate(dev, ptr);
507 			break;
508 		}
509 	}
510 	return mode;
511 }
512 
513 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
514 
515 static void
516 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
517 {
518 	int i, n = 0;
519 	u8 rev = ext[0x01], d = ext[0x02];
520 	u8 *det_base = ext + d;
521 
522 	switch (rev) {
523 	case 0:
524 		/* can't happen */
525 		return;
526 	case 1:
527 		/* have to infer how many blocks we have, check pixel clock */
528 		for (i = 0; i < 6; i++)
529 			if (det_base[18*i] || det_base[18*i+1])
530 				n++;
531 		break;
532 	default:
533 		/* explicit count */
534 		n = min(ext[0x03] & 0x0f, 6);
535 		break;
536 	}
537 
538 	for (i = 0; i < n; i++)
539 		cb((struct detailed_timing *)(det_base + 18 * i), closure);
540 }
541 
542 static void
543 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
544 {
545 	unsigned int i, n = min((int)ext[0x02], 6);
546 	u8 *det_base = ext + 5;
547 
548 	if (ext[0x01] != 1)
549 		return; /* unknown version */
550 
551 	for (i = 0; i < n; i++)
552 		cb((struct detailed_timing *)(det_base + 18 * i), closure);
553 }
554 
555 static void
556 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
557 {
558 	int i;
559 	struct edid *edid = (struct edid *)raw_edid;
560 
561 	if (edid == NULL)
562 		return;
563 
564 	for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
565 		cb(&(edid->detailed_timings[i]), closure);
566 
567 	for (i = 1; i <= raw_edid[0x7e]; i++) {
568 		u8 *ext = raw_edid + (i * EDID_LENGTH);
569 		switch (*ext) {
570 		case CEA_EXT:
571 			cea_for_each_detailed_block(ext, cb, closure);
572 			break;
573 		case VTB_EXT:
574 			vtb_for_each_detailed_block(ext, cb, closure);
575 			break;
576 		default:
577 			break;
578 		}
579 	}
580 }
581 
582 static void
583 is_rb(struct detailed_timing *t, void *data)
584 {
585 	u8 *r = (u8 *)t;
586 	if (r[3] == EDID_DETAIL_MONITOR_RANGE)
587 		if (r[15] & 0x10)
588 			*(bool *)data = true;
589 }
590 
591 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
592 static bool
593 drm_monitor_supports_rb(struct edid *edid)
594 {
595 	if (edid->revision >= 4) {
596 		bool ret;
597 		drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
598 		return ret;
599 	}
600 
601 	return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
602 }
603 
604 static void
605 find_gtf2(struct detailed_timing *t, void *data)
606 {
607 	u8 *r = (u8 *)t;
608 	if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
609 		*(u8 **)data = r;
610 }
611 
612 /* Secondary GTF curve kicks in above some break frequency */
613 static int
614 drm_gtf2_hbreak(struct edid *edid)
615 {
616 	u8 *r = NULL;
617 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
618 	return r ? (r[12] * 2) : 0;
619 }
620 
621 static int
622 drm_gtf2_2c(struct edid *edid)
623 {
624 	u8 *r = NULL;
625 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
626 	return r ? r[13] : 0;
627 }
628 
629 static int
630 drm_gtf2_m(struct edid *edid)
631 {
632 	u8 *r = NULL;
633 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
634 	return r ? (r[15] << 8) + r[14] : 0;
635 }
636 
637 static int
638 drm_gtf2_k(struct edid *edid)
639 {
640 	u8 *r = NULL;
641 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
642 	return r ? r[16] : 0;
643 }
644 
645 static int
646 drm_gtf2_2j(struct edid *edid)
647 {
648 	u8 *r = NULL;
649 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
650 	return r ? r[17] : 0;
651 }
652 
653 /**
654  * standard_timing_level - get std. timing level(CVT/GTF/DMT)
655  * @edid: EDID block to scan
656  */
657 static int standard_timing_level(struct edid *edid)
658 {
659 	if (edid->revision >= 2) {
660 		if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
661 			return LEVEL_CVT;
662 		if (drm_gtf2_hbreak(edid))
663 			return LEVEL_GTF2;
664 		return LEVEL_GTF;
665 	}
666 	return LEVEL_DMT;
667 }
668 
669 /*
670  * 0 is reserved.  The spec says 0x01 fill for unused timings.  Some old
671  * monitors fill with ascii space (0x20) instead.
672  */
673 static int
674 bad_std_timing(u8 a, u8 b)
675 {
676 	return (a == 0x00 && b == 0x00) ||
677 	       (a == 0x01 && b == 0x01) ||
678 	       (a == 0x20 && b == 0x20);
679 }
680 
681 /**
682  * drm_mode_std - convert standard mode info (width, height, refresh) into mode
683  * @t: standard timing params
684  * @timing_level: standard timing level
685  *
686  * Take the standard timing params (in this case width, aspect, and refresh)
687  * and convert them into a real mode using CVT/GTF/DMT.
688  */
689 static struct drm_display_mode *
690 drm_mode_std(struct drm_connector *connector, struct edid *edid,
691 	     struct std_timing *t, int revision)
692 {
693 	struct drm_device *dev = connector->dev;
694 	struct drm_display_mode *m, *mode = NULL;
695 	int hsize, vsize;
696 	int vrefresh_rate;
697 	unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
698 		>> EDID_TIMING_ASPECT_SHIFT;
699 	unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
700 		>> EDID_TIMING_VFREQ_SHIFT;
701 	int timing_level = standard_timing_level(edid);
702 
703 	if (bad_std_timing(t->hsize, t->vfreq_aspect))
704 		return NULL;
705 
706 	/* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
707 	hsize = t->hsize * 8 + 248;
708 	/* vrefresh_rate = vfreq + 60 */
709 	vrefresh_rate = vfreq + 60;
710 	/* the vdisplay is calculated based on the aspect ratio */
711 	if (aspect_ratio == 0) {
712 		if (revision < 3)
713 			vsize = hsize;
714 		else
715 			vsize = (hsize * 10) / 16;
716 	} else if (aspect_ratio == 1)
717 		vsize = (hsize * 3) / 4;
718 	else if (aspect_ratio == 2)
719 		vsize = (hsize * 4) / 5;
720 	else
721 		vsize = (hsize * 9) / 16;
722 
723 	/* HDTV hack, part 1 */
724 	if (vrefresh_rate == 60 &&
725 	    ((hsize == 1360 && vsize == 765) ||
726 	     (hsize == 1368 && vsize == 769))) {
727 		hsize = 1366;
728 		vsize = 768;
729 	}
730 
731 	/*
732 	 * If this connector already has a mode for this size and refresh
733 	 * rate (because it came from detailed or CVT info), use that
734 	 * instead.  This way we don't have to guess at interlace or
735 	 * reduced blanking.
736 	 */
737 	list_for_each_entry(m, &connector->probed_modes, head)
738 		if (m->hdisplay == hsize && m->vdisplay == vsize &&
739 		    drm_mode_vrefresh(m) == vrefresh_rate)
740 			return NULL;
741 
742 	/* HDTV hack, part 2 */
743 	if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
744 		mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
745 				    false);
746 		mode->hdisplay = 1366;
747 		mode->hsync_start = mode->hsync_start - 1;
748 		mode->hsync_end = mode->hsync_end - 1;
749 		return mode;
750 	}
751 
752 	/* check whether it can be found in default mode table */
753 	mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate);
754 	if (mode)
755 		return mode;
756 
757 	switch (timing_level) {
758 	case LEVEL_DMT:
759 		break;
760 	case LEVEL_GTF:
761 		mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
762 		break;
763 	case LEVEL_GTF2:
764 		/*
765 		 * This is potentially wrong if there's ever a monitor with
766 		 * more than one ranges section, each claiming a different
767 		 * secondary GTF curve.  Please don't do that.
768 		 */
769 		mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
770 		if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
771 			free(mode, DRM_MEM_KMS);
772 			mode = drm_gtf_mode_complex(dev, hsize, vsize,
773 						    vrefresh_rate, 0, 0,
774 						    drm_gtf2_m(edid),
775 						    drm_gtf2_2c(edid),
776 						    drm_gtf2_k(edid),
777 						    drm_gtf2_2j(edid));
778 		}
779 		break;
780 	case LEVEL_CVT:
781 		mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
782 				    false);
783 		break;
784 	}
785 	return mode;
786 }
787 
788 /*
789  * EDID is delightfully ambiguous about how interlaced modes are to be
790  * encoded.  Our internal representation is of frame height, but some
791  * HDTV detailed timings are encoded as field height.
792  *
793  * The format list here is from CEA, in frame size.  Technically we
794  * should be checking refresh rate too.  Whatever.
795  */
796 static void
797 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
798 			    struct detailed_pixel_timing *pt)
799 {
800 	int i;
801 	static const struct {
802 		int w, h;
803 	} cea_interlaced[] = {
804 		{ 1920, 1080 },
805 		{  720,  480 },
806 		{ 1440,  480 },
807 		{ 2880,  480 },
808 		{  720,  576 },
809 		{ 1440,  576 },
810 		{ 2880,  576 },
811 	};
812 
813 	if (!(pt->misc & DRM_EDID_PT_INTERLACED))
814 		return;
815 
816 	for (i = 0; i < DRM_ARRAY_SIZE(cea_interlaced); i++) {
817 		if ((mode->hdisplay == cea_interlaced[i].w) &&
818 		    (mode->vdisplay == cea_interlaced[i].h / 2)) {
819 			mode->vdisplay *= 2;
820 			mode->vsync_start *= 2;
821 			mode->vsync_end *= 2;
822 			mode->vtotal *= 2;
823 			mode->vtotal |= 1;
824 		}
825 	}
826 
827 	mode->flags |= DRM_MODE_FLAG_INTERLACE;
828 }
829 
830 /**
831  * drm_mode_detailed - create a new mode from an EDID detailed timing section
832  * @dev: DRM device (needed to create new mode)
833  * @edid: EDID block
834  * @timing: EDID detailed timing info
835  * @quirks: quirks to apply
836  *
837  * An EDID detailed timing block contains enough info for us to create and
838  * return a new struct drm_display_mode.
839  */
840 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
841 						  struct edid *edid,
842 						  struct detailed_timing *timing,
843 						  u32 quirks)
844 {
845 	struct drm_display_mode *mode;
846 	struct detailed_pixel_timing *pt = &timing->data.pixel_data;
847 	unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
848 	unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
849 	unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
850 	unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
851 	unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
852 	unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
853 	unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
854 	unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
855 
856 	/* ignore tiny modes */
857 	if (hactive < 64 || vactive < 64)
858 		return NULL;
859 
860 	if (pt->misc & DRM_EDID_PT_STEREO) {
861 		printf("stereo mode not supported\n");
862 		return NULL;
863 	}
864 	if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
865 		printf("composite sync not supported\n");
866 	}
867 
868 	/* it is incorrect if hsync/vsync width is zero */
869 	if (!hsync_pulse_width || !vsync_pulse_width) {
870 		DRM_DEBUG_KMS("Incorrect Detailed timing. "
871 				"Wrong Hsync/Vsync pulse width\n");
872 		return NULL;
873 	}
874 	mode = drm_mode_create(dev);
875 	if (!mode)
876 		return NULL;
877 
878 	mode->type = DRM_MODE_TYPE_DRIVER;
879 
880 	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
881 		timing->pixel_clock = htole16(1088);
882 
883 	mode->clock = le16toh(timing->pixel_clock) * 10;
884 
885 	mode->hdisplay = hactive;
886 	mode->hsync_start = mode->hdisplay + hsync_offset;
887 	mode->hsync_end = mode->hsync_start + hsync_pulse_width;
888 	mode->htotal = mode->hdisplay + hblank;
889 
890 	mode->vdisplay = vactive;
891 	mode->vsync_start = mode->vdisplay + vsync_offset;
892 	mode->vsync_end = mode->vsync_start + vsync_pulse_width;
893 	mode->vtotal = mode->vdisplay + vblank;
894 
895 	/* Some EDIDs have bogus h/vtotal values */
896 	if (mode->hsync_end > mode->htotal)
897 		mode->htotal = mode->hsync_end + 1;
898 	if (mode->vsync_end > mode->vtotal)
899 		mode->vtotal = mode->vsync_end + 1;
900 
901 	drm_mode_do_interlace_quirk(mode, pt);
902 
903 	drm_mode_set_name(mode);
904 
905 	if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
906 		pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
907 	}
908 
909 	mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
910 		DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
911 	mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
912 		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
913 
914 	mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
915 	mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
916 
917 	if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
918 		mode->width_mm *= 10;
919 		mode->height_mm *= 10;
920 	}
921 
922 	if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
923 		mode->width_mm = edid->width_cm * 10;
924 		mode->height_mm = edid->height_cm * 10;
925 	}
926 
927 	return mode;
928 }
929 
930 static bool
931 mode_is_rb(const struct drm_display_mode *mode)
932 {
933 	return (mode->htotal - mode->hdisplay == 160) &&
934 	       (mode->hsync_end - mode->hdisplay == 80) &&
935 	       (mode->hsync_end - mode->hsync_start == 32) &&
936 	       (mode->vsync_start - mode->vdisplay == 3);
937 }
938 
939 static bool
940 mode_in_hsync_range(struct drm_display_mode *mode,
941 		    struct edid *edid, u8 *t)
942 {
943 	int hsync, hmin, hmax;
944 
945 	hmin = t[7];
946 	if (edid->revision >= 4)
947 	    hmin += ((t[4] & 0x04) ? 255 : 0);
948 	hmax = t[8];
949 	if (edid->revision >= 4)
950 	    hmax += ((t[4] & 0x08) ? 255 : 0);
951 	hsync = drm_mode_hsync(mode);
952 
953 	return (hsync <= hmax && hsync >= hmin);
954 }
955 
956 static bool
957 mode_in_vsync_range(struct drm_display_mode *mode,
958 		    struct edid *edid, u8 *t)
959 {
960 	int vsync, vmin, vmax;
961 
962 	vmin = t[5];
963 	if (edid->revision >= 4)
964 	    vmin += ((t[4] & 0x01) ? 255 : 0);
965 	vmax = t[6];
966 	if (edid->revision >= 4)
967 	    vmax += ((t[4] & 0x02) ? 255 : 0);
968 	vsync = drm_mode_vrefresh(mode);
969 
970 	return (vsync <= vmax && vsync >= vmin);
971 }
972 
973 static u32
974 range_pixel_clock(struct edid *edid, u8 *t)
975 {
976 	/* unspecified */
977 	if (t[9] == 0 || t[9] == 255)
978 		return 0;
979 
980 	/* 1.4 with CVT support gives us real precision, yay */
981 	if (edid->revision >= 4 && t[10] == 0x04)
982 		return (t[9] * 10000) - ((t[12] >> 2) * 250);
983 
984 	/* 1.3 is pathetic, so fuzz up a bit */
985 	return t[9] * 10000 + 5001;
986 }
987 
988 static bool
989 mode_in_range(struct drm_display_mode *mode, struct edid *edid,
990 	      struct detailed_timing *timing)
991 {
992 	u32 max_clock;
993 	u8 *t = (u8 *)timing;
994 
995 	if (!mode_in_hsync_range(mode, edid, t))
996 		return false;
997 
998 	if (!mode_in_vsync_range(mode, edid, t))
999 		return false;
1000 
1001 	if ((max_clock = range_pixel_clock(edid, t)))
1002 		if (mode->clock > max_clock)
1003 			return false;
1004 
1005 	/* 1.4 max horizontal check */
1006 	if (edid->revision >= 4 && t[10] == 0x04)
1007 		if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1008 			return false;
1009 
1010 	if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1011 		return false;
1012 
1013 	return true;
1014 }
1015 
1016 /*
1017  * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
1018  * need to account for them.
1019  */
1020 static int
1021 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1022 			struct detailed_timing *timing)
1023 {
1024 	int i, modes = 0;
1025 	struct drm_display_mode *newmode;
1026 	struct drm_device *dev = connector->dev;
1027 
1028 	for (i = 0; i < drm_num_dmt_modes; i++) {
1029 		if (mode_in_range(drm_dmt_modes + i, edid, timing)) {
1030 			newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1031 			if (newmode) {
1032 				drm_mode_probed_add(connector, newmode);
1033 				modes++;
1034 			}
1035 		}
1036 	}
1037 
1038 	return modes;
1039 }
1040 
1041 static void
1042 do_inferred_modes(struct detailed_timing *timing, void *c)
1043 {
1044 	struct detailed_mode_closure *closure = c;
1045 	struct detailed_non_pixel *data = &timing->data.other_data;
1046 	int gtf = (closure->edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
1047 
1048 	if (gtf && data->type == EDID_DETAIL_MONITOR_RANGE)
1049 		closure->modes += drm_gtf_modes_for_range(closure->connector,
1050 							  closure->edid,
1051 							  timing);
1052 }
1053 
1054 static int
1055 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
1056 {
1057 	struct detailed_mode_closure closure = {
1058 		connector, edid, 0, 0, 0
1059 	};
1060 
1061 	if (version_greater(edid, 1, 0))
1062 		drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1063 					    &closure);
1064 
1065 	return closure.modes;
1066 }
1067 
1068 static int
1069 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1070 {
1071 	int i, j, m, modes = 0;
1072 	struct drm_display_mode *mode;
1073 	u8 *est = ((u8 *)timing) + 5;
1074 
1075 	for (i = 0; i < 6; i++) {
1076 		for (j = 7; j > 0; j--) {
1077 			m = (i * 8) + (7 - j);
1078 			if (m >= DRM_ARRAY_SIZE(est3_modes))
1079 				break;
1080 			if (est[i] & (1 << j)) {
1081 				mode = drm_mode_find_dmt(connector->dev,
1082 							 est3_modes[m].w,
1083 							 est3_modes[m].h,
1084 							 est3_modes[m].r
1085 							 /*, est3_modes[m].rb */);
1086 				if (mode) {
1087 					drm_mode_probed_add(connector, mode);
1088 					modes++;
1089 				}
1090 			}
1091 		}
1092 	}
1093 
1094 	return modes;
1095 }
1096 
1097 static void
1098 do_established_modes(struct detailed_timing *timing, void *c)
1099 {
1100 	struct detailed_mode_closure *closure = c;
1101 	struct detailed_non_pixel *data = &timing->data.other_data;
1102 
1103 	if (data->type == EDID_DETAIL_EST_TIMINGS)
1104 		closure->modes += drm_est3_modes(closure->connector, timing);
1105 }
1106 
1107 /**
1108  * add_established_modes - get est. modes from EDID and add them
1109  * @edid: EDID block to scan
1110  *
1111  * Each EDID block contains a bitmap of the supported "established modes" list
1112  * (defined above).  Tease them out and add them to the global modes list.
1113  */
1114 static int
1115 add_established_modes(struct drm_connector *connector, struct edid *edid)
1116 {
1117 	struct drm_device *dev = connector->dev;
1118 	unsigned long est_bits = edid->established_timings.t1 |
1119 		(edid->established_timings.t2 << 8) |
1120 		((edid->established_timings.mfg_rsvd & 0x80) << 9);
1121 	int i, modes = 0;
1122 	struct detailed_mode_closure closure = {
1123 		connector, edid, 0, 0, 0
1124 	};
1125 
1126 	for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1127 		if (est_bits & (1<<i)) {
1128 			struct drm_display_mode *newmode;
1129 			newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1130 			if (newmode) {
1131 				drm_mode_probed_add(connector, newmode);
1132 				modes++;
1133 			}
1134 		}
1135 	}
1136 
1137 	if (version_greater(edid, 1, 0))
1138 		    drm_for_each_detailed_block((u8 *)edid,
1139 						do_established_modes, &closure);
1140 
1141 	return modes + closure.modes;
1142 }
1143 
1144 static void
1145 do_standard_modes(struct detailed_timing *timing, void *c)
1146 {
1147 	struct detailed_mode_closure *closure = c;
1148 	struct detailed_non_pixel *data = &timing->data.other_data;
1149 	struct drm_connector *connector = closure->connector;
1150 	struct edid *edid = closure->edid;
1151 
1152 	if (data->type == EDID_DETAIL_STD_MODES) {
1153 		int i;
1154 		for (i = 0; i < 6; i++) {
1155 			struct std_timing *std;
1156 			struct drm_display_mode *newmode;
1157 
1158 			std = &data->data.timings[i];
1159 			newmode = drm_mode_std(connector, edid, std,
1160 					       edid->revision);
1161 			if (newmode) {
1162 				drm_mode_probed_add(connector, newmode);
1163 				closure->modes++;
1164 			}
1165 		}
1166 	}
1167 }
1168 
1169 /**
1170  * add_standard_modes - get std. modes from EDID and add them
1171  * @edid: EDID block to scan
1172  *
1173  * Standard modes can be calculated using the appropriate standard (DMT,
1174  * GTF or CVT. Grab them from @edid and add them to the list.
1175  */
1176 static int
1177 add_standard_modes(struct drm_connector *connector, struct edid *edid)
1178 {
1179 	int i, modes = 0;
1180 	struct detailed_mode_closure closure = {
1181 		connector, edid, 0, 0, 0
1182 	};
1183 
1184 	for (i = 0; i < EDID_STD_TIMINGS; i++) {
1185 		struct drm_display_mode *newmode;
1186 
1187 		newmode = drm_mode_std(connector, edid,
1188 				       &edid->standard_timings[i],
1189 				       edid->revision);
1190 		if (newmode) {
1191 			drm_mode_probed_add(connector, newmode);
1192 			modes++;
1193 		}
1194 	}
1195 
1196 	if (version_greater(edid, 1, 0))
1197 		drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
1198 					    &closure);
1199 
1200 	/* XXX should also look for standard codes in VTB blocks */
1201 
1202 	return modes + closure.modes;
1203 }
1204 
1205 static int drm_cvt_modes(struct drm_connector *connector,
1206 			 struct detailed_timing *timing)
1207 {
1208 	int i, j, modes = 0;
1209 	struct drm_display_mode *newmode;
1210 	struct drm_device *dev = connector->dev;
1211 	struct cvt_timing *cvt;
1212 	const int rates[] = { 60, 85, 75, 60, 50 };
1213 	const u8 empty[3] = { 0, 0, 0 };
1214 
1215 	for (i = 0; i < 4; i++) {
1216 		int width = 0, height;
1217 		cvt = &(timing->data.other_data.data.cvt[i]);
1218 
1219 		if (!memcmp(cvt->code, empty, 3))
1220 			continue;
1221 
1222 		height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1223 		switch (cvt->code[1] & 0x0c) {
1224 		case 0x00:
1225 			width = height * 4 / 3;
1226 			break;
1227 		case 0x04:
1228 			width = height * 16 / 9;
1229 			break;
1230 		case 0x08:
1231 			width = height * 16 / 10;
1232 			break;
1233 		case 0x0c:
1234 			width = height * 15 / 9;
1235 			break;
1236 		}
1237 
1238 		for (j = 1; j < 5; j++) {
1239 			if (cvt->code[2] & (1 << j)) {
1240 				newmode = drm_cvt_mode(dev, width, height,
1241 						       rates[j], j == 0,
1242 						       false, false);
1243 				if (newmode) {
1244 					drm_mode_probed_add(connector, newmode);
1245 					modes++;
1246 				}
1247 			}
1248 		}
1249 	}
1250 
1251 	return modes;
1252 }
1253 
1254 static void
1255 do_cvt_mode(struct detailed_timing *timing, void *c)
1256 {
1257 	struct detailed_mode_closure *closure = c;
1258 	struct detailed_non_pixel *data = &timing->data.other_data;
1259 
1260 	if (data->type == EDID_DETAIL_CVT_3BYTE)
1261 		closure->modes += drm_cvt_modes(closure->connector, timing);
1262 }
1263 
1264 static int
1265 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
1266 {
1267 	struct detailed_mode_closure closure = {
1268 		connector, edid, 0, 0, 0
1269 	};
1270 
1271 	if (version_greater(edid, 1, 2))
1272 		drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
1273 
1274 	/* XXX should also look for CVT codes in VTB blocks */
1275 
1276 	return closure.modes;
1277 }
1278 
1279 static void
1280 do_detailed_mode(struct detailed_timing *timing, void *c)
1281 {
1282 	struct detailed_mode_closure *closure = c;
1283 	struct drm_display_mode *newmode;
1284 
1285 	if (timing->pixel_clock) {
1286 		newmode = drm_mode_detailed(closure->connector->dev,
1287 					    closure->edid, timing,
1288 					    closure->quirks);
1289 		if (!newmode)
1290 			return;
1291 
1292 		if (closure->preferred)
1293 			newmode->type |= DRM_MODE_TYPE_PREFERRED;
1294 
1295 		drm_mode_probed_add(closure->connector, newmode);
1296 		closure->modes++;
1297 		closure->preferred = 0;
1298 	}
1299 }
1300 
1301 /*
1302  * add_detailed_modes - Add modes from detailed timings
1303  * @connector: attached connector
1304  * @edid: EDID block to scan
1305  * @quirks: quirks to apply
1306  */
1307 static int
1308 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
1309 		   u32 quirks)
1310 {
1311 	struct detailed_mode_closure closure = {
1312 		connector,
1313 		edid,
1314 		1,
1315 		quirks,
1316 		0
1317 	};
1318 
1319 	if (closure.preferred && !version_greater(edid, 1, 3))
1320 		closure.preferred =
1321 		    (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1322 
1323 	drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1324 
1325 	return closure.modes;
1326 }
1327 
1328 #define HDMI_IDENTIFIER 0x000C03
1329 #define AUDIO_BLOCK	0x01
1330 #define VENDOR_BLOCK    0x03
1331 #define SPEAKER_BLOCK	0x04
1332 #define EDID_BASIC_AUDIO	(1 << 6)
1333 
1334 /**
1335  * Search EDID for CEA extension block.
1336  */
1337 u8 *drm_find_cea_extension(struct edid *edid)
1338 {
1339 	u8 *edid_ext = NULL;
1340 	int i;
1341 
1342 	/* No EDID or EDID extensions */
1343 	if (edid == NULL || edid->extensions == 0)
1344 		return NULL;
1345 
1346 	/* Find CEA extension */
1347 	for (i = 0; i < edid->extensions; i++) {
1348 		edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
1349 		if (edid_ext[0] == CEA_EXT)
1350 			break;
1351 	}
1352 
1353 	if (i == edid->extensions)
1354 		return NULL;
1355 
1356 	return edid_ext;
1357 }
1358 
1359 static void
1360 parse_hdmi_vsdb(struct drm_connector *connector, uint8_t *db)
1361 {
1362 	connector->eld[5] |= (db[6] >> 7) << 1;  /* Supports_AI */
1363 
1364 	connector->dvi_dual = db[6] & 1;
1365 	connector->max_tmds_clock = db[7] * 5;
1366 
1367 	connector->latency_present[0] = db[8] >> 7;
1368 	connector->latency_present[1] = (db[8] >> 6) & 1;
1369 	connector->video_latency[0] = db[9];
1370 	connector->audio_latency[0] = db[10];
1371 	connector->video_latency[1] = db[11];
1372 	connector->audio_latency[1] = db[12];
1373 
1374 	DRM_DEBUG_KMS("HDMI: DVI dual %d, "
1375 		    "max TMDS clock %d, "
1376 		    "latency present %d %d, "
1377 		    "video latency %d %d, "
1378 		    "audio latency %d %d\n",
1379 		    connector->dvi_dual,
1380 		    connector->max_tmds_clock,
1381 	      (int) connector->latency_present[0],
1382 	      (int) connector->latency_present[1],
1383 		    connector->video_latency[0],
1384 		    connector->video_latency[1],
1385 		    connector->audio_latency[0],
1386 		    connector->audio_latency[1]);
1387 }
1388 
1389 static void
1390 monitor_name(struct detailed_timing *t, void *data)
1391 {
1392 	if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
1393 		*(u8 **)data = t->data.other_data.data.str.str;
1394 }
1395 
1396 /**
1397  * drm_edid_to_eld - build ELD from EDID
1398  * @connector: connector corresponding to the HDMI/DP sink
1399  * @edid: EDID to parse
1400  *
1401  * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
1402  * Some ELD fields are left to the graphics driver caller:
1403  * - Conn_Type
1404  * - HDCP
1405  * - Port_ID
1406  */
1407 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
1408 {
1409 	uint8_t *eld = connector->eld;
1410 	u8 *cea;
1411 	u8 *name;
1412 	u8 *db;
1413 	int sad_count = 0;
1414 	int mnl;
1415 	int dbl;
1416 
1417 	memset(eld, 0, sizeof(connector->eld));
1418 
1419 	cea = drm_find_cea_extension(edid);
1420 	if (!cea) {
1421 		DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
1422 		return;
1423 	}
1424 
1425 	name = NULL;
1426 	drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
1427 	for (mnl = 0; name && mnl < 13; mnl++) {
1428 		if (name[mnl] == 0x0a)
1429 			break;
1430 		eld[20 + mnl] = name[mnl];
1431 	}
1432 	eld[4] = (cea[1] << 5) | mnl;
1433 	DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
1434 
1435 	eld[0] = 2 << 3;		/* ELD version: 2 */
1436 
1437 	eld[16] = edid->mfg_id[0];
1438 	eld[17] = edid->mfg_id[1];
1439 	eld[18] = edid->prod_code[0];
1440 	eld[19] = edid->prod_code[1];
1441 
1442 	for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) {
1443 		dbl = db[0] & 0x1f;
1444 
1445 		switch ((db[0] & 0xe0) >> 5) {
1446 		case AUDIO_BLOCK:	/* Audio Data Block, contains SADs */
1447 			sad_count = dbl / 3;
1448 			memcpy(eld + 20 + mnl, &db[1], dbl);
1449 			break;
1450 		case SPEAKER_BLOCK:	/* Speaker Allocation Data Block */
1451 			eld[7] = db[1];
1452 			break;
1453 		case VENDOR_BLOCK:
1454 			/* HDMI Vendor-Specific Data Block */
1455 			if (db[1] == 0x03 && db[2] == 0x0c && db[3] == 0)
1456 				parse_hdmi_vsdb(connector, db);
1457 			break;
1458 		default:
1459 			break;
1460 		}
1461 	}
1462 	eld[5] |= sad_count << 4;
1463 	eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
1464 
1465 	DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
1466 }
1467 
1468 /**
1469  * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
1470  * @connector: connector associated with the HDMI/DP sink
1471  * @mode: the display mode
1472  */
1473 int drm_av_sync_delay(struct drm_connector *connector,
1474 		      struct drm_display_mode *mode)
1475 {
1476 	int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
1477 	int a, v;
1478 
1479 	if (!connector->latency_present[0])
1480 		return 0;
1481 	if (!connector->latency_present[1])
1482 		i = 0;
1483 
1484 	a = connector->audio_latency[i];
1485 	v = connector->video_latency[i];
1486 
1487 	/*
1488 	 * HDMI/DP sink doesn't support audio or video?
1489 	 */
1490 	if (a == 255 || v == 255)
1491 		return 0;
1492 
1493 	/*
1494 	 * Convert raw EDID values to millisecond.
1495 	 * Treat unknown latency as 0ms.
1496 	 */
1497 	if (a)
1498 		a = min(2 * (a - 1), 500);
1499 	if (v)
1500 		v = min(2 * (v - 1), 500);
1501 
1502 	return max(v - a, 0);
1503 }
1504 
1505 /**
1506  * drm_select_eld - select one ELD from multiple HDMI/DP sinks
1507  * @encoder: the encoder just changed display mode
1508  * @mode: the adjusted display mode
1509  *
1510  * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
1511  * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
1512  */
1513 struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
1514 				     struct drm_display_mode *mode)
1515 {
1516 	struct drm_connector *connector;
1517 	struct drm_device *dev = encoder->dev;
1518 
1519 	list_for_each_entry(connector, &dev->mode_config.connector_list, head)
1520 		if (connector->encoder == encoder && connector->eld[0])
1521 			return connector;
1522 
1523 	return NULL;
1524 }
1525 
1526 /**
1527  * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1528  * @edid: monitor EDID information
1529  *
1530  * Parse the CEA extension according to CEA-861-B.
1531  * Return true if HDMI, false if not or unknown.
1532  */
1533 bool drm_detect_hdmi_monitor(struct edid *edid)
1534 {
1535 	u8 *edid_ext;
1536 	int i, hdmi_id;
1537 	int start_offset, end_offset;
1538 	bool is_hdmi = false;
1539 
1540 	edid_ext = drm_find_cea_extension(edid);
1541 	if (!edid_ext)
1542 		goto end;
1543 
1544 	/* Data block offset in CEA extension block */
1545 	start_offset = 4;
1546 	end_offset = edid_ext[2];
1547 
1548 	/*
1549 	 * Because HDMI identifier is in Vendor Specific Block,
1550 	 * search it from all data blocks of CEA extension.
1551 	 */
1552 	for (i = start_offset; i < end_offset;
1553 		/* Increased by data block len */
1554 		i += ((edid_ext[i] & 0x1f) + 1)) {
1555 		/* Find vendor specific block */
1556 		if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1557 			hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1558 				  edid_ext[i + 3] << 16;
1559 			/* Find HDMI identifier */
1560 			if (hdmi_id == HDMI_IDENTIFIER)
1561 				is_hdmi = true;
1562 			break;
1563 		}
1564 	}
1565 
1566 end:
1567 	return is_hdmi;
1568 }
1569 
1570 /**
1571  * drm_detect_monitor_audio - check monitor audio capability
1572  *
1573  * Monitor should have CEA extension block.
1574  * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
1575  * audio' only. If there is any audio extension block and supported
1576  * audio format, assume at least 'basic audio' support, even if 'basic
1577  * audio' is not defined in EDID.
1578  *
1579  */
1580 bool drm_detect_monitor_audio(struct edid *edid)
1581 {
1582 	u8 *edid_ext;
1583 	int i, j;
1584 	bool has_audio = false;
1585 	int start_offset, end_offset;
1586 
1587 	edid_ext = drm_find_cea_extension(edid);
1588 	if (!edid_ext)
1589 		goto end;
1590 
1591 	has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
1592 
1593 	if (has_audio) {
1594 		DRM_DEBUG_KMS("Monitor has basic audio support\n");
1595 		goto end;
1596 	}
1597 
1598 	/* Data block offset in CEA extension block */
1599 	start_offset = 4;
1600 	end_offset = edid_ext[2];
1601 
1602 	for (i = start_offset; i < end_offset;
1603 			i += ((edid_ext[i] & 0x1f) + 1)) {
1604 		if ((edid_ext[i] >> 5) == AUDIO_BLOCK) {
1605 			has_audio = true;
1606 			for (j = 1; j < (edid_ext[i] & 0x1f); j += 3)
1607 				DRM_DEBUG_KMS("CEA audio format %d\n",
1608 					      (edid_ext[i + j] >> 3) & 0xf);
1609 			goto end;
1610 		}
1611 	}
1612 end:
1613 	return has_audio;
1614 }
1615 
1616 /**
1617  * drm_add_display_info - pull display info out if present
1618  * @edid: EDID data
1619  * @info: display info (attached to connector)
1620  *
1621  * Grab any available display info and stuff it into the drm_display_info
1622  * structure that's part of the connector.  Useful for tracking bpp and
1623  * color spaces.
1624  */
1625 static void drm_add_display_info(struct edid *edid,
1626 				 struct drm_display_info *info)
1627 {
1628 	u8 *edid_ext;
1629 
1630 	info->width_mm = edid->width_cm * 10;
1631 	info->height_mm = edid->height_cm * 10;
1632 
1633 	/* driver figures it out in this case */
1634 	info->bpc = 0;
1635 	info->color_formats = 0;
1636 
1637 	/* Only defined for 1.4 with digital displays */
1638 	if (edid->revision < 4)
1639 		return;
1640 
1641 	if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
1642 		return;
1643 
1644 	switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
1645 	case DRM_EDID_DIGITAL_DEPTH_6:
1646 		info->bpc = 6;
1647 		break;
1648 	case DRM_EDID_DIGITAL_DEPTH_8:
1649 		info->bpc = 8;
1650 		break;
1651 	case DRM_EDID_DIGITAL_DEPTH_10:
1652 		info->bpc = 10;
1653 		break;
1654 	case DRM_EDID_DIGITAL_DEPTH_12:
1655 		info->bpc = 12;
1656 		break;
1657 	case DRM_EDID_DIGITAL_DEPTH_14:
1658 		info->bpc = 14;
1659 		break;
1660 	case DRM_EDID_DIGITAL_DEPTH_16:
1661 		info->bpc = 16;
1662 		break;
1663 	case DRM_EDID_DIGITAL_DEPTH_UNDEF:
1664 	default:
1665 		info->bpc = 0;
1666 		break;
1667 	}
1668 
1669 	info->color_formats = DRM_COLOR_FORMAT_RGB444;
1670 	if (info->color_formats & DRM_EDID_FEATURE_RGB_YCRCB444)
1671 		info->color_formats = DRM_COLOR_FORMAT_YCRCB444;
1672 	if (info->color_formats & DRM_EDID_FEATURE_RGB_YCRCB422)
1673 		info->color_formats = DRM_COLOR_FORMAT_YCRCB422;
1674 
1675 	/* Get data from CEA blocks if present */
1676 	edid_ext = drm_find_cea_extension(edid);
1677 	if (!edid_ext)
1678 		return;
1679 
1680 	info->cea_rev = edid_ext[1];
1681 }
1682 
1683 /**
1684  * drm_add_edid_modes - add modes from EDID data, if available
1685  * @connector: connector we're probing
1686  * @edid: edid data
1687  *
1688  * Add the specified modes to the connector's mode list.
1689  *
1690  * Return number of modes added or 0 if we couldn't find any.
1691  */
1692 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1693 {
1694 	int num_modes = 0;
1695 	u32 quirks;
1696 
1697 	if (edid == NULL) {
1698 		return 0;
1699 	}
1700 	if (!drm_edid_is_valid(edid)) {
1701 		device_printf(connector->dev->device, "%s: EDID invalid.\n",
1702 			 drm_get_connector_name(connector));
1703 		return 0;
1704 	}
1705 
1706 	quirks = edid_get_quirks(edid);
1707 
1708 	/*
1709 	 * EDID spec says modes should be preferred in this order:
1710 	 * - preferred detailed mode
1711 	 * - other detailed modes from base block
1712 	 * - detailed modes from extension blocks
1713 	 * - CVT 3-byte code modes
1714 	 * - standard timing codes
1715 	 * - established timing codes
1716 	 * - modes inferred from GTF or CVT range information
1717 	 *
1718 	 * We get this pretty much right.
1719 	 *
1720 	 * XXX order for additional mode types in extension blocks?
1721 	 */
1722 	num_modes += add_detailed_modes(connector, edid, quirks);
1723 	num_modes += add_cvt_modes(connector, edid);
1724 	num_modes += add_standard_modes(connector, edid);
1725 	num_modes += add_established_modes(connector, edid);
1726 	num_modes += add_inferred_modes(connector, edid);
1727 
1728 	if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1729 		edid_fixup_preferred(connector, quirks);
1730 
1731 	drm_add_display_info(edid, &connector->display_info);
1732 
1733 	return num_modes;
1734 }
1735 
1736 /**
1737  * drm_add_modes_noedid - add modes for the connectors without EDID
1738  * @connector: connector we're probing
1739  * @hdisplay: the horizontal display limit
1740  * @vdisplay: the vertical display limit
1741  *
1742  * Add the specified modes to the connector's mode list. Only when the
1743  * hdisplay/vdisplay is not beyond the given limit, it will be added.
1744  *
1745  * Return number of modes added or 0 if we couldn't find any.
1746  */
1747 int drm_add_modes_noedid(struct drm_connector *connector,
1748 			int hdisplay, int vdisplay)
1749 {
1750 	int i, count, num_modes = 0;
1751 	struct drm_display_mode *mode;
1752 	struct drm_device *dev = connector->dev;
1753 
1754 	count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1755 	if (hdisplay < 0)
1756 		hdisplay = 0;
1757 	if (vdisplay < 0)
1758 		vdisplay = 0;
1759 
1760 	for (i = 0; i < count; i++) {
1761 		struct drm_display_mode *ptr = &drm_dmt_modes[i];
1762 		if (hdisplay && vdisplay) {
1763 			/*
1764 			 * Only when two are valid, they will be used to check
1765 			 * whether the mode should be added to the mode list of
1766 			 * the connector.
1767 			 */
1768 			if (ptr->hdisplay > hdisplay ||
1769 					ptr->vdisplay > vdisplay)
1770 				continue;
1771 		}
1772 		if (drm_mode_vrefresh(ptr) > 61)
1773 			continue;
1774 		mode = drm_mode_duplicate(dev, ptr);
1775 		if (mode) {
1776 			drm_mode_probed_add(connector, mode);
1777 			num_modes++;
1778 		}
1779 	}
1780 	return num_modes;
1781 }
1782