xref: /freebsd/sys/dev/dpaa2/dpaa2_mc.h (revision 7899f917b1c0ea178f1d2be0cfb452086d079d23)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright © 2021-2022 Dmitry Salychev
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #ifndef	_DPAA2_MC_H
29 #define	_DPAA2_MC_H
30 
31 #include <sys/rman.h>
32 #include <sys/bus.h>
33 #include <sys/queue.h>
34 
35 #include <net/ethernet.h>
36 
37 #include <dev/ofw/openfirm.h>
38 
39 #include "pci_if.h"
40 
41 #include "dpaa2_types.h"
42 #include "dpaa2_mcp.h"
43 #include "dpaa2_swp.h"
44 #include "dpaa2_ni.h"
45 #include "dpaa2_io.h"
46 #include "dpaa2_mac.h"
47 #include "dpaa2_con.h"
48 #include "dpaa2_bp.h"
49 
50 /*
51  * Maximum number of MSIs supported by the MC for its children without IOMMU.
52  *
53  * TODO: Should be much more with IOMMU translation.
54  */
55 #define DPAA2_MC_MSI_COUNT	 32
56 
57 /* Flags for DPAA2 devices as resources. */
58 #define DPAA2_MC_DEV_ALLOCATABLE 0x01u /* to be managed by DPAA2-specific rman */
59 #define DPAA2_MC_DEV_ASSOCIATED	 0x02u /* to obtain info about DPAA2 device  */
60 #define DPAA2_MC_DEV_SHAREABLE	 0x04u /* to be shared among DPAA2 devices */
61 
62 struct dpaa2_mc_devinfo; /* about managed DPAA2 devices */
63 
64 /**
65  * @brief Software context for the DPAA2 Management Complex (MC) driver.
66  *
67  * dev:		Device associated with this software context.
68  * rcdev:	Child device associated with the root resource container.
69  * acpi_based:	Attached using ACPI (true) or FDT (false).
70  * ofw_node:	FDT node of the Management Complex (acpi_based == false).
71  *
72  * res:		Unmapped MC command portal and control registers resources.
73  * map:		Mapped MC command portal and control registers resources.
74  *
75  * dpio_rman:	I/O objects resource manager.
76  * dpbp_rman:	Buffer Pools resource manager.
77  * dpcon_rman:	Concentrators resource manager.
78  * dpmcp_rman:	MC portals resource manager.
79  */
80 struct dpaa2_mc_softc {
81 	device_t		 dev;
82 	device_t		 rcdev;
83 	bool			 acpi_based;
84 	phandle_t		 ofw_node;
85 
86 	struct resource 	*res[2];
87 	struct resource_map	 map[2];
88 
89 	/* For allocatable managed DPAA2 objects. */
90 	struct rman		 dpio_rman;
91 	struct rman		 dpbp_rman;
92 	struct rman		 dpcon_rman;
93 	struct rman		 dpmcp_rman;
94 
95 	/* For managed DPAA2 objects. */
96 	struct mtx		 mdev_lock;
97 	STAILQ_HEAD(, dpaa2_mc_devinfo) mdev_list;
98 
99 	/* NOTE: Workaround in case of no IOMMU available. */
100 #ifndef IOMMU
101 	device_t		 msi_owner;
102 	bool			 msi_allocated;
103 	struct mtx		 msi_lock;
104 	struct {
105 		device_t	 child;
106 		int		 irq;
107 	} msi[DPAA2_MC_MSI_COUNT];
108 #endif
109 };
110 
111 /**
112  * @brief Software context for the DPAA2 Resource Container (RC) driver.
113  *
114  * dev:		Device associated with this software context.
115  * portal:	Helper object to send commands to the MC portal.
116  * unit:	Helps to distinguish between root (0) and child DRPCs.
117  * cont_id:	Container ID.
118  */
119 struct dpaa2_rc_softc {
120 	device_t		 dev;
121 	int			 unit;
122 	uint32_t		 cont_id;
123 };
124 
125 /**
126  * @brief Information about MSI messages supported by the DPAA2 object.
127  *
128  * msi_msgnum:	 Number of MSI messages supported by the DPAA2 object.
129  * msi_alloc:	 Number of MSI messages allocated for the DPAA2 object.
130  * msi_handlers: Number of MSI message handlers configured.
131  */
132 struct dpaa2_msinfo {
133 	uint8_t			 msi_msgnum;
134 	uint8_t			 msi_alloc;
135 	uint32_t		 msi_handlers;
136 };
137 
138 /**
139  * @brief Information about DPAA2 device.
140  *
141  * pdev:	Parent device.
142  * dev:		Device this devinfo is associated with.
143  *
144  * id:		ID of a logical DPAA2 object resource.
145  * portal_id:	ID of the MC portal which belongs to the object's container.
146  * icid:	Isolation context ID of the DPAA2 object. It is shared
147  *		between a resource container and all of its children.
148  *
149  * dtype:	Type of the DPAA2 object.
150  * resources:	Resources available for this DPAA2 device.
151  * msi:		Information about MSI messages supported by the DPAA2 object.
152  */
153 struct dpaa2_devinfo {
154 	device_t		 pdev;
155 	device_t		 dev;
156 
157 	uint32_t		 id;
158 	uint32_t		 portal_id;
159 	uint32_t		 icid;
160 
161 	enum dpaa2_dev_type	 dtype;
162 	struct resource_list	 resources;
163 	struct dpaa2_msinfo	 msi;
164 
165 	/*
166 	 * DPAA2 object might or might not have its own portal allocated to
167 	 * execute MC commands. If the portal has been allocated, it takes
168 	 * precedence over the portal owned by the resource container.
169 	 */
170 	struct dpaa2_mcp	*portal;
171 };
172 
173 DECLARE_CLASS(dpaa2_mc_driver);
174 
175 /* For device interface. */
176 
177 int dpaa2_mc_attach(device_t dev);
178 int dpaa2_mc_detach(device_t dev);
179 
180 /* For bus interface. */
181 
182 struct rman *dpaa2_mc_rman(device_t mcdev, int type, u_int flags);
183 struct resource * dpaa2_mc_alloc_resource(device_t mcdev, device_t child,
184     int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count,
185     u_int flags);
186 int dpaa2_mc_adjust_resource(device_t mcdev, device_t child,
187     struct resource *r, rman_res_t start, rman_res_t end);
188 int dpaa2_mc_release_resource(device_t mcdev, device_t child,
189     struct resource *r);
190 int dpaa2_mc_activate_resource(device_t mcdev, device_t child,
191     struct resource *r);
192 int dpaa2_mc_deactivate_resource(device_t mcdev, device_t child,
193     struct resource *r);
194 
195 /* For pseudo-pcib interface. */
196 
197 int dpaa2_mc_alloc_msi(device_t mcdev, device_t child, int count, int maxcount,
198     int *irqs);
199 int dpaa2_mc_release_msi(device_t mcdev, device_t child, int count, int *irqs);
200 int dpaa2_mc_map_msi(device_t mcdev, device_t child, int irq, uint64_t *addr,
201     uint32_t *data);
202 int dpaa2_mc_get_id(device_t mcdev, device_t child, enum pci_id_type type,
203     uintptr_t *id);
204 
205 /* For DPAA2 MC bus interface. */
206 
207 int dpaa2_mc_manage_dev(device_t mcdev, device_t dpaa2_dev, uint32_t flags);
208 int dpaa2_mc_get_free_dev(device_t mcdev, device_t *dpaa2_dev,
209     enum dpaa2_dev_type devtype);
210 int dpaa2_mc_get_dev(device_t mcdev, device_t *dpaa2_dev,
211     enum dpaa2_dev_type devtype, uint32_t obj_id);
212 int dpaa2_mc_get_shared_dev(device_t mcdev, device_t *dpaa2_dev,
213     enum dpaa2_dev_type devtype);
214 int dpaa2_mc_reserve_dev(device_t mcdev, device_t dpaa2_dev,
215     enum dpaa2_dev_type devtype);
216 int dpaa2_mc_release_dev(device_t mcdev, device_t dpaa2_dev,
217     enum dpaa2_dev_type devtype);
218 
219 #endif /* _DPAA2_MC_H */
220