1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright © 2023 Dmitry Salychev 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #ifndef _DPAA2_CHANNEL_H 29 #define _DPAA2_CHANNEL_H 30 31 #include <sys/types.h> 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/malloc.h> 36 #include <sys/queue.h> 37 #include <sys/taskqueue.h> 38 #include <sys/buf_ring.h> 39 #include <sys/lock.h> 40 #include <sys/mutex.h> 41 42 #include "dpaa2_types.h" 43 #include "dpaa2_io.h" 44 #include "dpaa2_ni.h" 45 46 #define DPAA2_TX_BUFRING_SZ (4096u) 47 48 /** 49 * @brief QBMan channel to process ingress traffic. 50 * 51 * NOTE: Several WQs are organized into a single channel. 52 */ 53 struct dpaa2_channel { 54 device_t ni_dev; 55 device_t io_dev; 56 device_t con_dev; 57 uint16_t id; 58 uint16_t flowid; 59 60 uint64_t tx_frames; 61 uint64_t tx_dropped; 62 63 struct mtx dma_mtx; 64 bus_dma_tag_t rx_dmat; 65 bus_dma_tag_t tx_dmat; 66 bus_dma_tag_t sgt_dmat; 67 68 struct dpaa2_io_notif_ctx ctx; /* to configure CDANs */ 69 70 struct dpaa2_buf store; /* to keep VDQ responses */ 71 uint32_t store_sz; /* in frames */ 72 uint32_t store_idx; /* frame index */ 73 74 uint32_t recycled_n; 75 struct dpaa2_buf *recycled[DPAA2_SWP_BUFS_PER_CMD]; 76 77 uint32_t rxq_n; 78 struct dpaa2_ni_fq rx_queues[DPAA2_MAX_TCS]; 79 struct dpaa2_ni_fq txc_queue; 80 81 struct taskqueue *cleanup_tq; 82 struct task cleanup_task; 83 struct task bp_task; 84 85 struct mtx xmit_mtx; 86 struct buf_ring *xmit_br; 87 } __aligned(CACHE_LINE_SIZE); 88 89 int dpaa2_chan_setup(device_t, device_t, device_t, device_t, 90 struct dpaa2_channel **, uint32_t, task_fn_t); 91 int dpaa2_chan_setup_fq(device_t, struct dpaa2_channel *, 92 enum dpaa2_ni_queue_type); 93 int dpaa2_chan_next_frame(struct dpaa2_channel *, struct dpaa2_dq **); 94 95 #endif /* _DPAA2_CHANNEL_H */ 96