1*58983e4bSDmitry Salychev /*- 2*58983e4bSDmitry Salychev * SPDX-License-Identifier: BSD-2-Clause 3*58983e4bSDmitry Salychev * 4*58983e4bSDmitry Salychev * Copyright © 2023 Dmitry Salychev 5*58983e4bSDmitry Salychev * 6*58983e4bSDmitry Salychev * Redistribution and use in source and binary forms, with or without 7*58983e4bSDmitry Salychev * modification, are permitted provided that the following conditions 8*58983e4bSDmitry Salychev * are met: 9*58983e4bSDmitry Salychev * 1. Redistributions of source code must retain the above copyright 10*58983e4bSDmitry Salychev * notice, this list of conditions and the following disclaimer. 11*58983e4bSDmitry Salychev * 2. Redistributions in binary form must reproduce the above copyright 12*58983e4bSDmitry Salychev * notice, this list of conditions and the following disclaimer in the 13*58983e4bSDmitry Salychev * documentation and/or other materials provided with the distribution. 14*58983e4bSDmitry Salychev * 15*58983e4bSDmitry Salychev * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16*58983e4bSDmitry Salychev * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17*58983e4bSDmitry Salychev * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18*58983e4bSDmitry Salychev * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19*58983e4bSDmitry Salychev * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20*58983e4bSDmitry Salychev * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21*58983e4bSDmitry Salychev * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22*58983e4bSDmitry Salychev * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23*58983e4bSDmitry Salychev * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24*58983e4bSDmitry Salychev * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25*58983e4bSDmitry Salychev * SUCH DAMAGE. 26*58983e4bSDmitry Salychev */ 27*58983e4bSDmitry Salychev 28*58983e4bSDmitry Salychev #ifndef _DPAA2_BUF_H 29*58983e4bSDmitry Salychev #define _DPAA2_BUF_H 30*58983e4bSDmitry Salychev 31*58983e4bSDmitry Salychev #include <sys/types.h> 32*58983e4bSDmitry Salychev #include <sys/param.h> 33*58983e4bSDmitry Salychev #include <sys/malloc.h> 34*58983e4bSDmitry Salychev #include <sys/lock.h> 35*58983e4bSDmitry Salychev #include <sys/mutex.h> 36*58983e4bSDmitry Salychev 37*58983e4bSDmitry Salychev #include <machine/bus.h> 38*58983e4bSDmitry Salychev 39*58983e4bSDmitry Salychev #define DPAA2_RX_BUF_SIZE (MJUM9BYTES) 40*58983e4bSDmitry Salychev 41*58983e4bSDmitry Salychev struct dpaa2_buf { 42*58983e4bSDmitry Salychev bus_addr_t paddr; 43*58983e4bSDmitry Salychev caddr_t vaddr; 44*58983e4bSDmitry Salychev bus_dma_tag_t dmat; 45*58983e4bSDmitry Salychev bus_dmamap_t dmap; 46*58983e4bSDmitry Salychev bus_dma_segment_t seg; 47*58983e4bSDmitry Salychev int nseg; 48*58983e4bSDmitry Salychev struct mbuf *m; 49*58983e4bSDmitry Salychev struct dpaa2_buf *sgt; 50*58983e4bSDmitry Salychev void *opt; 51*58983e4bSDmitry Salychev }; 52*58983e4bSDmitry Salychev 53*58983e4bSDmitry Salychev #define DPAA2_BUF_INIT_TAGOPT(__buf, __tag, __opt) do { \ 54*58983e4bSDmitry Salychev KASSERT((__buf) != NULL, ("%s: buf is NULL", __func__)); \ 55*58983e4bSDmitry Salychev \ 56*58983e4bSDmitry Salychev (__buf)->paddr = 0; \ 57*58983e4bSDmitry Salychev (__buf)->vaddr = NULL; \ 58*58983e4bSDmitry Salychev (__buf)->dmat = (__tag); \ 59*58983e4bSDmitry Salychev (__buf)->dmap = NULL; \ 60*58983e4bSDmitry Salychev (__buf)->seg.ds_addr = 0; \ 61*58983e4bSDmitry Salychev (__buf)->seg.ds_len = 0; \ 62*58983e4bSDmitry Salychev (__buf)->nseg = 0; \ 63*58983e4bSDmitry Salychev (__buf)->m = NULL; \ 64*58983e4bSDmitry Salychev (__buf)->sgt = NULL; \ 65*58983e4bSDmitry Salychev (__buf)->opt = (__opt); \ 66*58983e4bSDmitry Salychev } while(0) 67*58983e4bSDmitry Salychev #define DPAA2_BUF_INIT(__buf) DPAA2_BUF_INIT_TAGOPT((__buf), NULL, NULL) 68*58983e4bSDmitry Salychev 69*58983e4bSDmitry Salychev #if defined(INVARIANTS) 70*58983e4bSDmitry Salychev /* 71*58983e4bSDmitry Salychev * TXPREP/TXREADY macros allow to verify whether Tx buffer is prepared to be 72*58983e4bSDmitry Salychev * seeded and/or ready to be used for transmission. 73*58983e4bSDmitry Salychev * 74*58983e4bSDmitry Salychev * NOTE: Any modification should be carefully analyzed and justified. 75*58983e4bSDmitry Salychev */ 76*58983e4bSDmitry Salychev #define DPAA2_BUF_ASSERT_TXPREP(__buf) do { \ 77*58983e4bSDmitry Salychev struct dpaa2_buf *__sgt = (__buf)->sgt; \ 78*58983e4bSDmitry Salychev KASSERT((__sgt) != NULL, ("%s: no S/G table?", __func__)); \ 79*58983e4bSDmitry Salychev \ 80*58983e4bSDmitry Salychev KASSERT((__buf)->paddr == 0, ("%s: paddr set?", __func__)); \ 81*58983e4bSDmitry Salychev KASSERT((__buf)->vaddr == NULL, ("%s: vaddr set?", __func__)); \ 82*58983e4bSDmitry Salychev KASSERT((__buf)->dmat != NULL, ("%s: no DMA tag?", __func__)); \ 83*58983e4bSDmitry Salychev KASSERT((__buf)->dmap == NULL, ("%s: DMA map set?", __func__)); \ 84*58983e4bSDmitry Salychev KASSERT((__buf)->seg.ds_addr == 0, ("%s: already mapped?", __func__)); \ 85*58983e4bSDmitry Salychev KASSERT((__buf)->seg.ds_len == 0, ("%s: already mapped?", __func__)); \ 86*58983e4bSDmitry Salychev KASSERT((__buf)->nseg == 0, ("%s: nseg > 0?", __func__)); \ 87*58983e4bSDmitry Salychev KASSERT((__buf)->m == NULL, ("%s: mbuf set?", __func__)); \ 88*58983e4bSDmitry Salychev KASSERT((__buf)->opt != NULL, ("%s: no Tx ring?", __func__)); \ 89*58983e4bSDmitry Salychev \ 90*58983e4bSDmitry Salychev KASSERT((__sgt)->paddr == 0, ("%s: S/G paddr set?", __func__)); \ 91*58983e4bSDmitry Salychev KASSERT((__sgt)->vaddr == NULL, ("%s: S/G vaddr set?", __func__)); \ 92*58983e4bSDmitry Salychev KASSERT((__sgt)->dmat != NULL, ("%s: no S/G DMA tag?", __func__)); \ 93*58983e4bSDmitry Salychev KASSERT((__sgt)->dmap == NULL, ("%s: S/G DMA map set?", __func__)); \ 94*58983e4bSDmitry Salychev KASSERT((__sgt)->seg.ds_addr == 0, ("%s: S/G mapped?", __func__)); \ 95*58983e4bSDmitry Salychev KASSERT((__sgt)->seg.ds_len == 0, ("%s: S/G mapped?", __func__)); \ 96*58983e4bSDmitry Salychev KASSERT((__sgt)->nseg == 0, ("%s: S/G nseg > 0?", __func__)); \ 97*58983e4bSDmitry Salychev KASSERT((__sgt)->m == NULL, ("%s: S/G mbuf set?", __func__)); \ 98*58983e4bSDmitry Salychev KASSERT((__sgt)->opt == (__buf),("%s: buf not linked?", __func__)); \ 99*58983e4bSDmitry Salychev } while(0) 100*58983e4bSDmitry Salychev #define DPAA2_BUF_ASSERT_TXREADY(__buf) do { \ 101*58983e4bSDmitry Salychev struct dpaa2_buf *__sgt = (__buf)->sgt; \ 102*58983e4bSDmitry Salychev KASSERT((__sgt) != NULL, ("%s: no S/G table?", __func__)); \ 103*58983e4bSDmitry Salychev \ 104*58983e4bSDmitry Salychev KASSERT((__buf)->paddr == 0, ("%s: paddr set?", __func__)); \ 105*58983e4bSDmitry Salychev KASSERT((__buf)->vaddr == NULL, ("%s: vaddr set?", __func__)); \ 106*58983e4bSDmitry Salychev KASSERT((__buf)->dmat != NULL, ("%s: no DMA tag?", __func__)); \ 107*58983e4bSDmitry Salychev KASSERT((__buf)->dmap != NULL, ("%s: no DMA map?", __func__)); \ 108*58983e4bSDmitry Salychev KASSERT((__buf)->seg.ds_addr == 0, ("%s: already mapped?", __func__)); \ 109*58983e4bSDmitry Salychev KASSERT((__buf)->seg.ds_len == 0, ("%s: already mapped?", __func__)); \ 110*58983e4bSDmitry Salychev KASSERT((__buf)->nseg == 0, ("%s: nseg > 0?", __func__)); \ 111*58983e4bSDmitry Salychev KASSERT((__buf)->m == NULL, ("%s: mbuf set?", __func__)); \ 112*58983e4bSDmitry Salychev KASSERT((__buf)->opt != NULL, ("%s: no Tx ring?", __func__)); \ 113*58983e4bSDmitry Salychev \ 114*58983e4bSDmitry Salychev KASSERT((__sgt)->paddr == 0, ("%s: S/G paddr set?", __func__)); \ 115*58983e4bSDmitry Salychev KASSERT((__sgt)->vaddr != NULL, ("%s: no S/G vaddr?", __func__)); \ 116*58983e4bSDmitry Salychev KASSERT((__sgt)->dmat != NULL, ("%s: no S/G DMA tag?", __func__)); \ 117*58983e4bSDmitry Salychev KASSERT((__sgt)->dmap != NULL, ("%s: no S/G DMA map?", __func__)); \ 118*58983e4bSDmitry Salychev KASSERT((__sgt)->seg.ds_addr == 0, ("%s: S/G mapped?", __func__)); \ 119*58983e4bSDmitry Salychev KASSERT((__sgt)->seg.ds_len == 0, ("%s: S/G mapped?", __func__)); \ 120*58983e4bSDmitry Salychev KASSERT((__sgt)->nseg == 0, ("%s: S/G nseg > 0?", __func__)); \ 121*58983e4bSDmitry Salychev KASSERT((__sgt)->m == NULL, ("%s: S/G mbuf set?", __func__)); \ 122*58983e4bSDmitry Salychev KASSERT((__sgt)->opt == (__buf),("%s: buf not linked?", __func__)); \ 123*58983e4bSDmitry Salychev } while(0) 124*58983e4bSDmitry Salychev #else /* !INVARIANTS */ 125*58983e4bSDmitry Salychev #define DPAA2_BUF_ASSERT_TXPREP(__buf) do { \ 126*58983e4bSDmitry Salychev } while(0) 127*58983e4bSDmitry Salychev #define DPAA2_BUF_ASSERT_TXREADY(__buf) do { \ 128*58983e4bSDmitry Salychev } while(0) 129*58983e4bSDmitry Salychev #endif /* INVARIANTS */ 130*58983e4bSDmitry Salychev 131*58983e4bSDmitry Salychev #if defined(INVARIANTS) 132*58983e4bSDmitry Salychev /* 133*58983e4bSDmitry Salychev * RXPREP/RXREADY macros allow to verify whether Rx buffer is prepared to be 134*58983e4bSDmitry Salychev * seeded and/or ready to be used for reception. 135*58983e4bSDmitry Salychev * 136*58983e4bSDmitry Salychev * NOTE: Any modification should be carefully analyzed and justified. 137*58983e4bSDmitry Salychev */ 138*58983e4bSDmitry Salychev #define DPAA2_BUF_ASSERT_RXPREP(__buf) do { \ 139*58983e4bSDmitry Salychev KASSERT((__buf)->paddr == 0, ("%s: paddr set?", __func__)); \ 140*58983e4bSDmitry Salychev KASSERT((__buf)->vaddr == NULL, ("%s: vaddr set?", __func__)); \ 141*58983e4bSDmitry Salychev KASSERT((__buf)->dmat != NULL, ("%s: no DMA tag?", __func__)); \ 142*58983e4bSDmitry Salychev /* KASSERT((__buf)->dmap == NULL, ("%s: DMA map set?", __func__)); */ \ 143*58983e4bSDmitry Salychev KASSERT((__buf)->seg.ds_addr == 0, ("%s: already mapped?", __func__)); \ 144*58983e4bSDmitry Salychev KASSERT((__buf)->seg.ds_len == 0, ("%s: already mapped?", __func__)); \ 145*58983e4bSDmitry Salychev KASSERT((__buf)->nseg == 0, ("%s: nseg > 0?", __func__)); \ 146*58983e4bSDmitry Salychev KASSERT((__buf)->m == NULL, ("%s: mbuf set?", __func__)); \ 147*58983e4bSDmitry Salychev KASSERT((__buf)->sgt == NULL, ("%s: S/G table set?", __func__)); \ 148*58983e4bSDmitry Salychev KASSERT((__buf)->opt != NULL, ("%s: no channel?", __func__)); \ 149*58983e4bSDmitry Salychev } while(0) 150*58983e4bSDmitry Salychev #define DPAA2_BUF_ASSERT_RXREADY(__buf) do { \ 151*58983e4bSDmitry Salychev KASSERT((__buf)->paddr != 0, ("%s: paddr not set?", __func__)); \ 152*58983e4bSDmitry Salychev KASSERT((__buf)->vaddr != NULL, ("%s: vaddr not set?", __func__)); \ 153*58983e4bSDmitry Salychev KASSERT((__buf)->dmat != NULL, ("%s: no DMA tag?", __func__)); \ 154*58983e4bSDmitry Salychev KASSERT((__buf)->dmap != NULL, ("%s: no DMA map?", __func__)); \ 155*58983e4bSDmitry Salychev KASSERT((__buf)->seg.ds_addr != 0, ("%s: not mapped?", __func__)); \ 156*58983e4bSDmitry Salychev KASSERT((__buf)->seg.ds_len != 0, ("%s: not mapped?", __func__)); \ 157*58983e4bSDmitry Salychev KASSERT((__buf)->nseg == 1, ("%s: nseg != 1?", __func__)); \ 158*58983e4bSDmitry Salychev KASSERT((__buf)->m != NULL, ("%s: no mbuf?", __func__)); \ 159*58983e4bSDmitry Salychev KASSERT((__buf)->sgt == NULL, ("%s: S/G table set?", __func__)); \ 160*58983e4bSDmitry Salychev KASSERT((__buf)->opt != NULL, ("%s: no channel?", __func__)); \ 161*58983e4bSDmitry Salychev } while(0) 162*58983e4bSDmitry Salychev #else /* !INVARIANTS */ 163*58983e4bSDmitry Salychev #define DPAA2_BUF_ASSERT_RXPREP(__buf) do { \ 164*58983e4bSDmitry Salychev } while(0) 165*58983e4bSDmitry Salychev #define DPAA2_BUF_ASSERT_RXREADY(__buf) do { \ 166*58983e4bSDmitry Salychev } while(0) 167*58983e4bSDmitry Salychev #endif /* INVARIANTS */ 168*58983e4bSDmitry Salychev 169*58983e4bSDmitry Salychev int dpaa2_buf_seed_pool(device_t, device_t, void *, uint32_t, int, struct mtx *); 170*58983e4bSDmitry Salychev int dpaa2_buf_seed_rxb(device_t, struct dpaa2_buf *, int, struct mtx *); 171*58983e4bSDmitry Salychev int dpaa2_buf_seed_txb(device_t, struct dpaa2_buf *); 172*58983e4bSDmitry Salychev 173*58983e4bSDmitry Salychev #endif /* _DPAA2_BUF_H */ 174