1 /*- 2 * Copyright (c) 2012 Semihalf. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include "opt_platform.h" 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/bus.h> 35 #include <sys/lock.h> 36 #include <sys/module.h> 37 #include <sys/mutex.h> 38 #include <sys/proc.h> 39 #include <sys/pcpu.h> 40 #include <sys/sched.h> 41 42 #include <machine/bus.h> 43 #include <machine/tlb.h> 44 45 #include <dev/ofw/ofw_bus.h> 46 #include <dev/ofw/ofw_bus_subr.h> 47 48 #include <powerpc/mpc85xx/mpc85xx.h> 49 50 #include "qman.h" 51 #include "portals.h" 52 53 extern e_RxStoreResponse qman_received_frame_callback(t_Handle, t_Handle, 54 t_Handle, uint32_t, t_DpaaFD *); 55 extern e_RxStoreResponse qman_rejected_frame_callback(t_Handle, t_Handle, 56 t_Handle, uint32_t, t_DpaaFD *, t_QmRejectedFrameInfo *); 57 58 t_Handle qman_portal_setup(struct qman_softc *); 59 60 struct dpaa_portals_softc *qp_sc; 61 62 int 63 qman_portals_attach(device_t dev) 64 { 65 struct dpaa_portals_softc *sc; 66 67 sc = qp_sc = device_get_softc(dev); 68 69 /* Map bman portal to physical address space */ 70 if (law_enable(OCP85XX_TGTIF_QMAN, sc->sc_dp_pa, sc->sc_dp_size)) { 71 qman_portals_detach(dev); 72 return (ENXIO); 73 } 74 /* Set portal properties for XX_VirtToPhys() */ 75 XX_PortalSetInfo(dev); 76 77 return (bus_generic_attach(dev)); 78 } 79 80 int 81 qman_portals_detach(device_t dev) 82 { 83 struct dpaa_portals_softc *sc; 84 int i; 85 86 qp_sc = NULL; 87 sc = device_get_softc(dev); 88 89 for (i = 0; i < ARRAY_SIZE(sc->sc_dp); i++) { 90 if (sc->sc_dp[i].dp_ph != NULL) { 91 thread_lock(curthread); 92 sched_bind(curthread, i); 93 thread_unlock(curthread); 94 95 QM_PORTAL_Free(sc->sc_dp[i].dp_ph); 96 97 thread_lock(curthread); 98 sched_unbind(curthread); 99 thread_unlock(curthread); 100 } 101 102 if (sc->sc_dp[i].dp_ires != NULL) { 103 XX_DeallocIntr((uintptr_t)sc->sc_dp[i].dp_ires); 104 bus_release_resource(dev, SYS_RES_IRQ, 105 sc->sc_dp[i].dp_irid, sc->sc_dp[i].dp_ires); 106 } 107 } 108 for (i = 0; i < ARRAY_SIZE(sc->sc_rres); i++) { 109 if (sc->sc_rres[i] != NULL) 110 bus_release_resource(dev, SYS_RES_MEMORY, 111 sc->sc_rrid[i], 112 sc->sc_rres[i]); 113 } 114 115 return (0); 116 } 117 118 t_Handle 119 qman_portal_setup(struct qman_softc *qsc) 120 { 121 struct dpaa_portals_softc *sc; 122 t_QmPortalParam qpp; 123 unsigned int cpu; 124 uintptr_t p; 125 t_Handle portal; 126 127 /* Return NULL if we're not ready or while detach */ 128 if (qp_sc == NULL) 129 return (NULL); 130 131 sc = qp_sc; 132 133 sched_pin(); 134 portal = NULL; 135 cpu = PCPU_GET(cpuid); 136 137 /* Check if portal is ready */ 138 while (atomic_cmpset_acq_ptr((uintptr_t *)&sc->sc_dp[cpu].dp_ph, 139 0, -1) == 0) { 140 p = atomic_load_acq_ptr((uintptr_t *)&sc->sc_dp[cpu].dp_ph); 141 142 /* Return if portal is already initialized */ 143 if (p != 0 && p != -1) { 144 sched_unpin(); 145 return ((t_Handle)p); 146 } 147 148 /* Not inititialized and "owned" by another thread */ 149 thread_lock(curthread); 150 mi_switch(SW_VOL, NULL); 151 thread_unlock(curthread); 152 } 153 154 /* Map portal registers */ 155 dpaa_portal_map_registers(sc); 156 157 /* Configure and initialize portal */ 158 qpp.ceBaseAddress = rman_get_bushandle(sc->sc_rres[0]); 159 qpp.ciBaseAddress = rman_get_bushandle(sc->sc_rres[1]); 160 qpp.h_Qm = qsc->sc_qh; 161 qpp.swPortalId = cpu; 162 qpp.irq = (uintptr_t)sc->sc_dp[cpu].dp_ires; 163 qpp.fdLiodnOffset = 0; 164 qpp.f_DfltFrame = qman_received_frame_callback; 165 qpp.f_RejectedFrame = qman_rejected_frame_callback; 166 qpp.h_App = qsc; 167 168 portal = QM_PORTAL_Config(&qpp); 169 if (portal == NULL) 170 goto err; 171 172 if (QM_PORTAL_Init(portal) != E_OK) 173 goto err; 174 175 if (QM_PORTAL_AddPoolChannel(portal, QMAN_COMMON_POOL_CHANNEL) != E_OK) 176 goto err; 177 178 atomic_store_rel_ptr((uintptr_t *)&sc->sc_dp[cpu].dp_ph, 179 (uintptr_t)portal); 180 sched_unpin(); 181 182 return (portal); 183 184 err: 185 if (portal != NULL) 186 QM_PORTAL_Free(portal); 187 188 atomic_store_rel_32((uint32_t *)&sc->sc_dp[cpu].dp_ph, 0); 189 sched_unpin(); 190 191 return (NULL); 192 } 193