1 /*- 2 * Copyright (c) 2012 Semihalf. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include "opt_platform.h" 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/bus.h> 35 #include <sys/proc.h> 36 #include <sys/pcpu.h> 37 #include <sys/rman.h> 38 #include <sys/sched.h> 39 40 #include <vm/vm.h> 41 #include <vm/pmap.h> 42 43 #include <machine/resource.h> 44 #include <machine/tlb.h> 45 46 #include <contrib/ncsw/inc/error_ext.h> 47 #include <contrib/ncsw/inc/xx_ext.h> 48 49 #include "portals.h" 50 51 52 int 53 dpaa_portal_alloc_res(device_t dev, struct dpaa_portals_devinfo *di, int cpu) 54 { 55 struct dpaa_portals_softc *sc = device_get_softc(dev); 56 struct resource_list_entry *rle; 57 int err; 58 struct resource_list *res; 59 60 /* Check if MallocSmart allocator is ready */ 61 if (XX_MallocSmartInit() != E_OK) 62 return (ENXIO); 63 64 res = &di->di_res; 65 66 /* 67 * Allocate memory. 68 * Reserve only one pair of CE/CI virtual memory regions 69 * for all CPUs, in order to save the space. 70 */ 71 if (sc->sc_rres[0] == NULL) { 72 /* Cache enabled area */ 73 rle = resource_list_find(res, SYS_RES_MEMORY, 0); 74 sc->sc_rrid[0] = 0; 75 sc->sc_rres[0] = bus_alloc_resource(dev, 76 SYS_RES_MEMORY, &sc->sc_rrid[0], rle->start + sc->sc_dp_pa, 77 rle->end + sc->sc_dp_pa, rle->count, RF_ACTIVE); 78 if (sc->sc_rres[0] == NULL) { 79 device_printf(dev, "Could not allocate memory.\n"); 80 return (ENXIO); 81 } 82 /* Cache inhibited area */ 83 rle = resource_list_find(res, SYS_RES_MEMORY, 1); 84 sc->sc_rrid[1] = 1; 85 sc->sc_rres[1] = bus_alloc_resource(dev, 86 SYS_RES_MEMORY, &sc->sc_rrid[1], rle->start + sc->sc_dp_pa, 87 rle->end + sc->sc_dp_pa, rle->count, RF_ACTIVE); 88 if (sc->sc_rres[1] == NULL) { 89 device_printf(dev, "Could not allocate memory.\n"); 90 bus_release_resource(dev, SYS_RES_MEMORY, 91 sc->sc_rrid[0], sc->sc_rres[0]); 92 return (ENXIO); 93 } 94 } 95 /* Acquire portal's CE_PA and CI_PA */ 96 rle = resource_list_find(res, SYS_RES_MEMORY, 0); 97 sc->sc_dp[cpu].dp_ce_pa = rle->start + sc->sc_dp_pa; 98 sc->sc_dp[cpu].dp_ce_size = rle->count; 99 rle = resource_list_find(res, SYS_RES_MEMORY, 1); 100 sc->sc_dp[cpu].dp_ci_pa = rle->start + sc->sc_dp_pa; 101 sc->sc_dp[cpu].dp_ci_size = rle->count; 102 103 /* Allocate interrupts */ 104 rle = resource_list_find(res, SYS_RES_IRQ, 0); 105 sc->sc_dp[cpu].dp_irid = 0; 106 sc->sc_dp[cpu].dp_ires = bus_alloc_resource(dev, 107 SYS_RES_IRQ, &sc->sc_dp[cpu].dp_irid, rle->start, rle->end, 108 rle->count, RF_ACTIVE); 109 /* Save interrupt number for later use */ 110 sc->sc_dp[cpu].dp_intr_num = rle->start; 111 112 if (sc->sc_dp[cpu].dp_ires == NULL) { 113 device_printf(dev, "Could not allocate irq.\n"); 114 return (ENXIO); 115 } 116 117 err = XX_PreallocAndBindIntr((int)sc->sc_dp[cpu].dp_ires, cpu); 118 119 if (err != E_OK) { 120 device_printf(dev, "Could not prealloc and bind interrupt\n"); 121 bus_release_resource(dev, SYS_RES_IRQ, 122 sc->sc_dp[cpu].dp_irid, sc->sc_dp[cpu].dp_ires); 123 sc->sc_dp[cpu].dp_ires = NULL; 124 return (ENXIO); 125 } 126 127 #if 0 128 err = bus_generic_config_intr(dev, rle->start, di->di_intr_trig, 129 di->di_intr_pol); 130 if (err != 0) { 131 device_printf(dev, "Could not configure interrupt\n"); 132 bus_release_resource(dev, SYS_RES_IRQ, 133 sc->sc_dp[cpu].dp_irid, sc->sc_dp[cpu].dp_ires); 134 sc->sc_dp[cpu].dp_ires = NULL; 135 return (err); 136 } 137 #endif 138 139 return (0); 140 } 141 142 void 143 dpaa_portal_map_registers(struct dpaa_portals_softc *sc) 144 { 145 unsigned int cpu; 146 147 sched_pin(); 148 cpu = PCPU_GET(cpuid); 149 if (sc->sc_dp[cpu].dp_regs_mapped) 150 goto out; 151 152 tlb1_set_entry(rman_get_bushandle(sc->sc_rres[0]), 153 sc->sc_dp[cpu].dp_ce_pa, sc->sc_dp[cpu].dp_ce_size, 154 _TLB_ENTRY_MEM); 155 tlb1_set_entry(rman_get_bushandle(sc->sc_rres[1]), 156 sc->sc_dp[cpu].dp_ci_pa, sc->sc_dp[cpu].dp_ci_size, 157 _TLB_ENTRY_IO); 158 159 sc->sc_dp[cpu].dp_regs_mapped = 1; 160 161 out: 162 sched_unpin(); 163 } 164