1 /*- 2 * Copyright (c) 2011-2012 Semihalf. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #ifndef IF_DTSEC_H_ 30 #define IF_DTSEC_H_ 31 32 /** 33 * @group dTSEC common API. 34 * @{ 35 */ 36 #define DTSEC_MODE_REGULAR 0 37 #define DTSEC_MODE_INDEPENDENT 1 38 39 #define DTSEC_LOCK(sc) mtx_lock(&(sc)->sc_lock) 40 #define DTSEC_UNLOCK(sc) mtx_unlock(&(sc)->sc_lock) 41 #define DTSEC_LOCK_ASSERT(sc) mtx_assert(&(sc)->sc_lock, MA_OWNED) 42 #define DTSEC_MII_LOCK(sc) mtx_lock(&(sc)->sc_mii_lock) 43 #define DTSEC_MII_UNLOCK(sc) mtx_unlock(&(sc)->sc_mii_lock) 44 45 enum eth_dev_type { 46 ETH_DTSEC = 0x1, 47 ETH_10GSEC = 0x2 48 }; 49 50 struct dtsec_softc { 51 /* XXX MII bus requires that struct ifnet is first!!! */ 52 struct ifnet *sc_ifnet; 53 54 device_t sc_dev; 55 struct mtx sc_lock; 56 int sc_mode; 57 58 /* Methods */ 59 int (*sc_port_rx_init) 60 (struct dtsec_softc *sc, int unit); 61 int (*sc_port_tx_init) 62 (struct dtsec_softc *sc, int unit); 63 void (*sc_start_locked) 64 (struct dtsec_softc *sc); 65 66 /* dTSEC data */ 67 enum eth_dev_type sc_eth_dev_type; 68 uint8_t sc_eth_id; 69 uintptr_t sc_mac_mem_offset; 70 e_EnetMode sc_mac_enet_mode; 71 int sc_mac_mdio_irq; 72 uint8_t sc_mac_addr[6]; 73 int sc_port_rx_hw_id; 74 int sc_port_tx_hw_id; 75 uint32_t sc_port_tx_qman_chan; 76 int sc_phy_addr; 77 bool sc_hidden; 78 79 /* Params from fman_bus driver */ 80 vm_offset_t sc_fm_base; 81 t_Handle sc_fmh; 82 t_Handle sc_muramh; 83 84 t_Handle sc_mach; 85 t_Handle sc_rxph; 86 t_Handle sc_txph; 87 88 /* MII data */ 89 struct mii_data *sc_mii; 90 device_t sc_mii_dev; 91 struct mtx sc_mii_lock; 92 93 struct callout sc_tick_callout; 94 95 /* RX Pool */ 96 t_Handle sc_rx_pool; 97 uint8_t sc_rx_bpid; 98 uma_zone_t sc_rx_zone; 99 char sc_rx_zname[64]; 100 101 /* RX Frame Queue */ 102 t_Handle sc_rx_fqr; 103 uint32_t sc_rx_fqid; 104 105 /* TX Frame Queue */ 106 t_Handle sc_tx_fqr; 107 bool sc_tx_fqr_full; 108 t_Handle sc_tx_conf_fqr; 109 uint32_t sc_tx_conf_fqid; 110 111 /* Frame Info Zone */ 112 uma_zone_t sc_fi_zone; 113 char sc_fi_zname[64]; 114 }; 115 /** @} */ 116 117 118 /** 119 * @group dTSEC FMan PORT API. 120 * @{ 121 */ 122 enum dtsec_fm_port_params { 123 FM_PORT_LIODN_BASE = 0, 124 FM_PORT_LIODN_OFFSET = 0, 125 FM_PORT_MEM_ID = 0, 126 FM_PORT_MEM_ATTR = MEMORY_ATTR_CACHEABLE, 127 FM_PORT_BUFFER_SIZE = MCLBYTES, 128 }; 129 130 e_FmPortType dtsec_fm_port_rx_type(enum eth_dev_type type); 131 void dtsec_fm_port_rx_exception_callback(t_Handle app, 132 e_FmPortExceptions exception); 133 void dtsec_fm_port_tx_exception_callback(t_Handle app, 134 e_FmPortExceptions exception); 135 e_FmPortType dtsec_fm_port_tx_type(enum eth_dev_type type); 136 /** @} */ 137 138 139 /** 140 * @group dTSEC bus interface. 141 * @{ 142 */ 143 int dtsec_attach(device_t dev); 144 int dtsec_detach(device_t dev); 145 int dtsec_suspend(device_t dev); 146 int dtsec_resume(device_t dev); 147 int dtsec_shutdown(device_t dev); 148 int dtsec_miibus_readreg(device_t dev, int phy, int reg); 149 int dtsec_miibus_writereg(device_t dev, int phy, int reg, 150 int value); 151 void dtsec_miibus_statchg(device_t dev); 152 /** @} */ 153 154 #endif /* IF_DTSEC_H_ */ 155