1 /*- 2 * Copyright (c) 2016 Justin Hibbits 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/param.h> 28 #include <sys/systm.h> 29 #include <sys/kernel.h> 30 #include <sys/bus.h> 31 #include <sys/module.h> 32 #include <sys/mutex.h> 33 #include <sys/resource.h> 34 #include <sys/socket.h> 35 36 #include <machine/bus.h> 37 38 #include <net/if.h> 39 #include <net/if_media.h> 40 #include <net/if_types.h> 41 #include <net/if_var.h> 42 43 #include <dev/mii/mii.h> 44 #include <dev/mii/miivar.h> 45 46 #include <dev/ofw/ofw_bus.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 49 #include "fman.h" 50 #include "miibus_if.h" 51 52 #define MDIO_LOCK() mtx_lock(&sc->sc_lock) 53 #define MDIO_UNLOCK() mtx_unlock(&sc->sc_lock) 54 #define MDIO_WRITE4(sc, r, v) \ 55 bus_write_4(sc->sc_res, r, v) 56 #define MDIO_READ4(sc, r) \ 57 bus_read_4(sc->sc_res, r) 58 59 #define MDIO_MIIMCFG 0x0 60 #define MDIO_MIIMCOM 0x4 61 #define MIIMCOM_SCAN_CYCLE 0x00000002 62 #define MIIMCOM_READ_CYCLE 0x00000001 63 #define MDIO_MIIMADD 0x8 64 #define MDIO_MIIMCON 0xc 65 #define MDIO_MIIMSTAT 0x10 66 #define MDIO_MIIMIND 0x14 67 #define MIIMIND_BUSY 0x1 68 69 static int pqmdio_fdt_probe(device_t dev); 70 static int pqmdio_fdt_attach(device_t dev); 71 static int pqmdio_detach(device_t dev); 72 static int pqmdio_miibus_readreg(device_t dev, int phy, int reg); 73 static int pqmdio_miibus_writereg(device_t dev, int phy, int reg, int value); 74 75 struct pqmdio_softc { 76 struct mtx sc_lock; 77 struct resource *sc_res; 78 }; 79 80 static device_method_t pqmdio_methods[] = { 81 /* Device interface */ 82 DEVMETHOD(device_probe, pqmdio_fdt_probe), 83 DEVMETHOD(device_attach, pqmdio_fdt_attach), 84 DEVMETHOD(device_detach, pqmdio_detach), 85 86 /* MII interface */ 87 DEVMETHOD(miibus_readreg, pqmdio_miibus_readreg), 88 DEVMETHOD(miibus_writereg, pqmdio_miibus_writereg), 89 90 DEVMETHOD_END 91 }; 92 93 static struct ofw_compat_data mdio_compat_data[] = { 94 {"fsl,fman-mdio", 0}, 95 {NULL, 0} 96 }; 97 98 static driver_t pqmdio_driver = { 99 "pq_mdio", 100 pqmdio_methods, 101 sizeof(struct pqmdio_softc), 102 }; 103 104 static int 105 pqmdio_fdt_probe(device_t dev) 106 { 107 108 if (!ofw_bus_status_okay(dev)) 109 return (ENXIO); 110 111 if (!ofw_bus_search_compatible(dev, mdio_compat_data)->ocd_str) 112 return (ENXIO); 113 114 device_set_desc(dev, "Freescale QorIQ MDIO"); 115 116 return (BUS_PROBE_DEFAULT); 117 } 118 119 static int 120 pqmdio_fdt_attach(device_t dev) 121 { 122 struct pqmdio_softc *sc; 123 124 sc = device_get_softc(dev); 125 126 sc->sc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 0, RF_ACTIVE); 127 128 OF_device_register_xref(OF_xref_from_node(ofw_bus_get_node(dev)), dev); 129 130 mtx_init(&sc->sc_lock, device_get_nameunit(dev), "QorIQ MDIO lock", 131 MTX_DEF); 132 133 return (0); 134 } 135 136 static int 137 pqmdio_detach(device_t dev) 138 { 139 struct pqmdio_softc *sc; 140 141 sc = device_get_softc(dev); 142 143 mtx_destroy(&sc->sc_lock); 144 145 return (0); 146 } 147 148 int 149 pqmdio_miibus_readreg(device_t dev, int phy, int reg) 150 { 151 struct pqmdio_softc *sc; 152 int rv; 153 154 sc = device_get_softc(dev); 155 156 MDIO_LOCK(); 157 158 MDIO_WRITE4(sc, MDIO_MIIMADD, (phy << 8) | reg); 159 MDIO_WRITE4(sc, MDIO_MIIMCOM, MIIMCOM_READ_CYCLE); 160 161 MDIO_READ4(sc, MDIO_MIIMCOM); 162 163 while ((MDIO_READ4(sc, MDIO_MIIMIND)) & MIIMIND_BUSY) 164 ; 165 166 rv = MDIO_READ4(sc, MDIO_MIIMSTAT); 167 168 MDIO_WRITE4(sc, MDIO_MIIMCOM, 0); 169 MDIO_READ4(sc, MDIO_MIIMCOM); 170 MDIO_UNLOCK(); 171 172 return (rv); 173 } 174 175 int 176 pqmdio_miibus_writereg(device_t dev, int phy, int reg, int value) 177 { 178 struct pqmdio_softc *sc; 179 180 sc = device_get_softc(dev); 181 182 MDIO_LOCK(); 183 /* Stop the MII management read cycle */ 184 MDIO_WRITE4(sc, MDIO_MIIMCOM, 0); 185 MDIO_READ4(sc, MDIO_MIIMCOM); 186 187 MDIO_WRITE4(sc, MDIO_MIIMADD, (phy << 8) | reg); 188 189 MDIO_WRITE4(sc, MDIO_MIIMCON, value); 190 MDIO_READ4(sc, MDIO_MIIMCON); 191 192 /* Wait till MII management write is complete */ 193 while ((MDIO_READ4(sc, MDIO_MIIMIND)) & MIIMIND_BUSY) 194 ; 195 MDIO_UNLOCK(); 196 197 return (0); 198 } 199 200 EARLY_DRIVER_MODULE(pqmdio, fman, pqmdio_driver, 0, 0, 201 BUS_PASS_SUPPORTDEV); 202 DRIVER_MODULE(miibus, pqmdio, miibus_driver, 0, 0); 203 MODULE_DEPEND(pqmdio, miibus, 1, 1, 1); 204 205