1 /*- 2 * Copyright (c) 2016 Justin Hibbits 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/kernel.h> 31 #include <sys/bus.h> 32 #include <sys/module.h> 33 #include <sys/mutex.h> 34 #include <sys/resource.h> 35 #include <sys/socket.h> 36 37 #include <machine/bus.h> 38 39 #include <net/if.h> 40 #include <net/if_media.h> 41 #include <net/if_types.h> 42 #include <net/if_var.h> 43 44 #include <dev/mii/mii.h> 45 #include <dev/mii/miivar.h> 46 47 #include <dev/ofw/ofw_bus.h> 48 #include <dev/ofw/ofw_bus_subr.h> 49 50 #include <contrib/ncsw/inc/Peripherals/fm_ext.h> 51 52 #include "fman.h" 53 #include "miibus_if.h" 54 55 #define MDIO_LOCK() mtx_lock(&sc->sc_lock) 56 #define MDIO_UNLOCK() mtx_unlock(&sc->sc_lock) 57 #define MDIO_WRITE4(sc,r,v) \ 58 bus_space_write_4(&bs_be_tag, sc->sc_handle, sc->sc_offset + r, v) 59 #define MDIO_READ4(sc, r) \ 60 bus_space_read_4(&bs_be_tag, sc->sc_handle, sc->sc_offset + r) 61 62 #define MDIO_MIIMCFG 0x0 63 #define MDIO_MIIMCOM 0x4 64 #define MIIMCOM_SCAN_CYCLE 0x00000002 65 #define MIIMCOM_READ_CYCLE 0x00000001 66 #define MDIO_MIIMADD 0x8 67 #define MDIO_MIIMCON 0xc 68 #define MDIO_MIIMSTAT 0x10 69 #define MDIO_MIIMIND 0x14 70 #define MIIMIND_BUSY 0x1 71 72 static int pqmdio_fdt_probe(device_t dev); 73 static int pqmdio_fdt_attach(device_t dev); 74 static int pqmdio_detach(device_t dev); 75 static int pqmdio_miibus_readreg(device_t dev, int phy, int reg); 76 static int pqmdio_miibus_writereg(device_t dev, int phy, int reg, int value); 77 78 struct pqmdio_softc { 79 struct mtx sc_lock; 80 bus_space_handle_t sc_handle; 81 int sc_offset; 82 }; 83 84 static device_method_t pqmdio_methods[] = { 85 /* Device interface */ 86 DEVMETHOD(device_probe, pqmdio_fdt_probe), 87 DEVMETHOD(device_attach, pqmdio_fdt_attach), 88 DEVMETHOD(device_detach, pqmdio_detach), 89 90 /* MII interface */ 91 DEVMETHOD(miibus_readreg, pqmdio_miibus_readreg), 92 DEVMETHOD(miibus_writereg, pqmdio_miibus_writereg), 93 94 { 0, 0 } 95 }; 96 97 static struct ofw_compat_data mdio_compat_data[] = { 98 {"fsl,fman-mdio", 0}, 99 {NULL, 0} 100 }; 101 102 static driver_t pqmdio_driver = { 103 "pq_mdio", 104 pqmdio_methods, 105 sizeof(struct pqmdio_softc), 106 }; 107 108 static int 109 pqmdio_fdt_probe(device_t dev) 110 { 111 112 if (!ofw_bus_status_okay(dev)) 113 return (ENXIO); 114 115 if (!ofw_bus_search_compatible(dev, mdio_compat_data)->ocd_str) 116 return (ENXIO); 117 118 device_set_desc(dev, "Freescale QorIQ MDIO"); 119 120 return (BUS_PROBE_DEFAULT); 121 } 122 123 static int 124 pqmdio_fdt_attach(device_t dev) 125 { 126 struct pqmdio_softc *sc; 127 rman_res_t start, count; 128 129 sc = device_get_softc(dev); 130 131 fman_get_bushandle(device_get_parent(dev), &sc->sc_handle); 132 bus_get_resource(dev, SYS_RES_MEMORY, 0, &start, &count); 133 sc->sc_offset = start; 134 135 OF_device_register_xref(OF_xref_from_node(ofw_bus_get_node(dev)), dev); 136 137 mtx_init(&sc->sc_lock, device_get_nameunit(dev), "QorIQ MDIO lock", 138 MTX_DEF); 139 140 return (0); 141 } 142 143 static int 144 pqmdio_detach(device_t dev) 145 { 146 struct pqmdio_softc *sc; 147 148 sc = device_get_softc(dev); 149 150 mtx_destroy(&sc->sc_lock); 151 152 return (0); 153 } 154 155 int 156 pqmdio_miibus_readreg(device_t dev, int phy, int reg) 157 { 158 struct pqmdio_softc *sc; 159 int rv; 160 161 sc = device_get_softc(dev); 162 163 MDIO_LOCK(); 164 165 MDIO_WRITE4(sc, MDIO_MIIMADD, (phy << 8) | reg); 166 MDIO_WRITE4(sc, MDIO_MIIMCOM, MIIMCOM_READ_CYCLE); 167 168 MDIO_READ4(sc, MDIO_MIIMCOM); 169 170 while ((MDIO_READ4(sc, MDIO_MIIMIND)) & MIIMIND_BUSY) 171 ; 172 173 rv = MDIO_READ4(sc, MDIO_MIIMSTAT); 174 175 MDIO_WRITE4(sc, MDIO_MIIMCOM, 0); 176 MDIO_READ4(sc, MDIO_MIIMCOM); 177 MDIO_UNLOCK(); 178 179 return (rv); 180 } 181 182 int 183 pqmdio_miibus_writereg(device_t dev, int phy, int reg, int value) 184 { 185 struct pqmdio_softc *sc; 186 187 sc = device_get_softc(dev); 188 189 MDIO_LOCK(); 190 /* Stop the MII management read cycle */ 191 MDIO_WRITE4(sc, MDIO_MIIMCOM, 0); 192 MDIO_READ4(sc, MDIO_MIIMCOM); 193 194 MDIO_WRITE4(sc, MDIO_MIIMADD, (phy << 8) | reg); 195 196 MDIO_WRITE4(sc, MDIO_MIIMCON, value); 197 MDIO_READ4(sc, MDIO_MIIMCON); 198 199 /* Wait till MII management write is complete */ 200 while ((MDIO_READ4(sc, MDIO_MIIMIND)) & MIIMIND_BUSY) 201 ; 202 MDIO_UNLOCK(); 203 204 return (0); 205 } 206 207 EARLY_DRIVER_MODULE(pqmdio, fman, pqmdio_driver, 0, 0, 208 BUS_PASS_SUPPORTDEV); 209 DRIVER_MODULE(miibus, pqmdio, miibus_driver, 0, 0); 210 MODULE_DEPEND(pqmdio, miibus, 1, 1, 1); 211 212