1 /* 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * $FreeBSD$ 33 */ 34 35 /* 36 * Pseudo-driver for internal NWAY support on DEC 21143 and workalike 37 * controllers. Technically we're abusing the miibus code to handle 38 * media selection and NWAY support here since there is no MII 39 * interface. However the logical operations are roughly the same, 40 * and the alternative is to create a fake MII interface in the driver, 41 * which is harder to do. 42 */ 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/socket.h> 48 #include <sys/errno.h> 49 #include <sys/lock.h> 50 #include <sys/module.h> 51 #include <sys/mutex.h> 52 #include <sys/bus.h> 53 54 #include <net/if.h> 55 #include <net/if_arp.h> 56 #include <net/if_media.h> 57 58 #include <dev/mii/mii.h> 59 #include <dev/mii/miivar.h> 60 #include <dev/mii/miidevs.h> 61 62 #include <machine/bus_pio.h> 63 #include <machine/bus_memio.h> 64 #include <machine/bus.h> 65 #include <machine/resource.h> 66 #include <sys/bus.h> 67 68 #include <pci/pcivar.h> 69 70 #include <pci/if_dcreg.h> 71 72 #include "miibus_if.h" 73 74 #if !defined(lint) 75 static const char rcsid[] = 76 "$FreeBSD$"; 77 #endif 78 79 #define DC_SETBIT(sc, reg, x) \ 80 CSR_WRITE_4(sc, reg, \ 81 CSR_READ_4(sc, reg) | x) 82 83 #define DC_CLRBIT(sc, reg, x) \ 84 CSR_WRITE_4(sc, reg, \ 85 CSR_READ_4(sc, reg) & ~x) 86 87 #define MIIF_AUTOTIMEOUT 0x0004 88 89 /* 90 * This is the subsystem ID for the built-in 21143 ethernet 91 * in several Compaq Presario systems. Apparently these are 92 * 10Mbps only, so we need to treat them specially. 93 */ 94 #define COMPAQ_PRESARIO_ID 0xb0bb0e11 95 96 static int dcphy_probe (device_t); 97 static int dcphy_attach (device_t); 98 99 static device_method_t dcphy_methods[] = { 100 /* device interface */ 101 DEVMETHOD(device_probe, dcphy_probe), 102 DEVMETHOD(device_attach, dcphy_attach), 103 DEVMETHOD(device_detach, mii_phy_detach), 104 DEVMETHOD(device_shutdown, bus_generic_shutdown), 105 { 0, 0 } 106 }; 107 108 static devclass_t dcphy_devclass; 109 110 static driver_t dcphy_driver = { 111 "dcphy", 112 dcphy_methods, 113 sizeof(struct mii_softc) 114 }; 115 116 DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0); 117 118 static int dcphy_service(struct mii_softc *, struct mii_data *, int); 119 static void dcphy_status(struct mii_softc *); 120 static void dcphy_reset(struct mii_softc *); 121 static int dcphy_auto(struct mii_softc *); 122 123 static int dcphy_probe(dev) 124 device_t dev; 125 { 126 struct mii_attach_args *ma; 127 128 ma = device_get_ivars(dev); 129 130 /* 131 * The dc driver will report the 21143 vendor and device 132 * ID to let us know that it wants us to attach. 133 */ 134 if (ma->mii_id1 != DC_VENDORID_DEC || 135 ma->mii_id2 != DC_DEVICEID_21143) 136 return(ENXIO); 137 138 device_set_desc(dev, "Intel 21143 NWAY media interface"); 139 140 return (0); 141 } 142 143 static int dcphy_attach(dev) 144 device_t dev; 145 { 146 struct mii_softc *sc; 147 struct mii_attach_args *ma; 148 struct mii_data *mii; 149 struct dc_softc *dc_sc; 150 151 sc = device_get_softc(dev); 152 ma = device_get_ivars(dev); 153 sc->mii_dev = device_get_parent(dev); 154 mii = device_get_softc(sc->mii_dev); 155 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 156 157 sc->mii_inst = mii->mii_instance; 158 sc->mii_phy = ma->mii_phyno; 159 sc->mii_service = dcphy_service; 160 sc->mii_pdata = mii; 161 162 sc->mii_flags |= MIIF_NOISOLATE; 163 mii->mii_instance++; 164 165 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 166 167 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 168 BMCR_ISO); 169 170 /*dcphy_reset(sc);*/ 171 dc_sc = mii->mii_ifp->if_softc; 172 CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0); 173 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0); 174 175 switch(pci_read_config(device_get_parent(sc->mii_dev), 176 DC_PCI_CSID, 4)) { 177 case COMPAQ_PRESARIO_ID: 178 /* Example of how to only allow 10Mbps modes. */ 179 sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; 180 break; 181 default: 182 if (dc_sc->dc_pmode == DC_PMODE_SIA) { 183 sc->mii_capabilities = 184 BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; 185 } else { 186 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, 187 sc->mii_inst), BMCR_LOOP|BMCR_S100); 188 189 sc->mii_capabilities = 190 BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX| 191 BMSR_10TFDX|BMSR_10THDX; 192 } 193 break; 194 } 195 196 sc->mii_capabilities &= ma->mii_capmask; 197 device_printf(dev, " "); 198 mii_add_media(sc); 199 printf("\n"); 200 #undef ADD 201 202 MIIBUS_MEDIAINIT(sc->mii_dev); 203 return(0); 204 } 205 206 static int 207 dcphy_service(sc, mii, cmd) 208 struct mii_softc *sc; 209 struct mii_data *mii; 210 int cmd; 211 { 212 struct dc_softc *dc_sc; 213 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 214 int reg; 215 u_int32_t mode; 216 217 dc_sc = mii->mii_ifp->if_softc; 218 219 switch (cmd) { 220 case MII_POLLSTAT: 221 /* 222 * If we're not polling our PHY instance, just return. 223 */ 224 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 225 return (0); 226 } 227 break; 228 229 case MII_MEDIACHG: 230 /* 231 * If the media indicates a different PHY instance, 232 * isolate ourselves. 233 */ 234 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 235 return (0); 236 } 237 238 /* 239 * If the interface is not up, don't do anything. 240 */ 241 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 242 break; 243 244 sc->mii_flags = 0; 245 mii->mii_media_active = IFM_NONE; 246 mode = CSR_READ_4(dc_sc, DC_NETCFG); 247 mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL| 248 DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL); 249 250 switch (IFM_SUBTYPE(ife->ifm_media)) { 251 case IFM_AUTO: 252 /*dcphy_reset(sc);*/ 253 (void) dcphy_auto(sc); 254 break; 255 case IFM_100_T4: 256 /* 257 * XXX Not supported as a manual setting right now. 258 */ 259 return (EINVAL); 260 case IFM_100_TX: 261 dcphy_reset(sc); 262 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 263 mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS| 264 DC_NETCFG_SCRAMBLER; 265 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 266 mode |= DC_NETCFG_FULLDUPLEX; 267 else 268 mode &= ~DC_NETCFG_FULLDUPLEX; 269 CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 270 break; 271 case IFM_10_T: 272 DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 273 DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF); 274 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 275 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D); 276 else 277 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F); 278 DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 279 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 280 mode &= ~DC_NETCFG_PORTSEL; 281 mode |= DC_NETCFG_SPEEDSEL; 282 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 283 mode |= DC_NETCFG_FULLDUPLEX; 284 else 285 mode &= ~DC_NETCFG_FULLDUPLEX; 286 CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 287 break; 288 default: 289 return(EINVAL); 290 break; 291 } 292 break; 293 294 case MII_TICK: 295 /* 296 * If we're not currently selected, just return. 297 */ 298 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 299 return (0); 300 301 /* 302 * Is the interface even up? 303 */ 304 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 305 return (0); 306 307 /* 308 * Only used for autonegotiation. 309 */ 310 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 311 break; 312 313 reg = CSR_READ_4(dc_sc, DC_10BTSTAT); 314 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) 315 break; 316 317 /* 318 * Only retry autonegotiation every 5 seconds. 319 * 320 * Otherwise, fall through to calling dcphy_status() 321 * since real Intel 21143 chips don't show valid link 322 * status until autonegotiation is switched off, and 323 * that only happens in dcphy_status(). Without this, 324 * successful autonegotation is never recognised on 325 * these chips. 326 */ 327 if (++sc->mii_ticks != 50) 328 break; 329 330 sc->mii_ticks = 0; 331 dcphy_auto(sc); 332 333 break; 334 } 335 336 /* Update the media status. */ 337 dcphy_status(sc); 338 339 /* Callback if something changed. */ 340 mii_phy_update(sc, cmd); 341 return (0); 342 } 343 344 static void 345 dcphy_status(sc) 346 struct mii_softc *sc; 347 { 348 struct mii_data *mii = sc->mii_pdata; 349 int reg, anlpar, tstat = 0; 350 struct dc_softc *dc_sc; 351 352 dc_sc = mii->mii_ifp->if_softc; 353 354 mii->mii_media_status = IFM_AVALID; 355 mii->mii_media_active = IFM_ETHER; 356 357 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 358 return; 359 360 reg = CSR_READ_4(dc_sc, DC_10BTSTAT); 361 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) 362 mii->mii_media_status |= IFM_ACTIVE; 363 364 if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) { 365 /* Erg, still trying, I guess... */ 366 tstat = CSR_READ_4(dc_sc, DC_10BTSTAT); 367 if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) { 368 if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) && 369 (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE) 370 goto skip; 371 mii->mii_media_active |= IFM_NONE; 372 return; 373 } 374 375 if (tstat & DC_TSTAT_LP_CAN_NWAY) { 376 anlpar = tstat >> 16; 377 if (anlpar & ANLPAR_T4 && 378 sc->mii_capabilities & BMSR_100TXHDX) 379 mii->mii_media_active |= IFM_100_T4; 380 else if (anlpar & ANLPAR_TX_FD && 381 sc->mii_capabilities & BMSR_100TXFDX) 382 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 383 else if (anlpar & ANLPAR_TX && 384 sc->mii_capabilities & BMSR_100TXHDX) 385 mii->mii_media_active |= IFM_100_TX; 386 else if (anlpar & ANLPAR_10_FD) 387 mii->mii_media_active |= IFM_10_T|IFM_FDX; 388 else if (anlpar & ANLPAR_10) 389 mii->mii_media_active |= IFM_10_T; 390 else 391 mii->mii_media_active |= IFM_NONE; 392 if (DC_IS_INTEL(dc_sc)) 393 DC_CLRBIT(dc_sc, DC_10BTCTRL, 394 DC_TCTL_AUTONEGENBL); 395 return; 396 } 397 /* 398 * If the other side doesn't support NWAY, then the 399 * best we can do is determine if we have a 10Mbps or 400 * 100Mbps link. There's no way to know if the link 401 * is full or half duplex, so we default to half duplex 402 * and hope that the user is clever enough to manually 403 * change the media settings if we're wrong. 404 */ 405 if (!(reg & DC_TSTAT_LS100)) 406 mii->mii_media_active |= IFM_100_TX; 407 else if (!(reg & DC_TSTAT_LS10)) 408 mii->mii_media_active |= IFM_10_T; 409 else 410 mii->mii_media_active |= IFM_NONE; 411 if (DC_IS_INTEL(dc_sc)) 412 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 413 return; 414 } 415 416 skip: 417 418 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL) 419 mii->mii_media_active |= IFM_10_T; 420 else 421 mii->mii_media_active |= IFM_100_TX; 422 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX) 423 mii->mii_media_active |= IFM_FDX; 424 425 return; 426 } 427 428 static int 429 dcphy_auto(mii) 430 struct mii_softc *mii; 431 { 432 struct dc_softc *sc; 433 434 sc = mii->mii_pdata->mii_ifp->if_softc; 435 436 DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL); 437 DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX); 438 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); 439 if (mii->mii_capabilities & BMSR_100TXHDX) 440 CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF); 441 else 442 CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF); 443 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); 444 DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 445 DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE); 446 447 return(EJUSTRETURN); 448 } 449 450 static void 451 dcphy_reset(mii) 452 struct mii_softc *mii; 453 { 454 struct dc_softc *sc; 455 456 sc = mii->mii_pdata->mii_ifp->if_softc; 457 458 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); 459 DELAY(1000); 460 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); 461 462 return; 463 } 464 465