1 /* 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * $FreeBSD$ 33 */ 34 35 /* 36 * Pseudo-driver for internal NWAY support on DEC 21143 and workalike 37 * controllers. Technically we're abusing the miibus code to handle 38 * media selection and NWAY support here since there is no MII 39 * interface. However the logical operations are roughly the same, 40 * and the alternative is to create a fake MII interface in the driver, 41 * which is harder to do. 42 */ 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/malloc.h> 48 #include <sys/socket.h> 49 #include <sys/errno.h> 50 #include <sys/module.h> 51 #include <sys/bus.h> 52 53 #include <net/if.h> 54 #include <net/if_arp.h> 55 #include <net/if_media.h> 56 57 #include <dev/mii/mii.h> 58 #include <dev/mii/miivar.h> 59 #include <dev/mii/miidevs.h> 60 61 #include <machine/clock.h> 62 #include <machine/bus_pio.h> 63 #include <machine/bus_memio.h> 64 #include <machine/bus.h> 65 #include <machine/resource.h> 66 #include <sys/bus.h> 67 68 #include <pci/pcivar.h> 69 70 #include <pci/if_dcreg.h> 71 72 #include "miibus_if.h" 73 74 #if !defined(lint) 75 static const char rcsid[] = 76 "$FreeBSD$"; 77 #endif 78 79 #define DC_SETBIT(sc, reg, x) \ 80 CSR_WRITE_4(sc, reg, \ 81 CSR_READ_4(sc, reg) | x) 82 83 #define DC_CLRBIT(sc, reg, x) \ 84 CSR_WRITE_4(sc, reg, \ 85 CSR_READ_4(sc, reg) & ~x) 86 87 #define MIIF_AUTOTIMEOUT 0x0004 88 89 static int dcphy_probe __P((device_t)); 90 static int dcphy_attach __P((device_t)); 91 static int dcphy_detach __P((device_t)); 92 93 static device_method_t dcphy_methods[] = { 94 /* device interface */ 95 DEVMETHOD(device_probe, dcphy_probe), 96 DEVMETHOD(device_attach, dcphy_attach), 97 DEVMETHOD(device_detach, dcphy_detach), 98 DEVMETHOD(device_shutdown, bus_generic_shutdown), 99 { 0, 0 } 100 }; 101 102 static devclass_t dcphy_devclass; 103 104 static driver_t dcphy_driver = { 105 "dcphy", 106 dcphy_methods, 107 sizeof(struct mii_softc) 108 }; 109 110 DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0); 111 112 int dcphy_service __P((struct mii_softc *, struct mii_data *, int)); 113 void dcphy_status __P((struct mii_softc *)); 114 static int dcphy_auto __P((struct mii_softc *, int)); 115 static void dcphy_reset __P((struct mii_softc *)); 116 117 static int dcphy_probe(dev) 118 device_t dev; 119 { 120 struct mii_attach_args *ma; 121 122 ma = device_get_ivars(dev); 123 124 /* 125 * The dc driver will report the 21143 vendor and device 126 * ID to let us know that it wants us to attach. 127 */ 128 if (ma->mii_id1 != DC_VENDORID_DEC || 129 ma->mii_id2 != DC_DEVICEID_21143) 130 return(ENXIO); 131 132 device_set_desc(dev, "Intel 21143 NWAY media interface"); 133 134 return (0); 135 } 136 137 static int dcphy_attach(dev) 138 device_t dev; 139 { 140 struct mii_softc *sc; 141 struct mii_attach_args *ma; 142 struct mii_data *mii; 143 struct dc_softc *dc_sc; 144 145 sc = device_get_softc(dev); 146 ma = device_get_ivars(dev); 147 sc->mii_dev = device_get_parent(dev); 148 mii = device_get_softc(sc->mii_dev); 149 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 150 151 sc->mii_inst = mii->mii_instance; 152 sc->mii_phy = ma->mii_phyno; 153 sc->mii_service = dcphy_service; 154 sc->mii_pdata = mii; 155 156 sc->mii_flags |= MIIF_NOISOLATE; 157 mii->mii_instance++; 158 159 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 160 161 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 162 BMCR_ISO); 163 164 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst), 165 BMCR_LOOP|BMCR_S100); 166 167 /*dcphy_reset(sc);*/ 168 dc_sc = mii->mii_ifp->if_softc; 169 CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0); 170 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0); 171 172 switch(pci_read_config(device_get_parent(sc->mii_dev), 173 DC_PCI_CSID, 4)) { 174 case 0x99999999: 175 /* Example of how to only allow 10Mbps modes. */ 176 sc->mii_capabilities = BMSR_10TFDX|BMSR_10THDX; 177 break; 178 default: 179 sc->mii_capabilities = 180 BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX| 181 BMSR_10TFDX|BMSR_10THDX; 182 break; 183 } 184 185 sc->mii_capabilities &= ma->mii_capmask; 186 device_printf(dev, " "); 187 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0) 188 printf("no media present"); 189 else 190 mii_add_media(mii, sc->mii_capabilities, sc->mii_inst); 191 printf("\n"); 192 #undef ADD 193 194 MIIBUS_MEDIAINIT(sc->mii_dev); 195 return(0); 196 } 197 198 static int dcphy_detach(dev) 199 device_t dev; 200 { 201 struct mii_softc *sc; 202 struct mii_data *mii; 203 204 sc = device_get_softc(dev); 205 mii = device_get_softc(device_get_parent(dev)); 206 sc->mii_dev = NULL; 207 LIST_REMOVE(sc, mii_list); 208 209 return(0); 210 } 211 212 int 213 dcphy_service(sc, mii, cmd) 214 struct mii_softc *sc; 215 struct mii_data *mii; 216 int cmd; 217 { 218 struct dc_softc *dc_sc; 219 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 220 int reg; 221 u_int32_t mode; 222 223 dc_sc = mii->mii_ifp->if_softc; 224 225 switch (cmd) { 226 case MII_POLLSTAT: 227 /* 228 * If we're not polling our PHY instance, just return. 229 */ 230 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 231 return (0); 232 } 233 break; 234 235 case MII_MEDIACHG: 236 /* 237 * If the media indicates a different PHY instance, 238 * isolate ourselves. 239 */ 240 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 241 return (0); 242 } 243 244 /* 245 * If the interface is not up, don't do anything. 246 */ 247 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 248 break; 249 250 sc->mii_flags = 0; 251 mii->mii_media_active = IFM_NONE; 252 mode = CSR_READ_4(dc_sc, DC_NETCFG); 253 mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL| 254 DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL); 255 256 switch (IFM_SUBTYPE(ife->ifm_media)) { 257 case IFM_AUTO: 258 /*dcphy_reset(sc);*/ 259 (void) dcphy_auto(sc, 0); 260 break; 261 case IFM_100_T4: 262 /* 263 * XXX Not supported as a manual setting right now. 264 */ 265 return (EINVAL); 266 case IFM_100_TX: 267 dcphy_reset(sc); 268 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 269 mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS| 270 DC_NETCFG_SCRAMBLER; 271 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 272 mode |= DC_NETCFG_FULLDUPLEX; 273 else 274 mode &= ~DC_NETCFG_FULLDUPLEX; 275 CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 276 break; 277 case IFM_10_T: 278 DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 279 DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF); 280 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 281 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D); 282 else 283 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F); 284 DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 285 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 286 mode &= ~DC_NETCFG_PORTSEL; 287 mode |= DC_NETCFG_SPEEDSEL; 288 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 289 mode |= DC_NETCFG_FULLDUPLEX; 290 else 291 mode &= ~DC_NETCFG_FULLDUPLEX; 292 CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 293 break; 294 default: 295 return(EINVAL); 296 break; 297 } 298 break; 299 300 case MII_TICK: 301 /* 302 * If we're not currently selected, just return. 303 */ 304 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 305 return (0); 306 307 /* 308 * Only used for autonegotiation. 309 */ 310 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 311 return (0); 312 313 /* 314 * Is the interface even up? 315 */ 316 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 317 return (0); 318 319 if (sc->mii_flags & MIIF_DOINGAUTO) { 320 if (++sc->mii_ticks != 5) 321 return(0); 322 else { 323 sc->mii_ticks = 0; 324 sc->mii_flags &= ~MIIF_DOINGAUTO; 325 sc->mii_flags |= MIIF_AUTOTIMEOUT; 326 } 327 } 328 329 sc->mii_flags &= ~MIIF_DOINGAUTO; 330 331 /* 332 * Check to see if we have link. If we do, we don't 333 * need to restart the autonegotiation process. Read 334 * the BMSR twice in case it's latched. 335 */ 336 reg = CSR_READ_4(dc_sc, DC_10BTSTAT) & 337 (DC_TSTAT_LS10|DC_TSTAT_LS100); 338 339 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX && 340 !(reg & DC_TSTAT_LS100)) { 341 if (sc->mii_flags & MIIF_AUTOTIMEOUT) { 342 sc->mii_flags &= ~MIIF_AUTOTIMEOUT; 343 break; 344 } else 345 return(0); 346 } else if (IFM_SUBTYPE(mii->mii_media_active) == IFM_10_T && 347 !(reg & DC_TSTAT_LS10)) { 348 if (sc->mii_flags & MIIF_AUTOTIMEOUT) { 349 sc->mii_flags &= ~MIIF_AUTOTIMEOUT; 350 break; 351 } else 352 return(0); 353 } else if (IFM_SUBTYPE(mii->mii_media_active) == IFM_NONE && 354 (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))) { 355 if (sc->mii_flags & MIIF_AUTOTIMEOUT) { 356 sc->mii_flags &= ~MIIF_AUTOTIMEOUT; 357 break; 358 } else 359 return(0); 360 } else if (CSR_READ_4(dc_sc, DC_ISR) & DC_ISR_LINKGOOD) { 361 if (sc->mii_flags & MIIF_AUTOTIMEOUT) { 362 sc->mii_flags &= ~MIIF_AUTOTIMEOUT; 363 break; 364 } else 365 return(0); 366 } 367 368 sc->mii_ticks = 0; 369 /*dcphy_reset(sc);*/ 370 dcphy_auto(sc, 0); 371 372 break; 373 } 374 375 /* Update the media status. */ 376 dcphy_status(sc); 377 378 /* Callback if something changed. */ 379 if (sc->mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) { 380 MIIBUS_STATCHG(sc->mii_dev); 381 sc->mii_active = mii->mii_media_active; 382 } 383 return (0); 384 } 385 386 void 387 dcphy_status(sc) 388 struct mii_softc *sc; 389 { 390 struct mii_data *mii = sc->mii_pdata; 391 int reg, anlpar; 392 struct dc_softc *dc_sc; 393 394 dc_sc = mii->mii_ifp->if_softc; 395 396 mii->mii_media_status = IFM_AVALID; 397 mii->mii_media_active = IFM_ETHER; 398 399 reg = CSR_READ_4(dc_sc, DC_10BTSTAT) & 400 (DC_TSTAT_LS10|DC_TSTAT_LS100); 401 402 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) 403 mii->mii_media_status |= IFM_ACTIVE; 404 405 if (sc->mii_flags & MIIF_DOINGAUTO) { 406 mii->mii_media_active |= IFM_NONE; 407 return; 408 } 409 410 if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL && 411 CSR_READ_4(dc_sc, DC_10BTSTAT) & DC_TSTAT_ANEGSTAT) { 412 /* Erg, still trying, I guess... */ 413 if ((CSR_READ_4(dc_sc, DC_10BTSTAT) & 414 DC_ASTAT_AUTONEGCMP) != DC_ASTAT_AUTONEGCMP) { 415 mii->mii_media_active |= IFM_NONE; 416 return; 417 } 418 419 if (CSR_READ_4(dc_sc, DC_10BTSTAT) & DC_TSTAT_LP_CAN_NWAY) { 420 anlpar = CSR_READ_4(dc_sc, DC_10BTSTAT) >> 16; 421 if (anlpar & ANLPAR_T4) 422 mii->mii_media_active |= IFM_100_T4; 423 else if (anlpar & ANLPAR_TX_FD) 424 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 425 else if (anlpar & ANLPAR_TX) 426 mii->mii_media_active |= IFM_100_TX; 427 else if (anlpar & ANLPAR_10_FD) 428 mii->mii_media_active |= IFM_10_T|IFM_FDX; 429 else if (anlpar & ANLPAR_10) 430 mii->mii_media_active |= IFM_10_T; 431 else 432 mii->mii_media_active |= IFM_NONE; 433 if (DC_IS_INTEL(dc_sc)) 434 DC_CLRBIT(dc_sc, DC_10BTCTRL, 435 DC_TCTL_AUTONEGENBL); 436 return; 437 } 438 /* 439 * If the other side doesn't support NWAY, then the 440 * best we can do is determine if we have a 10Mbps or 441 * 100Mbps link. There's no way to know if the link 442 * is full or half duplex, so we default to half duplex 443 * and hope that the user is clever enough to manually 444 * change the media settings if we're wrong. 445 */ 446 if (!(reg & DC_TSTAT_LS100)) 447 mii->mii_media_active |= IFM_100_TX; 448 else if (!(reg & DC_TSTAT_LS10)) 449 mii->mii_media_active |= IFM_10_T; 450 else 451 mii->mii_media_active |= IFM_NONE; 452 if (DC_IS_INTEL(dc_sc)) 453 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 454 return; 455 } 456 457 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SCRAMBLER) 458 mii->mii_media_active |= IFM_100_TX; 459 else 460 mii->mii_media_active |= IFM_10_T; 461 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX) 462 mii->mii_media_active |= IFM_FDX; 463 464 return; 465 } 466 467 static int 468 dcphy_auto(mii, waitfor) 469 struct mii_softc *mii; 470 int waitfor; 471 { 472 int i; 473 struct dc_softc *sc; 474 475 sc = mii->mii_pdata->mii_ifp->if_softc; 476 477 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) { 478 DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL); 479 DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX); 480 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); 481 CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF); 482 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); 483 DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 484 DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE); 485 } 486 487 if (waitfor) { 488 /* Wait 500ms for it to complete. */ 489 for (i = 0; i < 500; i++) { 490 if ((CSR_READ_4(sc, DC_10BTSTAT) & DC_TSTAT_ANEGSTAT) 491 == DC_ASTAT_AUTONEGCMP) 492 return(0); 493 DELAY(1000); 494 } 495 /* 496 * Don't need to worry about clearing MIIF_DOINGAUTO. 497 * If that's set, a timeout is pending, and it will 498 * clear the flag. 499 */ 500 return(EIO); 501 } 502 503 /* 504 * Just let it finish asynchronously. This is for the benefit of 505 * the tick handler driving autonegotiation. Don't want 500ms 506 * delays all the time while the system is running! 507 */ 508 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) 509 mii->mii_flags |= MIIF_DOINGAUTO; 510 511 return(EJUSTRETURN); 512 } 513 514 static void 515 dcphy_reset(mii) 516 struct mii_softc *mii; 517 { 518 struct dc_softc *sc; 519 520 sc = mii->mii_pdata->mii_ifp->if_softc; 521 522 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); 523 DELAY(1000); 524 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); 525 526 return; 527 } 528 529