xref: /freebsd/sys/dev/dc/dcphy.c (revision a3cf0ef5a295c885c895fabfd56470c0d1db322d)
1 /*-
2  * Copyright (c) 1997, 1998, 1999
3  *	Bill Paul <wpaul@ee.columbia.edu>.  All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  * 3. All advertising materials mentioning features or use of this software
14  *    must display the following acknowledgement:
15  *	This product includes software developed by Bill Paul.
16  * 4. Neither the name of the author nor the names of any co-contributors
17  *    may be used to endorse or promote products derived from this software
18  *    without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30  * THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
35 
36 /*
37  * Pseudo-driver for internal NWAY support on DEC 21143 and workalike
38  * controllers.  Technically we're abusing the miibus code to handle
39  * media selection and NWAY support here since there is no MII
40  * interface.  However the logical operations are roughly the same,
41  * and the alternative is to create a fake MII interface in the driver,
42  * which is harder to do.
43  */
44 
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/kernel.h>
48 #include <sys/socket.h>
49 #include <sys/errno.h>
50 #include <sys/lock.h>
51 #include <sys/module.h>
52 #include <sys/mutex.h>
53 #include <sys/bus.h>
54 
55 #include <net/if.h>
56 #include <net/if_arp.h>
57 #include <net/if_media.h>
58 
59 #include <dev/mii/mii.h>
60 #include <dev/mii/miivar.h>
61 #include "miidevs.h"
62 
63 #include <machine/bus.h>
64 #include <machine/resource.h>
65 #include <sys/bus.h>
66 
67 #include <dev/pci/pcivar.h>
68 
69 #include <dev/dc/if_dcreg.h>
70 
71 #include "miibus_if.h"
72 
73 #define DC_SETBIT(sc, reg, x)                           \
74         CSR_WRITE_4(sc, reg,                            \
75                 CSR_READ_4(sc, reg) | x)
76 
77 #define DC_CLRBIT(sc, reg, x)                           \
78         CSR_WRITE_4(sc, reg,                            \
79                 CSR_READ_4(sc, reg) & ~x)
80 
81 #define MIIF_AUTOTIMEOUT	0x0004
82 
83 /*
84  * This is the subsystem ID for the built-in 21143 ethernet
85  * in several Compaq Presario systems.  Apparently these are
86  * 10Mbps only, so we need to treat them specially.
87  */
88 #define COMPAQ_PRESARIO_ID	0xb0bb0e11
89 
90 static int dcphy_probe(device_t);
91 static int dcphy_attach(device_t);
92 
93 static device_method_t dcphy_methods[] = {
94 	/* device interface */
95 	DEVMETHOD(device_probe,		dcphy_probe),
96 	DEVMETHOD(device_attach,	dcphy_attach),
97 	DEVMETHOD(device_detach,	mii_phy_detach),
98 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
99 	{ 0, 0 }
100 };
101 
102 static devclass_t dcphy_devclass;
103 
104 static driver_t dcphy_driver = {
105 	"dcphy",
106 	dcphy_methods,
107 	sizeof(struct mii_softc)
108 };
109 
110 DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0);
111 
112 static int	dcphy_service(struct mii_softc *, struct mii_data *, int);
113 static void	dcphy_status(struct mii_softc *);
114 static void	dcphy_reset(struct mii_softc *);
115 static int	dcphy_auto(struct mii_softc *);
116 
117 static int
118 dcphy_probe(device_t dev)
119 {
120 	struct mii_attach_args *ma;
121 
122 	ma = device_get_ivars(dev);
123 
124 	/*
125 	 * The dc driver will report the 21143 vendor and device
126 	 * ID to let us know that it wants us to attach.
127 	 */
128 	if (ma->mii_id1 != DC_VENDORID_DEC ||
129 	    ma->mii_id2 != DC_DEVICEID_21143)
130 		return (ENXIO);
131 
132 	device_set_desc(dev, "Intel 21143 NWAY media interface");
133 
134 	return (BUS_PROBE_DEFAULT);
135 }
136 
137 static int
138 dcphy_attach(device_t dev)
139 {
140 	struct mii_softc *sc;
141 	struct mii_attach_args *ma;
142 	struct mii_data *mii;
143 	struct dc_softc		*dc_sc;
144 	device_t brdev;
145 
146 	sc = device_get_softc(dev);
147 	ma = device_get_ivars(dev);
148 	sc->mii_dev = device_get_parent(dev);
149 	mii = ma->mii_data;
150 	LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
151 
152 	sc->mii_flags = miibus_get_flags(dev);
153 	sc->mii_inst = mii->mii_instance++;
154 	sc->mii_phy = ma->mii_phyno;
155 	sc->mii_service = dcphy_service;
156 	sc->mii_pdata = mii;
157 
158 	/*
159 	 * Apparently, we can neither isolate nor do loopback.
160 	 */
161 	sc->mii_flags |= MIIF_NOISOLATE | MIIF_NOLOOP;
162 
163 	/*dcphy_reset(sc);*/
164 	dc_sc = mii->mii_ifp->if_softc;
165 	CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
166 	CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
167 
168 	brdev = device_get_parent(sc->mii_dev);
169 	switch (pci_get_subdevice(brdev) << 16 | pci_get_subvendor(brdev)) {
170 	case COMPAQ_PRESARIO_ID:
171 		/* Example of how to only allow 10Mbps modes. */
172 		sc->mii_capabilities = BMSR_ANEG | BMSR_10TFDX | BMSR_10THDX;
173 		break;
174 	default:
175 		if (dc_sc->dc_pmode == DC_PMODE_SIA)
176 			sc->mii_capabilities =
177 			    BMSR_ANEG | BMSR_10TFDX | BMSR_10THDX;
178 		else
179 			sc->mii_capabilities =
180 			    BMSR_ANEG | BMSR_100TXFDX | BMSR_100TXHDX |
181 			    BMSR_10TFDX | BMSR_10THDX;
182 		break;
183 	}
184 
185 	sc->mii_capabilities &= ma->mii_capmask;
186 	device_printf(dev, " ");
187 	mii_phy_add_media(sc);
188 	printf("\n");
189 
190 	MIIBUS_MEDIAINIT(sc->mii_dev);
191 	return (0);
192 }
193 
194 static int
195 dcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
196 {
197 	struct dc_softc		*dc_sc;
198 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
199 	int reg;
200 	u_int32_t		mode;
201 
202 	dc_sc = mii->mii_ifp->if_softc;
203 
204 	switch (cmd) {
205 	case MII_POLLSTAT:
206 		break;
207 
208 	case MII_MEDIACHG:
209 		/*
210 		 * If the interface is not up, don't do anything.
211 		 */
212 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
213 			break;
214 
215 		mii->mii_media_active = IFM_NONE;
216 		mode = CSR_READ_4(dc_sc, DC_NETCFG);
217 		mode &= ~(DC_NETCFG_FULLDUPLEX | DC_NETCFG_PORTSEL |
218 		    DC_NETCFG_PCS | DC_NETCFG_SCRAMBLER | DC_NETCFG_SPEEDSEL);
219 
220 		switch (IFM_SUBTYPE(ife->ifm_media)) {
221 		case IFM_AUTO:
222 			/*dcphy_reset(sc);*/
223 			(void) dcphy_auto(sc);
224 			break;
225 		case IFM_100_T4:
226 			/*
227 			 * XXX Not supported as a manual setting right now.
228 			 */
229 			return (EINVAL);
230 		case IFM_100_TX:
231 			dcphy_reset(sc);
232 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
233 			mode |= DC_NETCFG_PORTSEL | DC_NETCFG_PCS |
234 			    DC_NETCFG_SCRAMBLER;
235 			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
236 				mode |= DC_NETCFG_FULLDUPLEX;
237 			else
238 				mode &= ~DC_NETCFG_FULLDUPLEX;
239 			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
240 			break;
241 		case IFM_10_T:
242 			DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
243 			DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
244 			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
245 				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
246 			else
247 				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
248 			DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
249 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
250 			mode &= ~DC_NETCFG_PORTSEL;
251 			mode |= DC_NETCFG_SPEEDSEL;
252 			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
253 				mode |= DC_NETCFG_FULLDUPLEX;
254 			else
255 				mode &= ~DC_NETCFG_FULLDUPLEX;
256 			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
257 			break;
258 		default:
259 			return (EINVAL);
260 		}
261 		break;
262 
263 	case MII_TICK:
264 		/*
265 		 * Is the interface even up?
266 		 */
267 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
268 			return (0);
269 
270 		/*
271 		 * Only used for autonegotiation.
272 		 */
273 		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
274 			break;
275 
276 		reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
277 		if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
278 			break;
279 
280                 /*
281                  * Only retry autonegotiation every 5 seconds.
282 		 *
283 		 * Otherwise, fall through to calling dcphy_status()
284 		 * since real Intel 21143 chips don't show valid link
285 		 * status until autonegotiation is switched off, and
286 		 * that only happens in dcphy_status().  Without this,
287 		 * successful autonegotiation is never recognised on
288 		 * these chips.
289                  */
290                 if (++sc->mii_ticks <= 50)
291 			break;
292 
293 		sc->mii_ticks = 0;
294 		dcphy_auto(sc);
295 
296 		break;
297 	}
298 
299 	/* Update the media status. */
300 	dcphy_status(sc);
301 
302 	/* Callback if something changed. */
303 	mii_phy_update(sc, cmd);
304 	return (0);
305 }
306 
307 static void
308 dcphy_status(struct mii_softc *sc)
309 {
310 	struct mii_data *mii = sc->mii_pdata;
311 	int reg, anlpar, tstat = 0;
312 	struct dc_softc		*dc_sc;
313 
314 	dc_sc = mii->mii_ifp->if_softc;
315 
316 	mii->mii_media_status = IFM_AVALID;
317 	mii->mii_media_active = IFM_ETHER;
318 
319 	if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
320 		return;
321 
322 	reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
323 	if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
324 		mii->mii_media_status |= IFM_ACTIVE;
325 
326 	if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {
327 		/* Erg, still trying, I guess... */
328 		tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);
329 		if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) {
330 			if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&
331 			    (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE)
332 				goto skip;
333 			mii->mii_media_active |= IFM_NONE;
334 			return;
335 		}
336 
337 		if (tstat & DC_TSTAT_LP_CAN_NWAY) {
338 			anlpar = tstat >> 16;
339 			if (anlpar & ANLPAR_TX_FD &&
340 			    sc->mii_capabilities & BMSR_100TXFDX)
341 				mii->mii_media_active |= IFM_100_TX | IFM_FDX;
342 			else if (anlpar & ANLPAR_T4 &&
343 			    sc->mii_capabilities & BMSR_100T4)
344 				mii->mii_media_active |= IFM_100_T4 | IFM_HDX;
345 			else if (anlpar & ANLPAR_TX &&
346 			    sc->mii_capabilities & BMSR_100TXHDX)
347 				mii->mii_media_active |= IFM_100_TX | IFM_HDX;
348 			else if (anlpar & ANLPAR_10_FD)
349 				mii->mii_media_active |= IFM_10_T | IFM_FDX;
350 			else if (anlpar & ANLPAR_10)
351 				mii->mii_media_active |= IFM_10_T | IFM_HDX;
352 			else
353 				mii->mii_media_active |= IFM_NONE;
354 			if (DC_IS_INTEL(dc_sc))
355 				DC_CLRBIT(dc_sc, DC_10BTCTRL,
356 				    DC_TCTL_AUTONEGENBL);
357 			return;
358 		}
359 
360 		/*
361 		 * If the other side doesn't support NWAY, then the
362 		 * best we can do is determine if we have a 10Mbps or
363 		 * 100Mbps link.  There's no way to know if the link
364 		 * is full or half duplex, so we default to half duplex
365 		 * and hope that the user is clever enough to manually
366 		 * change the media settings if we're wrong.
367 		 */
368 		if (!(reg & DC_TSTAT_LS100))
369 			mii->mii_media_active |= IFM_100_TX | IFM_HDX;
370 		else if (!(reg & DC_TSTAT_LS10))
371 			mii->mii_media_active |= IFM_10_T | IFM_HDX;
372 		else
373 			mii->mii_media_active |= IFM_NONE;
374 		if (DC_IS_INTEL(dc_sc))
375 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
376 		return;
377 	}
378 
379 skip:
380 	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)
381 		mii->mii_media_active |= IFM_10_T;
382 	else
383 		mii->mii_media_active |= IFM_100_TX;
384 	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)
385 		mii->mii_media_active |= IFM_FDX;
386 	else
387 		mii->mii_media_active |= IFM_HDX;
388 }
389 
390 static int
391 dcphy_auto(struct mii_softc *mii)
392 {
393 	struct dc_softc		*sc;
394 
395 	sc = mii->mii_pdata->mii_ifp->if_softc;
396 
397 	DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
398 	DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
399 	DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
400 	if (mii->mii_capabilities & BMSR_100TXHDX)
401 		CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF);
402 	else
403 		CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF);
404 	DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
405 	DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
406 	DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
407 
408 	return (EJUSTRETURN);
409 }
410 
411 static void
412 dcphy_reset(struct mii_softc *mii)
413 {
414 	struct dc_softc		*sc;
415 
416 	sc = mii->mii_pdata->mii_ifp->if_softc;
417 
418 	DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
419 	DELAY(1000);
420 	DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
421 }
422