1 /* 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Pseudo-driver for internal NWAY support on DEC 21143 and workalike 35 * controllers. Technically we're abusing the miibus code to handle 36 * media selection and NWAY support here since there is no MII 37 * interface. However the logical operations are roughly the same, 38 * and the alternative is to create a fake MII interface in the driver, 39 * which is harder to do. 40 */ 41 42 #include <sys/cdefs.h> 43 __FBSDID("$FreeBSD$"); 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/kernel.h> 48 #include <sys/socket.h> 49 #include <sys/errno.h> 50 #include <sys/lock.h> 51 #include <sys/module.h> 52 #include <sys/mutex.h> 53 #include <sys/bus.h> 54 55 #include <net/if.h> 56 #include <net/if_arp.h> 57 #include <net/if_media.h> 58 59 #include <dev/mii/mii.h> 60 #include <dev/mii/miivar.h> 61 #include "miidevs.h" 62 63 #include <machine/bus_pio.h> 64 #include <machine/bus_memio.h> 65 #include <machine/bus.h> 66 #include <machine/resource.h> 67 #include <sys/bus.h> 68 69 #include <pci/pcivar.h> 70 71 #include <pci/if_dcreg.h> 72 73 #include "miibus_if.h" 74 75 #define DC_SETBIT(sc, reg, x) \ 76 CSR_WRITE_4(sc, reg, \ 77 CSR_READ_4(sc, reg) | x) 78 79 #define DC_CLRBIT(sc, reg, x) \ 80 CSR_WRITE_4(sc, reg, \ 81 CSR_READ_4(sc, reg) & ~x) 82 83 #define MIIF_AUTOTIMEOUT 0x0004 84 85 /* 86 * This is the subsystem ID for the built-in 21143 ethernet 87 * in several Compaq Presario systems. Apparently these are 88 * 10Mbps only, so we need to treat them specially. 89 */ 90 #define COMPAQ_PRESARIO_ID 0xb0bb0e11 91 92 static int dcphy_probe(device_t); 93 static int dcphy_attach(device_t); 94 95 static device_method_t dcphy_methods[] = { 96 /* device interface */ 97 DEVMETHOD(device_probe, dcphy_probe), 98 DEVMETHOD(device_attach, dcphy_attach), 99 DEVMETHOD(device_detach, mii_phy_detach), 100 DEVMETHOD(device_shutdown, bus_generic_shutdown), 101 { 0, 0 } 102 }; 103 104 static devclass_t dcphy_devclass; 105 106 static driver_t dcphy_driver = { 107 "dcphy", 108 dcphy_methods, 109 sizeof(struct mii_softc) 110 }; 111 112 DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0); 113 114 static int dcphy_service(struct mii_softc *, struct mii_data *, int); 115 static void dcphy_status(struct mii_softc *); 116 static void dcphy_reset(struct mii_softc *); 117 static int dcphy_auto(struct mii_softc *); 118 119 static int 120 dcphy_probe(dev) 121 device_t dev; 122 { 123 struct mii_attach_args *ma; 124 125 ma = device_get_ivars(dev); 126 127 /* 128 * The dc driver will report the 21143 vendor and device 129 * ID to let us know that it wants us to attach. 130 */ 131 if (ma->mii_id1 != DC_VENDORID_DEC || 132 ma->mii_id2 != DC_DEVICEID_21143) 133 return(ENXIO); 134 135 device_set_desc(dev, "Intel 21143 NWAY media interface"); 136 137 return (0); 138 } 139 140 static int 141 dcphy_attach(dev) 142 device_t dev; 143 { 144 struct mii_softc *sc; 145 struct mii_attach_args *ma; 146 struct mii_data *mii; 147 struct dc_softc *dc_sc; 148 149 sc = device_get_softc(dev); 150 ma = device_get_ivars(dev); 151 sc->mii_dev = device_get_parent(dev); 152 mii = device_get_softc(sc->mii_dev); 153 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 154 155 sc->mii_inst = mii->mii_instance; 156 sc->mii_phy = ma->mii_phyno; 157 sc->mii_service = dcphy_service; 158 sc->mii_pdata = mii; 159 160 sc->mii_flags |= MIIF_NOISOLATE; 161 mii->mii_instance++; 162 163 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 164 165 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 166 BMCR_ISO); 167 168 /*dcphy_reset(sc);*/ 169 dc_sc = mii->mii_ifp->if_softc; 170 CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0); 171 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0); 172 173 switch(pci_read_config(device_get_parent(sc->mii_dev), 174 DC_PCI_CSID, 4)) { 175 case COMPAQ_PRESARIO_ID: 176 /* Example of how to only allow 10Mbps modes. */ 177 sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; 178 break; 179 default: 180 if (dc_sc->dc_pmode == DC_PMODE_SIA) { 181 sc->mii_capabilities = 182 BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; 183 } else { 184 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, 185 sc->mii_inst), BMCR_LOOP|BMCR_S100); 186 187 sc->mii_capabilities = 188 BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX| 189 BMSR_10TFDX|BMSR_10THDX; 190 } 191 break; 192 } 193 194 sc->mii_capabilities &= ma->mii_capmask; 195 device_printf(dev, " "); 196 mii_add_media(sc); 197 printf("\n"); 198 #undef ADD 199 200 MIIBUS_MEDIAINIT(sc->mii_dev); 201 return(0); 202 } 203 204 static int 205 dcphy_service(sc, mii, cmd) 206 struct mii_softc *sc; 207 struct mii_data *mii; 208 int cmd; 209 { 210 struct dc_softc *dc_sc; 211 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 212 int reg; 213 u_int32_t mode; 214 215 dc_sc = mii->mii_ifp->if_softc; 216 217 switch (cmd) { 218 case MII_POLLSTAT: 219 /* 220 * If we're not polling our PHY instance, just return. 221 */ 222 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 223 return (0); 224 } 225 break; 226 227 case MII_MEDIACHG: 228 /* 229 * If the media indicates a different PHY instance, 230 * isolate ourselves. 231 */ 232 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 233 return (0); 234 } 235 236 /* 237 * If the interface is not up, don't do anything. 238 */ 239 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 240 break; 241 242 sc->mii_flags = 0; 243 mii->mii_media_active = IFM_NONE; 244 mode = CSR_READ_4(dc_sc, DC_NETCFG); 245 mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL| 246 DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL); 247 248 switch (IFM_SUBTYPE(ife->ifm_media)) { 249 case IFM_AUTO: 250 /*dcphy_reset(sc);*/ 251 (void) dcphy_auto(sc); 252 break; 253 case IFM_100_T4: 254 /* 255 * XXX Not supported as a manual setting right now. 256 */ 257 return (EINVAL); 258 case IFM_100_TX: 259 dcphy_reset(sc); 260 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 261 mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS| 262 DC_NETCFG_SCRAMBLER; 263 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 264 mode |= DC_NETCFG_FULLDUPLEX; 265 else 266 mode &= ~DC_NETCFG_FULLDUPLEX; 267 CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 268 break; 269 case IFM_10_T: 270 DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 271 DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF); 272 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 273 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D); 274 else 275 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F); 276 DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 277 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 278 mode &= ~DC_NETCFG_PORTSEL; 279 mode |= DC_NETCFG_SPEEDSEL; 280 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 281 mode |= DC_NETCFG_FULLDUPLEX; 282 else 283 mode &= ~DC_NETCFG_FULLDUPLEX; 284 CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 285 break; 286 default: 287 return(EINVAL); 288 break; 289 } 290 break; 291 292 case MII_TICK: 293 /* 294 * If we're not currently selected, just return. 295 */ 296 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 297 return (0); 298 299 /* 300 * Is the interface even up? 301 */ 302 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 303 return (0); 304 305 /* 306 * Only used for autonegotiation. 307 */ 308 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 309 break; 310 311 reg = CSR_READ_4(dc_sc, DC_10BTSTAT); 312 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) 313 break; 314 315 /* 316 * Only retry autonegotiation every 5 seconds. 317 * 318 * Otherwise, fall through to calling dcphy_status() 319 * since real Intel 21143 chips don't show valid link 320 * status until autonegotiation is switched off, and 321 * that only happens in dcphy_status(). Without this, 322 * successful autonegotation is never recognised on 323 * these chips. 324 */ 325 if (++sc->mii_ticks != 50) 326 break; 327 328 sc->mii_ticks = 0; 329 dcphy_auto(sc); 330 331 break; 332 } 333 334 /* Update the media status. */ 335 dcphy_status(sc); 336 337 /* Callback if something changed. */ 338 mii_phy_update(sc, cmd); 339 return (0); 340 } 341 342 static void 343 dcphy_status(sc) 344 struct mii_softc *sc; 345 { 346 struct mii_data *mii = sc->mii_pdata; 347 int reg, anlpar, tstat = 0; 348 struct dc_softc *dc_sc; 349 350 dc_sc = mii->mii_ifp->if_softc; 351 352 mii->mii_media_status = IFM_AVALID; 353 mii->mii_media_active = IFM_ETHER; 354 355 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 356 return; 357 358 reg = CSR_READ_4(dc_sc, DC_10BTSTAT); 359 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) 360 mii->mii_media_status |= IFM_ACTIVE; 361 362 if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) { 363 /* Erg, still trying, I guess... */ 364 tstat = CSR_READ_4(dc_sc, DC_10BTSTAT); 365 if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) { 366 if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) && 367 (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE) 368 goto skip; 369 mii->mii_media_active |= IFM_NONE; 370 return; 371 } 372 373 if (tstat & DC_TSTAT_LP_CAN_NWAY) { 374 anlpar = tstat >> 16; 375 if (anlpar & ANLPAR_T4 && 376 sc->mii_capabilities & BMSR_100TXHDX) 377 mii->mii_media_active |= IFM_100_T4; 378 else if (anlpar & ANLPAR_TX_FD && 379 sc->mii_capabilities & BMSR_100TXFDX) 380 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 381 else if (anlpar & ANLPAR_TX && 382 sc->mii_capabilities & BMSR_100TXHDX) 383 mii->mii_media_active |= IFM_100_TX; 384 else if (anlpar & ANLPAR_10_FD) 385 mii->mii_media_active |= IFM_10_T|IFM_FDX; 386 else if (anlpar & ANLPAR_10) 387 mii->mii_media_active |= IFM_10_T; 388 else 389 mii->mii_media_active |= IFM_NONE; 390 if (DC_IS_INTEL(dc_sc)) 391 DC_CLRBIT(dc_sc, DC_10BTCTRL, 392 DC_TCTL_AUTONEGENBL); 393 return; 394 } 395 /* 396 * If the other side doesn't support NWAY, then the 397 * best we can do is determine if we have a 10Mbps or 398 * 100Mbps link. There's no way to know if the link 399 * is full or half duplex, so we default to half duplex 400 * and hope that the user is clever enough to manually 401 * change the media settings if we're wrong. 402 */ 403 if (!(reg & DC_TSTAT_LS100)) 404 mii->mii_media_active |= IFM_100_TX; 405 else if (!(reg & DC_TSTAT_LS10)) 406 mii->mii_media_active |= IFM_10_T; 407 else 408 mii->mii_media_active |= IFM_NONE; 409 if (DC_IS_INTEL(dc_sc)) 410 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 411 return; 412 } 413 414 skip: 415 416 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL) 417 mii->mii_media_active |= IFM_10_T; 418 else 419 mii->mii_media_active |= IFM_100_TX; 420 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX) 421 mii->mii_media_active |= IFM_FDX; 422 423 return; 424 } 425 426 static int 427 dcphy_auto(mii) 428 struct mii_softc *mii; 429 { 430 struct dc_softc *sc; 431 432 sc = mii->mii_pdata->mii_ifp->if_softc; 433 434 DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL); 435 DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX); 436 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); 437 if (mii->mii_capabilities & BMSR_100TXHDX) 438 CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF); 439 else 440 CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF); 441 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); 442 DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 443 DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE); 444 445 return(EJUSTRETURN); 446 } 447 448 static void 449 dcphy_reset(mii) 450 struct mii_softc *mii; 451 { 452 struct dc_softc *sc; 453 454 sc = mii->mii_pdata->mii_ifp->if_softc; 455 456 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); 457 DELAY(1000); 458 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); 459 460 return; 461 } 462 463