xref: /freebsd/sys/dev/dc/dcphy.c (revision 7660b554bc59a07be0431c17e0e33815818baa69)
1 /*
2  * Copyright (c) 1997, 1998, 1999
3  *	Bill Paul <wpaul@ee.columbia.edu>.  All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  * 3. All advertising materials mentioning features or use of this software
14  *    must display the following acknowledgement:
15  *	This product includes software developed by Bill Paul.
16  * 4. Neither the name of the author nor the names of any co-contributors
17  *    may be used to endorse or promote products derived from this software
18  *    without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30  * THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
35 
36 /*
37  * Pseudo-driver for internal NWAY support on DEC 21143 and workalike
38  * controllers. Technically we're abusing the miibus code to handle
39  * media selection and NWAY support here since there is no MII
40  * interface. However the logical operations are roughly the same,
41  * and the alternative is to create a fake MII interface in the driver,
42  * which is harder to do.
43  */
44 
45 #include <sys/cdefs.h>
46 __FBSDID("$FreeBSD$");
47 
48 #include <sys/param.h>
49 #include <sys/systm.h>
50 #include <sys/kernel.h>
51 #include <sys/socket.h>
52 #include <sys/errno.h>
53 #include <sys/lock.h>
54 #include <sys/module.h>
55 #include <sys/mutex.h>
56 #include <sys/bus.h>
57 
58 #include <net/if.h>
59 #include <net/if_arp.h>
60 #include <net/if_media.h>
61 
62 #include <dev/mii/mii.h>
63 #include <dev/mii/miivar.h>
64 #include "miidevs.h"
65 
66 #include <machine/bus_pio.h>
67 #include <machine/bus_memio.h>
68 #include <machine/bus.h>
69 #include <machine/resource.h>
70 #include <sys/bus.h>
71 
72 #include <dev/pci/pcivar.h>
73 
74 #include <pci/if_dcreg.h>
75 
76 #include "miibus_if.h"
77 
78 #define DC_SETBIT(sc, reg, x)                           \
79         CSR_WRITE_4(sc, reg,                            \
80                 CSR_READ_4(sc, reg) | x)
81 
82 #define DC_CLRBIT(sc, reg, x)                           \
83         CSR_WRITE_4(sc, reg,                            \
84                 CSR_READ_4(sc, reg) & ~x)
85 
86 #define MIIF_AUTOTIMEOUT	0x0004
87 
88 /*
89  * This is the subsystem ID for the built-in 21143 ethernet
90  * in several Compaq Presario systems. Apparently these are
91  * 10Mbps only, so we need to treat them specially.
92  */
93 #define COMPAQ_PRESARIO_ID	0xb0bb0e11
94 
95 static int dcphy_probe(device_t);
96 static int dcphy_attach(device_t);
97 
98 static device_method_t dcphy_methods[] = {
99 	/* device interface */
100 	DEVMETHOD(device_probe,		dcphy_probe),
101 	DEVMETHOD(device_attach,	dcphy_attach),
102 	DEVMETHOD(device_detach,	mii_phy_detach),
103 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
104 	{ 0, 0 }
105 };
106 
107 static devclass_t dcphy_devclass;
108 
109 static driver_t dcphy_driver = {
110 	"dcphy",
111 	dcphy_methods,
112 	sizeof(struct mii_softc)
113 };
114 
115 DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0);
116 
117 static int	dcphy_service(struct mii_softc *, struct mii_data *, int);
118 static void	dcphy_status(struct mii_softc *);
119 static void	dcphy_reset(struct mii_softc *);
120 static int	dcphy_auto(struct mii_softc *);
121 
122 static int
123 dcphy_probe(dev)
124 	device_t		dev;
125 {
126 	struct mii_attach_args *ma;
127 
128 	ma = device_get_ivars(dev);
129 
130 	/*
131 	 * The dc driver will report the 21143 vendor and device
132 	 * ID to let us know that it wants us to attach.
133 	 */
134 	if (ma->mii_id1 != DC_VENDORID_DEC ||
135 	    ma->mii_id2 != DC_DEVICEID_21143)
136 		return(ENXIO);
137 
138 	device_set_desc(dev, "Intel 21143 NWAY media interface");
139 
140 	return (0);
141 }
142 
143 static int
144 dcphy_attach(dev)
145 	device_t		dev;
146 {
147 	struct mii_softc *sc;
148 	struct mii_attach_args *ma;
149 	struct mii_data *mii;
150 	struct dc_softc		*dc_sc;
151 
152 	sc = device_get_softc(dev);
153 	ma = device_get_ivars(dev);
154 	sc->mii_dev = device_get_parent(dev);
155 	mii = device_get_softc(sc->mii_dev);
156 	LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
157 
158 	sc->mii_inst = mii->mii_instance;
159 	sc->mii_phy = ma->mii_phyno;
160 	sc->mii_service = dcphy_service;
161 	sc->mii_pdata = mii;
162 
163 	sc->mii_flags |= MIIF_NOISOLATE;
164 	mii->mii_instance++;
165 
166 #define	ADD(m, c)	ifmedia_add(&mii->mii_media, (m), (c), NULL)
167 
168 	ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
169 	    BMCR_ISO);
170 
171 	/*dcphy_reset(sc);*/
172 	dc_sc = mii->mii_ifp->if_softc;
173 	CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
174 	CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
175 
176 	switch(pci_read_config(device_get_parent(sc->mii_dev),
177 	    DC_PCI_CSID, 4)) {
178 	case COMPAQ_PRESARIO_ID:
179 		/* Example of how to only allow 10Mbps modes. */
180 		sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
181 		break;
182 	default:
183 		if (dc_sc->dc_pmode == DC_PMODE_SIA) {
184 			sc->mii_capabilities =
185 			    BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
186 		} else {
187 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP,
188 			    sc->mii_inst), BMCR_LOOP|BMCR_S100);
189 
190 			sc->mii_capabilities =
191 			    BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX|
192 			    BMSR_10TFDX|BMSR_10THDX;
193 		}
194 		break;
195 	}
196 
197 	sc->mii_capabilities &= ma->mii_capmask;
198 	device_printf(dev, " ");
199 	mii_add_media(sc);
200 	printf("\n");
201 #undef ADD
202 
203 	MIIBUS_MEDIAINIT(sc->mii_dev);
204 	return(0);
205 }
206 
207 static int
208 dcphy_service(sc, mii, cmd)
209 	struct mii_softc *sc;
210 	struct mii_data *mii;
211 	int cmd;
212 {
213 	struct dc_softc		*dc_sc;
214 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
215 	int reg;
216 	u_int32_t		mode;
217 
218 	dc_sc = mii->mii_ifp->if_softc;
219 
220 	switch (cmd) {
221 	case MII_POLLSTAT:
222 		/*
223 		 * If we're not polling our PHY instance, just return.
224 		 */
225 		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
226 			return (0);
227 		}
228 		break;
229 
230 	case MII_MEDIACHG:
231 		/*
232 		 * If the media indicates a different PHY instance,
233 		 * isolate ourselves.
234 		 */
235 		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
236 			return (0);
237 		}
238 
239 		/*
240 		 * If the interface is not up, don't do anything.
241 		 */
242 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
243 			break;
244 
245 		sc->mii_flags = 0;
246 		mii->mii_media_active = IFM_NONE;
247 		mode = CSR_READ_4(dc_sc, DC_NETCFG);
248 		mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL|
249 		    DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL);
250 
251 		switch (IFM_SUBTYPE(ife->ifm_media)) {
252 		case IFM_AUTO:
253 			/*dcphy_reset(sc);*/
254 			(void) dcphy_auto(sc);
255 			break;
256 		case IFM_100_T4:
257 			/*
258 			 * XXX Not supported as a manual setting right now.
259 			 */
260 			return (EINVAL);
261 		case IFM_100_TX:
262 			dcphy_reset(sc);
263 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
264 			mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS|
265 			    DC_NETCFG_SCRAMBLER;
266 			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
267 				mode |= DC_NETCFG_FULLDUPLEX;
268 			else
269 				mode &= ~DC_NETCFG_FULLDUPLEX;
270 			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
271 			break;
272 		case IFM_10_T:
273 			DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
274 			DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
275 			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
276 				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
277 			else
278 				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
279 			DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
280 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
281 			mode &= ~DC_NETCFG_PORTSEL;
282 			mode |= DC_NETCFG_SPEEDSEL;
283 			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
284 				mode |= DC_NETCFG_FULLDUPLEX;
285 			else
286 				mode &= ~DC_NETCFG_FULLDUPLEX;
287 			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
288 			break;
289 		default:
290 			return(EINVAL);
291 		}
292 		break;
293 
294 	case MII_TICK:
295 		/*
296 		 * If we're not currently selected, just return.
297 		 */
298 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
299 			return (0);
300 
301 		/*
302 		 * Is the interface even up?
303 		 */
304 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
305 			return (0);
306 
307 		/*
308 		 * Only used for autonegotiation.
309 		 */
310 		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
311 			break;
312 
313 		reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
314 		if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
315 			break;
316 
317                 /*
318                  * Only retry autonegotiation every 5 seconds.
319 		 *
320 		 * Otherwise, fall through to calling dcphy_status()
321 		 * since real Intel 21143 chips don't show valid link
322 		 * status until autonegotiation is switched off, and
323 		 * that only happens in dcphy_status().  Without this,
324 		 * successful autonegotation is never recognised on
325 		 * these chips.
326                  */
327                 if (++sc->mii_ticks != 50)
328 			break;
329 
330 		sc->mii_ticks = 0;
331 		dcphy_auto(sc);
332 
333 		break;
334 	}
335 
336 	/* Update the media status. */
337 	dcphy_status(sc);
338 
339 	/* Callback if something changed. */
340 	mii_phy_update(sc, cmd);
341 	return (0);
342 }
343 
344 static void
345 dcphy_status(sc)
346 	struct mii_softc *sc;
347 {
348 	struct mii_data *mii = sc->mii_pdata;
349 	int reg, anlpar, tstat = 0;
350 	struct dc_softc		*dc_sc;
351 
352 	dc_sc = mii->mii_ifp->if_softc;
353 
354 	mii->mii_media_status = IFM_AVALID;
355 	mii->mii_media_active = IFM_ETHER;
356 
357 	if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
358 		return;
359 
360 	reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
361 	if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
362 		mii->mii_media_status |= IFM_ACTIVE;
363 
364 	if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {
365 		/* Erg, still trying, I guess... */
366 		tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);
367 		if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) {
368 			if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&
369 			    (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE)
370 				goto skip;
371 			mii->mii_media_active |= IFM_NONE;
372 			return;
373 		}
374 
375 		if (tstat & DC_TSTAT_LP_CAN_NWAY) {
376 			anlpar = tstat >> 16;
377 			if (anlpar & ANLPAR_T4 &&
378 			    sc->mii_capabilities & BMSR_100TXHDX)
379 				mii->mii_media_active |= IFM_100_T4;
380 			else if (anlpar & ANLPAR_TX_FD &&
381 			    sc->mii_capabilities & BMSR_100TXFDX)
382 				mii->mii_media_active |= IFM_100_TX|IFM_FDX;
383 			else if (anlpar & ANLPAR_TX &&
384 			    sc->mii_capabilities & BMSR_100TXHDX)
385 				mii->mii_media_active |= IFM_100_TX;
386 			else if (anlpar & ANLPAR_10_FD)
387 				mii->mii_media_active |= IFM_10_T|IFM_FDX;
388 			else if (anlpar & ANLPAR_10)
389 				mii->mii_media_active |= IFM_10_T;
390 			else
391 				mii->mii_media_active |= IFM_NONE;
392 			if (DC_IS_INTEL(dc_sc))
393 				DC_CLRBIT(dc_sc, DC_10BTCTRL,
394 				    DC_TCTL_AUTONEGENBL);
395 			return;
396 		}
397 		/*
398 		 * If the other side doesn't support NWAY, then the
399 		 * best we can do is determine if we have a 10Mbps or
400 		 * 100Mbps link. There's no way to know if the link
401 		 * is full or half duplex, so we default to half duplex
402 		 * and hope that the user is clever enough to manually
403 		 * change the media settings if we're wrong.
404 		 */
405 		if (!(reg & DC_TSTAT_LS100))
406 			mii->mii_media_active |= IFM_100_TX;
407 		else if (!(reg & DC_TSTAT_LS10))
408 			mii->mii_media_active |= IFM_10_T;
409 		else
410 			mii->mii_media_active |= IFM_NONE;
411 		if (DC_IS_INTEL(dc_sc))
412 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
413 		return;
414 	}
415 
416 skip:
417 
418 	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)
419 		mii->mii_media_active |= IFM_10_T;
420 	else
421 		mii->mii_media_active |= IFM_100_TX;
422 	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)
423 		mii->mii_media_active |= IFM_FDX;
424 
425 	return;
426 }
427 
428 static int
429 dcphy_auto(mii)
430 	struct mii_softc	*mii;
431 {
432 	struct dc_softc		*sc;
433 
434 	sc = mii->mii_pdata->mii_ifp->if_softc;
435 
436 	DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
437 	DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
438 	DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
439 	if (mii->mii_capabilities & BMSR_100TXHDX)
440 		CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF);
441 	else
442 		CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF);
443 	DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
444 	DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
445 	DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
446 
447 	return(EJUSTRETURN);
448 }
449 
450 static void
451 dcphy_reset(mii)
452 	struct mii_softc	*mii;
453 {
454 	struct dc_softc		*sc;
455 
456 	sc = mii->mii_pdata->mii_ifp->if_softc;
457 
458 	DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
459 	DELAY(1000);
460 	DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
461 
462 	return;
463 }
464 
465