xref: /freebsd/sys/dev/dc/dcphy.c (revision 74bf4e164ba5851606a27d4feff27717452583e5)
1 /*
2  * Copyright (c) 1997, 1998, 1999
3  *	Bill Paul <wpaul@ee.columbia.edu>.  All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  * 3. All advertising materials mentioning features or use of this software
14  *    must display the following acknowledgement:
15  *	This product includes software developed by Bill Paul.
16  * 4. Neither the name of the author nor the names of any co-contributors
17  *    may be used to endorse or promote products derived from this software
18  *    without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30  * THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
35 
36 /*
37  * Pseudo-driver for internal NWAY support on DEC 21143 and workalike
38  * controllers. Technically we're abusing the miibus code to handle
39  * media selection and NWAY support here since there is no MII
40  * interface. However the logical operations are roughly the same,
41  * and the alternative is to create a fake MII interface in the driver,
42  * which is harder to do.
43  */
44 
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/kernel.h>
48 #include <sys/socket.h>
49 #include <sys/errno.h>
50 #include <sys/lock.h>
51 #include <sys/module.h>
52 #include <sys/mutex.h>
53 #include <sys/bus.h>
54 
55 #include <net/if.h>
56 #include <net/if_arp.h>
57 #include <net/if_media.h>
58 
59 #include <dev/mii/mii.h>
60 #include <dev/mii/miivar.h>
61 #include "miidevs.h"
62 
63 #include <machine/bus_pio.h>
64 #include <machine/bus_memio.h>
65 #include <machine/bus.h>
66 #include <machine/resource.h>
67 #include <sys/bus.h>
68 
69 #include <dev/pci/pcivar.h>
70 
71 #include <pci/if_dcreg.h>
72 
73 #include "miibus_if.h"
74 
75 #define DC_SETBIT(sc, reg, x)                           \
76         CSR_WRITE_4(sc, reg,                            \
77                 CSR_READ_4(sc, reg) | x)
78 
79 #define DC_CLRBIT(sc, reg, x)                           \
80         CSR_WRITE_4(sc, reg,                            \
81                 CSR_READ_4(sc, reg) & ~x)
82 
83 #define MIIF_AUTOTIMEOUT	0x0004
84 
85 /*
86  * This is the subsystem ID for the built-in 21143 ethernet
87  * in several Compaq Presario systems. Apparently these are
88  * 10Mbps only, so we need to treat them specially.
89  */
90 #define COMPAQ_PRESARIO_ID	0xb0bb0e11
91 
92 static int dcphy_probe(device_t);
93 static int dcphy_attach(device_t);
94 
95 static device_method_t dcphy_methods[] = {
96 	/* device interface */
97 	DEVMETHOD(device_probe,		dcphy_probe),
98 	DEVMETHOD(device_attach,	dcphy_attach),
99 	DEVMETHOD(device_detach,	mii_phy_detach),
100 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
101 	{ 0, 0 }
102 };
103 
104 static devclass_t dcphy_devclass;
105 
106 static driver_t dcphy_driver = {
107 	"dcphy",
108 	dcphy_methods,
109 	sizeof(struct mii_softc)
110 };
111 
112 DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0);
113 
114 static int	dcphy_service(struct mii_softc *, struct mii_data *, int);
115 static void	dcphy_status(struct mii_softc *);
116 static void	dcphy_reset(struct mii_softc *);
117 static int	dcphy_auto(struct mii_softc *);
118 
119 static int
120 dcphy_probe(dev)
121 	device_t		dev;
122 {
123 	struct mii_attach_args *ma;
124 
125 	ma = device_get_ivars(dev);
126 
127 	/*
128 	 * The dc driver will report the 21143 vendor and device
129 	 * ID to let us know that it wants us to attach.
130 	 */
131 	if (ma->mii_id1 != DC_VENDORID_DEC ||
132 	    ma->mii_id2 != DC_DEVICEID_21143)
133 		return(ENXIO);
134 
135 	device_set_desc(dev, "Intel 21143 NWAY media interface");
136 
137 	return (0);
138 }
139 
140 static int
141 dcphy_attach(dev)
142 	device_t		dev;
143 {
144 	struct mii_softc *sc;
145 	struct mii_attach_args *ma;
146 	struct mii_data *mii;
147 	struct dc_softc		*dc_sc;
148 
149 	sc = device_get_softc(dev);
150 	ma = device_get_ivars(dev);
151 	sc->mii_dev = device_get_parent(dev);
152 	mii = device_get_softc(sc->mii_dev);
153 	LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
154 
155 	sc->mii_inst = mii->mii_instance;
156 	sc->mii_phy = ma->mii_phyno;
157 	sc->mii_service = dcphy_service;
158 	sc->mii_pdata = mii;
159 
160 	sc->mii_flags |= MIIF_NOISOLATE;
161 	mii->mii_instance++;
162 
163 #define	ADD(m, c)	ifmedia_add(&mii->mii_media, (m), (c), NULL)
164 
165 	ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
166 	    BMCR_ISO);
167 
168 	/*dcphy_reset(sc);*/
169 	dc_sc = mii->mii_ifp->if_softc;
170 	CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
171 	CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
172 
173 	switch(pci_read_config(device_get_parent(sc->mii_dev),
174 	    DC_PCI_CSID, 4)) {
175 	case COMPAQ_PRESARIO_ID:
176 		/* Example of how to only allow 10Mbps modes. */
177 		sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
178 		break;
179 	default:
180 		if (dc_sc->dc_pmode == DC_PMODE_SIA) {
181 			sc->mii_capabilities =
182 			    BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
183 		} else {
184 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP,
185 			    sc->mii_inst), BMCR_LOOP|BMCR_S100);
186 
187 			sc->mii_capabilities =
188 			    BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX|
189 			    BMSR_10TFDX|BMSR_10THDX;
190 		}
191 		break;
192 	}
193 
194 	sc->mii_capabilities &= ma->mii_capmask;
195 	device_printf(dev, " ");
196 	mii_add_media(sc);
197 	printf("\n");
198 #undef ADD
199 
200 	MIIBUS_MEDIAINIT(sc->mii_dev);
201 	return(0);
202 }
203 
204 static int
205 dcphy_service(sc, mii, cmd)
206 	struct mii_softc *sc;
207 	struct mii_data *mii;
208 	int cmd;
209 {
210 	struct dc_softc		*dc_sc;
211 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
212 	int reg;
213 	u_int32_t		mode;
214 
215 	dc_sc = mii->mii_ifp->if_softc;
216 
217 	switch (cmd) {
218 	case MII_POLLSTAT:
219 		/*
220 		 * If we're not polling our PHY instance, just return.
221 		 */
222 		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
223 			return (0);
224 		}
225 		break;
226 
227 	case MII_MEDIACHG:
228 		/*
229 		 * If the media indicates a different PHY instance,
230 		 * isolate ourselves.
231 		 */
232 		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
233 			return (0);
234 		}
235 
236 		/*
237 		 * If the interface is not up, don't do anything.
238 		 */
239 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
240 			break;
241 
242 		sc->mii_flags = 0;
243 		mii->mii_media_active = IFM_NONE;
244 		mode = CSR_READ_4(dc_sc, DC_NETCFG);
245 		mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL|
246 		    DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL);
247 
248 		switch (IFM_SUBTYPE(ife->ifm_media)) {
249 		case IFM_AUTO:
250 			/*dcphy_reset(sc);*/
251 			(void) dcphy_auto(sc);
252 			break;
253 		case IFM_100_T4:
254 			/*
255 			 * XXX Not supported as a manual setting right now.
256 			 */
257 			return (EINVAL);
258 		case IFM_100_TX:
259 			dcphy_reset(sc);
260 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
261 			mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS|
262 			    DC_NETCFG_SCRAMBLER;
263 			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
264 				mode |= DC_NETCFG_FULLDUPLEX;
265 			else
266 				mode &= ~DC_NETCFG_FULLDUPLEX;
267 			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
268 			break;
269 		case IFM_10_T:
270 			DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
271 			DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
272 			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
273 				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
274 			else
275 				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
276 			DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
277 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
278 			mode &= ~DC_NETCFG_PORTSEL;
279 			mode |= DC_NETCFG_SPEEDSEL;
280 			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
281 				mode |= DC_NETCFG_FULLDUPLEX;
282 			else
283 				mode &= ~DC_NETCFG_FULLDUPLEX;
284 			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
285 			break;
286 		default:
287 			return(EINVAL);
288 		}
289 		break;
290 
291 	case MII_TICK:
292 		/*
293 		 * If we're not currently selected, just return.
294 		 */
295 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
296 			return (0);
297 
298 		/*
299 		 * Is the interface even up?
300 		 */
301 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
302 			return (0);
303 
304 		/*
305 		 * Only used for autonegotiation.
306 		 */
307 		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
308 			break;
309 
310 		reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
311 		if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
312 			break;
313 
314                 /*
315                  * Only retry autonegotiation every 5 seconds.
316 		 *
317 		 * Otherwise, fall through to calling dcphy_status()
318 		 * since real Intel 21143 chips don't show valid link
319 		 * status until autonegotiation is switched off, and
320 		 * that only happens in dcphy_status().  Without this,
321 		 * successful autonegotiation is never recognised on
322 		 * these chips.
323                  */
324                 if (++sc->mii_ticks <= 50)
325 			break;
326 
327 		sc->mii_ticks = 0;
328 		dcphy_auto(sc);
329 
330 		break;
331 	}
332 
333 	/* Update the media status. */
334 	dcphy_status(sc);
335 
336 	/* Callback if something changed. */
337 	mii_phy_update(sc, cmd);
338 	return (0);
339 }
340 
341 static void
342 dcphy_status(sc)
343 	struct mii_softc *sc;
344 {
345 	struct mii_data *mii = sc->mii_pdata;
346 	int reg, anlpar, tstat = 0;
347 	struct dc_softc		*dc_sc;
348 
349 	dc_sc = mii->mii_ifp->if_softc;
350 
351 	mii->mii_media_status = IFM_AVALID;
352 	mii->mii_media_active = IFM_ETHER;
353 
354 	if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
355 		return;
356 
357 	reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
358 	if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
359 		mii->mii_media_status |= IFM_ACTIVE;
360 
361 	if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {
362 		/* Erg, still trying, I guess... */
363 		tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);
364 		if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) {
365 			if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&
366 			    (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE)
367 				goto skip;
368 			mii->mii_media_active |= IFM_NONE;
369 			return;
370 		}
371 
372 		if (tstat & DC_TSTAT_LP_CAN_NWAY) {
373 			anlpar = tstat >> 16;
374 			if (anlpar & ANLPAR_T4 &&
375 			    sc->mii_capabilities & BMSR_100TXHDX)
376 				mii->mii_media_active |= IFM_100_T4;
377 			else if (anlpar & ANLPAR_TX_FD &&
378 			    sc->mii_capabilities & BMSR_100TXFDX)
379 				mii->mii_media_active |= IFM_100_TX|IFM_FDX;
380 			else if (anlpar & ANLPAR_TX &&
381 			    sc->mii_capabilities & BMSR_100TXHDX)
382 				mii->mii_media_active |= IFM_100_TX;
383 			else if (anlpar & ANLPAR_10_FD)
384 				mii->mii_media_active |= IFM_10_T|IFM_FDX;
385 			else if (anlpar & ANLPAR_10)
386 				mii->mii_media_active |= IFM_10_T;
387 			else
388 				mii->mii_media_active |= IFM_NONE;
389 			if (DC_IS_INTEL(dc_sc))
390 				DC_CLRBIT(dc_sc, DC_10BTCTRL,
391 				    DC_TCTL_AUTONEGENBL);
392 			return;
393 		}
394 		/*
395 		 * If the other side doesn't support NWAY, then the
396 		 * best we can do is determine if we have a 10Mbps or
397 		 * 100Mbps link. There's no way to know if the link
398 		 * is full or half duplex, so we default to half duplex
399 		 * and hope that the user is clever enough to manually
400 		 * change the media settings if we're wrong.
401 		 */
402 		if (!(reg & DC_TSTAT_LS100))
403 			mii->mii_media_active |= IFM_100_TX;
404 		else if (!(reg & DC_TSTAT_LS10))
405 			mii->mii_media_active |= IFM_10_T;
406 		else
407 			mii->mii_media_active |= IFM_NONE;
408 		if (DC_IS_INTEL(dc_sc))
409 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
410 		return;
411 	}
412 
413 skip:
414 
415 	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)
416 		mii->mii_media_active |= IFM_10_T;
417 	else
418 		mii->mii_media_active |= IFM_100_TX;
419 	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)
420 		mii->mii_media_active |= IFM_FDX;
421 
422 	return;
423 }
424 
425 static int
426 dcphy_auto(mii)
427 	struct mii_softc	*mii;
428 {
429 	struct dc_softc		*sc;
430 
431 	sc = mii->mii_pdata->mii_ifp->if_softc;
432 
433 	DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
434 	DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
435 	DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
436 	if (mii->mii_capabilities & BMSR_100TXHDX)
437 		CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF);
438 	else
439 		CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF);
440 	DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
441 	DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
442 	DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
443 
444 	return(EJUSTRETURN);
445 }
446 
447 static void
448 dcphy_reset(mii)
449 	struct mii_softc	*mii;
450 {
451 	struct dc_softc		*sc;
452 
453 	sc = mii->mii_pdata->mii_ifp->if_softc;
454 
455 	DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
456 	DELAY(1000);
457 	DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
458 
459 	return;
460 }
461 
462