1 /* 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * $FreeBSD$ 33 */ 34 35 /* 36 * Pseudo-driver for internal NWAY support on DEC 21143 and workalike 37 * controllers. Technically we're abusing the miibus code to handle 38 * media selection and NWAY support here since there is no MII 39 * interface. However the logical operations are roughly the same, 40 * and the alternative is to create a fake MII interface in the driver, 41 * which is harder to do. 42 */ 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/socket.h> 48 #include <sys/errno.h> 49 #include <sys/module.h> 50 #include <sys/bus.h> 51 52 #include <net/if.h> 53 #include <net/if_arp.h> 54 #include <net/if_media.h> 55 56 #include <dev/mii/mii.h> 57 #include <dev/mii/miivar.h> 58 #include <dev/mii/miidevs.h> 59 60 #include <machine/clock.h> 61 #include <machine/bus_pio.h> 62 #include <machine/bus_memio.h> 63 #include <machine/bus.h> 64 #include <machine/resource.h> 65 #include <sys/bus.h> 66 67 #include <pci/pcivar.h> 68 69 #include <pci/if_dcreg.h> 70 71 #include "miibus_if.h" 72 73 #if !defined(lint) 74 static const char rcsid[] = 75 "$FreeBSD$"; 76 #endif 77 78 #define DC_SETBIT(sc, reg, x) \ 79 CSR_WRITE_4(sc, reg, \ 80 CSR_READ_4(sc, reg) | x) 81 82 #define DC_CLRBIT(sc, reg, x) \ 83 CSR_WRITE_4(sc, reg, \ 84 CSR_READ_4(sc, reg) & ~x) 85 86 #define MIIF_AUTOTIMEOUT 0x0004 87 88 /* 89 * This is the subsystem ID for the built-in 21143 ethernet 90 * in several Compaq Presario systems. Apparently these are 91 * 10Mbps only, so we need to treat them specially. 92 */ 93 #define COMPAQ_PRESARIO_ID 0xb0bb0e11 94 95 static int dcphy_probe __P((device_t)); 96 static int dcphy_attach __P((device_t)); 97 static int dcphy_detach __P((device_t)); 98 99 static device_method_t dcphy_methods[] = { 100 /* device interface */ 101 DEVMETHOD(device_probe, dcphy_probe), 102 DEVMETHOD(device_attach, dcphy_attach), 103 DEVMETHOD(device_detach, dcphy_detach), 104 DEVMETHOD(device_shutdown, bus_generic_shutdown), 105 { 0, 0 } 106 }; 107 108 static devclass_t dcphy_devclass; 109 110 static driver_t dcphy_driver = { 111 "dcphy", 112 dcphy_methods, 113 sizeof(struct mii_softc) 114 }; 115 116 DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0); 117 118 int dcphy_service __P((struct mii_softc *, struct mii_data *, int)); 119 void dcphy_status __P((struct mii_softc *)); 120 static int dcphy_auto __P((struct mii_softc *, int)); 121 static void dcphy_reset __P((struct mii_softc *)); 122 123 static int dcphy_probe(dev) 124 device_t dev; 125 { 126 struct mii_attach_args *ma; 127 128 ma = device_get_ivars(dev); 129 130 /* 131 * The dc driver will report the 21143 vendor and device 132 * ID to let us know that it wants us to attach. 133 */ 134 if (ma->mii_id1 != DC_VENDORID_DEC || 135 ma->mii_id2 != DC_DEVICEID_21143) 136 return(ENXIO); 137 138 device_set_desc(dev, "Intel 21143 NWAY media interface"); 139 140 return (0); 141 } 142 143 static int dcphy_attach(dev) 144 device_t dev; 145 { 146 struct mii_softc *sc; 147 struct mii_attach_args *ma; 148 struct mii_data *mii; 149 struct dc_softc *dc_sc; 150 151 sc = device_get_softc(dev); 152 ma = device_get_ivars(dev); 153 sc->mii_dev = device_get_parent(dev); 154 mii = device_get_softc(sc->mii_dev); 155 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 156 157 sc->mii_inst = mii->mii_instance; 158 sc->mii_phy = ma->mii_phyno; 159 sc->mii_service = dcphy_service; 160 sc->mii_pdata = mii; 161 162 sc->mii_flags |= MIIF_NOISOLATE; 163 mii->mii_instance++; 164 165 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 166 167 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 168 BMCR_ISO); 169 170 /*dcphy_reset(sc);*/ 171 dc_sc = mii->mii_ifp->if_softc; 172 CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0); 173 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0); 174 175 switch(pci_read_config(device_get_parent(sc->mii_dev), 176 DC_PCI_CSID, 4)) { 177 case COMPAQ_PRESARIO_ID: 178 /* Example of how to only allow 10Mbps modes. */ 179 sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; 180 break; 181 default: 182 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, 183 sc->mii_inst), BMCR_LOOP|BMCR_S100); 184 185 sc->mii_capabilities = 186 BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX| 187 BMSR_10TFDX|BMSR_10THDX; 188 break; 189 } 190 191 sc->mii_capabilities &= ma->mii_capmask; 192 device_printf(dev, " "); 193 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0) 194 printf("no media present"); 195 else 196 mii_add_media(mii, sc->mii_capabilities, sc->mii_inst); 197 printf("\n"); 198 #undef ADD 199 200 MIIBUS_MEDIAINIT(sc->mii_dev); 201 return(0); 202 } 203 204 static int dcphy_detach(dev) 205 device_t dev; 206 { 207 struct mii_softc *sc; 208 struct mii_data *mii; 209 210 sc = device_get_softc(dev); 211 mii = device_get_softc(device_get_parent(dev)); 212 sc->mii_dev = NULL; 213 LIST_REMOVE(sc, mii_list); 214 215 return(0); 216 } 217 218 int 219 dcphy_service(sc, mii, cmd) 220 struct mii_softc *sc; 221 struct mii_data *mii; 222 int cmd; 223 { 224 struct dc_softc *dc_sc; 225 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 226 int reg; 227 u_int32_t mode; 228 229 dc_sc = mii->mii_ifp->if_softc; 230 231 switch (cmd) { 232 case MII_POLLSTAT: 233 /* 234 * If we're not polling our PHY instance, just return. 235 */ 236 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 237 return (0); 238 } 239 break; 240 241 case MII_MEDIACHG: 242 /* 243 * If the media indicates a different PHY instance, 244 * isolate ourselves. 245 */ 246 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 247 return (0); 248 } 249 250 /* 251 * If the interface is not up, don't do anything. 252 */ 253 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 254 break; 255 256 sc->mii_flags = 0; 257 mii->mii_media_active = IFM_NONE; 258 mode = CSR_READ_4(dc_sc, DC_NETCFG); 259 mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL| 260 DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL); 261 262 switch (IFM_SUBTYPE(ife->ifm_media)) { 263 case IFM_AUTO: 264 /*dcphy_reset(sc);*/ 265 (void) dcphy_auto(sc, 0); 266 break; 267 case IFM_100_T4: 268 /* 269 * XXX Not supported as a manual setting right now. 270 */ 271 return (EINVAL); 272 case IFM_100_TX: 273 dcphy_reset(sc); 274 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 275 mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS| 276 DC_NETCFG_SCRAMBLER; 277 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 278 mode |= DC_NETCFG_FULLDUPLEX; 279 else 280 mode &= ~DC_NETCFG_FULLDUPLEX; 281 CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 282 break; 283 case IFM_10_T: 284 DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 285 DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF); 286 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 287 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D); 288 else 289 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F); 290 DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 291 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 292 mode &= ~DC_NETCFG_PORTSEL; 293 mode |= DC_NETCFG_SPEEDSEL; 294 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 295 mode |= DC_NETCFG_FULLDUPLEX; 296 else 297 mode &= ~DC_NETCFG_FULLDUPLEX; 298 CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 299 break; 300 default: 301 return(EINVAL); 302 break; 303 } 304 break; 305 306 case MII_TICK: 307 /* 308 * If we're not currently selected, just return. 309 */ 310 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 311 return (0); 312 313 /* 314 * Only used for autonegotiation. 315 */ 316 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 317 return (0); 318 319 /* 320 * Is the interface even up? 321 */ 322 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 323 return (0); 324 325 if (sc->mii_flags & MIIF_DOINGAUTO) { 326 if (++sc->mii_ticks != 5) 327 return(0); 328 else { 329 sc->mii_ticks = 0; 330 sc->mii_flags &= ~MIIF_DOINGAUTO; 331 sc->mii_flags |= MIIF_AUTOTIMEOUT; 332 } 333 } 334 335 sc->mii_flags &= ~MIIF_DOINGAUTO; 336 337 /* 338 * Check to see if we have link. If we do, we don't 339 * need to restart the autonegotiation process. Read 340 * the BMSR twice in case it's latched. 341 */ 342 reg = CSR_READ_4(dc_sc, DC_10BTSTAT) & 343 (DC_TSTAT_LS10|DC_TSTAT_LS100); 344 345 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX && 346 !(reg & DC_TSTAT_LS100)) { 347 if (sc->mii_flags & MIIF_AUTOTIMEOUT) { 348 sc->mii_flags &= ~MIIF_AUTOTIMEOUT; 349 break; 350 } else 351 return(0); 352 } else if (IFM_SUBTYPE(mii->mii_media_active) == IFM_10_T && 353 !(reg & DC_TSTAT_LS10)) { 354 if (sc->mii_flags & MIIF_AUTOTIMEOUT) { 355 sc->mii_flags &= ~MIIF_AUTOTIMEOUT; 356 break; 357 } else 358 return(0); 359 } else if (IFM_SUBTYPE(mii->mii_media_active) == IFM_NONE && 360 (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))) { 361 if (sc->mii_flags & MIIF_AUTOTIMEOUT) { 362 sc->mii_flags &= ~MIIF_AUTOTIMEOUT; 363 break; 364 } else 365 return(0); 366 } else if (CSR_READ_4(dc_sc, DC_ISR) & DC_ISR_LINKGOOD) { 367 if (sc->mii_flags & MIIF_AUTOTIMEOUT) { 368 sc->mii_flags &= ~MIIF_AUTOTIMEOUT; 369 break; 370 } else 371 return(0); 372 } 373 374 sc->mii_ticks = 0; 375 /*dcphy_reset(sc);*/ 376 dcphy_auto(sc, 0); 377 378 break; 379 } 380 381 /* Update the media status. */ 382 dcphy_status(sc); 383 384 /* Callback if something changed. */ 385 if (sc->mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) { 386 MIIBUS_STATCHG(sc->mii_dev); 387 sc->mii_active = mii->mii_media_active; 388 } 389 return (0); 390 } 391 392 void 393 dcphy_status(sc) 394 struct mii_softc *sc; 395 { 396 struct mii_data *mii = sc->mii_pdata; 397 int reg, anlpar; 398 struct dc_softc *dc_sc; 399 400 dc_sc = mii->mii_ifp->if_softc; 401 402 mii->mii_media_status = IFM_AVALID; 403 mii->mii_media_active = IFM_ETHER; 404 405 reg = CSR_READ_4(dc_sc, DC_10BTSTAT) & 406 (DC_TSTAT_LS10|DC_TSTAT_LS100); 407 408 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) 409 mii->mii_media_status |= IFM_ACTIVE; 410 411 if (sc->mii_flags & MIIF_DOINGAUTO) { 412 mii->mii_media_active |= IFM_NONE; 413 return; 414 } 415 416 if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL && 417 CSR_READ_4(dc_sc, DC_10BTSTAT) & DC_TSTAT_ANEGSTAT) { 418 /* Erg, still trying, I guess... */ 419 if ((CSR_READ_4(dc_sc, DC_10BTSTAT) & 420 DC_ASTAT_AUTONEGCMP) != DC_ASTAT_AUTONEGCMP) { 421 mii->mii_media_active |= IFM_NONE; 422 return; 423 } 424 425 if (CSR_READ_4(dc_sc, DC_10BTSTAT) & DC_TSTAT_LP_CAN_NWAY) { 426 anlpar = CSR_READ_4(dc_sc, DC_10BTSTAT) >> 16; 427 if (anlpar & ANLPAR_T4 && 428 sc->mii_capabilities & BMSR_100TXHDX) 429 mii->mii_media_active |= IFM_100_T4; 430 else if (anlpar & ANLPAR_TX_FD && 431 sc->mii_capabilities & BMSR_100TXHDX) 432 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 433 else if (anlpar & ANLPAR_TX && 434 sc->mii_capabilities & BMSR_100TXHDX) 435 mii->mii_media_active |= IFM_100_TX; 436 else if (anlpar & ANLPAR_10_FD) 437 mii->mii_media_active |= IFM_10_T|IFM_FDX; 438 else if (anlpar & ANLPAR_10) 439 mii->mii_media_active |= IFM_10_T; 440 else 441 mii->mii_media_active |= IFM_NONE; 442 if (DC_IS_INTEL(dc_sc)) 443 DC_CLRBIT(dc_sc, DC_10BTCTRL, 444 DC_TCTL_AUTONEGENBL); 445 return; 446 } 447 /* 448 * If the other side doesn't support NWAY, then the 449 * best we can do is determine if we have a 10Mbps or 450 * 100Mbps link. There's no way to know if the link 451 * is full or half duplex, so we default to half duplex 452 * and hope that the user is clever enough to manually 453 * change the media settings if we're wrong. 454 */ 455 if (!(reg & DC_TSTAT_LS100)) 456 mii->mii_media_active |= IFM_100_TX; 457 else if (!(reg & DC_TSTAT_LS10)) 458 mii->mii_media_active |= IFM_10_T; 459 else 460 mii->mii_media_active |= IFM_NONE; 461 if (DC_IS_INTEL(dc_sc)) 462 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 463 return; 464 } 465 466 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SCRAMBLER) 467 mii->mii_media_active |= IFM_100_TX; 468 else 469 mii->mii_media_active |= IFM_10_T; 470 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX) 471 mii->mii_media_active |= IFM_FDX; 472 473 return; 474 } 475 476 static int 477 dcphy_auto(mii, waitfor) 478 struct mii_softc *mii; 479 int waitfor; 480 { 481 int i; 482 struct dc_softc *sc; 483 484 sc = mii->mii_pdata->mii_ifp->if_softc; 485 486 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) { 487 DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL); 488 DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX); 489 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); 490 if (mii->mii_capabilities & BMSR_100TXHDX) 491 CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF); 492 else 493 CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF); 494 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); 495 DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 496 DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE); 497 } 498 499 if (waitfor) { 500 /* Wait 500ms for it to complete. */ 501 for (i = 0; i < 500; i++) { 502 if ((CSR_READ_4(sc, DC_10BTSTAT) & DC_TSTAT_ANEGSTAT) 503 == DC_ASTAT_AUTONEGCMP) 504 return(0); 505 DELAY(1000); 506 } 507 /* 508 * Don't need to worry about clearing MIIF_DOINGAUTO. 509 * If that's set, a timeout is pending, and it will 510 * clear the flag. 511 */ 512 return(EIO); 513 } 514 515 /* 516 * Just let it finish asynchronously. This is for the benefit of 517 * the tick handler driving autonegotiation. Don't want 500ms 518 * delays all the time while the system is running! 519 */ 520 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) 521 mii->mii_flags |= MIIF_DOINGAUTO; 522 523 return(EJUSTRETURN); 524 } 525 526 static void 527 dcphy_reset(mii) 528 struct mii_softc *mii; 529 { 530 struct dc_softc *sc; 531 532 sc = mii->mii_pdata->mii_ifp->if_softc; 533 534 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); 535 DELAY(1000); 536 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); 537 538 return; 539 } 540 541