196f2e892SBill Paul /* 296f2e892SBill Paul * Copyright (c) 1997, 1998, 1999 396f2e892SBill Paul * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 496f2e892SBill Paul * 596f2e892SBill Paul * Redistribution and use in source and binary forms, with or without 696f2e892SBill Paul * modification, are permitted provided that the following conditions 796f2e892SBill Paul * are met: 896f2e892SBill Paul * 1. Redistributions of source code must retain the above copyright 996f2e892SBill Paul * notice, this list of conditions and the following disclaimer. 1096f2e892SBill Paul * 2. Redistributions in binary form must reproduce the above copyright 1196f2e892SBill Paul * notice, this list of conditions and the following disclaimer in the 1296f2e892SBill Paul * documentation and/or other materials provided with the distribution. 1396f2e892SBill Paul * 3. All advertising materials mentioning features or use of this software 1496f2e892SBill Paul * must display the following acknowledgement: 1596f2e892SBill Paul * This product includes software developed by Bill Paul. 1696f2e892SBill Paul * 4. Neither the name of the author nor the names of any co-contributors 1796f2e892SBill Paul * may be used to endorse or promote products derived from this software 1896f2e892SBill Paul * without specific prior written permission. 1996f2e892SBill Paul * 2096f2e892SBill Paul * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 2196f2e892SBill Paul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2296f2e892SBill Paul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2396f2e892SBill Paul * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 2496f2e892SBill Paul * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2596f2e892SBill Paul * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2696f2e892SBill Paul * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2796f2e892SBill Paul * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2896f2e892SBill Paul * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2996f2e892SBill Paul * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 3096f2e892SBill Paul * THE POSSIBILITY OF SUCH DAMAGE. 3196f2e892SBill Paul */ 3296f2e892SBill Paul 33aad970f1SDavid E. O'Brien #include <sys/cdefs.h> 34aad970f1SDavid E. O'Brien __FBSDID("$FreeBSD$"); 35aad970f1SDavid E. O'Brien 3696f2e892SBill Paul /* 3796f2e892SBill Paul * Pseudo-driver for internal NWAY support on DEC 21143 and workalike 3896f2e892SBill Paul * controllers. Technically we're abusing the miibus code to handle 3996f2e892SBill Paul * media selection and NWAY support here since there is no MII 4096f2e892SBill Paul * interface. However the logical operations are roughly the same, 4196f2e892SBill Paul * and the alternative is to create a fake MII interface in the driver, 4296f2e892SBill Paul * which is harder to do. 4396f2e892SBill Paul */ 4496f2e892SBill Paul 458368cf8fSDavid E. O'Brien #include <sys/cdefs.h> 468368cf8fSDavid E. O'Brien __FBSDID("$FreeBSD$"); 478368cf8fSDavid E. O'Brien 4896f2e892SBill Paul #include <sys/param.h> 4996f2e892SBill Paul #include <sys/systm.h> 5096f2e892SBill Paul #include <sys/kernel.h> 5196f2e892SBill Paul #include <sys/socket.h> 5296f2e892SBill Paul #include <sys/errno.h> 53f34fa851SJohn Baldwin #include <sys/lock.h> 5496f2e892SBill Paul #include <sys/module.h> 5535e0e5b3SJohn Baldwin #include <sys/mutex.h> 5696f2e892SBill Paul #include <sys/bus.h> 5796f2e892SBill Paul 5896f2e892SBill Paul #include <net/if.h> 5996f2e892SBill Paul #include <net/if_arp.h> 6096f2e892SBill Paul #include <net/if_media.h> 6196f2e892SBill Paul 6296f2e892SBill Paul #include <dev/mii/mii.h> 6396f2e892SBill Paul #include <dev/mii/miivar.h> 642d3ce713SDavid E. O'Brien #include "miidevs.h" 6596f2e892SBill Paul 6696f2e892SBill Paul #include <machine/bus_pio.h> 6796f2e892SBill Paul #include <machine/bus_memio.h> 6896f2e892SBill Paul #include <machine/bus.h> 6996f2e892SBill Paul #include <machine/resource.h> 7096f2e892SBill Paul #include <sys/bus.h> 7196f2e892SBill Paul 7238d8c994SWarner Losh #include <dev/pci/pcivar.h> 7396f2e892SBill Paul 7496f2e892SBill Paul #include <pci/if_dcreg.h> 7596f2e892SBill Paul 7696f2e892SBill Paul #include "miibus_if.h" 7796f2e892SBill Paul 7896f2e892SBill Paul #define DC_SETBIT(sc, reg, x) \ 7996f2e892SBill Paul CSR_WRITE_4(sc, reg, \ 8096f2e892SBill Paul CSR_READ_4(sc, reg) | x) 8196f2e892SBill Paul 8296f2e892SBill Paul #define DC_CLRBIT(sc, reg, x) \ 8396f2e892SBill Paul CSR_WRITE_4(sc, reg, \ 8496f2e892SBill Paul CSR_READ_4(sc, reg) & ~x) 8596f2e892SBill Paul 8696f2e892SBill Paul #define MIIF_AUTOTIMEOUT 0x0004 8796f2e892SBill Paul 8891cc2adbSBill Paul /* 8991cc2adbSBill Paul * This is the subsystem ID for the built-in 21143 ethernet 9091cc2adbSBill Paul * in several Compaq Presario systems. Apparently these are 9191cc2adbSBill Paul * 10Mbps only, so we need to treat them specially. 9291cc2adbSBill Paul */ 9391cc2adbSBill Paul #define COMPAQ_PRESARIO_ID 0xb0bb0e11 9491cc2adbSBill Paul 95e51a25f8SAlfred Perlstein static int dcphy_probe(device_t); 96e51a25f8SAlfred Perlstein static int dcphy_attach(device_t); 9796f2e892SBill Paul 9896f2e892SBill Paul static device_method_t dcphy_methods[] = { 9996f2e892SBill Paul /* device interface */ 10096f2e892SBill Paul DEVMETHOD(device_probe, dcphy_probe), 10196f2e892SBill Paul DEVMETHOD(device_attach, dcphy_attach), 102279fe8d1SPoul-Henning Kamp DEVMETHOD(device_detach, mii_phy_detach), 10396f2e892SBill Paul DEVMETHOD(device_shutdown, bus_generic_shutdown), 10496f2e892SBill Paul { 0, 0 } 10596f2e892SBill Paul }; 10696f2e892SBill Paul 10796f2e892SBill Paul static devclass_t dcphy_devclass; 10896f2e892SBill Paul 10996f2e892SBill Paul static driver_t dcphy_driver = { 11096f2e892SBill Paul "dcphy", 11196f2e892SBill Paul dcphy_methods, 11296f2e892SBill Paul sizeof(struct mii_softc) 11396f2e892SBill Paul }; 11496f2e892SBill Paul 11596f2e892SBill Paul DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0); 11696f2e892SBill Paul 117e51a25f8SAlfred Perlstein static int dcphy_service(struct mii_softc *, struct mii_data *, int); 118e51a25f8SAlfred Perlstein static void dcphy_status(struct mii_softc *); 119e51a25f8SAlfred Perlstein static void dcphy_reset(struct mii_softc *); 120fd94424cSPoul-Henning Kamp static int dcphy_auto(struct mii_softc *); 12196f2e892SBill Paul 1229c1c2e99SAlfred Perlstein static int 1239c1c2e99SAlfred Perlstein dcphy_probe(dev) 12496f2e892SBill Paul device_t dev; 12596f2e892SBill Paul { 12696f2e892SBill Paul struct mii_attach_args *ma; 12796f2e892SBill Paul 12896f2e892SBill Paul ma = device_get_ivars(dev); 12996f2e892SBill Paul 13096f2e892SBill Paul /* 13196f2e892SBill Paul * The dc driver will report the 21143 vendor and device 13296f2e892SBill Paul * ID to let us know that it wants us to attach. 13396f2e892SBill Paul */ 13496f2e892SBill Paul if (ma->mii_id1 != DC_VENDORID_DEC || 13596f2e892SBill Paul ma->mii_id2 != DC_DEVICEID_21143) 13696f2e892SBill Paul return(ENXIO); 13796f2e892SBill Paul 13896f2e892SBill Paul device_set_desc(dev, "Intel 21143 NWAY media interface"); 13996f2e892SBill Paul 14096f2e892SBill Paul return (0); 14196f2e892SBill Paul } 14296f2e892SBill Paul 1439c1c2e99SAlfred Perlstein static int 1449c1c2e99SAlfred Perlstein dcphy_attach(dev) 14596f2e892SBill Paul device_t dev; 14696f2e892SBill Paul { 14796f2e892SBill Paul struct mii_softc *sc; 14896f2e892SBill Paul struct mii_attach_args *ma; 14996f2e892SBill Paul struct mii_data *mii; 15096f2e892SBill Paul struct dc_softc *dc_sc; 15196f2e892SBill Paul 15296f2e892SBill Paul sc = device_get_softc(dev); 15396f2e892SBill Paul ma = device_get_ivars(dev); 15496f2e892SBill Paul sc->mii_dev = device_get_parent(dev); 15596f2e892SBill Paul mii = device_get_softc(sc->mii_dev); 15696f2e892SBill Paul LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 15796f2e892SBill Paul 15896f2e892SBill Paul sc->mii_inst = mii->mii_instance; 15996f2e892SBill Paul sc->mii_phy = ma->mii_phyno; 16096f2e892SBill Paul sc->mii_service = dcphy_service; 16196f2e892SBill Paul sc->mii_pdata = mii; 16296f2e892SBill Paul 16396f2e892SBill Paul sc->mii_flags |= MIIF_NOISOLATE; 16496f2e892SBill Paul mii->mii_instance++; 16596f2e892SBill Paul 16696f2e892SBill Paul #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 16796f2e892SBill Paul 16896f2e892SBill Paul ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 16996f2e892SBill Paul BMCR_ISO); 17096f2e892SBill Paul 17196f2e892SBill Paul /*dcphy_reset(sc);*/ 17296f2e892SBill Paul dc_sc = mii->mii_ifp->if_softc; 17396f2e892SBill Paul CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0); 17496f2e892SBill Paul CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0); 17596f2e892SBill Paul 17696f2e892SBill Paul switch(pci_read_config(device_get_parent(sc->mii_dev), 17796f2e892SBill Paul DC_PCI_CSID, 4)) { 17891cc2adbSBill Paul case COMPAQ_PRESARIO_ID: 17996f2e892SBill Paul /* Example of how to only allow 10Mbps modes. */ 18091cc2adbSBill Paul sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; 18196f2e892SBill Paul break; 18296f2e892SBill Paul default: 1835c1cfac4SBill Paul if (dc_sc->dc_pmode == DC_PMODE_SIA) { 1845c1cfac4SBill Paul sc->mii_capabilities = 1855c1cfac4SBill Paul BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; 1865c1cfac4SBill Paul } else { 18791cc2adbSBill Paul ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, 18891cc2adbSBill Paul sc->mii_inst), BMCR_LOOP|BMCR_S100); 18991cc2adbSBill Paul 19096f2e892SBill Paul sc->mii_capabilities = 19196f2e892SBill Paul BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX| 19296f2e892SBill Paul BMSR_10TFDX|BMSR_10THDX; 1935c1cfac4SBill Paul } 19496f2e892SBill Paul break; 19596f2e892SBill Paul } 19696f2e892SBill Paul 19796f2e892SBill Paul sc->mii_capabilities &= ma->mii_capmask; 19896f2e892SBill Paul device_printf(dev, " "); 19907dd9383SPoul-Henning Kamp mii_add_media(sc); 20096f2e892SBill Paul printf("\n"); 20196f2e892SBill Paul #undef ADD 20296f2e892SBill Paul 20396f2e892SBill Paul MIIBUS_MEDIAINIT(sc->mii_dev); 20496f2e892SBill Paul return(0); 20596f2e892SBill Paul } 20696f2e892SBill Paul 207d9730b8bSJonathan Lemon static int 20896f2e892SBill Paul dcphy_service(sc, mii, cmd) 20996f2e892SBill Paul struct mii_softc *sc; 21096f2e892SBill Paul struct mii_data *mii; 21196f2e892SBill Paul int cmd; 21296f2e892SBill Paul { 21396f2e892SBill Paul struct dc_softc *dc_sc; 21496f2e892SBill Paul struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 21596f2e892SBill Paul int reg; 21696f2e892SBill Paul u_int32_t mode; 21796f2e892SBill Paul 21896f2e892SBill Paul dc_sc = mii->mii_ifp->if_softc; 21996f2e892SBill Paul 22096f2e892SBill Paul switch (cmd) { 22196f2e892SBill Paul case MII_POLLSTAT: 22296f2e892SBill Paul /* 22396f2e892SBill Paul * If we're not polling our PHY instance, just return. 22496f2e892SBill Paul */ 22596f2e892SBill Paul if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 22696f2e892SBill Paul return (0); 22796f2e892SBill Paul } 22896f2e892SBill Paul break; 22996f2e892SBill Paul 23096f2e892SBill Paul case MII_MEDIACHG: 23196f2e892SBill Paul /* 23296f2e892SBill Paul * If the media indicates a different PHY instance, 23396f2e892SBill Paul * isolate ourselves. 23496f2e892SBill Paul */ 23596f2e892SBill Paul if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 23696f2e892SBill Paul return (0); 23796f2e892SBill Paul } 23896f2e892SBill Paul 23996f2e892SBill Paul /* 24096f2e892SBill Paul * If the interface is not up, don't do anything. 24196f2e892SBill Paul */ 24296f2e892SBill Paul if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 24396f2e892SBill Paul break; 24496f2e892SBill Paul 24596f2e892SBill Paul sc->mii_flags = 0; 24696f2e892SBill Paul mii->mii_media_active = IFM_NONE; 24796f2e892SBill Paul mode = CSR_READ_4(dc_sc, DC_NETCFG); 24896f2e892SBill Paul mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL| 24996f2e892SBill Paul DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL); 25096f2e892SBill Paul 25196f2e892SBill Paul switch (IFM_SUBTYPE(ife->ifm_media)) { 25296f2e892SBill Paul case IFM_AUTO: 25396f2e892SBill Paul /*dcphy_reset(sc);*/ 254fd94424cSPoul-Henning Kamp (void) dcphy_auto(sc); 25596f2e892SBill Paul break; 25696f2e892SBill Paul case IFM_100_T4: 25796f2e892SBill Paul /* 25896f2e892SBill Paul * XXX Not supported as a manual setting right now. 25996f2e892SBill Paul */ 26096f2e892SBill Paul return (EINVAL); 26196f2e892SBill Paul case IFM_100_TX: 26296f2e892SBill Paul dcphy_reset(sc); 26396f2e892SBill Paul DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 26496f2e892SBill Paul mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS| 26596f2e892SBill Paul DC_NETCFG_SCRAMBLER; 26696f2e892SBill Paul if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 26796f2e892SBill Paul mode |= DC_NETCFG_FULLDUPLEX; 26896f2e892SBill Paul else 26996f2e892SBill Paul mode &= ~DC_NETCFG_FULLDUPLEX; 27096f2e892SBill Paul CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 27196f2e892SBill Paul break; 27296f2e892SBill Paul case IFM_10_T: 27396f2e892SBill Paul DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 27496f2e892SBill Paul DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF); 27596f2e892SBill Paul if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 27696f2e892SBill Paul DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D); 27796f2e892SBill Paul else 27896f2e892SBill Paul DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F); 27996f2e892SBill Paul DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 28096f2e892SBill Paul DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 28196f2e892SBill Paul mode &= ~DC_NETCFG_PORTSEL; 28296f2e892SBill Paul mode |= DC_NETCFG_SPEEDSEL; 28396f2e892SBill Paul if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 28496f2e892SBill Paul mode |= DC_NETCFG_FULLDUPLEX; 28596f2e892SBill Paul else 28696f2e892SBill Paul mode &= ~DC_NETCFG_FULLDUPLEX; 28796f2e892SBill Paul CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 28896f2e892SBill Paul break; 28996f2e892SBill Paul default: 29096f2e892SBill Paul return(EINVAL); 29196f2e892SBill Paul } 29296f2e892SBill Paul break; 29396f2e892SBill Paul 29496f2e892SBill Paul case MII_TICK: 29596f2e892SBill Paul /* 29696f2e892SBill Paul * If we're not currently selected, just return. 29796f2e892SBill Paul */ 29896f2e892SBill Paul if (IFM_INST(ife->ifm_media) != sc->mii_inst) 29996f2e892SBill Paul return (0); 30096f2e892SBill Paul 30196f2e892SBill Paul /* 30296f2e892SBill Paul * Is the interface even up? 30396f2e892SBill Paul */ 30496f2e892SBill Paul if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 30596f2e892SBill Paul return (0); 30696f2e892SBill Paul 307d9730b8bSJonathan Lemon /* 308d9730b8bSJonathan Lemon * Only used for autonegotiation. 309d9730b8bSJonathan Lemon */ 310d9730b8bSJonathan Lemon if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 311d9730b8bSJonathan Lemon break; 312d9730b8bSJonathan Lemon 313e3c5a449SStephen McKay reg = CSR_READ_4(dc_sc, DC_10BTSTAT); 314318b02fdSBill Paul if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) 315d9730b8bSJonathan Lemon break; 316318b02fdSBill Paul 317318b02fdSBill Paul /* 318318b02fdSBill Paul * Only retry autonegotiation every 5 seconds. 319e3c5a449SStephen McKay * 320e3c5a449SStephen McKay * Otherwise, fall through to calling dcphy_status() 321e3c5a449SStephen McKay * since real Intel 21143 chips don't show valid link 322e3c5a449SStephen McKay * status until autonegotiation is switched off, and 323e3c5a449SStephen McKay * that only happens in dcphy_status(). Without this, 324e3c5a449SStephen McKay * successful autonegotation is never recognised on 325e3c5a449SStephen McKay * these chips. 326318b02fdSBill Paul */ 3279a54cbb9SAndre Oppermann if (++sc->mii_ticks <= 50) 328e3c5a449SStephen McKay break; 32996f2e892SBill Paul 33096f2e892SBill Paul sc->mii_ticks = 0; 331fd94424cSPoul-Henning Kamp dcphy_auto(sc); 33296f2e892SBill Paul 33396f2e892SBill Paul break; 33496f2e892SBill Paul } 33596f2e892SBill Paul 33696f2e892SBill Paul /* Update the media status. */ 33796f2e892SBill Paul dcphy_status(sc); 33896f2e892SBill Paul 33996f2e892SBill Paul /* Callback if something changed. */ 340d9730b8bSJonathan Lemon mii_phy_update(sc, cmd); 34196f2e892SBill Paul return (0); 34296f2e892SBill Paul } 34396f2e892SBill Paul 344d9730b8bSJonathan Lemon static void 34596f2e892SBill Paul dcphy_status(sc) 34696f2e892SBill Paul struct mii_softc *sc; 34796f2e892SBill Paul { 34896f2e892SBill Paul struct mii_data *mii = sc->mii_pdata; 349318b02fdSBill Paul int reg, anlpar, tstat = 0; 35096f2e892SBill Paul struct dc_softc *dc_sc; 35196f2e892SBill Paul 35296f2e892SBill Paul dc_sc = mii->mii_ifp->if_softc; 35396f2e892SBill Paul 35496f2e892SBill Paul mii->mii_media_status = IFM_AVALID; 35596f2e892SBill Paul mii->mii_media_active = IFM_ETHER; 35696f2e892SBill Paul 357b6a1416dSBill Paul if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 358b6a1416dSBill Paul return; 359b6a1416dSBill Paul 360e3c5a449SStephen McKay reg = CSR_READ_4(dc_sc, DC_10BTSTAT); 36196f2e892SBill Paul if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) 36296f2e892SBill Paul mii->mii_media_status |= IFM_ACTIVE; 36396f2e892SBill Paul 364318b02fdSBill Paul if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) { 36596f2e892SBill Paul /* Erg, still trying, I guess... */ 366318b02fdSBill Paul tstat = CSR_READ_4(dc_sc, DC_10BTSTAT); 367318b02fdSBill Paul if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) { 368318b02fdSBill Paul if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) && 369318b02fdSBill Paul (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE) 370318b02fdSBill Paul goto skip; 37196f2e892SBill Paul mii->mii_media_active |= IFM_NONE; 37296f2e892SBill Paul return; 37396f2e892SBill Paul } 37496f2e892SBill Paul 375318b02fdSBill Paul if (tstat & DC_TSTAT_LP_CAN_NWAY) { 376318b02fdSBill Paul anlpar = tstat >> 16; 37791cc2adbSBill Paul if (anlpar & ANLPAR_T4 && 37891cc2adbSBill Paul sc->mii_capabilities & BMSR_100TXHDX) 37996f2e892SBill Paul mii->mii_media_active |= IFM_100_T4; 38091cc2adbSBill Paul else if (anlpar & ANLPAR_TX_FD && 381318b02fdSBill Paul sc->mii_capabilities & BMSR_100TXFDX) 38296f2e892SBill Paul mii->mii_media_active |= IFM_100_TX|IFM_FDX; 38391cc2adbSBill Paul else if (anlpar & ANLPAR_TX && 38491cc2adbSBill Paul sc->mii_capabilities & BMSR_100TXHDX) 38596f2e892SBill Paul mii->mii_media_active |= IFM_100_TX; 38696f2e892SBill Paul else if (anlpar & ANLPAR_10_FD) 38796f2e892SBill Paul mii->mii_media_active |= IFM_10_T|IFM_FDX; 38896f2e892SBill Paul else if (anlpar & ANLPAR_10) 38996f2e892SBill Paul mii->mii_media_active |= IFM_10_T; 39096f2e892SBill Paul else 39196f2e892SBill Paul mii->mii_media_active |= IFM_NONE; 39296f2e892SBill Paul if (DC_IS_INTEL(dc_sc)) 39396f2e892SBill Paul DC_CLRBIT(dc_sc, DC_10BTCTRL, 39496f2e892SBill Paul DC_TCTL_AUTONEGENBL); 39596f2e892SBill Paul return; 39696f2e892SBill Paul } 39796f2e892SBill Paul /* 39896f2e892SBill Paul * If the other side doesn't support NWAY, then the 39996f2e892SBill Paul * best we can do is determine if we have a 10Mbps or 40096f2e892SBill Paul * 100Mbps link. There's no way to know if the link 40196f2e892SBill Paul * is full or half duplex, so we default to half duplex 40296f2e892SBill Paul * and hope that the user is clever enough to manually 40396f2e892SBill Paul * change the media settings if we're wrong. 40496f2e892SBill Paul */ 40596f2e892SBill Paul if (!(reg & DC_TSTAT_LS100)) 40696f2e892SBill Paul mii->mii_media_active |= IFM_100_TX; 40796f2e892SBill Paul else if (!(reg & DC_TSTAT_LS10)) 40896f2e892SBill Paul mii->mii_media_active |= IFM_10_T; 40996f2e892SBill Paul else 41096f2e892SBill Paul mii->mii_media_active |= IFM_NONE; 41196f2e892SBill Paul if (DC_IS_INTEL(dc_sc)) 41296f2e892SBill Paul DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 41396f2e892SBill Paul return; 41496f2e892SBill Paul } 41596f2e892SBill Paul 416318b02fdSBill Paul skip: 4175c1cfac4SBill Paul 4185c1cfac4SBill Paul if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL) 41996f2e892SBill Paul mii->mii_media_active |= IFM_10_T; 4205c1cfac4SBill Paul else 4215c1cfac4SBill Paul mii->mii_media_active |= IFM_100_TX; 42296f2e892SBill Paul if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX) 42396f2e892SBill Paul mii->mii_media_active |= IFM_FDX; 42496f2e892SBill Paul 42596f2e892SBill Paul return; 42696f2e892SBill Paul } 42796f2e892SBill Paul 42896f2e892SBill Paul static int 429fd94424cSPoul-Henning Kamp dcphy_auto(mii) 43096f2e892SBill Paul struct mii_softc *mii; 43196f2e892SBill Paul { 43296f2e892SBill Paul struct dc_softc *sc; 43396f2e892SBill Paul 43496f2e892SBill Paul sc = mii->mii_pdata->mii_ifp->if_softc; 43596f2e892SBill Paul 43696f2e892SBill Paul DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL); 43796f2e892SBill Paul DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX); 43896f2e892SBill Paul DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); 43991cc2adbSBill Paul if (mii->mii_capabilities & BMSR_100TXHDX) 44096f2e892SBill Paul CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF); 44191cc2adbSBill Paul else 44291cc2adbSBill Paul CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF); 44396f2e892SBill Paul DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); 44496f2e892SBill Paul DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 44596f2e892SBill Paul DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE); 44696f2e892SBill Paul 44796f2e892SBill Paul return(EJUSTRETURN); 44896f2e892SBill Paul } 44996f2e892SBill Paul 45096f2e892SBill Paul static void 45196f2e892SBill Paul dcphy_reset(mii) 45296f2e892SBill Paul struct mii_softc *mii; 45396f2e892SBill Paul { 45496f2e892SBill Paul struct dc_softc *sc; 45596f2e892SBill Paul 45696f2e892SBill Paul sc = mii->mii_pdata->mii_ifp->if_softc; 45796f2e892SBill Paul 45896f2e892SBill Paul DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); 45996f2e892SBill Paul DELAY(1000); 46096f2e892SBill Paul DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); 46196f2e892SBill Paul 46296f2e892SBill Paul return; 46396f2e892SBill Paul } 46496f2e892SBill Paul 465