1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2012, 2015 Chelsio Communications, Inc. 5 * All rights reserved. 6 * Written by: Navdeep Parhar <np@FreeBSD.org> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD$ 30 * 31 */ 32 33 #ifndef __T4_TOM_H__ 34 #define __T4_TOM_H__ 35 #include <sys/vmem.h> 36 #include "tom/t4_tls.h" 37 38 #define LISTEN_HASH_SIZE 32 39 40 /* 41 * Min receive window. We want it to be large enough to accommodate receive 42 * coalescing, handle jumbo frames, and not trigger sender SWS avoidance. 43 */ 44 #define MIN_RCV_WND (24 * 1024U) 45 46 /* 47 * Max receive window supported by HW in bytes. Only a small part of it can 48 * be set through option0, the rest needs to be set through RX_DATA_ACK. 49 */ 50 #define MAX_RCV_WND ((1U << 27) - 1) 51 52 #define DDP_RSVD_WIN (16 * 1024U) 53 #define SB_DDP_INDICATE SB_IN_TOE /* soreceive must respond to indicate */ 54 55 #define USE_DDP_RX_FLOW_CONTROL 56 57 #define PPOD_SZ(n) ((n) * sizeof(struct pagepod)) 58 #define PPOD_SIZE (PPOD_SZ(1)) 59 60 /* TOE PCB flags */ 61 enum { 62 TPF_ATTACHED = (1 << 0), /* a tcpcb refers to this toepcb */ 63 TPF_FLOWC_WR_SENT = (1 << 1), /* firmware flow context WR sent */ 64 TPF_TX_DATA_SENT = (1 << 2), /* some data sent */ 65 TPF_TX_SUSPENDED = (1 << 3), /* tx suspended for lack of resources */ 66 TPF_SEND_FIN = (1 << 4), /* send FIN after all pending data */ 67 TPF_FIN_SENT = (1 << 5), /* FIN has been sent */ 68 TPF_ABORT_SHUTDOWN = (1 << 6), /* connection abort is in progress */ 69 TPF_CPL_PENDING = (1 << 7), /* haven't received the last CPL */ 70 TPF_SYNQE = (1 << 8), /* synq_entry, not really a toepcb */ 71 TPF_SYNQE_NEEDFREE = (1 << 9), /* synq_entry was malloc'd separately */ 72 TPF_SYNQE_TCPDDP = (1 << 10), /* ulp_mode TCPDDP in toepcb */ 73 TPF_SYNQE_EXPANDED = (1 << 11), /* toepcb ready, tid context updated */ 74 TPF_SYNQE_HAS_L2TE = (1 << 12), /* we've replied to PASS_ACCEPT_REQ */ 75 TPF_SYNQE_TLS = (1 << 13), /* ulp_mode TLS in toepcb */ 76 TPF_FORCE_CREDITS = (1 << 14), /* always send credits */ 77 }; 78 79 enum { 80 DDP_OK = (1 << 0), /* OK to turn on DDP */ 81 DDP_SC_REQ = (1 << 1), /* state change (on/off) requested */ 82 DDP_ON = (1 << 2), /* DDP is turned on */ 83 DDP_BUF0_ACTIVE = (1 << 3), /* buffer 0 in use (not invalidated) */ 84 DDP_BUF1_ACTIVE = (1 << 4), /* buffer 1 in use (not invalidated) */ 85 DDP_TASK_ACTIVE = (1 << 5), /* requeue task is queued / running */ 86 DDP_DEAD = (1 << 6), /* toepcb is shutting down */ 87 }; 88 89 struct sockopt; 90 struct offload_settings; 91 92 struct ofld_tx_sdesc { 93 uint32_t plen; /* payload length */ 94 uint8_t tx_credits; /* firmware tx credits (unit is 16B) */ 95 void *iv_buffer; /* optional buffer holding IVs for TLS */ 96 }; 97 98 struct ppod_region { 99 u_int pr_start; 100 u_int pr_len; 101 u_int pr_page_shift[4]; 102 uint32_t pr_tag_mask; /* hardware tagmask for this region. */ 103 uint32_t pr_invalid_bit; /* OR with this to invalidate tag. */ 104 uint32_t pr_alias_mask; /* AND with tag to get alias bits. */ 105 u_int pr_alias_shift; /* shift this much for first alias bit. */ 106 vmem_t *pr_arena; 107 }; 108 109 struct ppod_reservation { 110 struct ppod_region *prsv_pr; 111 uint32_t prsv_tag; /* Full tag: pgsz, alias, tag, color */ 112 u_int prsv_nppods; 113 }; 114 115 struct pageset { 116 TAILQ_ENTRY(pageset) link; 117 vm_page_t *pages; 118 int npages; 119 int flags; 120 int offset; /* offset in first page */ 121 int len; 122 struct ppod_reservation prsv; 123 struct vmspace *vm; 124 vm_offset_t start; 125 u_int vm_timestamp; 126 }; 127 128 TAILQ_HEAD(pagesetq, pageset); 129 130 #define PS_WIRED 0x0001 /* Pages wired rather than held. */ 131 #define PS_PPODS_WRITTEN 0x0002 /* Page pods written to the card. */ 132 133 #define EXT_FLAG_AIOTX EXT_FLAG_VENDOR1 134 135 #define IS_AIOTX_MBUF(m) \ 136 ((m)->m_flags & M_EXT && (m)->m_ext.ext_flags & EXT_FLAG_AIOTX) 137 138 struct ddp_buffer { 139 struct pageset *ps; 140 141 struct kaiocb *job; 142 int cancel_pending; 143 }; 144 145 struct ddp_pcb { 146 u_int flags; 147 struct ddp_buffer db[2]; 148 TAILQ_HEAD(, pageset) cached_pagesets; 149 TAILQ_HEAD(, kaiocb) aiojobq; 150 u_int waiting_count; 151 u_int active_count; 152 u_int cached_count; 153 int active_id; /* the currently active DDP buffer */ 154 struct task requeue_task; 155 struct kaiocb *queueing; 156 struct mtx lock; 157 }; 158 159 struct aiotx_buffer { 160 struct pageset ps; 161 struct kaiocb *job; 162 int refcount; 163 }; 164 165 struct toepcb { 166 TAILQ_ENTRY(toepcb) link; /* toep_list */ 167 u_int flags; /* miscellaneous flags */ 168 int refcount; 169 struct tom_data *td; 170 struct inpcb *inp; /* backpointer to host stack's PCB */ 171 struct vnet *vnet; 172 struct vi_info *vi; /* virtual interface */ 173 struct sge_wrq *ofld_txq; 174 struct sge_ofld_rxq *ofld_rxq; 175 struct sge_wrq *ctrlq; 176 struct l2t_entry *l2te; /* L2 table entry used by this connection */ 177 struct clip_entry *ce; /* CLIP table entry used by this tid */ 178 int tid; /* Connection identifier */ 179 int tc_idx; /* traffic class that this tid is bound to */ 180 181 /* tx credit handling */ 182 u_int tx_total; /* total tx WR credits (in 16B units) */ 183 u_int tx_credits; /* tx WR credits (in 16B units) available */ 184 u_int tx_nocompl; /* tx WR credits since last compl request */ 185 u_int plen_nocompl; /* payload since last compl request */ 186 187 /* rx credit handling */ 188 u_int sb_cc; /* last noted value of so_rcv->sb_cc */ 189 int rx_credits; /* rx credits (in bytes) to be returned to hw */ 190 191 u_int ulp_mode; /* ULP mode */ 192 void *ulpcb; 193 void *ulpcb2; 194 struct mbufq ulp_pduq; /* PDUs waiting to be sent out. */ 195 struct mbufq ulp_pdu_reclaimq; 196 197 struct ddp_pcb ddp; 198 struct tls_ofld_info tls; 199 200 TAILQ_HEAD(, kaiocb) aiotx_jobq; 201 struct task aiotx_task; 202 bool aiotx_task_active; 203 204 /* Tx software descriptor */ 205 uint8_t txsd_total; 206 uint8_t txsd_pidx; 207 uint8_t txsd_cidx; 208 uint8_t txsd_avail; 209 struct ofld_tx_sdesc txsd[]; 210 }; 211 212 #define DDP_LOCK(toep) mtx_lock(&(toep)->ddp.lock) 213 #define DDP_UNLOCK(toep) mtx_unlock(&(toep)->ddp.lock) 214 #define DDP_ASSERT_LOCKED(toep) mtx_assert(&(toep)->ddp.lock, MA_OWNED) 215 216 struct flowc_tx_params { 217 uint32_t snd_nxt; 218 uint32_t rcv_nxt; 219 unsigned int snd_space; 220 unsigned int mss; 221 }; 222 223 #define DDP_RETRY_WAIT 5 /* seconds to wait before re-enabling DDP */ 224 #define DDP_LOW_SCORE 1 225 #define DDP_HIGH_SCORE 3 226 227 /* 228 * Compressed state for embryonic connections for a listener. Barely fits in 229 * 64B, try not to grow it further. 230 */ 231 struct synq_entry { 232 TAILQ_ENTRY(synq_entry) link; /* listen_ctx's synq link */ 233 int flags; /* same as toepcb's tp_flags */ 234 int tid; 235 struct listen_ctx *lctx; /* backpointer to listen ctx */ 236 struct mbuf *syn; 237 uint32_t iss; 238 uint32_t ts; 239 volatile uintptr_t wr; 240 volatile u_int refcnt; 241 uint16_t l2e_idx; 242 uint16_t rcv_bufsize; 243 }; 244 245 /* listen_ctx flags */ 246 #define LCTX_RPL_PENDING 1 /* waiting for a CPL_PASS_OPEN_RPL */ 247 248 struct listen_ctx { 249 LIST_ENTRY(listen_ctx) link; /* listen hash linkage */ 250 volatile int refcount; 251 int stid; 252 struct stid_region stid_region; 253 int flags; 254 struct inpcb *inp; /* listening socket's inp */ 255 struct vnet *vnet; 256 struct sge_wrq *ctrlq; 257 struct sge_ofld_rxq *ofld_rxq; 258 struct clip_entry *ce; 259 TAILQ_HEAD(, synq_entry) synq; 260 }; 261 262 struct clip_entry { 263 TAILQ_ENTRY(clip_entry) link; 264 struct in6_addr lip; /* local IPv6 address */ 265 u_int refcount; 266 }; 267 268 TAILQ_HEAD(clip_head, clip_entry); 269 struct tom_data { 270 struct toedev tod; 271 272 /* toepcb's associated with this TOE device */ 273 struct mtx toep_list_lock; 274 TAILQ_HEAD(, toepcb) toep_list; 275 276 struct mtx lctx_hash_lock; 277 LIST_HEAD(, listen_ctx) *listen_hash; 278 u_long listen_mask; 279 int lctx_count; /* # of lctx in the hash table */ 280 281 struct ppod_region pr; 282 283 vmem_t *key_map; 284 285 struct mtx clip_table_lock; 286 struct clip_head clip_table; 287 int clip_gen; 288 289 /* WRs that will not be sent to the chip because L2 resolution failed */ 290 struct mtx unsent_wr_lock; 291 STAILQ_HEAD(, wrqe) unsent_wr_list; 292 struct task reclaim_wr_resources; 293 }; 294 295 static inline struct tom_data * 296 tod_td(struct toedev *tod) 297 { 298 299 return (__containerof(tod, struct tom_data, tod)); 300 } 301 302 static inline struct adapter * 303 td_adapter(struct tom_data *td) 304 { 305 306 return (td->tod.tod_softc); 307 } 308 309 static inline void 310 set_mbuf_ulp_submode(struct mbuf *m, uint8_t ulp_submode) 311 { 312 313 M_ASSERTPKTHDR(m); 314 m->m_pkthdr.PH_per.eight[0] = ulp_submode; 315 } 316 317 static inline uint8_t 318 mbuf_ulp_submode(struct mbuf *m) 319 { 320 321 M_ASSERTPKTHDR(m); 322 return (m->m_pkthdr.PH_per.eight[0]); 323 } 324 325 /* t4_tom.c */ 326 struct toepcb *alloc_toepcb(struct vi_info *, int, int, int); 327 struct toepcb *hold_toepcb(struct toepcb *); 328 void free_toepcb(struct toepcb *); 329 void offload_socket(struct socket *, struct toepcb *); 330 void undo_offload_socket(struct socket *); 331 void final_cpl_received(struct toepcb *); 332 void insert_tid(struct adapter *, int, void *, int); 333 void *lookup_tid(struct adapter *, int); 334 void update_tid(struct adapter *, int, void *); 335 void remove_tid(struct adapter *, int, int); 336 int find_best_mtu_idx(struct adapter *, struct in_conninfo *, 337 struct offload_settings *); 338 u_long select_rcv_wnd(struct socket *); 339 int select_rcv_wscale(void); 340 uint64_t calc_opt0(struct socket *, struct vi_info *, struct l2t_entry *, 341 int, int, int, int, struct offload_settings *); 342 uint64_t select_ntuple(struct vi_info *, struct l2t_entry *); 343 int select_ulp_mode(struct socket *, struct adapter *, 344 struct offload_settings *); 345 void set_ulp_mode(struct toepcb *, int); 346 int negative_advice(int); 347 struct clip_entry *hold_lip(struct tom_data *, struct in6_addr *, 348 struct clip_entry *); 349 void release_lip(struct tom_data *, struct clip_entry *); 350 351 /* t4_connect.c */ 352 void t4_init_connect_cpl_handlers(void); 353 void t4_uninit_connect_cpl_handlers(void); 354 int t4_connect(struct toedev *, struct socket *, struct rtentry *, 355 struct sockaddr *); 356 void act_open_failure_cleanup(struct adapter *, u_int, u_int); 357 358 /* t4_listen.c */ 359 void t4_init_listen_cpl_handlers(void); 360 void t4_uninit_listen_cpl_handlers(void); 361 int t4_listen_start(struct toedev *, struct tcpcb *); 362 int t4_listen_stop(struct toedev *, struct tcpcb *); 363 void t4_syncache_added(struct toedev *, void *); 364 void t4_syncache_removed(struct toedev *, void *); 365 int t4_syncache_respond(struct toedev *, void *, struct mbuf *); 366 int do_abort_req_synqe(struct sge_iq *, const struct rss_header *, 367 struct mbuf *); 368 int do_abort_rpl_synqe(struct sge_iq *, const struct rss_header *, 369 struct mbuf *); 370 void t4_offload_socket(struct toedev *, void *, struct socket *); 371 372 /* t4_cpl_io.c */ 373 void aiotx_init_toep(struct toepcb *); 374 int t4_aio_queue_aiotx(struct socket *, struct kaiocb *); 375 void t4_init_cpl_io_handlers(void); 376 void t4_uninit_cpl_io_handlers(void); 377 void send_abort_rpl(struct adapter *, struct sge_wrq *, int , int); 378 void send_flowc_wr(struct toepcb *, struct flowc_tx_params *); 379 void send_reset(struct adapter *, struct toepcb *, uint32_t); 380 int send_rx_credits(struct adapter *, struct toepcb *, int); 381 void send_rx_modulate(struct adapter *, struct toepcb *); 382 void make_established(struct toepcb *, uint32_t, uint32_t, uint16_t); 383 int t4_close_conn(struct adapter *, struct toepcb *); 384 void t4_rcvd(struct toedev *, struct tcpcb *); 385 void t4_rcvd_locked(struct toedev *, struct tcpcb *); 386 int t4_tod_output(struct toedev *, struct tcpcb *); 387 int t4_send_fin(struct toedev *, struct tcpcb *); 388 int t4_send_rst(struct toedev *, struct tcpcb *); 389 void t4_set_tcb_field(struct adapter *, struct sge_wrq *, struct toepcb *, 390 uint16_t, uint64_t, uint64_t, int, int); 391 void t4_push_frames(struct adapter *sc, struct toepcb *toep, int drop); 392 void t4_push_pdus(struct adapter *sc, struct toepcb *toep, int drop); 393 394 /* t4_ddp.c */ 395 int t4_init_ppod_region(struct ppod_region *, struct t4_range *, u_int, 396 const char *); 397 void t4_free_ppod_region(struct ppod_region *); 398 int t4_alloc_page_pods_for_ps(struct ppod_region *, struct pageset *); 399 int t4_alloc_page_pods_for_buf(struct ppod_region *, vm_offset_t, int, 400 struct ppod_reservation *); 401 int t4_write_page_pods_for_ps(struct adapter *, struct sge_wrq *, int, 402 struct pageset *); 403 int t4_write_page_pods_for_buf(struct adapter *, struct sge_wrq *, int tid, 404 struct ppod_reservation *, vm_offset_t, int); 405 void t4_free_page_pods(struct ppod_reservation *); 406 int t4_soreceive_ddp(struct socket *, struct sockaddr **, struct uio *, 407 struct mbuf **, struct mbuf **, int *); 408 int t4_aio_queue_ddp(struct socket *, struct kaiocb *); 409 void t4_ddp_mod_load(void); 410 void t4_ddp_mod_unload(void); 411 void ddp_assert_empty(struct toepcb *); 412 void ddp_init_toep(struct toepcb *); 413 void ddp_uninit_toep(struct toepcb *); 414 void ddp_queue_toep(struct toepcb *); 415 void release_ddp_resources(struct toepcb *toep); 416 void handle_ddp_close(struct toepcb *, struct tcpcb *, uint32_t); 417 void handle_ddp_indicate(struct toepcb *); 418 void insert_ddp_data(struct toepcb *, uint32_t); 419 const struct offload_settings *lookup_offload_policy(struct adapter *, int, 420 struct mbuf *, uint16_t, struct inpcb *); 421 422 /* t4_tls.c */ 423 bool can_tls_offload(struct adapter *); 424 int t4_ctloutput_tls(struct socket *, struct sockopt *); 425 void t4_push_tls_records(struct adapter *, struct toepcb *, int); 426 void t4_tls_mod_load(void); 427 void t4_tls_mod_unload(void); 428 void tls_establish(struct toepcb *); 429 void tls_free_kmap(struct tom_data *); 430 int tls_init_kmap(struct adapter *, struct tom_data *); 431 void tls_init_toep(struct toepcb *); 432 int tls_rx_key(struct toepcb *); 433 void tls_stop_handshake_timer(struct toepcb *); 434 int tls_tx_key(struct toepcb *); 435 void tls_uninit_toep(struct toepcb *); 436 437 #endif 438