xref: /freebsd/sys/dev/cxgbe/tom/t4_tom.h (revision 9a41df2a0e6408e9b329bbd8b9e37c2b44461a1b)
1 /*-
2  * Copyright (c) 2012 Chelsio Communications, Inc.
3  * All rights reserved.
4  * Written by: Navdeep Parhar <np@FreeBSD.org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  *
29  */
30 
31 #ifndef __T4_TOM_H__
32 #define __T4_TOM_H__
33 
34 #define KTR_CXGBE	KTR_SPARE3
35 #define LISTEN_HASH_SIZE 32
36 
37 /*
38  * Min receive window.  We want it to be large enough to accommodate receive
39  * coalescing, handle jumbo frames, and not trigger sender SWS avoidance.
40  */
41 #define MIN_RCV_WND (24 * 1024U)
42 
43 /*
44  * Max receive window supported by HW in bytes.  Only a small part of it can
45  * be set through option0, the rest needs to be set through RX_DATA_ACK.
46  */
47 #define MAX_RCV_WND ((1U << 27) - 1)
48 
49 #define	DDP_RSVD_WIN (16 * 1024U)
50 #define	SB_DDP_INDICATE	SB_IN_TOE	/* soreceive must respond to indicate */
51 
52 #define	M_DDP	M_PROTO1
53 
54 #define USE_DDP_RX_FLOW_CONTROL
55 
56 /* TOE PCB flags */
57 enum {
58 	TPF_ATTACHED	   = (1 << 0),	/* a tcpcb refers to this toepcb */
59 	TPF_FLOWC_WR_SENT  = (1 << 1),	/* firmware flow context WR sent */
60 	TPF_TX_DATA_SENT   = (1 << 2),	/* some data sent */
61 	TPF_TX_SUSPENDED   = (1 << 3),	/* tx suspended for lack of resources */
62 	TPF_SEND_FIN	   = (1 << 4),	/* send FIN after all pending data */
63 	TPF_FIN_SENT	   = (1 << 5),	/* FIN has been sent */
64 	TPF_ABORT_SHUTDOWN = (1 << 6),	/* connection abort is in progress */
65 	TPF_CPL_PENDING    = (1 << 7),	/* haven't received the last CPL */
66 	TPF_SYNQE	   = (1 << 8),	/* synq_entry, not really a toepcb */
67 	TPF_SYNQE_NEEDFREE = (1 << 9),	/* synq_entry was malloc'd separately */
68 	TPF_SYNQE_TCPDDP   = (1 << 10),	/* ulp_mode TCPDDP in toepcb */
69 	TPF_SYNQE_EXPANDED = (1 << 11),	/* toepcb ready, tid context updated */
70 };
71 
72 enum {
73 	DDP_OK		= (1 << 0),	/* OK to turn on DDP */
74 	DDP_SC_REQ	= (1 << 1),	/* state change (on/off) requested */
75 	DDP_ON		= (1 << 2),	/* DDP is turned on */
76 	DDP_BUF0_ACTIVE	= (1 << 3),	/* buffer 0 in use (not invalidated) */
77 	DDP_BUF1_ACTIVE	= (1 << 4),	/* buffer 1 in use (not invalidated) */
78 };
79 
80 struct ofld_tx_sdesc {
81 	uint32_t plen;		/* payload length */
82 	uint8_t tx_credits;	/* firmware tx credits (unit is 16B) */
83 };
84 
85 struct ppod_region {
86 	TAILQ_ENTRY(ppod_region) link;
87 	int used;	/* # of pods used by this region */
88 	int free;	/* # of contiguous pods free right after this region */
89 };
90 
91 struct ddp_buffer {
92 	uint32_t tag;	/* includes color, page pod addr, and DDP page size */
93 	int nppods;
94 	int offset;
95 	int len;
96 	struct ppod_region ppod_region;
97 	int npages;
98 	vm_page_t *pages;
99 };
100 
101 struct toepcb {
102 	TAILQ_ENTRY(toepcb) link; /* toep_list */
103 	unsigned int flags;	/* miscellaneous flags */
104 	struct tom_data *td;
105 	struct inpcb *inp;	/* backpointer to host stack's PCB */
106 	struct port_info *port;	/* physical port */
107 	struct sge_wrq *ofld_txq;
108 	struct sge_ofld_rxq *ofld_rxq;
109 	struct sge_wrq *ctrlq;
110 	struct l2t_entry *l2te;	/* L2 table entry used by this connection */
111 	int tid;		/* Connection identifier */
112 	unsigned int tx_credits;/* tx WR credits (in 16 byte units) remaining */
113 	unsigned int sb_cc;	/* last noted value of so_rcv->sb_cc */
114 	int rx_credits;		/* rx credits (in bytes) to be returned to hw */
115 
116 	unsigned int ulp_mode;	/* ULP mode */
117 
118 	unsigned int ddp_flags;
119 	struct ddp_buffer *db[2];
120 	time_t ddp_disabled;
121 	uint8_t ddp_score;
122 
123 	/* Tx software descriptor */
124 	uint8_t txsd_total;
125 	uint8_t txsd_pidx;
126 	uint8_t txsd_cidx;
127 	uint8_t txsd_avail;
128 	struct ofld_tx_sdesc txsd[];
129 };
130 
131 struct flowc_tx_params {
132 	uint32_t snd_nxt;
133 	uint32_t rcv_nxt;
134 	unsigned int snd_space;
135 	unsigned int mss;
136 };
137 
138 #define	DDP_RETRY_WAIT	5	/* seconds to wait before re-enabling DDP */
139 #define	DDP_LOW_SCORE	1
140 #define	DDP_HIGH_SCORE	3
141 
142 static inline void
143 set_tcpddp_ulp_mode(struct toepcb *toep)
144 {
145 
146 	toep->ulp_mode = ULP_MODE_TCPDDP;
147 	toep->ddp_flags = DDP_OK;
148 	toep->ddp_score = DDP_LOW_SCORE;
149 }
150 
151 /*
152  * Compressed state for embryonic connections for a listener.  Barely fits in
153  * 64B, try not to grow it further.
154  */
155 struct synq_entry {
156 	TAILQ_ENTRY(synq_entry) link;	/* listen_ctx's synq link */
157 	int flags;			/* same as toepcb's tp_flags */
158 	int tid;
159 	struct listen_ctx *lctx;	/* backpointer to listen ctx */
160 	struct mbuf *syn;
161 	uint32_t iss;
162 	uint32_t ts;
163 	volatile uintptr_t wr;
164 	volatile u_int refcnt;
165 	uint16_t l2e_idx;
166 	uint16_t rcv_bufsize;
167 };
168 
169 /* listen_ctx flags */
170 #define LCTX_RPL_PENDING 1	/* waiting for a CPL_PASS_OPEN_RPL */
171 
172 struct listen_ctx {
173 	LIST_ENTRY(listen_ctx) link;	/* listen hash linkage */
174 	volatile int refcount;
175 	int stid;
176 	int flags;
177 	struct inpcb *inp;		/* listening socket's inp */
178 	struct sge_wrq *ctrlq;
179 	struct sge_ofld_rxq *ofld_rxq;
180 	TAILQ_HEAD(, synq_entry) synq;
181 };
182 
183 TAILQ_HEAD(ppod_head, ppod_region);
184 
185 struct tom_data {
186 	struct toedev tod;
187 
188 	/* toepcb's associated with this TOE device */
189 	struct mtx toep_list_lock;
190 	TAILQ_HEAD(, toepcb) toep_list;
191 
192 	struct mtx lctx_hash_lock;
193 	LIST_HEAD(, listen_ctx) *listen_hash;
194 	u_long listen_mask;
195 	int lctx_count;		/* # of lctx in the hash table */
196 
197 	struct mtx ppod_lock;
198 	int nppods;
199 	int nppods_free;	/* # of available ppods */
200 	int nppods_free_head;	/* # of available ppods at the begining */
201 	struct ppod_head ppods;
202 };
203 
204 static inline struct tom_data *
205 tod_td(struct toedev *tod)
206 {
207 
208 	return (member2struct(tom_data, tod, tod));
209 }
210 
211 static inline struct adapter *
212 td_adapter(struct tom_data *td)
213 {
214 
215 	return (td->tod.tod_softc);
216 }
217 
218 /* t4_tom.c */
219 struct toepcb *alloc_toepcb(struct port_info *, int, int, int);
220 void free_toepcb(struct toepcb *);
221 void offload_socket(struct socket *, struct toepcb *);
222 void undo_offload_socket(struct socket *);
223 void final_cpl_received(struct toepcb *);
224 void insert_tid(struct adapter *, int, void *);
225 void *lookup_tid(struct adapter *, int);
226 void update_tid(struct adapter *, int, void *);
227 void remove_tid(struct adapter *, int);
228 void release_tid(struct adapter *, int, struct sge_wrq *);
229 int find_best_mtu_idx(struct adapter *, struct in_conninfo *, int);
230 u_long select_rcv_wnd(struct socket *);
231 int select_rcv_wscale(void);
232 uint64_t calc_opt0(struct socket *, struct port_info *, struct l2t_entry *,
233     int, int, int, int);
234 uint32_t select_ntuple(struct port_info *, struct l2t_entry *, uint32_t);
235 
236 /* t4_connect.c */
237 void t4_init_connect_cpl_handlers(struct adapter *);
238 int t4_connect(struct toedev *, struct socket *, struct rtentry *,
239     struct sockaddr *);
240 
241 /* t4_listen.c */
242 void t4_init_listen_cpl_handlers(struct adapter *);
243 int t4_listen_start(struct toedev *, struct tcpcb *);
244 int t4_listen_stop(struct toedev *, struct tcpcb *);
245 void t4_syncache_added(struct toedev *, void *);
246 void t4_syncache_removed(struct toedev *, void *);
247 int t4_syncache_respond(struct toedev *, void *, struct mbuf *);
248 int do_abort_req_synqe(struct sge_iq *, const struct rss_header *,
249     struct mbuf *);
250 int do_abort_rpl_synqe(struct sge_iq *, const struct rss_header *,
251     struct mbuf *);
252 void t4_offload_socket(struct toedev *, void *, struct socket *);
253 
254 /* t4_cpl_io.c */
255 void t4_init_cpl_io_handlers(struct adapter *);
256 void t4_uninit_cpl_io_handlers(struct adapter *);
257 void send_abort_rpl(struct adapter *, struct sge_wrq *, int , int);
258 void send_flowc_wr(struct toepcb *, struct flowc_tx_params *);
259 void send_reset(struct adapter *, struct toepcb *, uint32_t);
260 void make_established(struct toepcb *, uint32_t, uint32_t, uint16_t);
261 void t4_rcvd(struct toedev *, struct tcpcb *);
262 int t4_tod_output(struct toedev *, struct tcpcb *);
263 int t4_send_fin(struct toedev *, struct tcpcb *);
264 int t4_send_rst(struct toedev *, struct tcpcb *);
265 void t4_set_tcb_field(struct adapter *, struct toepcb *, uint16_t, uint64_t,
266     uint64_t);
267 
268 /* t4_ddp.c */
269 void t4_init_ddp(struct adapter *, struct tom_data *);
270 void t4_uninit_ddp(struct adapter *, struct tom_data *);
271 int t4_soreceive_ddp(struct socket *, struct sockaddr **, struct uio *,
272     struct mbuf **, struct mbuf **, int *);
273 void enable_ddp(struct adapter *, struct toepcb *toep);
274 void release_ddp_resources(struct toepcb *toep);
275 #endif
276