xref: /freebsd/sys/dev/cxgbe/tom/t4_tom.h (revision 1f4bcc459a76b7aa664f3fd557684cd0ba6da352)
1 /*-
2  * Copyright (c) 2012, 2015 Chelsio Communications, Inc.
3  * All rights reserved.
4  * Written by: Navdeep Parhar <np@FreeBSD.org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  *
29  */
30 
31 #ifndef __T4_TOM_H__
32 #define __T4_TOM_H__
33 #include <sys/vmem.h>
34 
35 #define LISTEN_HASH_SIZE 32
36 
37 /*
38  * Min receive window.  We want it to be large enough to accommodate receive
39  * coalescing, handle jumbo frames, and not trigger sender SWS avoidance.
40  */
41 #define MIN_RCV_WND (24 * 1024U)
42 
43 /*
44  * Max receive window supported by HW in bytes.  Only a small part of it can
45  * be set through option0, the rest needs to be set through RX_DATA_ACK.
46  */
47 #define MAX_RCV_WND ((1U << 27) - 1)
48 
49 #define	DDP_RSVD_WIN (16 * 1024U)
50 #define	SB_DDP_INDICATE	SB_IN_TOE	/* soreceive must respond to indicate */
51 
52 #define USE_DDP_RX_FLOW_CONTROL
53 
54 /* TOE PCB flags */
55 enum {
56 	TPF_ATTACHED	   = (1 << 0),	/* a tcpcb refers to this toepcb */
57 	TPF_FLOWC_WR_SENT  = (1 << 1),	/* firmware flow context WR sent */
58 	TPF_TX_DATA_SENT   = (1 << 2),	/* some data sent */
59 	TPF_TX_SUSPENDED   = (1 << 3),	/* tx suspended for lack of resources */
60 	TPF_SEND_FIN	   = (1 << 4),	/* send FIN after all pending data */
61 	TPF_FIN_SENT	   = (1 << 5),	/* FIN has been sent */
62 	TPF_ABORT_SHUTDOWN = (1 << 6),	/* connection abort is in progress */
63 	TPF_CPL_PENDING    = (1 << 7),	/* haven't received the last CPL */
64 	TPF_SYNQE	   = (1 << 8),	/* synq_entry, not really a toepcb */
65 	TPF_SYNQE_NEEDFREE = (1 << 9),	/* synq_entry was malloc'd separately */
66 	TPF_SYNQE_TCPDDP   = (1 << 10),	/* ulp_mode TCPDDP in toepcb */
67 	TPF_SYNQE_EXPANDED = (1 << 11),	/* toepcb ready, tid context updated */
68 	TPF_SYNQE_HAS_L2TE = (1 << 12),	/* we've replied to PASS_ACCEPT_REQ */
69 };
70 
71 enum {
72 	DDP_OK		= (1 << 0),	/* OK to turn on DDP */
73 	DDP_SC_REQ	= (1 << 1),	/* state change (on/off) requested */
74 	DDP_ON		= (1 << 2),	/* DDP is turned on */
75 	DDP_BUF0_ACTIVE	= (1 << 3),	/* buffer 0 in use (not invalidated) */
76 	DDP_BUF1_ACTIVE	= (1 << 4),	/* buffer 1 in use (not invalidated) */
77 };
78 
79 struct ofld_tx_sdesc {
80 	uint32_t plen;		/* payload length */
81 	uint8_t tx_credits;	/* firmware tx credits (unit is 16B) */
82 };
83 
84 struct ddp_buffer {
85 	uint32_t tag;	/* includes color, page pod addr, and DDP page size */
86 	u_int ppod_addr;
87 	int nppods;
88 	int offset;
89 	int len;
90 	int npages;
91 	vm_page_t *pages;
92 };
93 
94 struct toepcb {
95 	TAILQ_ENTRY(toepcb) link; /* toep_list */
96 	u_int flags;		/* miscellaneous flags */
97 	struct tom_data *td;
98 	struct inpcb *inp;	/* backpointer to host stack's PCB */
99 	struct vi_info *vi;	/* virtual interface */
100 	struct sge_wrq *ofld_txq;
101 	struct sge_ofld_rxq *ofld_rxq;
102 	struct sge_wrq *ctrlq;
103 	struct l2t_entry *l2te;	/* L2 table entry used by this connection */
104 	struct clip_entry *ce;	/* CLIP table entry used by this tid */
105 	int tid;		/* Connection identifier */
106 
107 	/* tx credit handling */
108 	u_int tx_total;		/* total tx WR credits (in 16B units) */
109 	u_int tx_credits;	/* tx WR credits (in 16B units) available */
110 	u_int tx_nocompl;	/* tx WR credits since last compl request */
111 	u_int plen_nocompl;	/* payload since last compl request */
112 
113 	/* rx credit handling */
114 	u_int sb_cc;		/* last noted value of so_rcv->sb_cc */
115 	int rx_credits;		/* rx credits (in bytes) to be returned to hw */
116 
117 	u_int ulp_mode;	/* ULP mode */
118 	void *ulpcb;
119 	void *ulpcb2;
120 	struct mbufq ulp_pduq;	/* PDUs waiting to be sent out. */
121 	struct mbufq ulp_pdu_reclaimq;
122 
123 	u_int ddp_flags;
124 	struct ddp_buffer *db[2];
125 	time_t ddp_disabled;
126 	uint8_t ddp_score;
127 
128 	/* Tx software descriptor */
129 	uint8_t txsd_total;
130 	uint8_t txsd_pidx;
131 	uint8_t txsd_cidx;
132 	uint8_t txsd_avail;
133 	struct ofld_tx_sdesc txsd[];
134 };
135 
136 struct flowc_tx_params {
137 	uint32_t snd_nxt;
138 	uint32_t rcv_nxt;
139 	unsigned int snd_space;
140 	unsigned int mss;
141 };
142 
143 #define	DDP_RETRY_WAIT	5	/* seconds to wait before re-enabling DDP */
144 #define	DDP_LOW_SCORE	1
145 #define	DDP_HIGH_SCORE	3
146 
147 /*
148  * Compressed state for embryonic connections for a listener.  Barely fits in
149  * 64B, try not to grow it further.
150  */
151 struct synq_entry {
152 	TAILQ_ENTRY(synq_entry) link;	/* listen_ctx's synq link */
153 	int flags;			/* same as toepcb's tp_flags */
154 	int tid;
155 	struct listen_ctx *lctx;	/* backpointer to listen ctx */
156 	struct mbuf *syn;
157 	uint32_t iss;
158 	uint32_t ts;
159 	volatile uintptr_t wr;
160 	volatile u_int refcnt;
161 	uint16_t l2e_idx;
162 	uint16_t rcv_bufsize;
163 };
164 
165 /* listen_ctx flags */
166 #define LCTX_RPL_PENDING 1	/* waiting for a CPL_PASS_OPEN_RPL */
167 
168 struct listen_ctx {
169 	LIST_ENTRY(listen_ctx) link;	/* listen hash linkage */
170 	volatile int refcount;
171 	int stid;
172 	struct stid_region stid_region;
173 	int flags;
174 	struct inpcb *inp;		/* listening socket's inp */
175 	struct sge_wrq *ctrlq;
176 	struct sge_ofld_rxq *ofld_rxq;
177 	struct clip_entry *ce;
178 	TAILQ_HEAD(, synq_entry) synq;
179 };
180 
181 struct clip_entry {
182 	TAILQ_ENTRY(clip_entry) link;
183 	struct in6_addr lip;	/* local IPv6 address */
184 	u_int refcount;
185 };
186 
187 TAILQ_HEAD(clip_head, clip_entry);
188 struct tom_data {
189 	struct toedev tod;
190 
191 	/* toepcb's associated with this TOE device */
192 	struct mtx toep_list_lock;
193 	TAILQ_HEAD(, toepcb) toep_list;
194 
195 	struct mtx lctx_hash_lock;
196 	LIST_HEAD(, listen_ctx) *listen_hash;
197 	u_long listen_mask;
198 	int lctx_count;		/* # of lctx in the hash table */
199 
200 	u_int ppod_start;
201 	vmem_t *ppod_arena;
202 
203 	struct mtx clip_table_lock;
204 	struct clip_head clip_table;
205 	int clip_gen;
206 
207 	/* WRs that will not be sent to the chip because L2 resolution failed */
208 	struct mtx unsent_wr_lock;
209 	STAILQ_HEAD(, wrqe) unsent_wr_list;
210 	struct task reclaim_wr_resources;
211 };
212 
213 static inline struct tom_data *
214 tod_td(struct toedev *tod)
215 {
216 
217 	return (__containerof(tod, struct tom_data, tod));
218 }
219 
220 static inline struct adapter *
221 td_adapter(struct tom_data *td)
222 {
223 
224 	return (td->tod.tod_softc);
225 }
226 
227 static inline void
228 set_mbuf_ulp_submode(struct mbuf *m, uint8_t ulp_submode)
229 {
230 
231 	M_ASSERTPKTHDR(m);
232 	m->m_pkthdr.PH_per.eight[0] = ulp_submode;
233 }
234 
235 static inline uint8_t
236 mbuf_ulp_submode(struct mbuf *m)
237 {
238 
239 	M_ASSERTPKTHDR(m);
240 	return (m->m_pkthdr.PH_per.eight[0]);
241 }
242 
243 /* t4_tom.c */
244 struct toepcb *alloc_toepcb(struct vi_info *, int, int, int);
245 void free_toepcb(struct toepcb *);
246 void offload_socket(struct socket *, struct toepcb *);
247 void undo_offload_socket(struct socket *);
248 void final_cpl_received(struct toepcb *);
249 void insert_tid(struct adapter *, int, void *);
250 void *lookup_tid(struct adapter *, int);
251 void update_tid(struct adapter *, int, void *);
252 void remove_tid(struct adapter *, int);
253 void release_tid(struct adapter *, int, struct sge_wrq *);
254 int find_best_mtu_idx(struct adapter *, struct in_conninfo *, int);
255 u_long select_rcv_wnd(struct socket *);
256 int select_rcv_wscale(void);
257 uint64_t calc_opt0(struct socket *, struct vi_info *, struct l2t_entry *,
258     int, int, int, int);
259 uint64_t select_ntuple(struct vi_info *, struct l2t_entry *);
260 void set_tcpddp_ulp_mode(struct toepcb *);
261 int negative_advice(int);
262 struct clip_entry *hold_lip(struct tom_data *, struct in6_addr *);
263 void release_lip(struct tom_data *, struct clip_entry *);
264 
265 /* t4_connect.c */
266 void t4_init_connect_cpl_handlers(struct adapter *);
267 int t4_connect(struct toedev *, struct socket *, struct rtentry *,
268     struct sockaddr *);
269 void act_open_failure_cleanup(struct adapter *, u_int, u_int);
270 
271 /* t4_listen.c */
272 void t4_init_listen_cpl_handlers(struct adapter *);
273 int t4_listen_start(struct toedev *, struct tcpcb *);
274 int t4_listen_stop(struct toedev *, struct tcpcb *);
275 void t4_syncache_added(struct toedev *, void *);
276 void t4_syncache_removed(struct toedev *, void *);
277 int t4_syncache_respond(struct toedev *, void *, struct mbuf *);
278 int do_abort_req_synqe(struct sge_iq *, const struct rss_header *,
279     struct mbuf *);
280 int do_abort_rpl_synqe(struct sge_iq *, const struct rss_header *,
281     struct mbuf *);
282 void t4_offload_socket(struct toedev *, void *, struct socket *);
283 
284 /* t4_cpl_io.c */
285 void t4_init_cpl_io_handlers(struct adapter *);
286 void t4_uninit_cpl_io_handlers(struct adapter *);
287 void send_abort_rpl(struct adapter *, struct sge_wrq *, int , int);
288 void send_flowc_wr(struct toepcb *, struct flowc_tx_params *);
289 void send_reset(struct adapter *, struct toepcb *, uint32_t);
290 void make_established(struct toepcb *, uint32_t, uint32_t, uint16_t);
291 void t4_rcvd(struct toedev *, struct tcpcb *);
292 int t4_tod_output(struct toedev *, struct tcpcb *);
293 int t4_send_fin(struct toedev *, struct tcpcb *);
294 int t4_send_rst(struct toedev *, struct tcpcb *);
295 void t4_set_tcb_field(struct adapter *, struct toepcb *, int, uint16_t,
296     uint64_t, uint64_t);
297 void t4_push_frames(struct adapter *sc, struct toepcb *toep, int drop);
298 void t4_push_pdus(struct adapter *sc, struct toepcb *toep, int drop);
299 
300 /* t4_ddp.c */
301 void t4_init_ddp(struct adapter *, struct tom_data *);
302 void t4_uninit_ddp(struct adapter *, struct tom_data *);
303 int t4_soreceive_ddp(struct socket *, struct sockaddr **, struct uio *,
304     struct mbuf **, struct mbuf **, int *);
305 void enable_ddp(struct adapter *, struct toepcb *toep);
306 void release_ddp_resources(struct toepcb *toep);
307 void handle_ddp_close(struct toepcb *, struct tcpcb *, struct sockbuf *,
308     uint32_t);
309 void insert_ddp_data(struct toepcb *, uint32_t);
310 
311 #endif
312