1 /*- 2 * Copyright (c) 2016 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: John Baldwin <jhb@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include "opt_inet.h" 32 #include "opt_inet6.h" 33 34 #include <sys/param.h> 35 #include <sys/bus.h> 36 #include <sys/conf.h> 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/priv.h> 40 #include <dev/pci/pcivar.h> 41 #if defined(__i386__) || defined(__amd64__) 42 #include <vm/vm.h> 43 #include <vm/pmap.h> 44 #endif 45 46 #include "common/common.h" 47 #include "common/t4_regs.h" 48 #include "t4_ioctl.h" 49 #include "t4_mp_ring.h" 50 51 /* 52 * Some notes: 53 * 54 * The Virtual Interfaces are connected to an internal switch on the chip 55 * which allows VIs attached to the same port to talk to each other even when 56 * the port link is down. As a result, we might want to always report a 57 * VF's link as being "up". 58 * 59 * XXX: Add a TUNABLE and possible per-device sysctl for this? 60 */ 61 62 struct intrs_and_queues { 63 uint16_t intr_type; /* MSI, or MSI-X */ 64 uint16_t nirq; /* Total # of vectors */ 65 uint16_t ntxq; /* # of NIC txq's for each port */ 66 uint16_t nrxq; /* # of NIC rxq's for each port */ 67 }; 68 69 struct { 70 uint16_t device; 71 char *desc; 72 } t4vf_pciids[] = { 73 {0x4800, "Chelsio T440-dbg VF"}, 74 {0x4801, "Chelsio T420-CR VF"}, 75 {0x4802, "Chelsio T422-CR VF"}, 76 {0x4803, "Chelsio T440-CR VF"}, 77 {0x4804, "Chelsio T420-BCH VF"}, 78 {0x4805, "Chelsio T440-BCH VF"}, 79 {0x4806, "Chelsio T440-CH VF"}, 80 {0x4807, "Chelsio T420-SO VF"}, 81 {0x4808, "Chelsio T420-CX VF"}, 82 {0x4809, "Chelsio T420-BT VF"}, 83 {0x480a, "Chelsio T404-BT VF"}, 84 {0x480e, "Chelsio T440-LP-CR VF"}, 85 }, t5vf_pciids[] = { 86 {0x5800, "Chelsio T580-dbg VF"}, 87 {0x5801, "Chelsio T520-CR VF"}, /* 2 x 10G */ 88 {0x5802, "Chelsio T522-CR VF"}, /* 2 x 10G, 2 X 1G */ 89 {0x5803, "Chelsio T540-CR VF"}, /* 4 x 10G */ 90 {0x5807, "Chelsio T520-SO VF"}, /* 2 x 10G, nomem */ 91 {0x5809, "Chelsio T520-BT VF"}, /* 2 x 10GBaseT */ 92 {0x580a, "Chelsio T504-BT VF"}, /* 4 x 1G */ 93 {0x580d, "Chelsio T580-CR VF"}, /* 2 x 40G */ 94 {0x580e, "Chelsio T540-LP-CR VF"}, /* 4 x 10G */ 95 {0x5810, "Chelsio T580-LP-CR VF"}, /* 2 x 40G */ 96 {0x5811, "Chelsio T520-LL-CR VF"}, /* 2 x 10G */ 97 {0x5812, "Chelsio T560-CR VF"}, /* 1 x 40G, 2 x 10G */ 98 {0x5814, "Chelsio T580-LP-SO-CR VF"}, /* 2 x 40G, nomem */ 99 {0x5815, "Chelsio T502-BT VF"}, /* 2 x 1G */ 100 #ifdef notyet 101 {0x5804, "Chelsio T520-BCH VF"}, 102 {0x5805, "Chelsio T540-BCH VF"}, 103 {0x5806, "Chelsio T540-CH VF"}, 104 {0x5808, "Chelsio T520-CX VF"}, 105 {0x580b, "Chelsio B520-SR VF"}, 106 {0x580c, "Chelsio B504-BT VF"}, 107 {0x580f, "Chelsio Amsterdam VF"}, 108 {0x5813, "Chelsio T580-CHR VF"}, 109 #endif 110 }, t6vf_pciids[] = { 111 {0x6800, "Chelsio T6-DBG-25 VF"}, /* 2 x 10/25G, debug */ 112 {0x6801, "Chelsio T6225-CR VF"}, /* 2 x 10/25G */ 113 {0x6802, "Chelsio T6225-SO-CR VF"}, /* 2 x 10/25G, nomem */ 114 {0x6803, "Chelsio T6425-CR VF"}, /* 4 x 10/25G */ 115 {0x6804, "Chelsio T6425-SO-CR VF"}, /* 4 x 10/25G, nomem */ 116 {0x6805, "Chelsio T6225-OCP-SO VF"}, /* 2 x 10/25G, nomem */ 117 {0x6806, "Chelsio T62100-OCP-SO VF"}, /* 2 x 40/50/100G, nomem */ 118 {0x6807, "Chelsio T62100-LP-CR VF"}, /* 2 x 40/50/100G */ 119 {0x6808, "Chelsio T62100-SO-CR VF"}, /* 2 x 40/50/100G, nomem */ 120 {0x6809, "Chelsio T6210-BT VF"}, /* 2 x 10GBASE-T */ 121 {0x680d, "Chelsio T62100-CR VF"}, /* 2 x 40/50/100G */ 122 {0x6810, "Chelsio T6-DBG-100 VF"}, /* 2 x 40/50/100G, debug */ 123 {0x6811, "Chelsio T6225-LL-CR VF"}, /* 2 x 10/25G */ 124 {0x6814, "Chelsio T61100-OCP-SO VF"}, /* 1 x 40/50/100G, nomem */ 125 {0x6815, "Chelsio T6201-BT VF"}, /* 2 x 1000BASE-T */ 126 127 /* Custom */ 128 {0x6880, "Chelsio T6225 80 VF"}, 129 {0x6881, "Chelsio T62100 81 VF"}, 130 }; 131 132 static d_ioctl_t t4vf_ioctl; 133 134 static struct cdevsw t4vf_cdevsw = { 135 .d_version = D_VERSION, 136 .d_ioctl = t4vf_ioctl, 137 .d_name = "t4vf", 138 }; 139 140 static int 141 t4vf_probe(device_t dev) 142 { 143 uint16_t d; 144 size_t i; 145 146 d = pci_get_device(dev); 147 for (i = 0; i < nitems(t4vf_pciids); i++) { 148 if (d == t4vf_pciids[i].device) { 149 device_set_desc(dev, t4vf_pciids[i].desc); 150 return (BUS_PROBE_DEFAULT); 151 } 152 } 153 return (ENXIO); 154 } 155 156 static int 157 t5vf_probe(device_t dev) 158 { 159 uint16_t d; 160 size_t i; 161 162 d = pci_get_device(dev); 163 for (i = 0; i < nitems(t5vf_pciids); i++) { 164 if (d == t5vf_pciids[i].device) { 165 device_set_desc(dev, t5vf_pciids[i].desc); 166 return (BUS_PROBE_DEFAULT); 167 } 168 } 169 return (ENXIO); 170 } 171 172 static int 173 t6vf_probe(device_t dev) 174 { 175 uint16_t d; 176 size_t i; 177 178 d = pci_get_device(dev); 179 for (i = 0; i < nitems(t6vf_pciids); i++) { 180 if (d == t6vf_pciids[i].device) { 181 device_set_desc(dev, t6vf_pciids[i].desc); 182 return (BUS_PROBE_DEFAULT); 183 } 184 } 185 return (ENXIO); 186 } 187 188 #define FW_PARAM_DEV(param) \ 189 (V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | \ 190 V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_##param)) 191 #define FW_PARAM_PFVF(param) \ 192 (V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_PFVF) | \ 193 V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_PFVF_##param)) 194 195 static int 196 get_params__pre_init(struct adapter *sc) 197 { 198 int rc; 199 uint32_t param[3], val[3]; 200 201 param[0] = FW_PARAM_DEV(FWREV); 202 param[1] = FW_PARAM_DEV(TPREV); 203 param[2] = FW_PARAM_DEV(CCLK); 204 rc = -t4vf_query_params(sc, nitems(param), param, val); 205 if (rc != 0) { 206 device_printf(sc->dev, 207 "failed to query parameters (pre_init): %d.\n", rc); 208 return (rc); 209 } 210 211 sc->params.fw_vers = val[0]; 212 sc->params.tp_vers = val[1]; 213 sc->params.vpd.cclk = val[2]; 214 215 snprintf(sc->fw_version, sizeof(sc->fw_version), "%u.%u.%u.%u", 216 G_FW_HDR_FW_VER_MAJOR(sc->params.fw_vers), 217 G_FW_HDR_FW_VER_MINOR(sc->params.fw_vers), 218 G_FW_HDR_FW_VER_MICRO(sc->params.fw_vers), 219 G_FW_HDR_FW_VER_BUILD(sc->params.fw_vers)); 220 221 snprintf(sc->tp_version, sizeof(sc->tp_version), "%u.%u.%u.%u", 222 G_FW_HDR_FW_VER_MAJOR(sc->params.tp_vers), 223 G_FW_HDR_FW_VER_MINOR(sc->params.tp_vers), 224 G_FW_HDR_FW_VER_MICRO(sc->params.tp_vers), 225 G_FW_HDR_FW_VER_BUILD(sc->params.tp_vers)); 226 227 return (0); 228 } 229 230 static int 231 get_params__post_init(struct adapter *sc) 232 { 233 int rc; 234 235 rc = -t4vf_get_sge_params(sc); 236 if (rc != 0) { 237 device_printf(sc->dev, 238 "unable to retrieve adapter SGE parameters: %d\n", rc); 239 return (rc); 240 } 241 242 rc = -t4vf_get_rss_glb_config(sc); 243 if (rc != 0) { 244 device_printf(sc->dev, 245 "unable to retrieve adapter RSS parameters: %d\n", rc); 246 return (rc); 247 } 248 if (sc->params.rss.mode != FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL) { 249 device_printf(sc->dev, 250 "unable to operate with global RSS mode %d\n", 251 sc->params.rss.mode); 252 return (EINVAL); 253 } 254 255 rc = t4_read_chip_settings(sc); 256 if (rc != 0) 257 return (rc); 258 259 /* 260 * Grab our Virtual Interface resource allocation, extract the 261 * features that we're interested in and do a bit of sanity testing on 262 * what we discover. 263 */ 264 rc = -t4vf_get_vfres(sc); 265 if (rc != 0) { 266 device_printf(sc->dev, 267 "unable to get virtual interface resources: %d\n", rc); 268 return (rc); 269 } 270 271 /* 272 * Check for various parameter sanity issues. 273 */ 274 if (sc->params.vfres.pmask == 0) { 275 device_printf(sc->dev, "no port access configured/usable!\n"); 276 return (EINVAL); 277 } 278 if (sc->params.vfres.nvi == 0) { 279 device_printf(sc->dev, 280 "no virtual interfaces configured/usable!\n"); 281 return (EINVAL); 282 } 283 sc->params.portvec = sc->params.vfres.pmask; 284 285 return (0); 286 } 287 288 static int 289 set_params__post_init(struct adapter *sc) 290 { 291 uint32_t param, val; 292 293 /* ask for encapsulated CPLs */ 294 param = FW_PARAM_PFVF(CPLFW4MSG_ENCAP); 295 val = 1; 296 (void)t4vf_set_params(sc, 1, ¶m, &val); 297 298 return (0); 299 } 300 301 #undef FW_PARAM_PFVF 302 #undef FW_PARAM_DEV 303 304 static int 305 cfg_itype_and_nqueues(struct adapter *sc, struct intrs_and_queues *iaq) 306 { 307 struct vf_resources *vfres; 308 int nrxq, ntxq, nports; 309 int itype, iq_avail, navail, rc; 310 311 /* 312 * Figure out the layout of queues across our VIs and ensure 313 * we can allocate enough interrupts for our layout. 314 */ 315 vfres = &sc->params.vfres; 316 nports = sc->params.nports; 317 bzero(iaq, sizeof(*iaq)); 318 319 for (itype = INTR_MSIX; itype != 0; itype >>= 1) { 320 if (itype == INTR_INTX) 321 continue; 322 323 if (itype == INTR_MSIX) 324 navail = pci_msix_count(sc->dev); 325 else 326 navail = pci_msi_count(sc->dev); 327 328 if (navail == 0) 329 continue; 330 331 iaq->intr_type = itype; 332 333 /* 334 * XXX: The Linux driver reserves an Ingress Queue for 335 * forwarded interrupts when using MSI (but not MSI-X). 336 * It seems it just always asks for 2 interrupts and 337 * forwards all rxqs to the forwarded interrupt. 338 * 339 * We must reserve one IRQ for the for the firmware 340 * event queue. 341 * 342 * Every rxq requires an ingress queue with a free 343 * list and interrupts and an egress queue. Every txq 344 * requires an ETH egress queue. 345 */ 346 iaq->nirq = T4VF_EXTRA_INTR; 347 348 /* 349 * First, determine how many queues we can allocate. 350 * Start by finding the upper bound on rxqs from the 351 * limit on ingress queues. 352 */ 353 iq_avail = vfres->niqflint - iaq->nirq; 354 if (iq_avail < nports) { 355 device_printf(sc->dev, 356 "Not enough ingress queues (%d) for %d ports\n", 357 vfres->niqflint, nports); 358 return (ENXIO); 359 } 360 361 /* 362 * Try to honor the cap on interrupts. If there aren't 363 * enough interrupts for at least one interrupt per 364 * port, then don't bother, we will just forward all 365 * interrupts to one interrupt in that case. 366 */ 367 if (iaq->nirq + nports <= navail) { 368 if (iq_avail > navail - iaq->nirq) 369 iq_avail = navail - iaq->nirq; 370 } 371 372 nrxq = nports * t4_nrxq; 373 if (nrxq > iq_avail) { 374 /* 375 * Too many ingress queues. Use what we can. 376 */ 377 nrxq = (iq_avail / nports) * nports; 378 } 379 KASSERT(nrxq <= iq_avail, ("too many ingress queues")); 380 381 /* 382 * Next, determine the upper bound on txqs from the limit 383 * on ETH queues. 384 */ 385 if (vfres->nethctrl < nports) { 386 device_printf(sc->dev, 387 "Not enough ETH queues (%d) for %d ports\n", 388 vfres->nethctrl, nports); 389 return (ENXIO); 390 } 391 392 ntxq = nports * t4_ntxq; 393 if (ntxq > vfres->nethctrl) { 394 /* 395 * Too many ETH queues. Use what we can. 396 */ 397 ntxq = (vfres->nethctrl / nports) * nports; 398 } 399 KASSERT(ntxq <= vfres->nethctrl, ("too many ETH queues")); 400 401 /* 402 * Finally, ensure we have enough egress queues. 403 */ 404 if (vfres->neq < nports * 2) { 405 device_printf(sc->dev, 406 "Not enough egress queues (%d) for %d ports\n", 407 vfres->neq, nports); 408 return (ENXIO); 409 } 410 if (nrxq + ntxq > vfres->neq) { 411 /* Just punt and use 1 for everything. */ 412 nrxq = ntxq = nports; 413 } 414 KASSERT(nrxq <= iq_avail, ("too many ingress queues")); 415 KASSERT(ntxq <= vfres->nethctrl, ("too many ETH queues")); 416 KASSERT(nrxq + ntxq <= vfres->neq, ("too many egress queues")); 417 418 /* 419 * Do we have enough interrupts? For MSI the interrupts 420 * have to be a power of 2 as well. 421 */ 422 iaq->nirq += nrxq; 423 iaq->ntxq = ntxq; 424 iaq->nrxq = nrxq; 425 if (iaq->nirq <= navail && 426 (itype != INTR_MSI || powerof2(iaq->nirq))) { 427 navail = iaq->nirq; 428 if (itype == INTR_MSIX) 429 rc = pci_alloc_msix(sc->dev, &navail); 430 else 431 rc = pci_alloc_msi(sc->dev, &navail); 432 if (rc != 0) { 433 device_printf(sc->dev, 434 "failed to allocate vectors:%d, type=%d, req=%d, rcvd=%d\n", 435 itype, rc, iaq->nirq, navail); 436 return (rc); 437 } 438 if (navail == iaq->nirq) { 439 return (0); 440 } 441 pci_release_msi(sc->dev); 442 } 443 444 /* Fall back to a single interrupt. */ 445 iaq->nirq = 1; 446 navail = iaq->nirq; 447 if (itype == INTR_MSIX) 448 rc = pci_alloc_msix(sc->dev, &navail); 449 else 450 rc = pci_alloc_msi(sc->dev, &navail); 451 if (rc != 0) 452 device_printf(sc->dev, 453 "failed to allocate vectors:%d, type=%d, req=%d, rcvd=%d\n", 454 itype, rc, iaq->nirq, navail); 455 return (rc); 456 } 457 458 device_printf(sc->dev, 459 "failed to find a usable interrupt type. " 460 "allowed=%d, msi-x=%d, msi=%d, intx=1", t4_intr_types, 461 pci_msix_count(sc->dev), pci_msi_count(sc->dev)); 462 463 return (ENXIO); 464 } 465 466 static int 467 t4vf_attach(device_t dev) 468 { 469 struct adapter *sc; 470 int rc = 0, i, j, rqidx, tqidx; 471 struct make_dev_args mda; 472 struct intrs_and_queues iaq; 473 struct sge *s; 474 475 sc = device_get_softc(dev); 476 sc->dev = dev; 477 pci_enable_busmaster(dev); 478 pci_set_max_read_req(dev, 4096); 479 sc->params.pci.mps = pci_get_max_payload(dev); 480 481 sc->flags |= IS_VF; 482 483 sc->sge_gts_reg = VF_SGE_REG(A_SGE_VF_GTS); 484 sc->sge_kdoorbell_reg = VF_SGE_REG(A_SGE_VF_KDOORBELL); 485 snprintf(sc->lockname, sizeof(sc->lockname), "%s", 486 device_get_nameunit(dev)); 487 mtx_init(&sc->sc_lock, sc->lockname, 0, MTX_DEF); 488 t4_add_adapter(sc); 489 490 mtx_init(&sc->sfl_lock, "starving freelists", 0, MTX_DEF); 491 TAILQ_INIT(&sc->sfl); 492 callout_init_mtx(&sc->sfl_callout, &sc->sfl_lock, 0); 493 494 mtx_init(&sc->reg_lock, "indirect register access", 0, MTX_DEF); 495 496 rc = t4_map_bars_0_and_4(sc); 497 if (rc != 0) 498 goto done; /* error message displayed already */ 499 500 rc = -t4vf_prep_adapter(sc); 501 if (rc != 0) 502 goto done; 503 504 t4_init_devnames(sc); 505 if (sc->names == NULL) { 506 rc = ENOTSUP; 507 goto done; /* error message displayed already */ 508 } 509 510 /* 511 * Leave the 'pf' and 'mbox' values as zero. This ensures 512 * that various firmware messages do not set the fields which 513 * is the correct thing to do for a VF. 514 */ 515 516 memset(sc->chan_map, 0xff, sizeof(sc->chan_map)); 517 518 make_dev_args_init(&mda); 519 mda.mda_devsw = &t4vf_cdevsw; 520 mda.mda_uid = UID_ROOT; 521 mda.mda_gid = GID_WHEEL; 522 mda.mda_mode = 0600; 523 mda.mda_si_drv1 = sc; 524 rc = make_dev_s(&mda, &sc->cdev, "%s", device_get_nameunit(dev)); 525 if (rc != 0) 526 device_printf(dev, "failed to create nexus char device: %d.\n", 527 rc); 528 529 #if defined(__i386__) 530 if ((cpu_feature & CPUID_CX8) == 0) { 531 device_printf(dev, "64 bit atomics not available.\n"); 532 rc = ENOTSUP; 533 goto done; 534 } 535 #endif 536 537 /* 538 * Some environments do not properly handle PCIE FLRs -- e.g. in Linux 539 * 2.6.31 and later we can't call pci_reset_function() in order to 540 * issue an FLR because of a self- deadlock on the device semaphore. 541 * Meanwhile, the OS infrastructure doesn't issue FLRs in all the 542 * cases where they're needed -- for instance, some versions of KVM 543 * fail to reset "Assigned Devices" when the VM reboots. Therefore we 544 * use the firmware based reset in order to reset any per function 545 * state. 546 */ 547 rc = -t4vf_fw_reset(sc); 548 if (rc != 0) { 549 device_printf(dev, "FW reset failed: %d\n", rc); 550 goto done; 551 } 552 sc->flags |= FW_OK; 553 554 /* 555 * Grab basic operational parameters. These will predominantly have 556 * been set up by the Physical Function Driver or will be hard coded 557 * into the adapter. We just have to live with them ... Note that 558 * we _must_ get our VPD parameters before our SGE parameters because 559 * we need to know the adapter's core clock from the VPD in order to 560 * properly decode the SGE Timer Values. 561 */ 562 rc = get_params__pre_init(sc); 563 if (rc != 0) 564 goto done; /* error message displayed already */ 565 rc = get_params__post_init(sc); 566 if (rc != 0) 567 goto done; /* error message displayed already */ 568 569 rc = set_params__post_init(sc); 570 if (rc != 0) 571 goto done; /* error message displayed already */ 572 573 rc = t4_map_bar_2(sc); 574 if (rc != 0) 575 goto done; /* error message displayed already */ 576 577 rc = t4_create_dma_tag(sc); 578 if (rc != 0) 579 goto done; /* error message displayed already */ 580 581 /* 582 * The number of "ports" which we support is equal to the number of 583 * Virtual Interfaces with which we've been provisioned. 584 */ 585 sc->params.nports = imin(sc->params.vfres.nvi, MAX_NPORTS); 586 587 /* 588 * We may have been provisioned with more VIs than the number of 589 * ports we're allowed to access (our Port Access Rights Mask). 590 * Just use a single VI for each port. 591 */ 592 sc->params.nports = imin(sc->params.nports, 593 bitcount32(sc->params.vfres.pmask)); 594 595 #ifdef notyet 596 /* 597 * XXX: The Linux VF driver will lower nports if it thinks there 598 * are too few resources in vfres (niqflint, nethctrl, neq). 599 */ 600 #endif 601 602 /* 603 * First pass over all the ports - allocate VIs and initialize some 604 * basic parameters like mac address, port type, etc. 605 */ 606 for_each_port(sc, i) { 607 struct port_info *pi; 608 609 pi = malloc(sizeof(*pi), M_CXGBE, M_ZERO | M_WAITOK); 610 sc->port[i] = pi; 611 612 /* These must be set before t4_port_init */ 613 pi->adapter = sc; 614 pi->port_id = i; 615 pi->nvi = 1; 616 pi->vi = malloc(sizeof(struct vi_info) * pi->nvi, M_CXGBE, 617 M_ZERO | M_WAITOK); 618 619 /* 620 * Allocate the "main" VI and initialize parameters 621 * like mac addr. 622 */ 623 rc = -t4_port_init(sc, sc->mbox, sc->pf, 0, i); 624 if (rc != 0) { 625 device_printf(dev, "unable to initialize port %d: %d\n", 626 i, rc); 627 free(pi->vi, M_CXGBE); 628 free(pi, M_CXGBE); 629 sc->port[i] = NULL; 630 goto done; 631 } 632 633 /* No t4_link_start. */ 634 635 snprintf(pi->lockname, sizeof(pi->lockname), "%sp%d", 636 device_get_nameunit(dev), i); 637 mtx_init(&pi->pi_lock, pi->lockname, 0, MTX_DEF); 638 sc->chan_map[pi->tx_chan] = i; 639 640 pi->dev = device_add_child(dev, sc->names->vf_ifnet_name, -1); 641 if (pi->dev == NULL) { 642 device_printf(dev, 643 "failed to add device for port %d.\n", i); 644 rc = ENXIO; 645 goto done; 646 } 647 pi->vi[0].dev = pi->dev; 648 device_set_softc(pi->dev, pi); 649 } 650 651 /* 652 * Interrupt type, # of interrupts, # of rx/tx queues, etc. 653 */ 654 rc = cfg_itype_and_nqueues(sc, &iaq); 655 if (rc != 0) 656 goto done; /* error message displayed already */ 657 658 sc->intr_type = iaq.intr_type; 659 sc->intr_count = iaq.nirq; 660 661 s = &sc->sge; 662 s->nrxq = sc->params.nports * iaq.nrxq; 663 s->ntxq = sc->params.nports * iaq.ntxq; 664 s->neq = s->ntxq + s->nrxq; /* the free list in an rxq is an eq */ 665 s->neq += sc->params.nports + 1;/* ctrl queues: 1 per port + 1 mgmt */ 666 s->niq = s->nrxq + 1; /* 1 extra for firmware event queue */ 667 668 s->rxq = malloc(s->nrxq * sizeof(struct sge_rxq), M_CXGBE, 669 M_ZERO | M_WAITOK); 670 s->txq = malloc(s->ntxq * sizeof(struct sge_txq), M_CXGBE, 671 M_ZERO | M_WAITOK); 672 s->iqmap = malloc(s->niq * sizeof(struct sge_iq *), M_CXGBE, 673 M_ZERO | M_WAITOK); 674 s->eqmap = malloc(s->neq * sizeof(struct sge_eq *), M_CXGBE, 675 M_ZERO | M_WAITOK); 676 677 sc->irq = malloc(sc->intr_count * sizeof(struct irq), M_CXGBE, 678 M_ZERO | M_WAITOK); 679 680 /* 681 * Second pass over the ports. This time we know the number of rx and 682 * tx queues that each port should get. 683 */ 684 rqidx = tqidx = 0; 685 for_each_port(sc, i) { 686 struct port_info *pi = sc->port[i]; 687 struct vi_info *vi; 688 689 if (pi == NULL) 690 continue; 691 692 for_each_vi(pi, j, vi) { 693 vi->pi = pi; 694 vi->qsize_rxq = t4_qsize_rxq; 695 vi->qsize_txq = t4_qsize_txq; 696 697 vi->first_rxq = rqidx; 698 vi->first_txq = tqidx; 699 vi->tmr_idx = t4_tmr_idx; 700 vi->pktc_idx = t4_pktc_idx; 701 vi->nrxq = j == 0 ? iaq.nrxq: 1; 702 vi->ntxq = j == 0 ? iaq.ntxq: 1; 703 704 rqidx += vi->nrxq; 705 tqidx += vi->ntxq; 706 707 vi->rsrv_noflowq = 0; 708 } 709 } 710 711 rc = t4_setup_intr_handlers(sc); 712 if (rc != 0) { 713 device_printf(dev, 714 "failed to setup interrupt handlers: %d\n", rc); 715 goto done; 716 } 717 718 rc = bus_generic_attach(dev); 719 if (rc != 0) { 720 device_printf(dev, 721 "failed to attach all child ports: %d\n", rc); 722 goto done; 723 } 724 725 device_printf(dev, 726 "%d ports, %d %s interrupt%s, %d eq, %d iq\n", 727 sc->params.nports, sc->intr_count, sc->intr_type == INTR_MSIX ? 728 "MSI-X" : "MSI", sc->intr_count > 1 ? "s" : "", sc->sge.neq, 729 sc->sge.niq); 730 731 done: 732 if (rc != 0) 733 t4_detach_common(dev); 734 else 735 t4_sysctls(sc); 736 737 return (rc); 738 } 739 740 static void 741 get_regs(struct adapter *sc, struct t4_regdump *regs, uint8_t *buf) 742 { 743 744 /* 0x3f is used as the revision for VFs. */ 745 regs->version = chip_id(sc) | (0x3f << 10); 746 t4_get_regs(sc, buf, regs->len); 747 } 748 749 static void 750 t4_clr_vi_stats(struct adapter *sc) 751 { 752 int reg; 753 754 for (reg = A_MPS_VF_STAT_TX_VF_BCAST_BYTES_L; 755 reg <= A_MPS_VF_STAT_RX_VF_ERR_FRAMES_H; reg += 4) 756 t4_write_reg(sc, VF_MPS_REG(reg), 0); 757 } 758 759 static int 760 t4vf_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data, int fflag, 761 struct thread *td) 762 { 763 int rc; 764 struct adapter *sc = dev->si_drv1; 765 766 rc = priv_check(td, PRIV_DRIVER); 767 if (rc != 0) 768 return (rc); 769 770 switch (cmd) { 771 case CHELSIO_T4_GETREG: { 772 struct t4_reg *edata = (struct t4_reg *)data; 773 774 if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len) 775 return (EFAULT); 776 777 if (edata->size == 4) 778 edata->val = t4_read_reg(sc, edata->addr); 779 else if (edata->size == 8) 780 edata->val = t4_read_reg64(sc, edata->addr); 781 else 782 return (EINVAL); 783 784 break; 785 } 786 case CHELSIO_T4_SETREG: { 787 struct t4_reg *edata = (struct t4_reg *)data; 788 789 if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len) 790 return (EFAULT); 791 792 if (edata->size == 4) { 793 if (edata->val & 0xffffffff00000000) 794 return (EINVAL); 795 t4_write_reg(sc, edata->addr, (uint32_t) edata->val); 796 } else if (edata->size == 8) 797 t4_write_reg64(sc, edata->addr, edata->val); 798 else 799 return (EINVAL); 800 break; 801 } 802 case CHELSIO_T4_REGDUMP: { 803 struct t4_regdump *regs = (struct t4_regdump *)data; 804 int reglen = t4_get_regs_len(sc); 805 uint8_t *buf; 806 807 if (regs->len < reglen) { 808 regs->len = reglen; /* hint to the caller */ 809 return (ENOBUFS); 810 } 811 812 regs->len = reglen; 813 buf = malloc(reglen, M_CXGBE, M_WAITOK | M_ZERO); 814 get_regs(sc, regs, buf); 815 rc = copyout(buf, regs->data, reglen); 816 free(buf, M_CXGBE); 817 break; 818 } 819 case CHELSIO_T4_CLEAR_STATS: { 820 int i, v; 821 u_int port_id = *(uint32_t *)data; 822 struct port_info *pi; 823 struct vi_info *vi; 824 825 if (port_id >= sc->params.nports) 826 return (EINVAL); 827 pi = sc->port[port_id]; 828 829 /* MAC stats */ 830 pi->tx_parse_error = 0; 831 t4_clr_vi_stats(sc); 832 833 /* 834 * Since this command accepts a port, clear stats for 835 * all VIs on this port. 836 */ 837 for_each_vi(pi, v, vi) { 838 if (vi->flags & VI_INIT_DONE) { 839 struct sge_rxq *rxq; 840 struct sge_txq *txq; 841 842 for_each_rxq(vi, i, rxq) { 843 #if defined(INET) || defined(INET6) 844 rxq->lro.lro_queued = 0; 845 rxq->lro.lro_flushed = 0; 846 #endif 847 rxq->rxcsum = 0; 848 rxq->vlan_extraction = 0; 849 } 850 851 for_each_txq(vi, i, txq) { 852 txq->txcsum = 0; 853 txq->tso_wrs = 0; 854 txq->vlan_insertion = 0; 855 txq->imm_wrs = 0; 856 txq->sgl_wrs = 0; 857 txq->txpkt_wrs = 0; 858 txq->txpkts0_wrs = 0; 859 txq->txpkts1_wrs = 0; 860 txq->txpkts0_pkts = 0; 861 txq->txpkts1_pkts = 0; 862 mp_ring_reset_stats(txq->r); 863 } 864 } 865 } 866 break; 867 } 868 case CHELSIO_T4_SCHED_CLASS: 869 rc = t4_set_sched_class(sc, (struct t4_sched_params *)data); 870 break; 871 case CHELSIO_T4_SCHED_QUEUE: 872 rc = t4_set_sched_queue(sc, (struct t4_sched_queue *)data); 873 break; 874 default: 875 rc = ENOTTY; 876 } 877 878 return (rc); 879 } 880 881 static device_method_t t4vf_methods[] = { 882 DEVMETHOD(device_probe, t4vf_probe), 883 DEVMETHOD(device_attach, t4vf_attach), 884 DEVMETHOD(device_detach, t4_detach_common), 885 886 DEVMETHOD_END 887 }; 888 889 static driver_t t4vf_driver = { 890 "t4vf", 891 t4vf_methods, 892 sizeof(struct adapter) 893 }; 894 895 static device_method_t t5vf_methods[] = { 896 DEVMETHOD(device_probe, t5vf_probe), 897 DEVMETHOD(device_attach, t4vf_attach), 898 DEVMETHOD(device_detach, t4_detach_common), 899 900 DEVMETHOD_END 901 }; 902 903 static driver_t t5vf_driver = { 904 "t5vf", 905 t5vf_methods, 906 sizeof(struct adapter) 907 }; 908 909 static device_method_t t6vf_methods[] = { 910 DEVMETHOD(device_probe, t6vf_probe), 911 DEVMETHOD(device_attach, t4vf_attach), 912 DEVMETHOD(device_detach, t4_detach_common), 913 914 DEVMETHOD_END 915 }; 916 917 static driver_t t6vf_driver = { 918 "t6vf", 919 t6vf_methods, 920 sizeof(struct adapter) 921 }; 922 923 static driver_t cxgbev_driver = { 924 "cxgbev", 925 cxgbe_methods, 926 sizeof(struct port_info) 927 }; 928 929 static driver_t cxlv_driver = { 930 "cxlv", 931 cxgbe_methods, 932 sizeof(struct port_info) 933 }; 934 935 static driver_t ccv_driver = { 936 "ccv", 937 cxgbe_methods, 938 sizeof(struct port_info) 939 }; 940 941 static devclass_t t4vf_devclass, t5vf_devclass, t6vf_devclass; 942 static devclass_t cxgbev_devclass, cxlv_devclass, ccv_devclass; 943 944 DRIVER_MODULE(t4vf, pci, t4vf_driver, t4vf_devclass, 0, 0); 945 MODULE_VERSION(t4vf, 1); 946 MODULE_DEPEND(t4vf, t4nex, 1, 1, 1); 947 948 DRIVER_MODULE(t5vf, pci, t5vf_driver, t5vf_devclass, 0, 0); 949 MODULE_VERSION(t5vf, 1); 950 MODULE_DEPEND(t5vf, t5nex, 1, 1, 1); 951 952 DRIVER_MODULE(t6vf, pci, t6vf_driver, t6vf_devclass, 0, 0); 953 MODULE_VERSION(t6vf, 1); 954 MODULE_DEPEND(t6vf, t6nex, 1, 1, 1); 955 956 DRIVER_MODULE(cxgbev, t4vf, cxgbev_driver, cxgbev_devclass, 0, 0); 957 MODULE_VERSION(cxgbev, 1); 958 959 DRIVER_MODULE(cxlv, t5vf, cxlv_driver, cxlv_devclass, 0, 0); 960 MODULE_VERSION(cxlv, 1); 961 962 DRIVER_MODULE(ccv, t6vf, ccv_driver, ccv_devclass, 0, 0); 963 MODULE_VERSION(ccv, 1); 964