xref: /freebsd/sys/dev/cxgbe/t4_smt.h (revision 95ee2897e98f5d444f26ed2334cc7c439f9c16c6)
12dae2a74SNavdeep Parhar /*-
2*4d846d26SWarner Losh  * SPDX-License-Identifier: BSD-2-Clause
32dae2a74SNavdeep Parhar  *
42dae2a74SNavdeep Parhar  * Copyright (c) 2018 Chelsio Communications, Inc.
52dae2a74SNavdeep Parhar  * All rights reserved.
62dae2a74SNavdeep Parhar  *
72dae2a74SNavdeep Parhar  * Redistribution and use in source and binary forms, with or without
82dae2a74SNavdeep Parhar  * modification, are permitted provided that the following conditions
92dae2a74SNavdeep Parhar  * are met:
102dae2a74SNavdeep Parhar  * 1. Redistributions of source code must retain the above copyright
112dae2a74SNavdeep Parhar  *    notice, this list of conditions and the following disclaimer.
122dae2a74SNavdeep Parhar  * 2. Redistributions in binary form must reproduce the above copyright
132dae2a74SNavdeep Parhar  *    notice, this list of conditions and the following disclaimer in the
142dae2a74SNavdeep Parhar  *    documentation and/or other materials provided with the distribution.
152dae2a74SNavdeep Parhar  *
162dae2a74SNavdeep Parhar  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
172dae2a74SNavdeep Parhar  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
182dae2a74SNavdeep Parhar  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
192dae2a74SNavdeep Parhar  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
202dae2a74SNavdeep Parhar  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
212dae2a74SNavdeep Parhar  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
222dae2a74SNavdeep Parhar  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
232dae2a74SNavdeep Parhar  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
242dae2a74SNavdeep Parhar  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
252dae2a74SNavdeep Parhar  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
262dae2a74SNavdeep Parhar  * SUCH DAMAGE.
272dae2a74SNavdeep Parhar  *
282dae2a74SNavdeep Parhar  */
292dae2a74SNavdeep Parhar 
302dae2a74SNavdeep Parhar #ifndef __T4_SMT_H
312dae2a74SNavdeep Parhar #define __T4_SMT_H
322dae2a74SNavdeep Parhar 
332dae2a74SNavdeep Parhar /* identifies sync vs async SMT_WRITE_REQs */
342dae2a74SNavdeep Parhar #define S_SYNC_WR    12
352dae2a74SNavdeep Parhar #define V_SYNC_WR(x) ((x) << S_SYNC_WR)
362dae2a74SNavdeep Parhar #define F_SYNC_WR    V_SYNC_WR(1)
372dae2a74SNavdeep Parhar 
382dae2a74SNavdeep Parhar enum { SMT_SIZE = 256 };     /* # of SMT entries */
392dae2a74SNavdeep Parhar 
402dae2a74SNavdeep Parhar enum {
412dae2a74SNavdeep Parhar 	SMT_STATE_SWITCHING,	/* entry is being used by a switching filter */
422dae2a74SNavdeep Parhar 	SMT_STATE_UNUSED,	/* entry not in use */
432dae2a74SNavdeep Parhar 	SMT_STATE_ERROR		/* entry is in error state */
442dae2a74SNavdeep Parhar };
452dae2a74SNavdeep Parhar 
462dae2a74SNavdeep Parhar struct smt_entry {
472dae2a74SNavdeep Parhar 	uint16_t state;			/* entry state */
482dae2a74SNavdeep Parhar 	uint16_t idx;			/* entry index */
492dae2a74SNavdeep Parhar 	uint32_t iqid;                  /* iqid for reply to write_sme */
502dae2a74SNavdeep Parhar 	struct sge_wrq *wrq;            /* queue to use for write_sme */
512dae2a74SNavdeep Parhar 	uint16_t pfvf;			/* pfvf number */
522dae2a74SNavdeep Parhar 	volatile int refcnt;		/* entry reference count */
532dae2a74SNavdeep Parhar 	uint8_t smac[ETHER_ADDR_LEN];	/* source MAC address */
542dae2a74SNavdeep Parhar 	struct mtx lock;
552dae2a74SNavdeep Parhar };
562dae2a74SNavdeep Parhar 
572dae2a74SNavdeep Parhar struct smt_data {
582dae2a74SNavdeep Parhar 	struct rwlock lock;
592dae2a74SNavdeep Parhar 	u_int smt_size;
602dae2a74SNavdeep Parhar 	struct smt_entry smtab[];
612dae2a74SNavdeep Parhar };
622dae2a74SNavdeep Parhar 
632dae2a74SNavdeep Parhar 
642dae2a74SNavdeep Parhar int t4_init_smt(struct adapter *, int);
652dae2a74SNavdeep Parhar int t4_free_smt(struct smt_data *);
662dae2a74SNavdeep Parhar struct smt_entry *t4_find_or_alloc_sme(struct smt_data *, uint8_t *);
672dae2a74SNavdeep Parhar struct smt_entry *t4_smt_alloc_switching(struct smt_data *, uint8_t *);
682dae2a74SNavdeep Parhar int t4_smt_set_switching(struct adapter *, struct smt_entry *,
692dae2a74SNavdeep Parhar 					uint16_t, uint8_t *);
702dae2a74SNavdeep Parhar int t4_write_sme(struct smt_entry *);
712dae2a74SNavdeep Parhar int do_smt_write_rpl(struct sge_iq *, const struct rss_header *, struct mbuf *);
722dae2a74SNavdeep Parhar 
732dae2a74SNavdeep Parhar static inline void
t4_smt_release(struct smt_entry * e)742dae2a74SNavdeep Parhar t4_smt_release(struct smt_entry *e)
752dae2a74SNavdeep Parhar {
762dae2a74SNavdeep Parhar 	MPASS(e != NULL);
772dae2a74SNavdeep Parhar 	if (atomic_fetchadd_int(&e->refcnt, -1) == 1) {
782dae2a74SNavdeep Parhar 		mtx_lock(&e->lock);
792dae2a74SNavdeep Parhar 		e->state = SMT_STATE_UNUSED;
802dae2a74SNavdeep Parhar 		mtx_unlock(&e->lock);
812dae2a74SNavdeep Parhar 	}
822dae2a74SNavdeep Parhar 
832dae2a74SNavdeep Parhar }
842dae2a74SNavdeep Parhar 
852dae2a74SNavdeep Parhar int sysctl_smt(SYSCTL_HANDLER_ARGS);
862dae2a74SNavdeep Parhar 
872dae2a74SNavdeep Parhar #endif  /* __T4_SMT_H */
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