1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2018 Chelsio Communications, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 #include <sys/cdefs.h> 29 #include "opt_inet.h" 30 #include "opt_inet6.h" 31 32 #include <sys/param.h> 33 #include <sys/eventhandler.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/bus.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/rwlock.h> 41 #include <sys/socket.h> 42 #include <sys/sbuf.h> 43 #include <netinet/in.h> 44 45 #include "common/common.h" 46 #include "common/t4_msg.h" 47 #include "t4_smt.h" 48 49 /* 50 * Module locking notes: There is a RW lock protecting the SMAC table as a 51 * whole plus a spinlock per SMT entry. Entry lookups and allocations happen 52 * under the protection of the table lock, individual entry changes happen 53 * while holding that entry's spinlock. The table lock nests outside the 54 * entry locks. Allocations of new entries take the table lock as writers so 55 * no other lookups can happen while allocating new entries. Entry updates 56 * take the table lock as readers so multiple entries can be updated in 57 * parallel. An SMT entry can be dropped by decrementing its reference count 58 * and therefore can happen in parallel with entry allocation but no entry 59 * can change state or increment its ref count during allocation as both of 60 * these perform lookups. 61 * 62 * Note: We do not take references to ifnets in this module because both 63 * the TOE and the sockets already hold references to the interfaces and the 64 * lifetime of an SMT entry is fully contained in the lifetime of the TOE. 65 */ 66 67 /* 68 * Allocate a free SMT entry. Must be called with smt_data.lock held. 69 */ 70 struct smt_entry * 71 t4_find_or_alloc_sme(struct smt_data *s, uint8_t *smac) 72 { 73 struct smt_entry *end, *e; 74 struct smt_entry *first_free = NULL; 75 76 rw_assert(&s->lock, RA_WLOCKED); 77 for (e = &s->smtab[0], end = &s->smtab[s->smt_size]; e != end; ++e) { 78 if (atomic_load_acq_int(&e->refcnt) == 0) { 79 if (!first_free) 80 first_free = e; 81 } else { 82 if (e->state == SMT_STATE_SWITCHING) { 83 /* 84 * This entry is actually in use. See if we can 85 * re-use it? 86 */ 87 if (memcmp(e->smac, smac, ETHER_ADDR_LEN) == 0) 88 goto found_reuse; 89 } 90 } 91 } 92 if (first_free) { 93 e = first_free; 94 goto found; 95 } 96 return NULL; 97 98 found: 99 e->state = SMT_STATE_UNUSED; 100 found_reuse: 101 atomic_add_int(&e->refcnt, 1); 102 return e; 103 } 104 105 /* 106 * Write an SMT entry. Must be called with the entry locked. 107 */ 108 int 109 t4_write_sme(struct smt_entry *e) 110 { 111 struct smt_data *s; 112 struct sge_wrq *wrq; 113 struct adapter *sc; 114 struct wrq_cookie cookie; 115 struct cpl_smt_write_req *req; 116 struct cpl_t6_smt_write_req *t6req; 117 u8 row; 118 119 mtx_assert(&e->lock, MA_OWNED); 120 121 MPASS(e->wrq != NULL); 122 wrq = e->wrq; 123 sc = wrq->adapter; 124 MPASS(wrq->adapter != NULL); 125 s = sc->smt; 126 127 128 if (chip_id(sc) <= CHELSIO_T5) { 129 /* Source MAC Table (SMT) contains 256 SMAC entries 130 * organized in 128 rows of 2 entries each. 131 */ 132 req = start_wrq_wr(wrq, howmany(sizeof(*req), 16), &cookie); 133 if (req == NULL) 134 return (ENOMEM); 135 INIT_TP_WR(req, 0); 136 /* Each row contains an SMAC pair. 137 * LSB selects the SMAC entry within a row 138 */ 139 row = (e->idx >> 1); 140 if (e->idx & 1) { 141 req->pfvf1 = 0x0; 142 memcpy(req->src_mac1, e->smac, ETHER_ADDR_LEN); 143 /* fill pfvf0/src_mac0 with entry 144 * at prev index from smt-tab. 145 */ 146 req->pfvf0 = 0x0; 147 memcpy(req->src_mac0, s->smtab[e->idx - 1].smac, 148 ETHER_ADDR_LEN); 149 } else { 150 req->pfvf0 = 0x0; 151 memcpy(req->src_mac0, e->smac, ETHER_ADDR_LEN); 152 /* fill pfvf1/src_mac1 with entry 153 * at next index from smt-tab 154 */ 155 req->pfvf1 = 0x0; 156 memcpy(req->src_mac1, s->smtab[e->idx + 1].smac, 157 ETHER_ADDR_LEN); 158 } 159 } else { 160 /* Source MAC Table (SMT) contains 256 SMAC entries */ 161 t6req = start_wrq_wr(wrq, howmany(sizeof(*t6req), 16), &cookie); 162 if (t6req == NULL) 163 return (ENOMEM); 164 INIT_TP_WR(t6req, 0); 165 req = (struct cpl_smt_write_req *)t6req; 166 167 /* fill pfvf0/src_mac0 from smt-tab */ 168 req->pfvf0 = 0x0; 169 memcpy(req->src_mac0, s->smtab[e->idx].smac, ETHER_ADDR_LEN); 170 row = e->idx; 171 } 172 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SMT_WRITE_REQ, e->idx | 173 V_TID_QID(e->iqid))); 174 req->params = htonl(V_SMTW_NORPL(0) | 175 V_SMTW_IDX(row) | 176 V_SMTW_OVLAN_IDX(0)); 177 178 commit_wrq_wr(wrq, req, &cookie); 179 180 return (0); 181 } 182 183 /* 184 * Allocate an SMT entry for use by a switching rule. 185 */ 186 struct smt_entry * 187 t4_smt_alloc_switching(struct smt_data *s, uint8_t *smac) 188 { 189 struct smt_entry *e; 190 191 MPASS(s != NULL); 192 rw_wlock(&s->lock); 193 e = t4_find_or_alloc_sme(s, smac); 194 rw_wunlock(&s->lock); 195 return e; 196 } 197 198 /* 199 * Sets/updates the contents of a switching SMT entry that has been allocated 200 * with an earlier call to @t4_smt_alloc_switching. 201 */ 202 int 203 t4_smt_set_switching(struct adapter *sc, struct smt_entry *e, uint16_t pfvf, 204 uint8_t *smac) 205 { 206 int rc = 0; 207 208 if (atomic_load_acq_int(&e->refcnt) == 1) { 209 /* Setup the entry for the first time */ 210 mtx_lock(&e->lock); 211 e->wrq = &sc->sge.ctrlq[0]; 212 e->iqid = sc->sge.fwq.abs_id; 213 e->pfvf = pfvf; 214 e->state = SMT_STATE_SWITCHING; 215 memcpy(e->smac, smac, ETHER_ADDR_LEN); 216 rc = t4_write_sme(e); 217 mtx_unlock(&e->lock); 218 } 219 220 return (rc); 221 } 222 223 int 224 t4_init_smt(struct adapter *sc, int flags) 225 { 226 int i, smt_size; 227 struct smt_data *s; 228 229 smt_size = SMT_SIZE; 230 s = malloc(sizeof(*s) + smt_size * sizeof (struct smt_entry), M_CXGBE, 231 M_ZERO | flags); 232 if (!s) 233 return (ENOMEM); 234 235 s->smt_size = smt_size; 236 rw_init(&s->lock, "SMT"); 237 238 for (i = 0; i < smt_size; i++) { 239 struct smt_entry *e = &s->smtab[i]; 240 241 e->idx = i; 242 e->state = SMT_STATE_UNUSED; 243 mtx_init(&e->lock, "SMT_E", NULL, MTX_DEF); 244 atomic_store_rel_int(&e->refcnt, 0); 245 } 246 247 sc->smt = s; 248 249 return (0); 250 } 251 252 int 253 t4_free_smt(struct smt_data *s) 254 { 255 int i; 256 257 for (i = 0; i < s->smt_size; i++) 258 mtx_destroy(&s->smtab[i].lock); 259 rw_destroy(&s->lock); 260 free(s, M_CXGBE); 261 262 return (0); 263 } 264 265 int 266 do_smt_write_rpl(struct sge_iq *iq, const struct rss_header *rss, 267 struct mbuf *m) 268 { 269 struct adapter *sc = iq->adapter; 270 const struct cpl_smt_write_rpl *rpl = (const void *)(rss + 1); 271 unsigned int tid = GET_TID(rpl); 272 unsigned int smtidx = G_TID_TID(tid); 273 274 if (__predict_false(rpl->status != CPL_ERR_NONE)) { 275 struct smt_entry *e = &sc->smt->smtab[smtidx]; 276 log(LOG_ERR, 277 "Unexpected SMT_WRITE_RPL (%u) for entry at hw_idx %u\n", 278 rpl->status, smtidx); 279 mtx_lock(&e->lock); 280 e->state = SMT_STATE_ERROR; 281 mtx_unlock(&e->lock); 282 return (EINVAL); 283 } 284 285 return (0); 286 } 287 288 static char 289 smt_state(const struct smt_entry *e) 290 { 291 switch (e->state) { 292 case SMT_STATE_SWITCHING: return 'X'; 293 case SMT_STATE_ERROR: return 'E'; 294 default: return 'U'; 295 } 296 } 297 298 int 299 sysctl_smt(SYSCTL_HANDLER_ARGS) 300 { 301 struct adapter *sc = arg1; 302 struct smt_data *smt = sc->smt; 303 struct smt_entry *e; 304 struct sbuf *sb; 305 int rc, i, header = 0; 306 307 if (smt == NULL) 308 return (ENXIO); 309 310 rc = sysctl_wire_old_buffer(req, 0); 311 if (rc != 0) 312 return (rc); 313 314 sb = sbuf_new_for_sysctl(NULL, NULL, SMT_SIZE, req); 315 if (sb == NULL) 316 return (ENOMEM); 317 318 e = &smt->smtab[0]; 319 for (i = 0; i < smt->smt_size; i++, e++) { 320 mtx_lock(&e->lock); 321 if (e->state == SMT_STATE_UNUSED) 322 goto skip; 323 324 if (header == 0) { 325 sbuf_printf(sb, " Idx " 326 "Ethernet address State Users"); 327 header = 1; 328 } 329 sbuf_printf(sb, "\n%4u %02x:%02x:%02x:%02x:%02x:%02x " 330 "%c %5u", 331 e->idx, e->smac[0], e->smac[1], e->smac[2], 332 e->smac[3], e->smac[4], e->smac[5], 333 smt_state(e), atomic_load_acq_int(&e->refcnt)); 334 skip: 335 mtx_unlock(&e->lock); 336 } 337 338 rc = sbuf_finish(sb); 339 sbuf_delete(sb); 340 341 return (rc); 342 } 343